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Page 1: © 2004 Xilinx, Inc. All Rights Reserved EDK Overview

© 2004 Xilinx, Inc. All Rights Reserved

EDK Overview

Page 2: © 2004 Xilinx, Inc. All Rights Reserved EDK Overview

EDK Overview - 1 - 2 © 2004 Xilinx, Inc. All Rights Reserved For Academic Use Only

Embedded Design in an FPGA

• Embedded design in an FPGA consists of the following:– FPGA hardware design– C drivers for hardware– Software design

• RTOS versus Main + ISR

Page 3: © 2004 Xilinx, Inc. All Rights Reserved EDK Overview

EDK Overview - 1 - 3 © 2004 Xilinx, Inc. All Rights Reserved For Academic Use Only

PowerPC405 Core

Dedicated Hard IPFlexible Soft IP

RocketIO

PowerPC-based Embedded Design

Full system customization to meet

performance, functionality, and cost goals

DCR Bus

UART GPIOOn-Chip

PeripheralHi-Speed

PeripheralGB

E-Net

e.g.Memory

Controller

Arb

iter

On-Chip Peripheral Bus

OPB

Arb

iter

Processor Local Bus

Instruction Data

PLB

DSOCMBRAM

ISOCMBRAM

Off-ChipMemory

ZBT SSRAMDDR SDRAM

SDRAM

BusBridge

IBM CoreConnect™on-chip bus standardPLB, OPB, and DCR

Page 4: © 2004 Xilinx, Inc. All Rights Reserved EDK Overview

EDK Overview - 1 - 4 © 2004 Xilinx, Inc. All Rights Reserved For Academic Use Only

MicroBlaze-based Embedded Design

Flexible Soft IPMicroBlaze32-Bit RISC Core

UART 10/100E-Net

On-ChipPeripheral

Off-ChipMemory

FLASH/SRAM

LocalLink™FIFO Channels

0,1…….32

CustomFunctions

CustomFunctions

BRAM Local Memory

BusD-CacheBRAM

I-CacheBRAM

ConfigurableSizes

Arb

iter

Processor Local Bus

Instruction Data

PLBBus

Bridge

PowerPC405 Core

Dedicated Hard IP

Arb

iter

Processor Local Bus

Instruction Data

PLBBus

BridgeBus

Bridge

PowerPC405 Core

Dedicated Hard IP

PowerPC405 Core

Dedicated Hard IP

PowerPC405 Core

Dedicated Hard IPPossible inVirtex-II Pro

Hi-SpeedPeripheral

GB E-Net

e.g.Memory

Controller

Hi-SpeedPeripheralHi-Speed

PeripheralGB

E-NetGB

E-Net

e.g.Memory

Controller

e.g.Memory

Controller

Arb

iter OPB

On-Chip Peripheral Bus

Page 5: © 2004 Xilinx, Inc. All Rights Reserved EDK Overview

EDK Overview - 1 - 5 © 2004 Xilinx, Inc. All Rights Reserved For Academic Use Only

Embedded DevelopmentTool Flow Overview

Compiler/Linker

(Simulator)

C Code

Debugger

Standard Embedded SWDevelopment Flow

CPU code in on-chip memory

?CPU code in

off-chip memory

Download to Board & FPGA

Object Code

Standard FPGA HWDevelopment Flow

Synthesizer

Place & Route

Simulator

VHDL/Verilog

?

Download to FPGA

Page 6: © 2004 Xilinx, Inc. All Rights Reserved EDK Overview

EDK Overview - 1 - 6 © 2004 Xilinx, Inc. All Rights Reserved For Academic Use Only

EDK

• The Embedded Development Kit (EDK) consists of the following:– Xilinx Platform Studio – XPS– Base System Builder – BSB– Creating/Importing IP Wizard– Hardware generation tool – PlatGen– Library generation tool – LibGen– Simulation generation tool – SimGen– GNU software development tools– System verification tool – XMD– Processor IP– Drivers for IP– Documentation

• Use the GUI or the shell command tool to run the EDK tool

Page 7: © 2004 Xilinx, Inc. All Rights Reserved EDK Overview

EDK Overview - 1 - 7 © 2004 Xilinx, Inc. All Rights Reserved For Academic Use Only

Xilinx Platform Studio

Source Code Editor

Source Code Editor

System Diagram

View

System Diagram

ViewSystem Details View

System Details View

Integrated Hardware and Software System Development Tools

Integrated Hardware and Software System Development Tools

Page 8: © 2004 Xilinx, Inc. All Rights Reserved EDK Overview

EDK Overview - 1 - 8 © 2004 Xilinx, Inc. All Rights Reserved For Academic Use Only

XPS Functions

XPS

HW/SWSimulation

HW/SWDebug

Hardware Design

SoftwareDesign

• Project management– MHS or MSS file– XMP file

• Software application management

• Platform management– Tool flow settings– Software platform settings– Tool invocation– Debug and simulation

Page 9: © 2004 Xilinx, Inc. All Rights Reserved EDK Overview

EDK Overview - 1 - 9 © 2004 Xilinx, Inc. All Rights Reserved For Academic Use Only

Hardware Design Example

• We will build the following system from scratch (while no components are present in the system)

• We will start with Project Add/Edit Cores … (Dialog)

PLBBus

OPBBus

PLB BRAM

PLB BRAM

INTC

Timer

GPIO

GPIO

UART

MY IPGPIO

PLB2OPB

PLB BRAM Cntlr

PLB BRAM Cntlr

PPC

Page 10: © 2004 Xilinx, Inc. All Rights Reserved EDK Overview

EDK Overview - 1 - 10 © 2004 Xilinx, Inc. All Rights Reserved For Academic Use Only

Supported Platforms

• Operating systems– Windows 2000 (SP2, SP3, SP4)– Windows XP SP1– Solaris 2.8/5.8, 2.9/5.9– Linux Red Hat Enterprise 3.0

• FPGA families– Spartan-II (MicroBlaze)– Spartan-IIE (MicroBlaze)– Spartan III (MicroBlaze)– Virtex and Virtex E (MicroBlaze)– Virtex-II (MicroBlaze)– Virtex-II Pro (MicroBlaze and PowerPC)– Virtex-4 (MicroBlaze and PowerPC)

Page 11: © 2004 Xilinx, Inc. All Rights Reserved EDK Overview

EDK Overview - 1 - 11 © 2004 Xilinx, Inc. All Rights Reserved For Academic Use Only

BSB Supported Platforms

• Some of the Hardware boards– Avnet Virtex-II Pro Development Board– Avnet Spartan -III Evaluation Board– Memec design Spartan -IIE Development Boards– Memec design Virtex-II MicroBlaze Development Board– Memec design Virtex-II Pro Development Boards– Xilinx Spartan -III Starter Board– Xilinx ML300 board– Xilinx ML310 board– Xilinx XUP Virtex-II Pro Development System– Xilinx ML401, 403, 405 Virtex-4 boards

• Others available from the Board Vendor


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© 2004 Xilinx, Inc. All Rights Reserved Hardware Design

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