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00000-A Rev. 20100602a Renesas Electronics Corporation ©2010. Renesas Electronics Corporation, All rights reserved. 2022年3年22年 V850 Architecture Overview High performance and Energy Efficient Bobby Wong

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Page 1: 00000-A Rev. 20100602a Renesas Electronics Corporation ©2010. Renesas Electronics Corporation, All rights reserved. 2015/10/19 V850 Architecture Overview

00000-A

Rev. 20100602a

Renesas Electronics Corporation

©2010. Renesas Electronics Corporation, All rights reserved.

2023年4月20日

V850 Architecture Overview

High performance and Energy Efficient

Bobby Wong

Page 2: 00000-A Rev. 20100602a Renesas Electronics Corporation ©2010. Renesas Electronics Corporation, All rights reserved. 2015/10/19 V850 Architecture Overview

©2010. Renesas Electronics Corporation, All rights reserved.2

Agenda

V850 Positioning among the REA Products

V850 MCU family Naming convention Product family

V850ES Architecture for Performance Pipeline enhancements Instruction enhancement

V850ES Low Power and Energy Efficiency High performance at low freqency Flexible standby modes

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©2010. Renesas Electronics Corporation, All rights reserved.3

WiFiSH, RX, R8C

High-end Connectivity

V850ESV850ES50MHz50MHz

RX600RX600100MHz100MHz

SH-2ASH-2A200MHz200MHz

Ultra Low Power

78K078K010MHz10MHz

78K0R78K0R20MHz20MHz

V850ESV850ES20MHz20MHz

R8CR8C20MHz20MHz

M16CM16C32MHz32MHz

R32CR32C50MHz50MHz

Application Focused Solutions

TFT LCD Control

H8S/SXH8S/SX50MHz50MHz

RX600RX600100MHz100MHz

SH-2ASH-2A200MHz200MHz

General Purpose 1

6-b

it

16

-bit

32

-bit

MCU and MPU Solutions

32

-bit

32

-bit

32

-bit

8-b

it

16

-bit

Application Processor

SH-3SH-3200MHz200MHz

SH-4SH-4240MHz240MHz

SH-4ASH-4A600MHz600MHz3

2-b

it

32

-bit

32

-bit

32

-bit

32

-bit

32

-bit

32

-bit

Motor ControlSH, RX, R8C

Capacitive Touch

R8C

Industrial CANR8C, R32C, SH

Lighting78K0

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©2010. Renesas Electronics Corporation, All rights reserved.4

MCU Naming Convention

V850ES

Line up

H : 5V GPJ : 3V GP

M : High end GP I : Motor ASSP

/ J G3

CPU Core Type

V850 : V850V850E : V850E1V850ES : V850ESV850E2 : V850E2

-L

Spec/ Pin count

C : 40/48pinE : 64pinF : 80pinG : 100pin

H : 128pinJ : 144pinK : 176pinL : 208pin

Option

-L : Low Power-H : High Performance/USB-U/-E : USB Host/Ethernet

Generation

The bigger the number, the later the generation

“x” means a wildcardV850ES/Jx3-L, V850ES/Hx3

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©2010. Renesas Electronics Corporation, All rights reserved.5

V850ES/Jx362 DMIPS v2.1

V850ES/Jx362 DMIPS v2.1

V850ES/Jx3-U81 DMIPS v2.1

USB Device + Host

V850ES/Jx3-U81 DMIPS v2.1

USB Device + Host

V850ES/Jx3-H81 DMIPS v2.1

USB Device

V850ES/Jx3-H81 DMIPS v2.1

USB Device

General Purpose

Max Freq: 32MHzVoltage: 2.85 – 3.6VPins: 100-144Flash: 385-1024 KBRAM: 32-60 KB

Connectivity

Max Freq: 48MHzVoltage: 2.85-3.6VPins: 48 -128Flash: 16-512 KBRAM: 8-56KB

Max Freq: 48MHzVoltage 2.85-3.6VPins: 100-128Flash: 384-512 KBRAM: 48-56KB

V850ES/Jx3-LSTOP Current 1.5uA

V850ES/Jx3-LSTOP Current 1.5uA

Ultra Low PowerGeneral Purpose

Max Freq: 20MHzVoltage: 2.0 -3.6VPins: 80 - 100Flash: 256 - 512KBRAM: 32 - 40KB

V850ES/Jx3-E84 DMIPS v2.1

Eth MAC + USB Device

V850ES/Jx3-E84 DMIPS v2.1

Eth MAC + USB Device

Max Freq: 50MHzVoltage: 2.85-3.6VPins: 128-144Flash: 256-512 KBRAM: 76-128KB

Low PowerConnectivity

V850ES/Jx3-LUSB Device

V850ES/Jx3-LUSB Device

Max Freq: 20MHzVoltage 2.85-3.6VPins: 100Flash: 256 - 512 KBRAM: 40 KB

V850 MCU Products in 2010

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©2010. Renesas Electronics Corporation, All rights reserved.6

What is unique about V850 MCUs?

High performance in Small Package

V850ES delivers 1.9DMIPS/MHz as small as 7x7mm 48-pin package

Energy Efficient for Portable Application

V850ES/Jx3-L delivers 0.3mA/DMIPS

Flexible sleep and wake up for portable application

Radio can wake up sleeping V850 by sending data/clock on CSI

Fast Response Time for control

Minimum 4 cycles compared to Cortex-M3 12 cycles

High density Flash with automotive reliability

Transparent Error Correction Code embedded in flash

1

1 Source: http://www.arm.com/products/processors/cortex-m/cortex-m3.php

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V850ES MCU ArchitectureHigh Performance and Low Power

Page 8: 00000-A Rev. 20100602a Renesas Electronics Corporation ©2010. Renesas Electronics Corporation, All rights reserved. 2015/10/19 V850 Architecture Overview

©2010. Renesas Electronics Corporation, All rights reserved.8

V850 Architecture

Harvard Architecture Separate Instruction and Data buses to reduce congestion from the von

Neumann architecture single bus architecture

Bus Control Unit with DMA Data transfer without MCU intervention

MCU can continue execution – increase performance

DMA bring data in/out – increase bandwidth

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©2010. Renesas Electronics Corporation, All rights reserved.9

Enhanced Pipeline Delivering High Performance

Enhanced 5-stage pipeline with Branch/Load Pipe and Non-Block Load/Store delivering 1.9DMIPS/MHz

Branch address can be calculated in ID stage to reduce typical branch penalty

Load/store buffer hide 1 clock cycle memory latency

Page 10: 00000-A Rev. 20100602a Renesas Electronics Corporation ©2010. Renesas Electronics Corporation, All rights reserved. 2015/10/19 V850 Architecture Overview

©2010. Renesas Electronics Corporation, All rights reserved.10

Branch/Load Pipe hides latency

Typical BEQ instruction: BEQ REG1, REG2, Immediate Compare REG1 and REG2 in ALU (EX stage) Address calculation can only be done in EX stage

V850 Conditional Branch: BCOND Immediate Branch using Flag such as Zero, Carry, Negative and etc Address calculation is done in ID stage

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©2010. Renesas Electronics Corporation, All rights reserved.11

Branch/Load Pipe hides latency

Typical LOAD instruction: LD REG1, REG2, Immediate

CLK5:Write data to REG1

CLK2:Resolve REG2

CLK4:Load data

CLK3:Calculate Address

CLK1: LD instruction is fetch

V850 Short LOAD instruction: SLD REG1, Immediate

CLK1: SLD instruction is fetch

CLK2: Calculate Address by adding Immediate to a special element register

CLK3, 4Load data and write to Reg1

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Load/Store Buffer reduces stalling pipe

CLK1: LD instruction

CLK2:LD instruction

CLK2:Next Instruction

CLK3:LD instruction

CLK3:Next Instruction

CLK4:LD instruction

CLK4:Next Instruction

CLK 5 and afterStall of LD stalls the whole pipe

Load/store stalls a traditional RISC 5-stage pipeline

Enhanced load/store buffer reduces pipeline stall

LD instruction

Next Instruction

Page 13: 00000-A Rev. 20100602a Renesas Electronics Corporation ©2010. Renesas Electronics Corporation, All rights reserved. 2015/10/19 V850 Architecture Overview

©2010. Renesas Electronics Corporation, All rights reserved.13

Instruction Set For Performance and Fast Control

Fast computation Saturated arithmetic operation 16x16 hardware multiplier to support fast multiplication Single cycle shift with barrel shift hardware Single cycle bit manipulation operation Single cycle byte swap

Fast Response Conditional Branch

– Branch based on Flag (C, Z and etc) hide 1 clock latency

Table of Function Call– Faster address calculation for long call

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©2010. Renesas Electronics Corporation, All rights reserved.14

Low Power Consumption

Enhanced pipeline delivers high performance at 1.9DMIPS/MHz (v2.1)

V850ES can operate at a low frequency to achieve the same processing performance as Cortex-M3 (1.25 DMIPS/MHz)

Lower frequency consumes less power

DMIPS (2.1) DMIPS/MHz

CPU Freq. 2

Flash Freq. 2 DMIPS (2.1) 3

Run Current3.3V 25C2

EnergyEfficiency

A Cortex-M3 based MCU 1.25 36MHz

24 MHz(1 wait state @ 36MHz)(max Flash freq = 24MHz)

40 DMIPS 17.3mA0.4mA/DMIPS

V850ES/Jx3-L 1.95 20MHz20 MHz (0 wait state)(max Flash freq = 32MHz)

39 DMIPS 12mA

0.3mA/DMIPS

1 Source: http://www.arm.com/products/processors/cortex-m/cortex-m3.php2 Based on values stated in an MCU vendor’s Cortex M3 based MCU datasheet3 Based on internal benchmarking

1

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©2010. Renesas Electronics Corporation, All rights reserved.15

Low Power Consumption

Enhanced pipeline delivers high performance at 1.9DMIPS/MHz (v2.1)

V850ES can operate at a low frequency to achieve the same processing performance as Cortex-M3 (1.25 DMIPS/MHz)

Lower frequency consumes less power

DMIPS (2.1) DMIPS/MHz

CPU Freq. 2

Flash Freq. 2DMIPS (2.1) 3

Run Current3.3V 25C2

EnergyEfficiency

A Cortex-M3 based MCU 1.25 36MHz

24 MHz(1 wait state @ 36MHz)(max Flash freq = 24MHz)

40 DMIPS 17.3mA 0.4mA/DMIPS

V850ES/Jx3-L 1.95 20MHz20 MHz (0 wait state)(max Flash freq = 32MHz)

39 DMIPS 12mA 0.3mA/DMIPS

1 Source: http://www.arm.com/products/processors/cortex-m/cortex-m3.php2 Based on values stated in an MCU vendor’s Cortex M3 based MCU datasheet3 Based on internal benchmarking

1

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Different Standby Modes and Options

Different operation modes to tailor application needs

Mode Condition

32kHzOsc. Ckt.

Main Osc.Ckt.

PLL CPU Peripherals Regulator Flash RAM/Register

RTC Others

RUN ON2 ON ON2 ON ON ON ON ON Retained

2 32kHz oscillator/PLL can be switched on/off

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Different Standby Modes and Options

Different operation modes to tailor application needs

Mode Condition

32kHzOsc.Ckt.

Main Osc.Ckt.

PLL CPU Peripherals Regulator Flash RAM/Register

RTC Others

RUN ON2 ON ON2 ON ON ON ON ON Retained

HALT ON2 ON ON2 STOP ON ON ON ON Retained

2 32kHz oscillator/PLL can be switched on/off

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©2010. Renesas Electronics Corporation, All rights reserved.18

Different Standby Modes and Options

Different operation modes to tailor application needs

Mode Condition

32kHzOsc.Ckt.

Main Osc.Ckt.

PLL CPU Peripherals Regulator Flash RAM/Register

RTC Others

RUN ON2 ON ON2 ON ON ON ON ON Retained

HALT ON2 ON ON2 STOP ON ON ON ON Retained

IDLE1 ON2 ON ON2 STOP STOP1 STOP1 ON ON Retained

1 RTC and some peripherals such as UART can be left on2 32kHz oscillator/PLL can be switched on/off

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Different Standby Modes and Options

Different operation modes to tailor application needs

Mode Condition

32kHzOsc.Ckt.

Main Osc.Ckt.

PLL CPU Peripherals Regulator Flash RAM/Register

RTC Others

RUN ON2 ON ON2 ON ON ON ON ON Retained

HALT ON2 ON ON2 STOP ON ON ON ON Retained

IDLE1 ON2 ON ON2 STOP STOP1 STOP1 ON ON Retained

IDLE2 ON2 ON ON2 STOP STOP1 STOP1 ON OFF Retained

1 RTC and some peripherals such as UART can be left on2 32kHz oscillator/PLL can be switched on/off

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Different Standby Modes and Options

Different operation modes to tailor application needs

Mode Condition

32kHzOsc.Ckt.

Main Osc.Ckt.

PLL CPU Peripherals Regulator Flash RAM/Register

RTC Others

RUN ON2 ON ON2 ON ON ON ON ON Retained

HALT ON2 ON ON2 STOP ON ON ON ON Retained

IDLE1 ON2 ON ON2 STOP STOP1 STOP1 ON ON Retained

IDLE2 ON2 ON ON2 STOP STOP1 STOP1 ON OFF Retained

STOP ON2 STOP STOP STOP STOP1 STOP1 Low Power OFF Retained

1 RTC and some peripherals such as UART can be left on2 32kHz oscillator/PLL can be switched on/off

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©2010. Renesas Electronics Corporation, All rights reserved.21

Different Standby Modes and Options

Different operation modes to tailor application needs

Mode Condition

32kHzOsc.Ckt.

Main Osc.Ckt.

PLL CPU Peripherals Regulator Flash RAM/Register

RTC Others

RUN ON2 ON ON2 ON ON ON ON ON Retained

HALT ON2 ON ON2 STOP ON ON ON ON Retained

IDLE1 ON2 ON ON2 STOP STOP1 STOP1 ON ON Retained

IDLE2 ON2 ON ON2 STOP STOP1 STOP1 ON OFF Retained

STOP ON2 STOP STOP STOP STOP1 STOP1 Low Power OFF Retained

RTC Backup(Jx3-L, with

384KB or up)

ON STOP STOP STOP ON STOP OFF OFF Only RTC Registers

1 RTC and some peripherals such as UART can be left on2 32kHz oscillator can be switched on/off

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Comparison to a Cortex-M3-based MCU

Stop Mode Current

048

1216

Stop Mode

uA

Cortex-M3 based MCUV850ES/Jx3-L

DMIPS (2.1) DMIPS/MHz

CPU Freq. 1

Flash Freq. 1 DMIPS (2.1) 2

Run Current3.3V 25C1

EnergyEfficiency

A Cortex M3-based MCU

1.25 36MHz24 MHz(1 wait state @ 36MHz)

40 DMIPS 17.3mA 0.4mA/DMIPS

V850ES/Jx3-L 1.95 20MHz 20 MHz (0 wait state) 39 DMIPS 12mA 0.3mA/DMIPS

1 Based on values stated in an MCU vendor’s Cortex M3 based MCU datasheet 2 Based on internal benchmarking

1

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64 KB

32 KB

128 KB

256 KB

384 KB

512 KB

768 KB

1 MB

48pin 80pin 100pin 128pin 144pin

16 KB

40pin

Scalable Family to Meet Different Cost Structure

64pin

Jx3-L

Jx3-LJx3-L

Jx3-L

Jx3 General Purpose

Jx3-L Low Power

Jx3

Jx3-L

Jx3-L

Jx3-L

Jx3-L

Jx3-L

Jx3-L

2010/11 Product Expansion

Jx3-HJx3-HJx3-H

Jx3-HJx3-HJx3-H

Jx3-LJx3-LJx3-L

Jx3-HJx3-HJx3-H

Jx3-LJx3-LJx3-L

Jx3-HJx3-HJx3-H

Jx3-HJx3-HJx3-H Jx3-H Jx3-H

Jx3-E

Jx3-L

Jx3-H

Jx3-U

Jx3-H

Jx3-U

Jx3-E Jx3-E

Jx3

Jx3

Jx3-L

Jx3-H

Jx3-U

Jx3-H

Jx3-U

Jx3-E Jx3-E

Jx3

Jx3 Jx3

Jx3 Jx3

Jx3-E Ethernet + USB device

Jx3-U USB host + USB device

Jx3-H USB device

Performance: 39 – 90 DMIPS (v2.1)Packages: 40 – 144 PinsFlash Memory: 16k - 1M bytes

Jx3-L Low Power + USB device

Jx3-L

Jx3-L

Jx3-L

Page 24: 00000-A Rev. 20100602a Renesas Electronics Corporation ©2010. Renesas Electronics Corporation, All rights reserved. 2015/10/19 V850 Architecture Overview

©2010. Renesas Electronics Corporation, All rights reserved.©2010. Renesas Electronics Corporation, All rights reserved.

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