010.133 digital computer concept and practice copyright 2012 by jaejin lee datapath

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010.133 Digital Computer Concept and Practice Copyright ©2012 by Jaejin Lee Datapath Datapath

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Digital Computer Concept and Practice Copyright ©2012 by Jaejin Lee 3 A 32-bit Datapath Register file + ALU Control bits Description AAspecifies a register for the value on the bus A BAspecifies a register for the value on the bus B DA specifies a register to which the value on the bus D is loaded AS selects one between the value of a register and Address in for the value on the bus A BS selects one between the value of a register and Constant in for the value on the bus B FSselects an ALU operation DS selects one between the result of the ALU and the data from the memory for the value on the bus D RW stores the value on the bus D to the register specified by DA

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Page 1: 010.133 Digital Computer Concept and Practice Copyright 2012 by Jaejin Lee Datapath

010.133 Digital Computer Concept and PracticeCopyright ©2012 by Jaejin Lee

DatapathDatapath

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010.133 Digital Computer Concept and PracticeCopyright ©2012 by Jaejin Lee 2

Digital SystemsDigital systems process digital information

0 and 1Datapath + control unitCPUs too

Datapath A collection of functional units, registers, and interconnections between them that together perform data-processing operations

Control unit (CU) Controls operations of the datapath and determines the sequence of the operationsCoordinates interactions between the datapath and main memory

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010.133 Digital Computer Concept and PracticeCopyright ©2012 by Jaejin Lee 3

A 32-bit DatapathRegister file + ALU

Control bits Description

AA specifies a register for the value on the bus A

BA specifies a register for the value on the bus B

DA specifies a register to which the value on the bus D is loaded

ASselects one between the value of a register and Addressin for the value on the bus A

BSselects one between the value of a register and Constantin for the value on the bus B

FS selects an ALU operation

DSselects one between the result of the ALU and the data from the memory for the value on the bus D

RW stores the value on the bus D to the register specified by DA

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010.133 Digital Computer Concept and PracticeCopyright ©2012 by Jaejin Lee 4

Simple MemoryAs an array of 2m n-bit registersWrite occurs on the positive edge of the next clock cycleExample: 64K × 32 memory

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Attaching Memory to DatapathMW

enables the value that appears on the bus B to be written to the memory location specified by the address on the bus A

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Control WordsA collection of control bits are called a control word

Provided by the control unit in a prescribed mannerIts content determines the operation performed in the datapath and memory

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010.133 Digital Computer Concept and PracticeCopyright ©2012 by Jaejin Lee 7

MicrooperationsThe elementary operations on the data stored in the registers

Loading a constant value to a registerLoading the content of one register to anotherAdding the contents of two registers and storing the result to anotherStoring the content of one register in the memory...

In our case, each microopration completes in a single clock cycle

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The Function Table of the ALU

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Register Transfer MicrooperationsU ← V

U and V are registers (possibly the same)V may be a constant The content of register or a constant V is transferred to the register U

The content of U is overwritten on the positive edge of the next clock cycleThe content of V remains unchanged

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Arithmetic MicrooperationsU ← V opa W

U and V are registers, and W may be a register or a constantTwo or all three of U, V, and W are possibly the same opa

One of + and - A binary arithmetic operation opa is performed on the contents of V and W, and the result is transferred to a register U

The content of U is overwrittenThe contents of V and W remain unchanged

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010.133 Digital Computer Concept and PracticeCopyright ©2012 by Jaejin Lee 12

Arithmetic Microoperations (contd.)

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Logic MicrooperationsU ← V opl W

U and V are registers, and W may be a register or a constantTwo or all three of U, V, and W are possibly the same opl ⋀, , and ⊕⋁A binary logic operation opa is performed on the contents of V and W, and the result is transferred to a register U

The content of U is overwrittenThe contents of V and W remain unchanged

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010.133 Digital Computer Concept and PracticeCopyright ©2012 by Jaejin Lee 15

Logic Microoperations (contd.)

U ← V’U is a register, and V may be a register or a constantU and V are possibly the same The bitwise negation operation is performed on the content of V or a constant V, and the result is transferred to a register U

The content of U is overwrittenThe contents of V remains unchanged

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Logic Microoperations (contd.)

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Memory Transfer Microoperations

Memory readsU ← M[V]

U and V are possibly the same registersThe address of the desired word is given by the content of VThe content of U is overwrittenThe word in the memory remains unchanged

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010.133 Digital Computer Concept and PracticeCopyright ©2012 by Jaejin Lee 19

Memory Transfer Microoperations (contd.)

Memory writesM[V] ← U

U and V are possibly the same registersU may be a constantThe address of the desired word is the content of VThe content of a register U or a constant U is transferred to the memory word specified by VThe content of the specified word in the memory is overwrittenU remains unchanged

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Memory Transfer Microoperations (contd.)

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