04635335

Power Control Strategy of Parallel Inverter Interfaced DG Units

H.R. Baghaee, M.Mirsalim, M. J. Sanjari, G.B. GharehpetianCenter of Excellence on Power system, Amirkabir University of Technology, Tehran, Iran

E-mails: [email protected], [email protected], [email protected], [email protected] ,

Abstract—In this paper, a power control strategy for parallel inverters of DGs, which are connected to harmonic polluted grids, is proposed. In order to optimize the controller performance, the dual-time sampling scheme is implemented. Also, the parameters of the controller are optimized by Harmony Search Algorithm. The simulation results show that by using this scheme the system control delay is minimized, and the proposed controller presents a high performance even under presence of system harmonics or fault.

Keywords— Parallel Inverters, Distributed Generation, Harmonics, Space Vector Pulse Width Modulation.

I. INTRODUCTION

The Installation of a variety of small-size DG is changing the traditional structure of distribution systems. The integration of DG units within the existing infrastructure requires a full understanding of their impact on power flow and power quality at both customer and utility sides [1-3]. Depending on the distribution system operating characteristics and the DG characteristics, the impacts might be positive or negative. DGs have different characteristics, and therefore, their impact on voltage control, stability, and system protection will also be different [4-7]. DGs should meet various operating requirements of the utilities or the power system operators [8-10]. Considering the inherent benefits of power electronic (PE) interfaces [11], they have widely used for DG sources. Also, different aspects of DG interconnection like power quality and protection issues have been discussed, too [12-14]. As the system load grows, the Uninterruptible Power Supply (UPS) needs to be replaced with a higher capacity one. Also, if the UPS fails, the entire system is affected. To increase the reliability as well as power capability of the supply system, a single UPS unit can be replaced with a multiple smaller UPS in parallel. This system has many advantages like expandability, modularity, maintainability, redundancy, and increased reliability [15]. To realize the above mentioned goals, different approaches have been discussed in [16-39]. The load sharing of parallel three phase inverters has been discussed in [20-24]. The current sharing control strategy for parallel multi-inverter systems to achieve a weighted output current distribution has been introduced in [25, 26]. The wireless load sharing and control of parallel

three phase inverters has also been presented [27-30]. Some other aspects like maximum current control strategy, failure isolation and hot-swap features and bidirectional power flow in grid connected inverters have been investigated in [31-35]. In [30,36-38], the interconnection of DGs to the system using this scheme has been proposed. With a pulse width modulation (PWM) based switching strategy, the converter connecting DGs to the grid will contains low-order harmonics. To decrease the current harmonic content of the DG interconnection, a new approach based on space vector pulse width modulation (SVPWM) switching strategy is used in this paper. In the proposed approach, a power control strategy for parallel inverter interfaced DG units, shown in Fig. 1, is presented, too. In order to optimize the parameters of the controller, Harmony Search Algorithm (HSA) is used.

II. SVM SWITCHING STRATEGY

All modulation techniques try to obtain variable output voltage with maximum fundamental component and minimum harmonics. Many PWM techniques have been developed to let the inverters to posses desired output characteristics, achieve a wide linear modulation range and higher efficiency, and have less switching and commutation losses and lower Total Harmonic Distortion (THD) [39-43]. The Space Vector Modulation (SVM) technique is more popular than conventional techniques because it has lower base band harmonics than regular PWM or sinusoidal PWM (SPWM). SVM increases the output capability of SPWM without distorting line to line output voltage waveform. Moreover, SVM has 15% higher fundamental output voltage than conventional modulation methods and leads to better DC link utilization [43]. In SVM technique, the three phase quantities can be transformed to their equivalent two phase quantity either in synchronously rotating or stationary reference frame [44, 45]. The reference vector magnitude can be found using this two phase component and used to modulate the inverter output. A three phase sinusoidal voltage set is assumed to be as follows:

( )

+=

−=

=

32

sin

32

sin

sin

πω

πω

ω

tVV

tVV

tVV

mc

mb

ma

(1)

629

978-1-4244-1742-1/08/$25.00 c© 2008 IEEE

Fig. 2 Representation of rotating vector in complex plane

[gto2_2]

gto8

[gto6]

gto6

[gto5_2]

gto5

[gto5]

gto5

[gto4_2]

gto4

[gto4]

gto4

[gto3_2]

gto3

[gto3]

gto3

[gto2]

gto2

[gto1_2]

gto1

[gto1]

gto1

[gto6_2]

gtO6

[Vabc2]

Vabc2

[Vabc1]

Vabc1

[Vab_inv2]

Vab_inv2

[Vab_inv1]

Vab_inv1

v+-

Vab 1

v+-

Vab

Vabc

IabcA

B

C

ab

c

Three-PhaseV-I Measurement1

Vabc

IabcA

B

C

ab

c

Three-PhaseV-I Measurement

N

A

B

C

Three-PhaseProgrammableVoltage Source

[Iabc2]

Iabc2

[Iabc1]

Iabc1

gm

CE

IGBT/Diode9

gm

CE

IGBT/Diode8

gm

CE

IGBT/Diode7

gm

CE

IGBT/Diode6

gm

CE

IGBT/Diode5

gm

CE

IGBT/Diode4

gm

CE

IGBT/Diode3

gm

CE

IGBT/Diode2

gm

CE

IGBT/Diode11

gm

CE

IGBT/Diode10

gm

CE

IGBT/Diode1

gm

CE

IGBT/Diode

signal

magnitude

angle

Fourier2

signal

magnitude

angle

Fourier1

0

Display4

0

Display3

0

Display2

0

Display1

i+ -

Current Measurement2

i+ -

Current Measurement1

A

B

C

a

b

c

208V /208V 1kVATransformer1

A

B

C

a

b

c

208V /208V 1kVATransformer

10000 V1

10000 V

Fig.1 Configuration of system under study

When this three phase voltage set is applied to the AC machine, it produces a rotating flux in the air gap of the AC machine. This rotating flux component can be represented as a single rotating voltage vector. The magnitude and angle of the rotating vector can be found by means of Clark’s transformation [44-45]. The representation of the rotating vector in the complex plane has been shown in Fig. 2. Space vector representation of the 3 phase quantity can be expressed as follows.

( )cba VaaVVjVVV 2*

32 ++=+= βα (2)

where, 1201∠=a (3)

22βα VVV += (4)

= −

α

βαVV1tan (5)

Hence, we have:

−+++=

++=+

cVbVjcVbVaV

cVabaVaVjVV

32sin

32sin

32

32cos

32cos

32

232

ππππ

βα(6)

Separating the real and imaginary parts of (6), results in the following equations:

++= cba VVVV3

2cos3

2cos32 ππ

α (7)

−+= cba VVVV3

2sin3

2sin032 ππ

β (8)

−

−−=

−=

c

b

a

c

b

a

VVV

VVV

VV

.

23

230

21

211

32

.

32sin

32sin0

32cos

32cos1

32

ππ

ππ

β

α

(9)

In the SVM switching strategy, a sinusoidal voltage is treated as a constant amplitude vector rotating at constant frequency. The reference voltage, Vref is usually approximated by a combination of the eight switching patterns (V0 to V7).Then, three-phase voltage vectors are transformed into a vector in the stationary d-q coordinate frame which represents the spatial vector sum of the three-phase voltages [14]. To realize the SVM switching strategy, direct and quadrature axis voltage components, Vd and Vq, and the

630 2008 13th International Power Electronics and Motion Control Conference (EPE-PEMC 2008)

refV_

2_V

1_V

refV_

2_

2 VTT

z

1_

1 VTT

z

Fig. 3. a) Voltage Space Vector and its components in (d,q) axis b) Reference vector as a combination of adjacent vectors at sector 1

TABLE. 1 SWITCHING SEQUENCE Sector Upper Switches (S1,

S3, S5)lower Switches

(S4, S6, S2)1 S1=T1+T2+T0/2

S3= T2+T0/2 S5= T0/2

S4= T0/2 S6= T2+T0/2 S2= T1+T2+T0/2

2 S1=T1+ T0/2 S3= T1+ T2+T0/2 S5= T0/2

S4= T2+T0/2 S6= T0/2 S2= T1+T2+T0/2

3 S1= T0/2 S3= T1+ T2+T0/2 S5= T2+T0/2

S4= T1+T2+T0/2 S6= T0/2 S2= T1+ T0/2

4 S1= T0/2 S3= T1+T0/2 S5= T1+T2+T0/2

S4= T1+T2+T0/2 S6= T2+T0/2 S2= T0/2

5 S1= T2+T0/2 S3= T0/2 S5= T1+T2+T0/2

S4= T1+ T0/2S6= T1+T2+T0/2 S2= T0/2

6 S1=T1+T2+T0/2 S3= T0/2 S5= T1+T0/2

S4= T0/2 S6= T1+T2+T0/2 S2= T2+T0/2

reference voltage and angle α must be obtained using (10).

tftVV

VVV

VVV

VV

ssd

q

ddref

cn

bn

an

q

d

πωα 2tan

23

230

21

211

32

1

22

===

+=

−

−−=

−

(10)

T1, T2 and T0 represent the time widths for vectors V1, V2

and V0. T0 is the period in a sampling period for null vectors should be filled. As each switching period (half of sampling period) Tz must start and end with zero vectors, i.e., there will be two zero vectors per Tz or four null vectors per Ts, the duration of each null vector is Ts/4 [43].Therefore, the time duration T1, T2 and T0 can be calculated as following:

( )

( )( )

( )=∴

−=∴

<<

+=

+=∴

++

++=

3sin

sin2

3sin

3sin

1

6003

sin

3cos

.2.32

01

.1.32

sincos

.

2211

2

212

21

12

1

01

2

0

πα

π

απα

π

π

αα

azTT

azTT

where

dcVTdcVTrefVzT

VTVTrefVzT

dtT

TTVdt

TT

TVdt

TVdt

T

refV

(11)

( )dc

ref

szz

V

Vaand

fTwhereTTTT

.32

1,,210 ==+−= (12)

Then, switching time of each switch (S1 to S6) must be determined. The voltage space vector and its components in dq plane is show in Fig. 3a. The switching sequence for the lower and upper switches has been shown in Table. 1. The above mentioned symmetrical pulse pattern for two consecutive Tz intervals are shown and Ts=2 and Tz=1/fs is the sampling time, where fs is switching frequency. Note that the null time has been conveniently distributed between the V0 and V7 vectors to describe the symmetrical pulse width. Studies have been shown that a symmetrical pulse pattern gives minimal output harmonics [39].

III. CONTROLLER DESIGN

The line currents and the grid voltage at the Point of Common Coupling (PCC) are feedback variables. These variables are transformed to the dqo frame by the Park transform as [44] follows:

( )( ) +−

+−

=

c

b

a

ggg

ggg

d

q

fff

fff

21

21

21

32sin

32sinsin

32cos

32coscos

32

0

πθπθθ

πθπθθ

(13)

Where,

( ) ( )+=t

gg dtt0

0αωθ (14)

2008 13th International Power Electronics and Motion Control Conference (EPE-PEMC 2008) 631

Using this transform, the line currents and the PCC voltage are transformed to the dq0 frame. Then, the reference currents of q and d axis can be calculated by the following equations:

qPCC

refrefq

V

PI

,

,

32 ×

=(15)

qPCC

refrefd

V

QI

,

,

32 ×

=(16)

The difference between reference and actual currents of qand d axis are the input of the proportional integral (PI) controller. The outputs of PI controllers are added to the actual q and d axis voltages. The result is the reference qand d axis voltages.

( ) ( )−+−+=endT

drefddIdrefddPdrefd dtIIKIIKVV0

,,,,, . (17)

( ) ( )−+−+=endT

qrefqqIqrefqqPqrefq dtIIKIIKVV0

,,,,, . (18)

where, Tend is the simulation time. These reference voltages are the input of SVM system. In the normal operating condition of parallel inverters, the converter should compensate the harmonics of the grid. The controller output signals are used as the input to the SVM pulse generating module.

IV. HARMONY SEARCH ALGORITHM The parameters of the controller has been also optimized using HAS described in the next section. The objective function is integral of time square of total error (ITSE) namely:

( ) ( )( )−+−=endT

qrefqdrefd dtIIIItITSE0

2,

2,. (19)

The steps in the procedure of HSA are as follows [46-47]: Step 1: Initialize the problem and algorithm parameters. Step 2: Initialize the harmony memory. Step 3: Improvise a new harmony. Step 4: Update the harmony memory. Step 5: Check the stopping criterion. These steps will be described in the next five subsections.

A. Initialize the problem and algorithm parameters

The optimization problem is specified as follows: { }min ( ) |f x x X∈ subject to ( ) 0g x ≥ and ( ) 0h x =

where, f(x) is the objective function and g(x) is the inequality constraint function; h(x) is the equality constraint function. x is the set of each decision variable,

ix , and X is the set of the possible range of values for each decision variable, that is ,min ,maxi i iX X X≤ ≤ .where ,miniX and ,maxiX are the lower and upper bounds for each decision variable. The HSA parameters are also specified in this step. These are the harmony memory size

(HMS), or the number of solution vectors in the harmony memory; harmony memory considering rate (HMCR); pitch adjusting rate (PAR); number of decision variables (N) and the number of improvisations (NI), or stopping criterion. The harmony memory (HM) is a memory location where all the solution vectors (sets of decision variables) are stored. This HM is similar to the genetic pool in the GA [48]. Here, HMCR and PAR are parameters that are used to improve the solution vector and both defined in Step 3.

B. Initialize the harmony memory The HM matrix is filled with as many randomly generated solution vectors as the HMS.

1 1 1 11 2 12 2 2 21 2 1

1 1 1 11 2 1

1 2 1

...

...

...

...

N N

N N

HMS HMS HMS HMSN N

HMS HMS HMS HMSN N

x x x xx x x x

HMx x x xx x x x

−

−

− − − −−

−

=(20)

C. Improvise a new harmony A new harmony vector, 1 1 2( , ,..., )Nx x x x′ ′ ′ ′= , is generated based on three rules: (1) memory consideration, (2) pitch adjustment and (3) random selection. Generating a new harmony is called ‘improvisation’ [48]. In the memory consideration, the value of the first decision variable 1x ′for the new vector is chosen from any value in the specified HM range 1

1 1( )HMSx x− . Values of the other decision variables 2 3( , ,..., )Nx x x′ ′ ′ are chosen in the same manner. The HMCR, which varies between 0 and 1, is the rate of choosing one value from the historical values stored in the HM, while (1 _ HMCR) is the rate of randomly selecting one value from the possible range of values.

{ }1 2, ,...,

(1 )

HMSi i i i

i

i i

x x x x with probability HMCRx

x X with probability HMCR

′ ∈′ ←

′ ∈ −(21)

For example, a HMCR of 0.85 indicates that the HS algorithm will choose the decision variable value from historically stored values in the HM with the 85% probability or from the entire possible range with the 100–85% probability. Every component obtained by the memory consideration is examined to determine whether it should be pitch-adjusted. This operation uses the PAR parameter, which is the rate of pitch adjustment as follows:

ix ′(1 )

Y es with probability PARNo with probability PAR

←−

(22)

The value of (1 _ PAR) sets the rate of doing nothing. If the pitch adjustment decision for ix ′ is Yes, ix ′ is replaced as follows:

()*i i wx x rand b′ ′← ± (23)Where, bw is an arbitrary distance bandwidth, rand () is a random number between 0 and 1.


0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1-4000

-3000

-2000

-1000

0

1000

2000

3000

4000

Time (sec.)

PC

C V

olta

ge (V

)

0.03 0.035 0.04 0.045 0.05 0.055 0.06 0.065 0.07 0.075 0.08

-4000

-3000

-2000

-1000

0

1000

2000

3000

4000

Time (sec.)

Pha

se A

Vol

tage

(V)

a) a)

b) b)

c) c)

In Step 3, HM consideration, pitch adjustment or random selection is applied to each variable of the new harmony vector in turn.

D. Update harmony memory If the new harmony vector, 1 2( , ,..., )i Nx x x x′ ′ ′ ′= is better than the worst harmony in the HM‘, judged in terms of the objective function value, the new harmony is included in the HM and the existing worst harmony is excluded from the HM.

E. Check stopping criterion If the stopping criterion (maximum number of improvisations) is satisfied, computation is terminated. Otherwise, Steps 3 and 4 should be repeated.

V. SIMULATION RESULTS The proposed parallel inverter interfaced DG units has been simulated for four different cases:

Case1: Normal condition

In this case, both DG units of parallel inverter interfaced are microturbine generator (MTG) discussed in [49]. The PCC voltage, harmonic spectrum and active and reactive power of inverters have been shown in Fig. 4. in this case THD of PCC voltage is equal to 4.06%.

Case2: Normal condition, DG units are not the same

In this case, both DG units of parallel inverter interfaced are micro turbine generator (MTG) discussed in [49] and the fuel cell discussed in [50]. The PCC voltage, harmonic spectrum and active and reactive power of the inverters have been shown in Fig. 5. In this case, THD of PCC voltage is equal to 6.63%.

Case3: Fault condition of case1

In this case, a three phase fault has been simulated in the case 1. The PCC voltage and active and reactive power of the inverters have been shown in Fig. 6.

Case4: Fault condition of case 2

In this case, the three phase fault has been applied to the case 2. The PCC voltage and active and reactive power of the inverters has been shown in Fig. 7. Simulation results indicate that the proposed controller presents a good performance for normal and fault conditions.

VI. CONCLUSION In this paper, a new control strategy for parallel inverter interfaced distributed generation units have been proposed. The space vector pulse width modulation has also used to generate switching signals of parallel

Fig. 4. a) PCC voltage, b) Harmonic spectrum and c) active and reactive power

for case1


for case2


0.03 0.035 0.04 0.045 0.05 0.055 0.06 0.065 0.07 0.075 0.08-4000

-3000

-2000

-1000

0

1000

2000

3000

4000

Time (sec)

PC

C V

olta

ge (V

)

Voltage of phase A

0.03 0.035 0.04 0.045 0.05 0.055 0.06 0.065 0.07 0.075 0.08-4000

-3000

-2000

-1000

0

1000

2000

3000

4000

Time (sec.)

Pha

se A

Vol

tage

(V)

a) a)

b) b)

inverters. Also, the control system has been tested in normal and fault conditions. Simulation results indicate that the system performance is good from viewpoint of harmonics and power flow control.

REFERENCES

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[11] B. Kroposki, C. Pink, R. DeBlasio, H. Thomas, M. Simoes and P.K. Sen, "Benefits of power electronic interfaces for distributed energy systems", IEEE Power Engineering Society General Meeting, June 2006, pp. 18-22. [12] J. Liang, T. C. Green, G. Weiss, and Q.-C. Zhong, “Evaluation of repetitive control for power quality improvement of distributed generation,” in Proc. IEEE-PESC’02 Conf., 2002, pp. 1803–1808. [13] J. C. Gomez and M. M. Morcos, “Coordinating over current protection and voltage sags in distributed generation systems,” IEEE Power Eng Rev., vol. 22, no. 2, pp. 16–19, Feb. 2002. [14] H.R. Baghaee, M. Mirsalim, .M.Ale-Emran, M. Abedi and G.B. Gharehpetian, “Power Factor Improvement of DC/DC Converter of Micro-Turbines ”, International Conference on Renewable Energies and Power Quality, ICREPQ'08 , March 12-14, 2008, Santander, Spain available online at: www.icrepq.com/icrepq-08/324-baghaee.pdf[15] A. Tuladhar, T. Hua Jin Unger, K. Mauch, “Control of parallel inverters in distributed AC power systems with consideration of line impedance effect”, Industry Applications, IEEE Transactions on Volume 36, Issue 1, Jan/Feb 2000 Page(s):131 - 138 [16] Wu T F , Huang Y H , Chen Y K, et al.A 3C strategy for multi-module inverters in parallel operation to achieve an equal current distribution ,IEEE Transaction IE , 2000 , 47(2) [17] Yu-Kai Chen; Yu-En Wu; Tsai-Fu Wu; Chung-Ping Ku, "ACSS for paralleled multi-inverter systems with DSP-based robust controls", Aerospace and Electronic Systems, IEEE Transactions on Volume 39, Issue 3, July 2003 Page(s):1002 -1015 [18] Liangliang Chen; Lan Xiao; Chunying Gong; Yangguang Yan, "Circulating current's characteristics analysis and the control strategy of parallel system based on double close-loop controlled VSI", Power Electronics Specialists Conference, 2004. PESC 04.2004 IEEE 35th Annual I-I [19] Woo-Cheol Lee; Taeck-Ki Lee; Sang-Hoon Lee; Kyung-Hwan Kim; Dong-Seok Hyun; In-Young Suh, "A master and slave control strategy for parallel operation of three-phase UPS systems with different ratings", Applied Power Electronics Conference and Exposition, 2004. APEC '04. Nineteenth Annual IEEE Volume 1, 2004 Page(s):456 - 462 Vol. 1


for case3


for case4


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BIOGRAPHIES Hamid Reza Baghaee (IEEE Student Member' 2008) received the BSc degree in Electrical Engineering from Kashan University in 2006. Currently he is graduate student of Power Engineering in Amirkabir University of Technology. His research interests are power system dynamic and control, HVDC & FACTS devices, Distributed Generation (DG) and application of Artificial Intelligence in power

systems.

Mojtaba Mirsalim (IEEE Senior Member' 2004)was born in Tehran, Iran, on February 14, 1956. He received his B.S. degree in EECS/NE, M.S. degree in Nuclear Engineering from the University of California, Berkeley in 1978 and 1980 respectively, and the PhD in Electrical Engineering from Oregon State University, Corvallis in 1986. Since 1987 he has been at Amirkabir University of Technology, has served

5 years as the Vice Chairman and more than 7 years as the General Director in Charge of Academic Assessments, and currently is a Full Professor in the department of Electrical Engineering where he teaches courses and conducts research in energy conversion and CAD, among others. His special fields of interest include the design, analysis, prototyping, and optimization of electric machines, renewable energy, FEM, and hybrid vehicles. Mirsalim is the author of more than 100 international journal and conference papers and three books on electric machinery and FEM. He is the founder and at present, the director of the Electrical Machines & Transformers Research Laboratory at http://ele.aut.ac.ir/EMTRL/Homepage.htm


Mohammad Javad Sanjari received the BSc degree in Electrical Engineering from Amirkabir University of Technology in 2006. Currently he is graduate student of Power Engineering in Amirkabir University of Technology. His research interests are power system dynamic and control, power system security assessment, HVDC & FACTS devices, Distributed Generation (DG) and application of Artificial Intelligence in power systems.

G.B. Gharehpetian (IEEE Member) was born in Tehran, in 1962. He received his BS and MS degrees in electrical engineering in 1987 and 1989 from Tabriz University, Tabriz, Iran and Amirkabir University of Technology (AUT), Tehran, Iran, respectively, graduating with First Class Honors. In 1989 he joined the Electrical Engineering Department of AUT as a lecturer. He received the Ph.D. degree in electrical engineering from Tehran University, Tehran,

Iran, in 1996. As a Ph.D. student he has received scholarship from DAAD (German Academic Exchange Service) from 1993 to 1996 and he was with High Voltage Institute of RWTH Aachen, Aachen, Germany. He held the position of Assistant Professor in AUT from 1997 to 2003, and has been Associate Professor since 2004. Dr. Gharehpetian is a Senior Member of Iranian Association of Electrical and Electronics Engineers (IAEEE), member of IEEE and member of central board of IAEEE. Since 2004 he is the Editor-in-Chief of the Journal of IAEEE. The power engineering group of AUT has been selected as a Center of Excellence on Power Systems in Iran since 2001. He is a member of this center and since 2004 the Research Deputy of this center. Since November 2005 he is the director of the industrial relation office of AUT. He is the author of more than 200 journal and conference papers. His teaching and research interest include power system and transformers transients, FACTS devices and HVDC transmission.


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