08-tems-2019-0028.r2-a novel hybrid seven-level converter

CES TRANSACTIONS ON ELECTRICAL MACHINES AND SYSTEMS, VOL. 3, NO. 4, DECEMBER 2019 389

Abstract—A novel hybrid three-phase seven-level

converter is proposed in the paper. Each phase consists of a four-level bridge and a two-level H bridge, which contains ten switching devices and a floating capacitor. The circuit structure is introduced and working principle of the converter containing 14 commutation paths is analyzed, which is easy to control the floating capacitor voltage. In order to drive permanent magnet synchronous motor (PMSM) with the proposed converter, model predictive control (MPC) strategy is adopted. The control objectives such as controlling the currents of PMSM and capacitor voltages balancing are included in a cost function with two weight factors, which can control the currents of PMSM and balance the capacitor voltages simultaneously. To validate the proposed control scheme, simulations in two cases are carried out by using Matlab/Simulink software. Finally, the feasibility and efficiency in two cases are verified with the experimental test bench based on RT_LAB.

Index Terms—Capacitor voltages, MPC, PMSM, Seven-Level converter.

I. INTRODUCTION

MSM has the characteristics of high power density, low loss, small ripple coefficient of torque and fast dynamic

response. It has been widely used in electric vehicles, ship propulsion, railway transportation, wind power generation, servo and other fields [1]-[4]. At the high power level, the use of two-level converters is not an appropriate solution. Multile-

Manuscript was submitted for review on 27, May, 2019. This work is supported by the National Key R&D Program Projects of China

(No. 2018YFB0104600) and the New Energy Vehicle Industry Technology Innovation Project of Anhui Province (Development of core process equipment for intelligent manufacturing of new energy vehicle driving motor).

Yuansheng Hu is with Electrical Engineering and Automation， Anhui University, Hefei, CO 230000 China (e-mail: [email protected]).

Cungang Hu is with Electrical Engineering and Autmation ， Anhui University,Hefei, CO 230000 China (e-mail: [email protected]).

Pinjia Zhang is with Department of Electrical Engineering，Tsinghua University, Beijing, CO 100000 China (e-mail: [email protected]).

Yunlei Zhang is with Electrical Engineering and Automation，Anhui University, Hefei, CO 230000 China (e-mail: [email protected]).

Digital Object Identifier 10.30941/CESTEMS.2019.00051

vel converters, with the advantages of low voltage harmonics and low electromagnetic interference, have been widely used to drive PMSM [5]-[6]. In general, multilevel converters are classified into diode-clamped [7], flying capacitor [8] and cascaded multilevel converter topologies [9]. However, as the number of voltage levels increases, the number of switching devices also increases, which will increase the cost, volume and control complexity [10]-[14].

In order to overcome these drawbacks, scholars had proposed a variety of novel seven-level topologies. A topology consisted of a four-level capacitor-clamped bridge and an H-type bridge was presented in [15]. In [16], an IGBT was used to replace two diodes based on [15], which reduced the devices and switching frequency. However, the two topologies were only used in single-phase converters. A novel hybrid seven-level converter consisted with six H-type bridges was proposed in [17]. In [18], a seven-level converter with a three-level NPC bridge and an H-type bridge per phase was studied. Based on [18], the three-level NPC bridge was replaced by three-level T-type bridge in [19]. However, the topology in [19] lacked redundant switching states at the maximum and minimum voltage levels, which makes it difficult to control the floating capacitor voltage.

Based on the existing literature, a new hybrid seven-level converter is proposed in this paper. Each phase consists of a four-level bridge and a two-level H bridge. The structure and working principle of the converter are analyzed and MPC is adopted to drive PMSM with the proposed converter.

II. CIRCUIT STRUCTURE AND WORKING PRINCIPLE

The circuit structure of the seven-level converter for PMSM driving system is shown in Fig. 1. Each phase consists of a four-level bridge and a two-level H bridge, which contains ten switching devices and a floating capacitor. Sx1, Sx4, Sx5, Sx6, Sx7 and Sx8 (x is A, B or C) are unidirectional blocking devices; Sx2 and Sx3 are bidirectional blocking devices that usually consisted of two insulated gate bipolar transistors (IGBTs) in reverse series connection. If the voltages of DC bus capacitors (C1, C2 and C3) are defined as 2E and the voltages of floating capacitors (FCa, FCb and FCc) are defined as E, there are 7 different voltages by controlling the switching states of the switching devices. The maximum voltage that Sx1 and Sx4 can withstand is

A Novel Hybrid Seven-Level Converter for Permanent Magnet Synchronous Motor Driving

System Based on Model Predictive Control

Yuansheng Hu, Cungang Hu, Pinjia Zhang and Yunlei Zhang

P

390 CES TRANSACTIONS ON ELECTRICAL MACHINES AND SYSTEMS, VOL. 3, NO. 4, DECEMBER 2019

6E, the maximum voltage that Sx2 and Sx3 can withstand is 4E and the maximum voltage that Sx5, Sx6, Sx7 and Sx8 can withstand is E. Therefore, different types of switching devices can be used in the converter to reduce cost and improve efficiency. For instance, if the DC bus voltage is 380V, IGBTs with blocking voltage of 1200V can be selected for Sx1 and Sx4, IGBTs with blocking voltage of 600V or 650V can be selected for Sx2 and Sx3 and IGBTs with blocking voltage of 150V or 200V can be selected for Sx5, Sx6, Sx7 and Sx8.

A phase bridg e

B phase b ridge C phase b ridge

C1

C2

SA1

SA2

SA3

SA5

SA4 SA6

C3

CFAE

SA7

SA80

IC2

IC3

IC1 Im1

Im2

Four-level bridge Two- level H- brid ge

6E M1

M2

IB

IA

IC

PMSM

Fig. 1. The circuit structure of seven-level converterfor PMSM driving system.

There are 14 commutation paths in the proposed converter, as shown in Fig. 2 and Table. Ⅰ. In the Table. Ⅰ, VFCx is the floating capacitor voltage. Ix is the phase current and the positive direction of Ix is shown in Fig. 1. “↑”, “↓” and "-" represent increase, decrease and no change of VFCx, respectively. Vx is the output voltage.

C1

C2Ix

Sx1

Sx2

Sx3

Sx5

Sx4 Sx6

2E

2E C3

2E CFxE

Sx7

Sx80

(a)Vx=6E

C1

C2Ix

Sx1

Sx2

Sx3

Sx5

Sx4 Sx6

2E

2E C3

2E CFxE

Sx7

Sx80

(b)Vx=6E

C1

C2Ix

Sx1

Sx2

Sx3

Sx5

Sx4 Sx6

2E

2E C3

2E CFxE

Sx7

Sx80

(c)Vx=5E

C2Ix

Sx1

Sx2

Sx3

Sx5

Sx4 Sx6

2E

2E C3

2E CFxE

Sx7

Sx80

C1

(d)Vx=5E

C2Ix

Sx1

Sx2

Sx3

Sx5

Sx4 Sx6

2E

2E C3

2E CFxE

Sx7

Sx80

C1

(e)Vx=4E

C2Ix

Sx 1

Sx 2

Sx 3

Sx 5

Sx 4 Sx 6

2E

2E C3

2E CFxE

Sx 7

Sx 80

C1

(f)Vx=4E

C2Ix

Sx1

Sx2

Sx3

Sx5

Sx4 Sx6

2E

2E C3

2E CFxE

Sx7

Sx80

C1

(g)Vx=3E

C2Ix

Sx1

Sx2

Sx3

Sx5

Sx4 Sx6

2E

2E C3

2E CFxE

Sx7

Sx80

C1

(h)Vx=3E

Ix

Sx1

Sx2

Sx3

Sx5

Sx4 Sx6

2E

2E C3

2E CFxE

Sx7

Sx80

C2

C1

(i)Vx=2E

HU et al: A NOVEL HYBRID SEVEN-LEVEL CONVERTER FOR PERMANENT MAGNET SYNCHRONOUS MOTOR DRIVING SYSTEM BASED ON MODEL PREDICTIVE CONTROL

391

Ix

Sx1

Sx2

Sx3

Sx5

Sx4 Sx6

2E

2E C3

2E CFxE

Sx7

Sx80

C2

C1

(j)Vx=2E

Sx1

Sx2

Sx3

Sx5

Sx4 Sx6

2E

2E C3

2E CFxE

Sx7

Sx80

Ix

C2

C1

(k)Vx=E

Ix

Sx1

Sx2

Sx3

Sx5

Sx4 Sx6

2E

2E

2E CF xE

Sx7

Sx80

C2

C1

C3

(l)Vx=E

Ix

Sx1

Sx2

Sx3

Sx5

Sx4 Sx6

2E

2E

2E CFxE

Sx7

Sx80

C1

C2

C3

(m)Vx=0

Ix

Sx1

Sx2

Sx3

Sx5

Sx4 Sx6

2E

2E

2E CFxE

Sx7

Sx80

C3

C2

C1

(n)Vx=0

Fig. 2. Commutation paths of the seven-level converter.

As can be seen from Table. Ⅰ, when the output voltage is 6E, 4E, 2E or 0, Ix doesn’t flow through CFx and the voltage of CFx will be not changing. When the output voltage is 5E, 3E or E, Ix flows through CFx and the direction of Ix determines whether CFx is charged or discharged. Therefore, it’s easy to control the voltage of CFx.

TABLE Ⅰ SWITCHING STATES OF THE SEVEN-LEVEL CONVERTER

Index Sx1 Sx2 Sx3 Sx4 Sx5 Sx6 Sx7 Sx8 Change of VFCx

IFCx Vx Ix>0 Ix<0

A6 1 0 0 0 1 0 1 0 - - 0 6E

B6 1 0 0 0 0 1 0 1 - - 0 6E

A5 1 0 0 0 1 0 0 1 ↑ ↓ Ix 5E

B5 0 1 0 0 0 1 1 0 ↓ ↑ -Ix 5E

A4 0 1 0 0 1 0 1 0 - - 0 4E

B4 0 1 0 0 0 1 0 1 - - 0 4E

A3 0 1 0 0 1 0 0 1 ↑ ↓ Ix 3E

B3 0 0 1 0 0 1 1 0 ↓ ↑ -Ix 3E

A2 0 0 1 0 0 1 0 1 - - 0 2E

B2 0 0 1 0 1 0 1 0 - - 0 2E

A1 0 0 1 0 1 0 0 1 ↑ ↓ Ix E

B1 0 0 0 1 0 1 1 0 ↓ ↑ -Ix E

A0 0 0 0 1 0 1 0 1 - - 0 0

B0 0 0 0 1 1 0 1 0 - - 0 0

III. MODEL PREDICTIVE CONTROL

The scheme of the seven-level converter for PMSM driving system based on MPC is shown in Fig. 3.

PMSM

abcdq

MPC

PI

*

+-

speed detector and position detector

iaibic

VDC* VFC

*

iq*

id*= 0

SA

SBSC

+-

Udc

id iq

VDC(VDC1、VDC2、VDC3)

VFC(VFCa、VFCb、VFCc)

Fig. 3. The scheme of the seven-level converter for PMSM driving system based on MPC.

The variables in Fig. 3 are as follows:

1) reference speed of PMSM * and measured speed of PMSM ;

2) reference DC bus capacitor voltage VDC* and reference

floating capacitor voltage VFC*;

3) measured DC bus capacitor voltage VDC (VDC1, VDC2, VDC3) and measured floating capacitor voltage VFC (VFCa, VFCb,VFCc);

4) d-axis reference current id* and q-axis reference current

iq*;

5) measured current in static frame ia, ib, ic and current in rotated frame id, iq;

6) electrical angle , DC power supply Udc and switching states SX (X is A,B or C).

and are measured by speed detector and position detector, respectively. iq

* is obtained by inputting * and to proportional-integral (PI) speed controller and id

* is set to zero. VDC

* is set to 2E and VFC* is set to E. The currents in static


frame (abc) can be converted to the currents in rotated frame (dq) using

ad

abc dq bq

c

ii

T ii

i

(1)

where cos cos( 2 / 3 ) cos( 2 / 3 )2

=sin sin( 2 / 3 ) sin( 2 / 3 )3

abc dqT

is the transformation matrix. Finally, MPC strategy is adopted with the variables to control the PMSM.

Similarly, the mathematical model of PMSM in static frame (abc) can be converted to rotated frame (dq) as follows

d

q

q

as dd

abc dq bq

s q d c

d uR iu dt T uu d

R i udt

(2)

where ud, uq, id and iq are dq-axis voltages and dq-axis currents, respectively. d and q are dq-axis fluxes, respectively. ua ,ub

and uc are abc-axis voltages. Rs is resistance and is the speed of PMSM.

= +=

d f

q

d d

q q

L iL i

(3)

where Ld and Lq are the dq-axis inductances, respectively. f

is the permanent magnet flux. (3) is substituted into (2) and the voltages in rotated frame (dq) are given as follows

f

dd s d d q q

qq s q q d d

diu R i L L i

dtdi

u R i L L idt

(4)

where the coupling relationship between dq-axis voltages is showed in dotted-line section. The d-axis voltage is not only controlled by d-axis current, but also affected by q-axis current. The q-axis voltage can be analyzed similarly. Therefore, a decoupling method is adopted in this paper to make the system easier to be controlled.

The decoupled dq-axis voltages are as follows

f

S dd

Sq q

dd

qq

u R i L

u R i L

di

dtdi

dt

(5)

Therefore, the change rate of currents in rotated frame (dq) can be expressed as follows

1

1

Sd d

Sq q

d

d d

qf

q q q

Rdi u idt L Ldi R

u idt L L L

(6)

The discrete-time model can be obtained from (6) for one-step horizon time (k+1), as demonstrated below:

( 1) ( ) (1 ) ( )

( 1) ( ) (1 ) ( ) f

s s sd d d

d d

s s s sq q q

q q q

T T Ri k u k i k

L LT T R T

i k u k i kL L L

(7)

where i(k) is the current measured in k state, i(k+1) is the predicted current in (k+1) state, ( )u k is the voltage in k state

and Ts is the switching period of the system. The control objectives such as controlling the currents of

PMSM and capacitor voltages balancing are included in a cost function as follows

* 2 * 2

* 2 * 2 * 21 2 3

* 2 * 2 * 2

[ ( 1)] [ ( 1)]

[( ) ( ) ( ) ]

[( ) ( ) ( ) ]

d d q q

DC DC DC DC DC DC

FC FCa FC FCb FC FCc

g k k

A V V V V V V

B V V V V V V

i i i i

(8)

where A and B are weight factors for the DC bus capacitor voltage balancing and floating capacitor voltage balancing, respectively.

The controller uses all the switching states of seven-level converter for the prediction and evaluates them using (8). The switching state, which minimizes the cost function, is then chosen and applied at the next sampling interval.

To sum up, the following procedure should be used: 1) Sample VDC, VFC, ia(k), ib(k), ic(k), ua(k), ub(k),

uc(k), and .

2) Obtain iq*(k) by inputting * and ( )k to PI speed

controller. 3) Estimate id(k) and iq(k) from ia(k), ib(k) and ic(k) using (1). 4) Estimate ud(k) and uq(k) from ua(k), ub(k) and uc(k) using

(2). 5) Decouple ud(k) and uq(k) , as shown in (4) and (5). 6) Extrapolate id(k) and iq(k) to id(k+1) and iq(k+1) using (7). 7) Select the switching state which minimizes (8).

IV. SIMULATION AND EXPERIMENT

A. Simulation Results

To validate the proposed control scheme, simulations are carried out by using Matlab/Simulink software with the parameters as indicated in Table. Ⅱ and Table. Ⅲ. DC1, DC2 and DC3 are DC bus capacitors, FCa, FCb and FCc are floating capacitors. The weight factors are selected as A=0.5 and B=0.1.

TABLE Ⅱ SIMULATION PARAMETERS OF CONVERTER

Parameters Values DC bus voltage 600V

DC bus capacitor 2000 uF

floating capacitor 1000 uF

switching frequency 20kHz

initial voltage of DC1 250V

initial voltage of DC2 200V

initial voltage of DC3

initial voltage of FCa

initial voltage of FCb

initial voltage of FCc

150V

120V

100V

80V


393

TABLE Ⅲ SIMULATION PARAMETERS OF PMSM

Parameters Values d-axis inductance Ld 0.004 mH

q-axis inductance Lq 0.005 mH

resistance Rs 0.05Ω

permanent magnet flux f 0.192 Wb

moment of inertia J 0.011 Kg.m2

load torque Te 50 N.m

polar logarithm P 4

The simulation results are shown in Fig. 4. The speed of PMSM is shown in Fig. 4(a), where it reaches the rated value of 1000r/min at 0.015s. A step change in the speed of PMSM from 1000 to 1500r/min (0.118s) is applied at 0.1s. The q-axis reference current iq

* and measured current iq are shown in Fig. 4(b), where The q-axis current tracks to its reference very well during the transient and steady-state condition. The waveforms of line voltage Uab and phase current Ia are smooth and harmonics are low, as depicted in Fig. 4(c). As demonstrated in Fig. 4(d) and Fig. 4(e), perfect balancing of the DC bus capacitor voltage and floating capacitor voltage have been achieved. In addition, the common-mode voltage showed in Fig. 4(f) is mainly between ±1/3Udc, which reduced the electromagnetic interference. Thus, the proposed control scheme is feasible.

0

200400600

80010001200

14001600

0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2t/(s)

/(r/

min

)

(a) speed of PMSM ( )

0

50

100

150

200

250

300

0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2

iq*

iq

I/(A

)

t/(s)

(b) reference and measured current (iq* and iq)

0

200

400

600

-200

-400

-6000 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2

Uab

/(V

)

t/(s)

0

50

100

25

75

-25-50-75

-100

I a/(

A)

Uab

Ia

(c) line voltage and phase current (Uab and Ia)

200

180

160

140

220

240

260

0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2

VD

C/(

V)

VDC1

VDC2

VDC3

t/(s)

(d) DC bus capacitor voltage (VDC1, VDC2 and VDC3)

10095908580

105110115120

0.02 0.04 0.060 0.08 0.1 0.12 0.14 0.16 0.18 0.2

VFCa

VFCb

VFCc

VF

Cs/(

V)

t/(s) (e) floating capacitor voltage (VFCa, VFCb and VFCc)

0

-100

-200

-300

100

200

300

0.020 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2

U/(

V)

t/(s) (f) common-mode voltage (U)

Fig. 4. Simulation results.

B. Experimental Results

In order to verify the performance, an experimental test bench based on RT_LAB has been developed, as shown in Fig. 5. The converter was controlled by a DSP (TMS320F28335) and a FPGA (EP4CE22F17C8N). The main parameters are as follows: DC bus voltage is 300V; DC bus capacitor is 2000 uF; floating capacitor is 1000uF; switching frequency is 20 kHz. The parameters of the motor are the same as those in simulation and weight factors are selected as A=0.6 and B=0.3.

Fig. 5. RT-LAB experimental platform.

To fully demonstrate the feasibility and validity, two cases are considered. In the first case, the speed of PMSM is maintained at 1000r/min and the load torque steps from 5 to


50N.m at 0.1s, the experimental results are shown in Fig. 6. In the second case, the load torque is maintained at 10N.m and the speed of PMSM steps from 400 to 1100r/min at 0.1s, the experimental results are shown in Fig. 7. Take the first case as an example and the second case is analyzed similarly.

=60 /f P (9)

where the speed of PMSM can be calculated (f is the switching frequency and P is the current frequency). The period of current T can be obtained from Fig. 6(a) and P = 1/T. We can see that the speed of PMSM reaches the rated value of 1000 r/min. As shown in Fig. 6(a), the line voltage and phase current reach steady rapidly after a short period of distortion. The DC bus capacitor voltage and the floating capacitor voltage are balanced but the ripple of DC bus capacitor voltage gets larger due to the increase of torque, as demonstrated in Fig. 6(b) and Fig. 6(c). In Fig. 6(d), the common-mode voltage of the motor is mainly between ±1/3Udc, therefore the electromagnetic interference of the motor is low.

Uab

Ia

t/(20ms/div)

Uab

/(10

0V/d

iv)

I a/(

30A

/div

)

(a) line voltage and phase current (Uab and Ia)

t/(20ms/div)

VD

C/(

50V

/div

)

(b) DC bus capacitor voltage (VDC1, VDC2 and VDC3)

t/(20ms/div)

VF

C/(

25V

/div

)

(c) floating capacitor voltage (VFCa, VFCb and VFCc)

t/(20ms/div)

Ucm

/(50

V/d

iv)

(d) common-mode voltage (U)

Fig. 6. Experimental results at constant speed.

t/(20ms/div)

Uab

/(10

0V/d

iv)

I a/(

30m

s/di

v)

Uab

Ia

(a) line voltage and phase current (Uab and Ia)

t/(20ms/div)

VD

C/(

50V

/div

)

(b) DC bus capacitor voltage (VDC1, VDC2 and VDC3)

t/(20ms/div)

VF

C/(

25V

/div

)

(c) floating capacitor voltage (VFCa, VFCb and VFCc)

t/(20ms/div)

Vcm

/(50

V/d

iv)

(d) common-mode voltage (U)

Fig. 7. Experimental results at constant torque.

V. CONCLUSION

In this paper, a novel hybrid seven-level converter is proposed. The circuit structure and working principle of the converter are analyzed. In order to drive PMSM with the proposed converter, MPC is adopted to control the current of PMSM and balance the capacitor voltages. The simulation results and experimental results reveal that the PMSM run smoothly. The harmonics of line voltage and phase current are low and capacitor voltages are balanced. The common-mode voltage is mainly between ±1/3Udc. Therefore, the feasibility and validity of the hybrid seven-level converter for PMSM driving system based on MPC are verified.

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[19] Yu, H. , Chen, B. , Yao, W. , Z. Y. Lu, “Hybrid seven-level converter based on t-type converter and h-bridge cascaded under spwm and svm”. IEEE Transactions on Power Electronics, vol. 33, no. 1, pp. 689–702, 2018.

Yuansheng Hu was born in Anqing, Anhui, China, in 1994. He received his bachelor's degree in 2016 from Chang’an University, China.

He is currently working toward his M.S degrees in circuits and systems at the school of Electronics and Information Engineering, Anhui University, Hefei, China. His current research interests

include multilevel converter and motor drives.

Cungang Hu (M’13) received the B.S. degree in Electrical Engineering and Automation from Electronic Engineering Institute, China, in 2001, the M.S. degree in Detection technique and automatic device form Hefei University of Technology, China, in 2008, and the Ph.D. degree in Power Electronics and Electric Drives from Hefei University of

Technology, China, in 2008. From 2004 to 2013, he was with the Hefei University of Technology China. Since 2013, he has been an Associate Professor of Anhui University, China and a Distinguished Professor of Anhui Provincial Collaborative Innovation Center of Industrial Energy-saving and Power Quality Control, China. And he serves as research fellow in National Engineering Laboratory of Energy-saving Motor and Control Technique, China, Power Quality Engineering Research Center of China Ministry of Education, and Hefei Energy-saving Research Institute. His research interests include multi-level converter technology, photovoltaic power generation technology, power quality and micro grid. He is the Technical Program Committee Chairman of the 11th IEEE Conference on Industrial Electronics and Applications and the General Chairman 12th IEEE Conference on Industrial Electronics and Applications.

Pinjia Zhang (S'06–M'10) received the B.Eng. degree in electrical engineering from Tsinghua University, Beijing, China, in 2006 and the Master's and Ph.D. degrees in electrical engineering from Georgia Institute of Technology, Atlanta, GA, USA, in 2009 and 2010, respectively. Since May 2010, he has been with the Electrical Machines Laboratory, General Electric

Global Research Center, Niskayuna, NY, USA. He is the author or coauthor of over 30 published papers in refereed journals and international conference proceedings, and he is the holder of over 15 patent applications in the USA and worldwide. His research interests include electric machine design, protection and diagnostics, motor drives, power electronics, and artificial intelligence and its applications in power systems. Dr. Zhang was the recipient of the Second Prize in the Paper and Poster Contest at the 2008 IEEE Power and Energy Society General Meeting in Pittsburgh, PA, USA, and the Best Paper Award from the Electrical Machines Committee of the IEEE Industrial Electronics Society in 2013.


Yunlei Zhang was born in Hefei, Anhui, China, in 1987. He received his M.S. degrees in Electrical Engineering in 2011 from Hefei University of Technology, China. From 2011 to 2014, he was a power electronics engineer at Sungrow Power Supply Co., Ltd.

He is currently working toward his Ph.D. degree in circuits and systems at the school

of Electronics and Information Engineering, Anhui University, Hefei, China. His current research interests include multilevel converter, grid-connected converter and motor drives.

08-tems-2019-0028.r2-a novel hybrid seven-level converter

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