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Page 1: 1-1 - AVR Introduction - 23 sidercholla.mmto.org/computers/avr/chips/avr_intro.pdf · AVR Introduction 2 The Growing AVR Family • TITNhYe A GVRro fwaminilgy AVR Family • 8 - 32

© Atmel Norway 2005

AVR Introduction

Page 2: 1-1 - AVR Introduction - 23 sidercholla.mmto.org/computers/avr/chips/avr_intro.pdf · AVR Introduction 2 The Growing AVR Family • TITNhYe A GVRro fwaminilgy AVR Family • 8 - 32

1www.atmel.com AVR Introduction

AVR Microcontrollers

Page 3: 1-1 - AVR Introduction - 23 sidercholla.mmto.org/computers/avr/chips/avr_intro.pdf · AVR Introduction 2 The Growing AVR Family • TITNhYe A GVRro fwaminilgy AVR Family • 8 - 32

2www.atmel.com AVR Introduction

The Growing AVR Family

The Growing AVR Family• TINY AVR family• 8 - 32 pin general purpose microcontrollers

• 16 family members

• MEGA AVR family• 32 - 100 pin general purpose microcontrollers

• 23 family members

• ASSP AVRs• USB, CAN and LCD

• Motor Control and Lighting

• Automotive

• Battery Management

• 8 family members

Page 4: 1-1 - AVR Introduction - 23 sidercholla.mmto.org/computers/avr/chips/avr_intro.pdf · AVR Introduction 2 The Growing AVR Family • TITNhYe A GVRro fwaminilgy AVR Family • 8 - 32

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Scalable

• Devices range from 1 to 256KB

• Pin count range from 8 to 100

• Full code compatibility

• Pin/feature compatible families

• One set of development tools

Page 5: 1-1 - AVR Introduction - 23 sidercholla.mmto.org/computers/avr/chips/avr_intro.pdf · AVR Introduction 2 The Growing AVR Family • TITNhYe A GVRro fwaminilgy AVR Family • 8 - 32

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AVR Architecture

• RISC architecture with CISC instruction set• Powerful instruction set for C and Assembly

• Scalable• Same powerful AVR core in all devices

• Single cycle execution• One instruction per external clock

• Low power consumption

• 32 Working Registers• All Directly connected to ALU!

• Very efficient core• 20 MIPS @ 20MHz

• High System Level Integration

• Lowest total system cost

Page 6: 1-1 - AVR Introduction - 23 sidercholla.mmto.org/computers/avr/chips/avr_intro.pdf · AVR Introduction 2 The Growing AVR Family • TITNhYe A GVRro fwaminilgy AVR Family • 8 - 32

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Single Cycle Execution

Register File

ALU

Register operationstake ONE clock pulseon the EXTERNAL clockinput

20MIPS @ 20MHz

Page 7: 1-1 - AVR Introduction - 23 sidercholla.mmto.org/computers/avr/chips/avr_intro.pdf · AVR Introduction 2 The Growing AVR Family • TITNhYe A GVRro fwaminilgy AVR Family • 8 - 32

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High Code Density

• Architecture designed for C

• 32 general registers

• C-like addressing modes

• 16- and 32-bit arithmetic support

• Linear address maps

Page 8: 1-1 - AVR Introduction - 23 sidercholla.mmto.org/computers/avr/chips/avr_intro.pdf · AVR Introduction 2 The Growing AVR Family • TITNhYe A GVRro fwaminilgy AVR Family • 8 - 32

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AVR Influenced by IAR

• Architecture and Instruction Set co-designed with IAR systems through several iterations: • Compiler development project initiated before architecture and instruction

set frozen

• Compiler experts’ advice implemented in hardware

• Potential HLL bottlenecks identified and removed

Auto Increment/Decrement Example:

C Source:unsigned char *var1, *var2;*var1++ = *--var2;

Generated assembly code:LD R16,-XST Z+,R16

Page 9: 1-1 - AVR Introduction - 23 sidercholla.mmto.org/computers/avr/chips/avr_intro.pdf · AVR Introduction 2 The Growing AVR Family • TITNhYe A GVRro fwaminilgy AVR Family • 8 - 32

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Example: A Small C Function

/* Return the maximum value of a table of 16 integers */

int max(int *array){char a;int maximum=-32768;

for (a=0;a<16;a++)if (array[a]>maximum)

maximum=array[a];return (maximum);

}

Page 10: 1-1 - AVR Introduction - 23 sidercholla.mmto.org/computers/avr/chips/avr_intro.pdf · AVR Introduction 2 The Growing AVR Family • TITNhYe A GVRro fwaminilgy AVR Family • 8 - 32

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Code Size and Execution Time

• MSP430 and AVR are running a close race• But max speed on MSP430 is only 8MHz

• The C51 would have to run at 296 MHz to match the 16 MHz AVR

• PIC18 seems fast but require 3 times as much code space.

Device Max Speed [MHz]

Code Size [Bytes] Cycles Execution Time

[uS]

ATmega16 16 32 227 14.2

MSP430 8 34 246 30.8

T89C51RD2 20 57 4200 210.0

PIC18F452 40 92 716 17.9

PIC16C74 20 87 2492 124.6

68HC11 12 59 1238 103.2

Page 11: 1-1 - AVR Introduction - 23 sidercholla.mmto.org/computers/avr/chips/avr_intro.pdf · AVR Introduction 2 The Growing AVR Family • TITNhYe A GVRro fwaminilgy AVR Family • 8 - 32

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• Complete navigation application

• C bitfields

• Car Radio control

• DES encryption / decryption

• Three different modules from analog telephones

• Reed-Solomon (error correction) encoder/decoder

• Pager protocol

• Refridgerator control

• Battery charger

• Embedded web server

• Label/recite printer

Benchmark: Real-life Applications

Page 12: 1-1 - AVR Introduction - 23 sidercholla.mmto.org/computers/avr/chips/avr_intro.pdf · AVR Introduction 2 The Growing AVR Family • TITNhYe A GVRro fwaminilgy AVR Family • 8 - 32

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0,0 % 50,0 % 100,0 % 150,0 % 200,0 % 250,0 % 300,0 %

mega128

MSP430

68HC12

ST7

M16C/1x-3x, M16C/6x

eZ80

TMP68HC11

SAM8

H8/300

78K4

68HC08

8051

c80xx251

MAXQ

PICmicro® 18

68HC16

PICmicro® 16, 17

COP8

ST five

Benchmark – Code size

Page 13: 1-1 - AVR Introduction - 23 sidercholla.mmto.org/computers/avr/chips/avr_intro.pdf · AVR Introduction 2 The Growing AVR Family • TITNhYe A GVRro fwaminilgy AVR Family • 8 - 32

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High Integration

AnalogAVR core

SerialInterfaces

NV-memory

Digital

Page 14: 1-1 - AVR Introduction - 23 sidercholla.mmto.org/computers/avr/chips/avr_intro.pdf · AVR Introduction 2 The Growing AVR Family • TITNhYe A GVRro fwaminilgy AVR Family • 8 - 32

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AVR – Single-Chip Solution

HardwareMultiplier

USART SPITWI

I/O pins

SRAM

A/D Converter

OTP Memory

AnalogComparator

Register File

CPU CORE

Brown OutDetector

Watchdog

AnalogReference

In- CircuitEmulator

LCD driverTestFixtures

ProgrammingCircuitry

OutputDriver

Many uConly give you this

TemperatureSensor

EEPROM

Page 15: 1-1 - AVR Introduction - 23 sidercholla.mmto.org/computers/avr/chips/avr_intro.pdf · AVR Introduction 2 The Growing AVR Family • TITNhYe A GVRro fwaminilgy AVR Family • 8 - 32

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FlashHardwareMultiplier

TWI

I/O pins

AnalogComparator

LCD driver

OutputDriver

ResetCircuitry

LCDInterface

BoundaryScanJTAG

On-ChipDebug

CalibratedOscillatorIn System

Programming

Programmable Watchdog

Brown OutDetector

AVR Integrates Much More!

USART SPI

EEPROM

SRAM

A/D Converter

Pull-UpsOn DemandHigh Current

Outputs

Register File

CPU CORE

AnalogReference

TemperatureSensor

AVR – Single-Chip Solution

Page 16: 1-1 - AVR Introduction - 23 sidercholla.mmto.org/computers/avr/chips/avr_intro.pdf · AVR Introduction 2 The Growing AVR Family • TITNhYe A GVRro fwaminilgy AVR Family • 8 - 32

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Highest System Level Integration

Page 17: 1-1 - AVR Introduction - 23 sidercholla.mmto.org/computers/avr/chips/avr_intro.pdf · AVR Introduction 2 The Growing AVR Family • TITNhYe A GVRro fwaminilgy AVR Family • 8 - 32

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In-System Development

• In-System Programming

• In-System Debugging

• In-System Verification

Page 18: 1-1 - AVR Introduction - 23 sidercholla.mmto.org/computers/avr/chips/avr_intro.pdf · AVR Introduction 2 The Growing AVR Family • TITNhYe A GVRro fwaminilgy AVR Family • 8 - 32

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AVR Self-Programming

• Redefining ISP � Self-Programming• The AVR reprograms itself

• Any existing communication interface

• Any voltage

• Any frequency

• Critical functions still operating• Run code during programming (Read-While-Write)

• Software controlled programming• Firmware updates

• Parameter updates

Page 19: 1-1 - AVR Introduction - 23 sidercholla.mmto.org/computers/avr/chips/avr_intro.pdf · AVR Introduction 2 The Growing AVR Family • TITNhYe A GVRro fwaminilgy AVR Family • 8 - 32

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Boot Loader and Application Section

• The Flash program memory

• is divided into two sections• Application Section

• Boot Loader Section

• The two sections enables the AVR to handle two independent applications• The Application section contain the main

application

• The Boot Loader section contain a Flash programming application

• Note that small AVRs does not divide the Flash• The whole Flash can be considered as a Boot

Loader

• Only on devices with 4K Flash or less

Page 20: 1-1 - AVR Introduction - 23 sidercholla.mmto.org/computers/avr/chips/avr_intro.pdf · AVR Introduction 2 The Growing AVR Family • TITNhYe A GVRro fwaminilgy AVR Family • 8 - 32

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Self-Programming Flexibility

• AVR Self-Programming is controlled by SW• SPM instruction controls self-programming

• SPM is an AVR core feature

• Not a hard-coded firmware, but a part of the customer application

• The AVR updates its own Flash while running• Similar to AVR EEPROM access

• Critical functions in the customers application can be maintained

• The upgrade data can be received from any interface• No restricted communication protocol or interface

• No external hardware

• No restrictions to Vcc or Clock frequency

Page 21: 1-1 - AVR Introduction - 23 sidercholla.mmto.org/computers/avr/chips/avr_intro.pdf · AVR Introduction 2 The Growing AVR Family • TITNhYe A GVRro fwaminilgy AVR Family • 8 - 32

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All AVRs have In System Debugging

• JTAG interface • On High pin-count devices

• Uses 4 general I/O pins

• debugWIRE interface• On Low pin-count devices

• Uses only Reset pin

Compared to JTAGs four pins, debugWIRE uses only one; Reset.

This is a big advantage on low pin count devices

Page 22: 1-1 - AVR Introduction - 23 sidercholla.mmto.org/computers/avr/chips/avr_intro.pdf · AVR Introduction 2 The Growing AVR Family • TITNhYe A GVRro fwaminilgy AVR Family • 8 - 32

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Development Tools

• AVR Studio - front end for all AVR tools• Free

• Starter kits and evaluation boards• From $19

• On-Chip Debuggers and Emulators• From $299

Page 23: 1-1 - AVR Introduction - 23 sidercholla.mmto.org/computers/avr/chips/avr_intro.pdf · AVR Introduction 2 The Growing AVR Family • TITNhYe A GVRro fwaminilgy AVR Family • 8 - 32

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Support

• Fully updated product web

• Highly skilled Field Application Engineers

• Support mail handled by AVR experts

• Reference designs

• Application notes

• AVRfreaks community website

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Summary

• High performance

• Low power consumption

• High code density

• Advanced memory technology

• High integration