1 part iii packet transmission chapter 7 packets, frames, and error detection
TRANSCRIPT
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Part III Packet Transmission Chapter 7
Packets, Frames, and
Error Detection
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ScopeScope
Discuss the concept of packet Explain how a sender and receiver coordinate
to transfer a packet Show how packet can be implemented in a
character-oriented network using a simple frame format
Discuss mechanisms used for error detection
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The ProblemThe Problem
Cannot afford individual network connection per pair of computers
Reasons Installing wires consumes time and moneyMaintaining wires consumes money (esp. long-
distance connections)
C(N,2)=N(N-1)/2
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SolutionSolution Network has
Shared central core Many attached stations
ProblemsSome applications have large transfersSome applications cannot wait (e.g., interactive)Need mechanism for fairnessQuality of Service (QoS) guarantee
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Packet Switching PrinciplePacket Switching Principle
Solution for fairness Divide data into small units called packets,
which it sends individually Packet (switching) networks Allow each station opportunity to send a packet
before any station sends another Form of time-division multiplexing
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Illustration of Packet Switching
Illustration of Packet Switching
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Packets and Hardware Frames
Packets and Hardware Frames
Each H.W. technology defines the details of packets that can be transfer on that H.W.
Format Minimum / maximum size
Hardware packet called a frame
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Example Frame Format Used with RS-232
Example Frame Format Used with RS-232
RS-232 is character-oriented permits arbitrary delay between characters
Special characters (i.e., unused character in a text document) are picked as frame delimits
Start of header (soh) (e.g., ^) End of text (eot) (e.g., ~)
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When Data Contains Special Characters
When Data Contains Special Characters
Translate to alternative form by inserting extra bits or bytes
Called byte stuffingExample
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Illustration of Frame With Byte Stuffing
Illustration of Frame With Byte Stuffing
Stuffed frame longer than originalNecessary evil
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Transmission ErrorsTransmission Errors
Interference can change signal used for transmission Bits lost Bit values changed Unsent data to appear
Frame includes additional information to detect / correct error
Set by sender Checked by receiver
Statistical guarantee
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Error Detection And Recovery Techniques (1)
Error Detection And Recovery Techniques (1)
Parity bitOne additional bit per characterCan use
Even parityOdd parity
Cannot handle error that changes two bits
1011011 1011011 1 1010011 1 (1-bit error) 1110011 1 (2-bit error)
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Error Detection And Recovery Techniques (2)
Error Detection And Recovery Techniques (2)
Checksum Computation Example
Checksum appended to frameHandles multiple bit errorsCannot handle all errors
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Error Detection And Recovery Techniques (2)
Error Detection And Recovery Techniques (2)
Illustration Of Errors: Checksum Fails to Detect
Second bit reversed in each item
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Error Detection And Recovery Techniques (3)
Error Detection And Recovery Techniques (3)
Cyclic Redundancy Check (CRC) Mathematical function for data More complex to compute Detect more errors than a checksum
CRC covers data only
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Building Blocks For CRCBuilding Blocks For CRCExclusive or
Shift register
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Example Of CRC HardwareExample Of CRC Hardware
Computes the 16-bit CRCRegisters initialized to zeroBits of message shifted in one at a timeCRC for the message found in registersA receiver calculates the CRC for an incoming
message
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Example CRC ComputationExample CRC Computation若欲傳送資料 10 ,試計算其 CRC 值
0 x xx0 0 0 0 0 0 0 0 0 00 0 0 0 0
1
0 x xx0 0 0 0 0 0 0 0 0 00 0 0 0 00
00
0 0
1100
0 x xx0 0 0 0 0 0 0 0 0 10 0 0 0 0
First bit:
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Second bit:
Example CRC Computation (ctn.)
Example CRC Computation (ctn.)
0 x xx0 0 0 0 0 0 0 0 0 10 0 0 0 0
0
0 x xx0 0 0 0 0 0 0 0 0 10 0 0 0 0
0
0 0 0
000 00
0 x xx0 0 0 0 0 0 0 0 1 00 0 0 0 0
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ExerciseExercise
What is the content of register?
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The End
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Example CRC ComputationExample CRC Computation0 +3 2 1 0Power of x Incoming bit
string11000001010Initial 0 0 0 +
1 + 0001010step 0
1 0 0 +
0 + 001010step 1
0 0 1 +
0 + 01010step 2 0 1 0 +
0 + 1010step 3 1 0 0 +
1 + 010step 4
0 0 1 +
1 + 10step 5 0 1 1 +
1 + 0step 6 1 1 0 +
0 +step 7 1 0 1 ++
Exclusive OR
1 1 0 0 0 0 0 1 0 1 01 1 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 1 0 0 1 0 1 1 0 0 1 1 0 1 1 1 1 1 0 0 1 1 1 1 0 0 1 1 0 0 1 0 1 0 1
1 1 0 0 1 1 0 0 1 0 1 0
step1
step7
step2
step3
step4
step5
step6
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Error Detection And Recovery Techniques (3)
Error Detection And Recovery Techniques (3)
CRC Arithmetic Background
X4+X3+1 X10 +X9 +X7 +X5 +X4
X6 +X3 +X
X10 +X9 +X6
+X7 +X6 +X5 +X4
+X7 +X6 +X3
X5 +X4 +X3
X5 +X4
+X
X3 +X remainder
1 1 0 1 0 1 1 0 0 0 01 1 0 0 1
1 1 0 0 1
1 0 0 1 0 1 0
0 0 1 1 1 0 0 0 0 0
0 1 1 1 10 0 0 0 0
1 1 1 1 01 1 0 0 1
0 1 1 1 00 0 0 0 0
1 1 1 0 0 1 1 0 0 1
0 1 0 1 00 0 0 0 0
remainder 1 0 1 0
<Modulo 2 arithmetic>0+0=0 0-0=01+0=1 1-0=10+1=1 0-1=11+1=0 1-1=0
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Error Detection And Recovery Techniques (3)
Error Detection And Recovery Techniques (3)
How CRC WorksSending
Given the generator polynomial G(x)B(x): sending bit string+ n “0”s (degree
of G(x))R(x): remainderT(x): B(x) - R(x)
ReceivingG(x) | T’(x) T’(x) T(x)G(x) | T’(x) T’(x) T(x)
1 1 0 1 0 1 1 0 0 0 01 1 0 0 1
1 1 0 0 1
1 0 0 1 0 1 0
0 0 1 1 1 0 0 0 0 0
0 1 1 1 10 0 0 0 0
1 1 1 1 01 1 0 0 1
0 1 1 1 00 0 0 0 0
1 1 1 0 0 1 1 0 0 1
0 1 0 1 00 0 0 0 0
remainder 1 0 1 0
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Error Detection And Recovery Techniques (3)
Error Detection And Recovery Techniques (3)
CRC Example1 1 0 1 0 1 1 1 0 1 01 1 0 0 1 0 0 1 1 1 0 0 0 0 0 0 1 1 1 1 0 0 0 0 0 1 1 1 1 1 1 1 0 0 1 0 1 1 0 0 0 0 0 0 0 1 1 0 0 1 1 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 remainder
Correct!
1 1 0 0 1 1 0 0 1 0 1 0
1 1 0 0 0 0 0 1 0 1 01 1 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 1 0 0 1 0 1 1 0 0 1 1 0 1 1 1 1 1 0 0 1 1 1 1 0 0 1 1 0 0 1 0 1 0 1 remainder
Incorrect!
1 1 0 0 1 1 0 0 1 0 1 0