1 task leader : alex orailoglu, uc san diego students : rasit onur topaloglu, uc san diego, 2007...
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Task Leader : Alex Orailoglu, UC San Diego
Students : Rasit Onur Topaloglu, UC San Diego, 2007
Industrial Liaisons : Hosam Haggag, National Semiconductor Corp.Patrick Drennan, Freescale Semiconductor, Inc.Mien Li, Advanced Micro Devices, Inc.
“Mismatch analysis for high speed, deep sub-micron blocks and simulation methodology”
Task ID:906.001
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Technical Thrust : Circuit design
Anticipated Result : Mismatch simulation and testing methods, with possible implementation in an EDA environment
Task Description : Provide measurement, simulation, test and verification methods for mismatch for deep-submicron technologiesTask Deliverables : Report on developing a mismatch test methodology Report on developing level 1 sensitivity functions
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Accomplishments During the Past Year : Devised a test generation methodology to target mismatch Devised a general methodology to derive sensitivity functions for mismatch Devised Forward Discrete Probability Propagation Method for estimation of high level parameter probability distributionsFuture Direction : Implementation of these techniques at behavioral levels : will enable ability to use along with HDL, ex.Verilog-AMS
Executive Summary
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Technology Transfer & Industrial Interactions : Monthly telephone communications to National
Semiconductor on project progress
Internship at National Semiconductor
Publications : SRC Deliverable Reports : ( P007960 and P009498 )
On Mismatch in the Deep Sub-micron Era : From Physics to Circuits , ASPDAC 2004
Executive Summary
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Task Leader : Alex Orailoglu, UC San Diego
Students : Ayse K. Coskun, UC San Diego, 2008
Chengmo Yang, UC San Diego, 2008
Industrial Liaisons : Hosam Haggag, National Semiconductor Corp.
“Mismatch for Next Generation”Task ID: 1184.001
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Technical Thrust : Circuit design
Anticipated Result : A wafer-aware and design-to-avoid mismatch design flow for mixed-signal and RF circuits implemented in an EDA environment. Task Description : Provide mismatch-immune design and analysis methodologies including parasitics and passives Task Deliverables : Report on MINT modelsReport on mismatch verification and diagnosis, Nov04
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Technology Transfer & Industrial Interactions : Monthly telephone communications to National
Semiconductor on project progress
Executive Summary
Future Direction : Discovery of mismatch integrated models and diagnosis Techniques to target mismatch
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Outline
Mismatch Amplification
Test Generation
Test of Mismatch
Forward Discrete Probability PropagationProbability Discretization TheoryQ, F, B, R Operators and r-domainExperimental Results
Conclusions
Motivation
Excitation PlotsMismatch Factor
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Test of Mismatch
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Motivation for Testing
Find an analogous specialized test for mismatch
•Functional testing is not the only method for digital circuits
•While testing for stuck-at faults, other faults typically discovered also
GOALS
Low cost : measured in terms of speed and price of tester
Separate design from test : to earn test engineers time
Determinism : to provide pass and fail information
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Mismatch AmplificationActivate the defect, then propagate
•Aim is to differentiate circuit response from the nominal
•Bias, voltage, temperature and input used to amplify mismatch
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Excitation Plots Gain @100kHz vs. Widths of matched pair
•Dispersion from matched condition leads to appreciable reduction in observed parameter, ex. gain•Equal width variations in the pair => negligible reduction
no-m
ism
atch
dia
gona
l
max-mismatch diagonal
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Deteriorating Effects of Mismatch Gain @100kHz vs. Widths of matched pair
•A wider range of equal variations on no-mismatch diagonal => still negligible reduction
no-m
ism
atch
dia
gona
l
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Separation of Responses Frequency response DC response
•Fault-free responses are separated
•Fault-free responses sit on no-mismatch diagonal
•Vertical cuts are used in excitation plots for over-a-range plots
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Mismatch Factor
•3-D response, when sampled, can be represented as a matrix
012314
123143
231432
314321
143210
stepsizeMF
|| 21
•Mismatch Factor (MF) gives a degree of mismatch effect in circuit for some parameter, ex. tox on an analysis, ex. sampled AC gain
∆1
∆2
stepsize
Matrix representation of response:
High MF => small mismatch causes appreciable impact
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Other Observed Excitation Plots
•MF still effective due to symmetric nature
Sens. of AC gain to bias Sens. of AC gain to VDD
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Test Algorithm
Mismatch (mm) pair,
physical parameter,
worst-case (V,T),
obtain MF’s;
select largest ones.
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Input and Analysis Choices
•Bias, voltage, temperature and input signal Input Choices
•AC magnitude response : powerful for wide-band circuits
Analysis Choices
•DC response : to be used for digital circuits
•Sensitivities of these : wrt. circuit biases and inputs
•IDDQ : identified as being succesful for analog mismatch
Use circuit specs to constraint ranges: ex. AC or VDD range
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Test Generation Ex. : high coverageAC100kHz AC2GHZ
DCVin=1.4V DCVin=1.5V
IDDQ
SAC100kHz
Vbias1SAC100kHz
Vbias2SAC2GHz
Vbias1SAC2GHz
Vbias2
SAC100kHz
Vbias1SAC100kHz
Vbias2SAC2GHz
Vbias1SAC2GHz
Vbias2
SIDDQ
Vbias1SIDDQ
Vbias2{VDD1, VDD2, T1, T2}W, mm1
W, mm2 ..VFB, mmN
..
..
Each entry excitation plot MF analysis type
Ana
lysi
s T
ypes
physical param. and mm pair, select highest MF in each row
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Test Generation Example : low costAC100kHz AC2GHZ
DCVin=1.4V DCVin=1.5V
IDDQ
SAC100kHz
Vbias1SAC100kHz
Vbias2SAC2GHz
Vbias1SAC2GHz
Vbias2
SAC100kHz
Vbias1SAC100kHz
Vbias2SAC2GHz
Vbias1SAC2GHz
Vbias2
SIDDQ
Vbias1SIDDQ
Vbias2{VDD1, VDD2, T1, T2, mm1, mm2,..,mmN}W
tox ..VFB
..
..
Each entry excitation plot MF analysis type
Ana
lysi
s T
ypes
physical parameter, select highest MF in each row
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Test Set for Low Cost ExampleAC2GHZ :Apply 1mV input AC at 3.3V, 300K, find AC gain
DCVin=1.4V : Apply 1.4V input DC 2.7V, 200K, find DC gain
IDDQ :At 3.3V, 300K, find power supply current
SAC2GHz
Vbias1
SAC100kHz
Vbias2
SIDDQ
Vbias2
W
•This test set targets the Width mismatch in the circuit
: Apply 1mV input AC at 2.7V, 200K; then change Vbias1 by 10% and repeat
: Apply 1mV input AC at 2.7V, 200K; then change Vbias2 by 10% and repeat
: At 2.7V, 200K, find power supply current;then change Vbias2 by 10% and repeat
If mismatch in Width parameter present, results differ appreciably
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Test Set Size and Verification
•Reduction in number of test vectors intrinsic
•As simulation based, verification also intrinsic
•Apply this test set before any functional test, as this test catches most hard faults
•Test number can be reduced to analysis types*physical parameters
•Test number is analysis types*physical parameters*mismatch pairs for increased fault coverage
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Outline
Mismatch Amplification
Test Generation
Test of Mismatch
Forward Discrete Probability PropagationProbability Discretization TheoryQ, F, B, R Operators and r-domainExperimental Results
Conclusions
Motivation
Excitation PlotsMismatch Factor
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Forward Discrete Probability Propagation
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Motivation for Probability Propagation
Find a novel propagation method
•Estimation of circuit parameters needed to examine effects of process variations•Gaussian assumption attributed to device parameters no longer
accurate
GOALS
Determinism : a stochastic output using known formulas
Algebraic tractability : enabling manual applicability
Speed & Accuracy : be comparable or outperform Monte Carlo
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Shortcomings of Monte Carlo
•Non-determinism : Not manually applicable
•Limited for certain distributions : Random number generators only provide certain distributions
•Accuracy : May miss points that are less likely to occur due to random sampling; limited by the performance of random number generator
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spdf(X) or (X)pdf(X)
p-domain r-domain
Probability Discretization Theory : QN Operator; p and r domains
•QN band-pass filter pdf(X) and divide into bins
))(()( XpdfQX N
N in QN indicates number or bins
Certain operators easy to apply in r-domain
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spdf(X) or (X)
r-domain
Characterizing an spdf
Ni
ii wxpX..1
)()(
•can write spdf(X) as :
im
im
i dxXpdfp)1(
)(
2)1(
imwi
where :
pi : probability for i’th impulse
wi : value of i’th impulse
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F Operator •F operator implements a function over spdf’s
spdf(X) or (X)
))(),..,(()( 1 rXXFY Xi, Y : random variables
r
r
rss
Xs
Xs
Xs
Xs wwfyppY
,..,1
1
1
1
1
1
1)),..,((..)(
pXs : Set of all samples s belonging to X
•Function applied to individual impulses•Individual probabilities multiplied
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))(()(' XBX e
Band-pass, Be, Operator
))((]),[(:
)()(Xwnmwi
ii
ii
wxpX
•Eliminate samples having values out of rangeMargin-based Definition:
))(()
)(max(:
)()(Xp
e
ppi
ii
iii
i
wxpX
Error-based Definition:•Eliminate samples having probabilities least likely to occur
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Re-bin, RN, Operator ))(()(' XRX N
•Samples falling into the same bin congregated in one
i
ii wxpX )()( ijs
ji bwstppj
.where :
Impulses after F Unite into one bin Resulting spdf(X)
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The Necessity of Re-binning
•Non-linear nature of functions cause accumulation in certain ranges
Band-pass and re-bin operations needed after F operation
Impulses after F, before B and R
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Error Analysis
12
2
jbjiji
ji pwmdi
)(:,
),(Total distortion:
dqQpdfqQEQ )(][2/
2/
222
Variance of quantization error:
•If quantizer uniform and small, quantization error random variable Q is uniformly distributed
2)(),( jiji wmwmd Distortion caused by representing samples in a bin by a single
sample:
mi : center or i’th bin
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Connectivity Graph Used in Experiments
•Connectivity Graphs can tie physical parameters to circuit parameters
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Algorithm Implementing the F Operator
While each random variable has its spdf computed
For each rv. which has all ancestor spdf’s computed
For each sample in X1
For each sample in Xr
Place an impulse with height p1,..,pr at x=f(v1,..,vr)
Apply B and R algorithms to this rv.
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Algorithm for the B and R Operators
Divide this range into M bins
For each binPlace a quantizing impulse at the center of the bin with a height pi equal to the sum of all impulses within bin
Find maximum probability, pi-max, of quantized impulses within bins
Find new maximum and minimum values wi within impulses
Divide this range into N bins
Find maximum and minimum values wi within impulses
Eliminate impulses within bins which have a quantized impulse with smaller probability than error-rate*pi-max
For each binPlace an impulse at the center of the bin with height equal to sum of all impulses within bin
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T NSUB
PHIf
Q, F, B, R on a Connectivity Graph
Q Q
F
B,R
•Repeated until we get the high level distributionUseful for device characterization also
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Experimental Results
•Impulse representation for threshold voltage and transconductance are obtained through FDPP on the graph
(X) for gm(X) for Vth
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39•A close match is observed after interpolation
Monte Carlo – FDPP Comparison
solid : FDPP dotted : Monte Carlo
Pdf of VthPdf of ID
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Monte Carlo – FDPP Comparison with a Low Sample Number
•Monte Carlo inaccurate for moderate number of samples•Indicates FDPP can be manually applied without major accuracy degradation
solid : FDPP,100 samples
Pdf of FPdf of F
noisy : Monte Carlo, 1000 and 100000 samples respectively
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P1
P2
Monte Carlo – FDPP Comparison one-to-many relationships and custom pdf’s
P3
P4
•Custom pdf’s not possible without a custom random number generator
•Monte Carlo overestimates for one-to-many relationships as same sample is used
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Conclusions
•A specialized test selection mechanism for mismatch is introduced
•Forward Discrete Probability Propagation is introduced as an alternative to Monte Carlo based methods
•FDPP should be preferred when low probability samples are important, algebraic intuition needed, custom pdf’s are present or one-to-many relationships are present
•Test of Mismatch is a deterministic, general and low-cost methodology