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The Chinese University of Hong Kong

Faculty of Education

Diploma in Education (Part-Time) Winter 1997

Educational Communications and Technology

Assignment 3 Group Project

Group 14 Lau Hing Tong (97039760)

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Modern digital computers are constructed making use of many integrated circuits or ICs.

Integrated circuits are also known as silicon chips, micro chips or chips.

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One important device inside chips is a tiny electronic component called a transistor.

Each transistor acts as a switch that is capable of switching electronic signals on and off millions of times a second.

The transistors form the main components inside the chips and are used extensively in one form or another to make up the logic gates inside these chips.

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A logic gate is a circuit designed to perform specific functions such as AND, OR and NOT.

logic circuit

A

B

inputs

X

output

A truth table is a tabular layout which shows the relationship between the output from a logic circuit and all possible inputs to the circuit.

OutputA B X0 0 00 1 11 0 11 1 0

Inputs

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NOT gate is the simplest because it has only one input and one output.

A X

A simplified truth table is necessary because for one input we have only two possible states i.e. 0 and 1.

NOT gate is also known as an inverter.

The symbol for the NOT operation is denoted by ‘¯’.

Hence the shorthand way of writing NOT A is: A

A X0 11 0

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The circuit symbol for an AND gate is shown on the right.

A

B X

The AND gate derives its name from the fact that we get an output of 1 only when both of the inputs A AND B are at 1.

The symbol for the AND operation is denoted by ‘•’.

The output X from the AND gate is written as X = A•B.

A B X0 0 00 1 01 0 01 1 1

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The circuit symbol for an OR gate is shown on the right.

A

B X

The OR gate derives its name from the fact that we get an output of 1 whenever the inputs A or B or both are at 1.

A B X0 0 00 1 11 0 11 1 1

The symbol for the OR operation is denoted by ‘+’.

The output X from the OR gate is written as X = A+B.

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The circuit symbol for an XOR gate is shown on the right.

A

B X

The XOR gate derives its name from the fact that we get an output of 1 when the inputs are different or not equivalent.

A B X0 0 00 1 11 0 11 1 0

The symbol for the XOR operation is denoted by ‘’.

The output X from the XOR gate is written as X = AB.

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A Boolean function has one or more input variables and yields a result that depends only on values of these variables.

To implement a circuit for any Boolean function:

1. write down the truth table for the function,

2. provide NOT gates to yield the complement of each input,

3. draw an AND gate for each term with a 1 in the result,

4. wire the AND gates to the appropriate inputs, and

5. feed the output of all the AND gates into an OR gate.

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The circuit symbol for a NAND gate is shown on the right.

A

B X

The NAND gate is a combination of an AND gate followed by a NOT gate. Hence the name NAND (Not AND).

A B X0 0 10 1 11 0 11 1 0

The output X from the NAND gate is written as BAX

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The circuit symbol for a NOR gate is shown on the right.

A

B X

The NOR gate is a combination of an OR gate followed by a NOT gate. Hence the name NOR (Not OR).

A B X0 0 10 1 01 0 01 1 0

The output X from the NOR gate is written as BAX

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We have shown that any Boolean function can be implemented using NOT, AND and OR gates.

However, for reasons of efficiency and economy, it is better to implement circuits using only a single type of gate.

Using NAND gates only or NOR gates only can simulate a NOT gate, an AND gate and an OR gate.

Hence computers are based on NAND and NOR gates rather than the more familiar AND gates and OR gates.

So it is straightforward to convert circuits generated by the preceding algorithm to pure NAND or pure NOR form.

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Boolean algebra is a form of algebra that helps us deal with truth tables and enables us to simplify expressions.

Some basic laws of Boolean algebra will now be stated. These laws can be proved by using truth tables.

1. Commutative laws

ABBA ABBA

2. Associative laws

CB)(AC)(BA CB)(AC)(BA

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3. Distributive laws

C)(AB)(AC)(BA C)(AB)(AC)(BA

4. Tautology laws

AAA AAA 1AA 0AA

5. Absorption laws

AB)(AA AB)(AA

6. Common sense number

0A0

AA0

1A1 AA1

10 01

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7. Double complement laws

AA 8. De Morgan’s law

BABA BABA

This is a very powerful law in Boolean algebra. The easiest way of understanding and remembering De Morgan’s law is as follows:

NOT the individual terms. Change the sign. Then NOT the lot.

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Simplify

Example 1

BABA

Solution: BABA BBAA Commutative laws

)BB()AA( Associative laws

11 Tautology laws

1

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Example 2

Simplify BABABA

Solution: BABABA BABABABA Add a term

)AA(B)BB(A Factorise

BA Tautology laws

BA De Morgan’s law

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Karnaugh map is an useful aid to simplify additions of products. It is simply a convenient tabular arrangement of a Venn diagram.

Consider the arrangement of four cells shown on the right.

The numbers along the top of the boxes represent A. Therefore 0 means NOT A, and 1 means A. Similarly, the numbers down the left-hand side represent B.We can therefore uniquely identify each cell. For example, the top left-hand cell would be called BA

0 101

AB

BA BA BA BA

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We now consider four variables instead of two. The arrangement is shown below.

00 01 11 10

00

01

11

10

DCBA

ABCD

If we choose the third cell from the left on the top row, then we can see that both A AND B are 1 (from 11 at the top), and both C AND D are 0 (from the 00 at the side). Hence the name of the cell is DCBA

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We will start by considering a 4-variable Karnaugh map and the problem of simplifying the following expression:

DCBADCBA

DCBADCBA

To fill in the K-map we proceed through the above expression from left to right.

From the first part of the expression, we gettherefore a 1 goes into the 0100 cell.

DCBA

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From the second part of the expression, we gettherefore a 1 goes into the 0101 cell.

DCBA

The other two 1s are filled in using the third and fourth parts of the Boolean expression.

When you have finished with all the terms, 0s are put in all the other cells.

00 01 11 10

00 0 1 0 0

01 0 1 0 0

11 0 1 0 0

10 0 1 0 0

ABCD

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00 01 11 10

00 0 1 0 0

01 0 1 0 0

11 0 1 0 0

10 0 1 0 0

ABCD

From the Karnaugh Map, it is obvious that Cs and Ds do not matter, but ‘A must be 0’ AND ‘B must be 1’.

Therefore the simplified expression is

BA

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Half adder is a circuit which performs the addition of two binary digits.

We will now design a simple circuit to add together the two binary digits A and B, and produce the correct answer which we have called sum S. The circuit will also produce a carry C if necessary.

A B S C

0 0 0 00 1 1 01 0 1 01 1 0 1

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From the algorithm we learned before, we get

BABAS BAC and

Hence the circuit is

BA

A

B S

C

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Half adder can only perform the addition of two binary digits.

Therefore if we are to add together groups of binary digits we need to be able to deal with three inputs.

They are the two binary digits A and B to be added plus a carry in P from the previous column.

The full adder is able to cope with all three inputs and has two outputs: sum S and carry out C.

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A B P S C

0 0 0 0 00 0 1 1 00 1 0 1 00 1 1 0 1

Inputs Outputs

The truth table for the full adder is therefore as follows:

A B P S C

1 0 0 1 01 0 1 0 11 1 0 0 11 1 1 1 1

Inputs Outputs

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From the algorithm we learned before, we get

P)BA(S and P)BA(BAC

Hence the circuit is

A

BS

C

P

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This is the end of the presentation program.

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This slide show is produced by Group 14 using Chinese Microsoft PowerPoint 97.

There is only one member in Group 14: Lau Hing Tong (97039760)

Thank you