10 TIPS ONLY EXPERIENCED PCB DESIGNERS KNOW

EACH ONE GUARANTEED TO SAVE YOU TIME AND MONEY

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INTRODUCTIONEngineers must balance competing priorities when they create a printed circuit board design. Some design decisions are arbitrary, while others are unavoidable. Understanding the PCB Fabrication and Assembly processes is the best way to ensure you aren’t unnecessarily increasing the cost to manufacture your board. The following tips and tricks will help you reduce the cost of your next PCB project.

TIP 1: MINIMIZE PROCESS STEPSThe cost to manufacture a Printed Circuit Board increases in proportion with the number of steps and the amount of time required to make it. Before fabrication begins, a specially trained manufacturing engineer will create a list of processing steps needed to make a specific design. Any design decision that can reduce the number of steps will decrease the overall cost of the design. As a bonus, with fewer steps, your PCB will take less time to fabricate, so it will be ready to ship to you in less time.

Travelers contain the list of steps required to create a specific PCB. The image above shows two of the pages of the traveler used to create a fictional 3-layer PCB. Minimizing the number

of process steps will minimize the overall cost of your design.

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Fabricators refer to the two general construction methods as foil and cap construction. In foil construction, designs start with a plated and etched central core that is sequentially thickened with layers of dielectric and foil in lamination, electroplate, and etch cycles. In “cap” construction, multiple cores are plated, etched, and then laminated together.

Materials arrive at PCB fabricators as either pre-laminated copper-clad cores or loose sheets of copper foil and uncured epoxy-impregnated dielectric called prepreg. Fabricators drill, electroplate, etch and laminate the cores and foil/prepreg in various process steps to create a specific layer stack.

The three primary materials all fabricators have available are core, prepreg, and foil. The materials are combined to create PCBs of various layer counts and thicknesses.

TIP 2: USE FOIL INSTEAD OF CAP CONSTRUCTION

On the left, cap construction would see layers 1-2 and 3-4 drilled, plated, etched, then pressed together, followed by a final drill, plate, and etch cycle. On the right,

foil construction would see layers 2-3 drilled, plated,

and etched, then layers 1&4 would be laminated to 2-3, followed by a final round of

drill, plate, and etch.

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There are two general types of Vertical Interconnect Access (VIAs): microVIAs, created with lasers that ablate material between any two successive layers on a PCB; and mechanical VIAs, created by drilling straight through a stack of materials. Micro VIAs always have a 1:1 aspect ratio, while mechanical VIAs generally have aspect ratios of 1:10 (preferred) to 1:30 (process limit). Very high aspect ratio VIAs take a long time to create.

VIAs begin as drilled holes in the PCB stack that are filled with an electroless copper catalyst and then plated with copper in an electroplating tank. Fabricators create holes in internal layers (such as for buried VIAs) before additional layers of copper and prepreg are laminated to the stack.

Fabricators generally prefer foil/sequential stackups because it is easier to align/register successive layers of the PCB build. But specialty laminates sometimes require cap construction.

The number of layers and the overall thickness of your board will dictate the inter-layer spacing. Ask your fabricator to work with you to design a layer stack before deciding which layers will have impedance-controlled traces and high-voltage/high-current nets.

TIP 3: CHOOSE YOUR VIA STACK WISELY

VIAs are formed in a copper-clad laminate in a multistep process. First, a drill creates a hole through multiple copper- and prepreg-layers, then a liquid photo imagable (LPI) mask is applied, and the entire panel is electroplated to build up exposed copper. Then the LPI mask is stripped away, and the entire

panel is etched to remove copper from the entire board. Left behind are traces and vias.

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Each time your fabricator goes through the drill-to-etch cycle, it increases overall fabrication time, risk, and, ultimately, the cost of your PCB assembly. The least expensive option is to use only through-hole VIAs since that will only require one drill-to-etch cycle after final lamination.

If you need high-aspect-ratio VIAs, stacked micro VIAs might be a better option than mechanical VIAs. Stacked and staggered microVIAs are a reasonable option that provides high aspect ratios in small spaces.

Your choice of cap or foil construction impacts your VIA options and, therefore, your layer connectivity. Through-hole VIAs are always an option, but blind and buried VIAs are only available in certain stackups. In a sequential stackup, stacked micro VIAs (combined with a buried VIA) can

connect any two layers.

A design that requires one buried VIA will require a fabricator to go through the same number of steps as a design that requires 100 buried VIAs. While there might be a marginal added expense for a large number of drill holes, the expense is negligible compared to the cost of adding the first blind/buried VIA. Cost savings are not achieved by minimizing the number of blind and buried VIAs; they are realized by completely eliminating the blind and buried VIAs and removing multiple steps from the fabrication process.

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For parts to form proper electrical, mechanical, and thermal con-nections to printed circuit boards, machines must apply specific amounts of solder to the land pads before placing the parts. His-torically, engineers have done this with solder-paste stencils. For large production runs, that might make sense. But for small runs, first articles, assembly variants, and prototypes that are likely to change, the stencil is an unnecessary and unwanted expense for a single-use application.

Jet-Paste Printers solve the stencil problem by spraying solder paste directly on solder pads. The machines determine how much solder paste to use on each pad, then inspect and adjust the amount with minimal effort. That means you can use virtually any surface finish and achieve acceptable results.

COST-SAVING DESIGN TIPS

TIP 4a: STENCIL-LESS ASSEMBLY

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On initial prototypes, you might be able to use a Hot Air Surface Level (HASL) surface finish with a Jet Paste Printer, saving the expense of a planar Electroless Nickel Immersion Gold (ENIG) finish as well as the cost of a stencil. Once you are satisfied with your final design and ready for a large production run, you can switch to solder stencils and ENIG.

TIP 4b: PLANAR SURFACE FINISH FOR STENCIL

For solder paste to properly deposit on a PCB, the stencil must form a gasket seal against a PCB solder mask. That can only occur reliably on a planar PCB. Unfortunately, copper oxidizes in the presence of atmospheric oxygen, which means the exposed copper on your PCB must be protected. Surface finish options include Organic Solderability Preservative (OSP); Electroless Nickel Immersion Gold (ENIG); Electroless Nickel Electroless Platinum Immersion Gold (ENEPIG); Hot Air Solder Level (HASL); and Immersion Tin finish. The least expensive options, HASL and Immersion Tin, leave a decidedly non-planar finish. OSP is the next least expensive option, and it is both planar and inexpensive, but it is also fragile and has a relatively short shelf life. The best option is typically ENIG, as has a mid-range price, durable, has a long shelf life, and is planar.

TIP 5: LARGER DRILLS, LARGER PADS, LARGE ANTI-PADS

As components continue to shrink in size, the size of the land patterns decreases as well. Engineers must route traces that leave those tiny parts to other areas on the board. BGAs, for example, sometimes have enough room to squeeze a trace between neighboring pads, which works well enough for a small pin-count part. But more often than not, the traces must move vertically to other layers on the stackup, and that requires engineers to create pads and anti-pads that are thinner in diameter than a sewing needle.

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Once VIA pads are formed on a particular PCB layer, a drill must carve out the center of the hole. The lamination process is inherently variable, and there is always a chance that the new layers are slightly misaligned over the old layers. With any misalignment, the drill can break a trace or breakout of the VIA pad more than 90° and cause the board to fail inspection.

The solution to increasing yield is to give your fabricator as much extra room as possible. Fortunately, it doesn’t take much to make them happy. For example, a fabricator might have a minimum mechanical drill size of 150 micrometers (5.9 mils), a minimum annular ring diameter of +4 mils, and trace/space requirements might force the anti-pad diameter to be +6 mils beyond that. Is it possible to increase your annular ring diameter to +6 mils? That increases the size of the VIA pads from 250 micrometers (9.9 mils) to 300 micrometers (11.9 mils), allowing misregistration of 1 mil in any direction before breakout becomes a problem. It might not sound like much, but on a class 3 board, it might mean an increase in yield. And at the very least, it might mean the difference between using the regular inexpensive mechanical drill or a more expensive x-ray or machine-vision-assisted drill.

The mechanical drill size lower-limit depends on the hole depth and the fabricator’s minimum aspect ratio of the drill hole. Most manufacturers recommend a maximum aspect ratio of 10 drill-diameters in height to one drill diameter in width, or 10:1. However, new pulse-plating technology allows aspect ratios of 28:1 or higher. The catch is that electroplating 28:1 aspect-ratio VIAs takes significantly longer to accomplish than electroplating 10:1 aspect-ratio VIAs and therefore costs more.

PCBs come in standard thicknesses of 0.8 mm (32 mils), 1.6 mm (63 mils), and 2.4 mm (95 mils), and the smallest available mechanical drill is 150 micrometers (5.9 mils). A 150 micrometers hole in a 0.8, 1.6, and 2.4 mm PCB has an aspect ratio of 5.3:1, 10.3:1, and 16:1, respectively. For a 2.4 mm thick board, you should increase the mechanical drill size to 250 micrometers (9.8 mils) in diameter.

You can have higher aspect ratios than 10:1 and 30:1, but you’ll have to switch to laser-drilled VIAs, or subassemblies, which increases the project’s overall cost.

COST-SAVING DESIGN TIPS

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The forces that act on liquid solder alloys during reflow are cohesion, adhesion, and gravity. Cohesion causes the liquid solder metals to ball up, adhesion causes the liquid solder to wick and wet, and gravity causes liquid solder to flatten and move to lower elevations. If there is an unobstructed metallic path away from a land pad, the liquid flux will flow across it first, and then adhesive forces will draw liquid solder into the location. A proper solder joint will not form without adequate amounts of solder between a part pad and a land pad.

It is essential to place a minimum web of 3-4 mils of Liquid Photo Imageable Solder Mask (LPI or SM) between a land pad and any nearby trace or VIA hole to ensure that the solder stays on the pad where it was placed and prevent the solder from wicking into VIA holes, . It’s also possible to close the solder-mask around the hole to cause the solder mask to tent over the VIA hole.

TIP 6: NO OPEN VIA-IN-PAD OR VIA-NEAR-PAD

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COST-SAVING DESIGN TIPS

You should check with your fabricator and provided a minimum web of 3 to 4 mils to prevent solder paste from leaving a land pad and entering a VIA hole. Additionally, VIA tenting can reliably cover VIAs up to around 50 mils in diameter.

TIP 7: LEAST, NOMINAL, & MOST PAD MATERIAL CONDITIONIPC-7351 provides three component-density and land-pattern material conditions: A-maximum/most/M; B-median/nominal/N; and C-minimum/least/L that describe both the land pattern size and the spacing to nearby components. Unless you are designing exceedingly high-density designs, do everyone a favor and avoid condition C. With parts packed as tightly as possible, inspection is difficult, solder-bridges can more easily form, and rework is usually impossible. Additionally, some processes, such as selective solder and wave solder can’t be used when parts are placed too closely together.

Unless you need to, avoid using condition C since this makes assembly, inspection, and rework difficult, if not impossible, to accomplish.

TIP 8: USE IN-STOCK PARTS & PROVIDE PART OPTIONSIt is always a good idea to perform a stock check on your Bill of Materials (BOM) before submitting your design to a manufacturer. Many electronic design and automation (EDA) software packages, such as Altium, Kicad, and Diptrace, can search for part availability inside the program. The software will immediately alert you to low stock or out-of-stock parts.

Alternatively, external services such as Octopart and FindChips will provide up-to-date part availability using APIs provided by distributors such as Mouser and Digikey.

This screen capture from Octopart (8/30/2021) shows the availability of an MLCC at various manufacturers.

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Engineers often depend on their electronic design and automation (EDA) software’s export function to provide all necessary information to their fabricators and assemblers. But fabricators don’t need the same set of files that assemblers do. And “Readme” files are necessarily different for the two processes. If you provide individual files, it is best to provide only the requested information to decrease the signal-to-noise ratio for line workers. For example, Drill operators need to know only about drilling holes in a board; they don’t need to know what parts you plan to place on the board later; similarly, pick and place operators only need to know about the parts they are placing on the board, not what holes are drilled in it.

Fabrication

Fabrication is the process of constructing the physical circuit board. While new data transfer formats such as IPC-2581 and ODB++ exist, most designers still submit Gerber files to their fabrication houses. Necessary artwork files include board outline, solder mask, and silkscreen copper layer artwork. You should also provide separate drill files for plated-through-holes and non-plated-through-holes and one file each for every controlled depth drill. You can use a semicolon to insert notes into the header of drill files after “M48” and before “%” to provide extra information about that particular file. For controlled depth drills, indicate which layers to drill and which layers to leave untouched.

TIP 9: PROVIDE THE CORRECT FILES

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COST-SAVING DESIGN TIPS

You don’t need fancy software packages to provide the necessary documentation. The image above shows the beginning of two controlled depth drill files as well as a README.TXT file. A simple text editor can modify all necessary files (color added solely for artistic emphasis).

Assembly

There are very few scenarios in which an assembly house will need copper layer artwork files, silkscreen files, or fabrication readme files. Their primary focus is on the files needed for assembly, and occasionally drill files to check for VIA-in-pad errors. Necessary assembly files include solder paste artwork, part centroid files (pick-and-place), and bill-of-material files.

Solder-paste layers are usually 1:1 copies of the solder mask layers that the assembly house modifies based on the package type and dimensions. Part centroid files contain the X and Y coordinates, the part rotation, and the side of the PCB.

TIP 10: ONE-SIDED SURFACE MOUNT ASSEMBLYEvery time you can eliminate steps in the manufacturing process, you will save money. One place this is often possible is by designing for single-sided surface-mount assembly.

This image of a sample PCB from Autodesk’s Fusion 360 shows parts placed only on

the front side of the PCB and nothing on the backside. Eliminating the bottom side

silkscreen would further reduce PCB costs.

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On crowded two-sided boards, it might be impossible to achieve this feat without significantly increasing the size of the board. But for a large PCB design, such as user input board (keyboard, controller, etc.) that might have just a handful of small parts on the bottom side of the board, and dozens or even hundreds of parts on the top side of the board, it usually makes sense to try to relocate all of the parts to a single side of the board. If it is possible to have single-sided placement, it will eliminate a second run through the pick and place machine, the reflow oven, and the automated optical inspection (AOI) machines.

Additionally, it makes inspection simpler; bed-of-nails testing jig is simpler and less expensive to design; case mounting simpler, lower profile, and easier to design; and board shipping safer and more straightforward.