DSL Technology for Exascale Computing (D-TEC)!Saman Amarasinghe, Armando Solar-Lezama, Adam Chlipala, Srinivas Devadas,

Una-May O’Reilly, Nir Shavit, Youssef Marzouk @ MIT John Mellor-Crummey & Vivek Sarkar @ Rice University

Vijay Saraswat & David Grove @ IBM Watson

P. Sadayappan & Atanas Rountev @ Ohio State University Ras Bodik @ University of California at Berkeley

Craig Rasmussen @ University of Oregon Phil Colella @ Lawrence Berkeley National Laboratory

Scott Baden @ University of California at San Diego

•  Domain Specific Languages define high level abstractions that make it efficient for the development of application code."

•  High-level abstractions improve productivity"•  Enables domain-specific performance and energy optimizations"

•  However, it is very difficult to efficiently leverage DSLs due to lengthy design and development of the corresponding software stack support, including languages, compilers, runtime and tools. "

INTRODUCTION! GOAL!Making DSLs effective for exascale"

•  Support both embedded and general (syntax extended) DSLs"•  Address all layers of the exascale software stack: languages (DSLs), compilers, abstract

machine, runtime, and tools"•  Address multiple exascale challenges: scalability, programmability, performance portability,

resilience, energy efficiency, correctness, and heterogeneity"•  Include interoperability with MPI+X through translation to low level code"•  Provide a migration strategy for legacy code through source-to-source technology"

Summary!

APPROACH!

DSLs are expected to be a transformational technology to bridge the gap between diverse algorithms/applications and complex exascale machines. We are working on a comprehensive DSL framework to facilitate the definition, implementation and optimizations of DSLs for addressing multiple challenges arisen from the furture exascale computing. More info at http://www.dtec-xstack.org.!

This work performed under the auspices of the U.S. Department of Energy by Lawrence Livermore National Laboratory under Contract DE-AC52-07NA27344.

Lead PI and DOE lab: Daniel J. Quinlan Lawrence Livermore National Laboratory Co-PIs and Institutions

int aFunction(int a, int b) { int c=b; return a; } main() { int a,b,c,d,e; int i=4; for (i=0;i<10;i++) { int j=55; c=i+j; c=aFunction(i,c); a=aFunction(a+1,b); } #pragma SliceTarget a; return 0; }

0%  

20%  

40%  

60%  

80%  

100%  

1   2   4   6   8   10   12   14   16  

The  D-­‐TEC  approach  addresses  the  full  Exascale  workflow  

1

X10/SEEC  Run,me  

Scalable  Data  Structures  

Domain Algorithms

Expert

HPC Programmer

DSL Designer

Performance  Tools  

Manual  Refinement  

Exec  

Resilience  

Machine  Learning    &  Formal  Methods  

Parameterized  Abstract    

Machine  Model  

Refinement/    Transforma,ons  

Refinement/  Lowering   Vendor  

Compiler  Levels of ROSE AST

DSL    1  ..N  SpecificaRon  

ROSE-based DSL Compiler

Implementation Expert

SemanRc  Analysis  

DSL  1  ..N  Programs  

DOE  Apps  

Rosebud  DSL  Compiler  Generator  

Parser  Generator  

Rewrite  system  

Grammar  system  

MigraRon  Process  

Compiler  analysis  &    TransformaRons  

ROSE  

Recording & Mapping

C1

C5

C2

C4

C6

C6

C3

Front-­‐end  

Sketch-­‐based  TransformaRons  

•  Languages (C1): "•  Discovery of domain specific abstractions through

collaborative efforts from both computer scientists and application experts "

•  Rosebud: define DSLs specification and plug-in "•  Refinement/Transformation(C2): "

•  Series of manual refinements steps (code rewrites) define the transformations"

•  Equivalence checking between steps to verify correctness"

•  Machine learning to drive optimizations"•  Compiler (C3): "

•  Leverage a source-to-source compiler infrastructure, ROSE, to create an DSL framework to support code rewriting, analysis and optimizations"

•  Parameterized Abstract Machine (C4): extraction of machine characteristics"

•  Runtime System (C5): leverages X10 and extends it with SEEC support"

•  Tools (C6): source-to-source migration tools and tools for mappings between DSL layers to support future tools"

Management  OrganizaRon  Plan  and  CollaboraRon  Paths  with  Advisory  Board  and  Outside  Community  

C1)  Rosebud  DSL  Framework  

Lead:  Warren  (Rice)  Co-­‐lead:  Sarkar  (Rice)  

Members:    Liao  (LLNL)  

Project Lead

PI: Dan Quinlan (LLNL)

Deputy PI:

Saman Amarasinghe (MIT)

Advisory Board Jim Belak (LLNL, ExMatEx Co-Design) John Bell (LBL, ExaCT Co-Design) Pat Hanrahan (Stanford) David Padua (UIUC) Bert Still (LLNL, ASC) Paul Woodward (Minnesota) Other X-Stack Teams

DOE Exascale Co-Design Centers

C2)  DSL  Refinement/  Transforma,ons  

Lead:  Solar-­‐Lezama  (MIT)  Co-­‐lead:  Amarasinghe  

(MIT)  Members:    

Chlipala  (MIT)  O’Reilly  (MIT)  Bodik  (UCB)  Torlak  (UCB)  

Sadayappan  (OSU)  

C3)  Compiler  Extensions  /  Analysis  

Lead:  Quinlan  (LLNL)  Co-­‐lead:  Sadayappan  

(OSU)  Members:    Sarkar  (Rice)  Liao  (LLNL)  

Rasmussen  (Oregon)  Bronevetsky  (LLNL)  Pirkelbauer  (LLNL)  Rountev  (OSU)  

C4)  Abstract    Machine  Models  

Lead:  Sarkar  (Rice)  

Members:    Budimlic  (Rice)  

C5)  Run,me    Lead:  Grove  (IBM)  

Co-­‐lead:  Devadas  (MIT)  Members:    Shavit  (MIT)  

Marzouk  (MIT)  Saraswat  (IBM)  

Sidroglou-­‐Douskos  (MIT)  

Hoffman(MIT)  Tardieu  (IBM)  

C6)  Tools  Lead:  Mellor-­‐

Crummey  (Rice)  Members:    Fagan  (Rice)  Baden  (UCSD)  

DSL  Applica,ons  Lead:  Colella  (LBL)    Co-­‐lead:  Vuduc

(Gatech)  Members:    

Amarasinghe  (MIT)