10.11 programmable communication interface controllerun.uobasrah.edu.iq/lectures/3107.pdf · 62...

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10.11 Programmable Communication Interface Controller

USART – Universal Synchronous and Asynchronous Receiver Transmitter

The programmability of the USART provides for a very flexible asynchronous communication interface.Typical USART can be configured through software for communication of data using formats with character length between 5 and 8 bits, with even or odd parity, and with 1, 1.5, or 2 stop bits.A USART has the ability to automatically check characters during data reception to detect the occurrence of parity, framing, and overrun errors.


8251A USART8251A USART includes 4 key sections• Bus interface section• Transmit section• Receive section• Modem-control section

A UART can not stand alone in a communication operation; its operation must typically be controlled by a microprocessor.Data transfers over the bidirectional data bus (D0through D7) are controlled by the signals C/D, RD, WR, CS.

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8251A USART

Block diagram and pin layout of the 8251A


8251A USART

Read/Write operations

Data bus → 3-state1XXXData bus → 3-state011X

1010

RD

0000

CS

0101

WR

Data bus → Control1Status → Data bus1Data bus → 8251A Data08251A Data → Data bus0

OperationC/D

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EXAMPLEWhat type of data transfer is taking place over the bus if the

control signals are at CS = 0, C/D = 1, RD = 0, and WR = 1?

Solution:Looking at the previous table , we see that CS = 0 means that

the 8251A’s data bus has been enabled for operation. Since C/D is 1 and RD is 0, status information is being read from the 8251A.


8251A USARTThe baud rate of the 8251A must be externally generated and applied to the Rxc input of the receiver.Through software the 8251A can be set up to internally divide the clock signal input by 1, 16 or 64 to obtain the desired baud rate.The receiver performs serial data to parallel data operation while the transmitter performs parallel to serial data operation.

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8251A USART

Receiver and transmitter driven at the same baud rate


8251A USARTThe 8251A can be configured for various modes of operation through software.Control registers:• Mode-control register• Command register• Status register

Instruction format• Baud rate factor (D0, D1)• Character length (L1, L2)• Parity enable (PE)• Even parity check (EP)

Number of stop bits (S1, S2)

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EXAMPLEWhat value must be written to the mode-control register in order

to configure the 8251A such that it works as an asynchronous communication controller with the baud rate clock internally divided by 16? Character size is 8 bits; parity is odd; and one stop bit is used.Solution:

Baud rate factor: B1B0 = 10Character length: L2L1 = 11Odd parity: EP PEN = 01Stop bit: S2S1 = 01

Therefore, the complete control word isD7D6……D0 = 010111102 = 5E16

Interface Controller8251A USART

Command register format•Transmit enable, TxEN•Data terminal, DTR•Receiver enable, RxEN•Send break character, SBRK•Error reset, ER•Request to send, RTS•Internal reset, IR•Enter hunt mode, EH


8251A USARTStatus register format•Parity error, PE•Overrun error, OE•Framing error, FE

Interface Controller8251A USART

8251A initialization flowchart

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EXAMPLEThe circuit in the figure below implements serial I/O for the 8088

microprocessor using an 8251A. Write a program that continuously reads serial characters from the RS-232 interface, complements the received characters with software, and sends them back through the RS-232 interface. Each character is received and transmitted as an 8-bit character using 2 stop bits and no parity.


SolutionWe must first determine the addresses for the registers in the

8251A that can be accessed from the microprocessor interface. Chip select (CS) is enabled for I/O read or write operations to addresses for which

A7A6A5A4A3A2A1A0 = 1000000Bit A0 of the address bus is used to select between the data and control (or status) registers. As shown in the figure below, theaddresses for the data and control register are XX80H and XX81H.


SolutionNext we must determine the mode word to select an 8-bit

character with 2 stop bits and no parity. As shown in the figurebelow, the mode word is EEH. Here we have used a baud-rate factor of 16, which means that the baud rate is given as

Baud rate = Baud-rate clock/16 = 19,200/16 = 1200 bpsTo enable the transmitter as well as receiver operation of the 8251A, the command word is equal to 15H.


SolutionFlow chart and program for the initialization of the 8251A is

shown below

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SolutionThe receive operation starts by reading the contents of the

status register at address 81H and checking if the LSB, RxRDY is at logic 1. If it is not 1, the routine keeps reading and checking until it does become 1. Next we read the data register at 80H for the received data. The byte of data received is complemented and then saved for transmission.

The transmit operation also starts by reading the status register at address 81H and checking if bit 1, TxRDY, is logic 1. If it is not, we again keep reading and checking until it becomes 1. Next, the byte of data that was saved for transmission is written to the data register at address 81H. This causes it to be transmitted at theserial interface. The receive and transmit operations are repeated by jumping back to the point where the receive operation begins.


8250/16450 UART8250 and 16450 are newer devices than the 8251A UART and implement a more versatile I/O operation.New functions include a built-in programmable baud-rate generator, double buffering on communication data registers, and enhanced status and interrupt signaling.

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8250/16450 UART

Pin layout and RS-232 interface of the 8250/16450 UART


8250/16450 UART

Register-select codes of the 8250/16450 UART

Division Latch(most significant byte)

1001

Division Latch(least significant byte)

0001

Scratch111X

Modem Status011X

Line Status101X

Modem Control001X

0

0

0

0

A2

1

0

1

0

A0

1

1

0

0

A1

Line ControlX

Interrupt identification (read only)X

Interrupt Enable0

Receiver buffer (read),Transmitter HoldingRegister (write)

0

RegisterDLAB

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8250/16450 UART

Register bit functions and word-length select bits of the 8250/16450 UART

1

0

1

0

Bit 0

8 bits1

7 bits1

6 bits0

5 bits0

Word LengthBit 1


8250/16450 UART

Baud rates and corresponding divisors of the 8250/16450 UART

-538400

-1019200

-209600

1.23277200

-404800

0.628543600

-802400

-962000

0.3121071800

-1601200

-320600

-640300

-1280150

1428

1745

2560

3840

Divisor Used to Generate 16 x

Clock

0.034134.5

0.026110

-75

-50

Percent Error Difference Between Desired and Actual

Desired Baud-rate

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EXAMPLEWhat count must be loaded into the divisor latch registers to set

the data communication rate to 2400 baud? What register-select code must be applied to the 8250/16450 when writing the bytes ofthe divider count into the DLL and DLM register?

Solution:For 2400 baud rate, the divisor is 80. When writing into DLL,

the address must takeA2A1A0 = 0002 with DLAB = 1

and the value that is written is DLL = 80 = 50HFor DLM, the address must take

A2A1A0 = 0012 with DLAB = 1and the value is DLM = 0 = 00H


8250/16450 UART

RS-232 interface with EIA drivers

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10.12 Keyboard and Display Interface

The size of the keyboard array is usually described in terms of the number of rows and columns.The microcomputer scans the keyboard array to determine which key is pressed.Keyboard debouncing is achieved by resamplingthe column lines a second time, about 10 ms later, to assure the the same column line is at the 0 logic level.Two-key lockout method and N-key rollover method are usually used to resolve the problem of multiple key depression.The way in which the display is driven by the microcomputer is said to be multiplexed


Keyboard Interface

Keyboard interface to a microcomputer

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Display Interface

Display interface to a microcomputer


Seven-segment LED

Seven-segment display

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10.13 8279 Programmable Keyboard/Display Controller

The 8279 can drive an 8x8 keyboard switch array and a 16-digit, eight-segment display.8279 has four signal sections:

The MPU interfaceThe key data inputsThe display data outputsScan lines used by both the keyboard and display

The operation of the 8279 must be configured through software. Eight command words are provided for this purpose.

Keyboard/Display Controller

Block diagram and pin layout of the 8279


The scan lines (SL0-SL3) are used as row-drive signals for the keyboard and digit-drive signals for the display.The scan line can be configure for two different modes of operation through software

Decoded modeEncoded mode

Decoded-mode scan line signals Encoded-mode scan line signals


System configuration using the 8086 and 8279

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Keyboard and display signal timing


If logic 0 is detected at a return line during key scanning, the number of the column is coded as 3-bit binary number and combined with the 3-bit row number to make a 6-bit key code. This key code input is first debounced and then loaded into an 8x8 key code FIFO within the 8279.Two other input signals, CNTR and SHIFT, are also stored as part of the key code when a switch closure is detected.

Key code byte format

CNTL SHIFT

MSB LSB

RETURNSCAN


A status register is provided within the 8279 that contains the flags indicating the status of the key code FIFO.

Status register


The command word 0 is used to set the mode of operation for the keyboard and display.

Display mode select code

Command word 0 format

0 0 0 D D K K

MSB LSB

K

101

0

D

16 8-bit character display – Right entry18 8-bit character display – Right entry116 8-bit character display – Left entry0

8 8-bit character display – Left entry0

Display operationD

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The command word 0

Keyboard select codes

Strobed Input, Decoded Display Scan111Strobed Input, Encoded Display Scan011Decoded Scan Sensor Matrix101Encoded Scan Sensor Matrix001

101

0

K

110

0

K

Decoded Scan Keyboard – N-Key Rollover0Encoded Scan Keyboard – N-Key Rollover0Decoded Scan Keyboard – 2-Key Lockout0

Encoded Scan Keyboard – 2-Key Lockout0

Keyboard operationK

EXAMPLEWhat should be the value of command word 0 if the display is

to be set for eight 8-segment digits with right entry and the keyboard for decoded scan with N-key rollover?

Solution:The three MSBs of the command word are always 0. The next

2 bits, DD, must be set to 10 for eight 8-segment digits with right entry. Finally, the three LSBs are set to 011 for decoded keyboard scan with N-key rollover. This gives

Command word 0 = 000DDKKK= 000100112= 1316

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The command word 1 is used to set the frequency of operation of the 8279. It is designed to run at 100 kHz; however, in most applications a much higher frequency signal is available to supply its CLK input. For this reason, a 5-bit programmable prescaler is provided within the 8279 to divide down the input frequency.


0 0 1 P P P P

MSB LSB

P


The command word 6 is used for initialization of the 8279. It is used to initialize the complete display memory, the FIFO status, and the interrupt request output line.


1 1 0 CD CD CD CA

MSB LSB

CF

CD CD CD

0 X All zeros (X = Don’t Care)1 0 AB = Hex 20 (0010 0000) 1 1 All ones

Enable clear display when = 1 (or by CA = 1)

CD coding

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EXAMPLEWhat clear operations are performed if the value of command

word 6 written to the 8279 is D216?

Solution:First, we express the command word in binary form. This gives

Command word 6 = D216= 100100102

Note that the three CD bits are 100. This combination causes display memory to be cleared. The CF bit is also set, and this causes the FIFO status and IRQ output to be reset.


Only one bit of command word 7 is functional. This bit is labeled E and is an enable signal for what is called the special-error mode. When this mode is enabled and the keyboard has N-key rollover selected, a multiple-key depression causes the S/E flag of the FIFO status register to be set. This flag can be read by the microprocessor through software.


1 1 1 E X X X

MSB LSB

X

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The command word 2 is used to issue the read FIFO command for accessing the the key code FIFO.

The command word 4 is used to send new data to the display RAM.

The command word 3 is used the read the contents of the display RAM

Command word 7 format0 1 0 AI X A A

MSB LSBA X = Don’t Care

Command word 4 format1 0 0 AI A A A

MSB LSBA

0 1 1 AI A A AMSB LSB

A

10.11 programmable communication interface controllerun.uobasrah.edu.iq/lectures/3107.pdf · 62...

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