11 instruction sets: addressing modes and formats computer organization
TRANSCRIPT
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11Instruction Sets:
Addressing Modes and Formats
Computer Organization
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Addressing ModesImmediateDirectIndirectRegisterRegister IndirectDisplacement (Indexed) Stack
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Immediate AddressingOperand is part of instructionOperand = address fielde.g. ADD 5
Add 5 to contents of accumulator5 is operand
No memory reference to fetch dataFastLimited range
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Immediate Addressing Diagram
OperandOpcode
Instruction
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Direct AddressingAddress field contains address of operandEffective address (EA) = address field (A)e.g. ADD A
Add contents of cell A to accumulatorLook in memory at address A for operand
Single memory reference to access dataNo additional calculations to work out
effective addressLimited address space
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Direct Addressing Diagram
Address AOpcode
Instruction
Memory
Operand
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Indirect Addressing (1)Memory cell pointed to by address field
contains the address of (pointer to) the operand
EA = (A)Look in A, find address (A) and look there for
operande.g. ADD (A)
Add contents of cell pointed to by contents of A to accumulator
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Indirect Addressing (2)Large address space 2n where n = word lengthMay be nested, multilevel, cascaded
e.g. EA = (((A)))Draw the diagram yourself
Multiple memory accesses to find operandHence slower
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Indirect Addressing Diagram
Address AOpcode
Instruction
Memory
Operand
Pointer to operand
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Register Addressing (1)Operand is held in register named in
address filedEA = RLimited number of registersVery small address field needed
Shorter instructionsFaster instruction fetch
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Register Addressing (2)No memory accessVery fast executionVery limited address spaceMultiple registers helps performance
Requires good assembly programming or compiler writing
N.B. C programming register int a;
c.f. Direct addressing
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Register Addressing Diagram
Register Address ROpcode
Instruction
Registers
Operand
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Register Indirect AddressingC.f. indirect addressingEA = (R)Operand is in memory cell pointed to by
contents of register RLarge address space (2n)One fewer memory access than indirect
addressing
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Register Indirect Addressing Diagram
Register Address ROpcode
Instruction
Memory
OperandPointer to Operand
Registers
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Displacement AddressingEA = A + (R)Address field hold two values
A = base valueR = register that holds displacementor vice versa
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Displacement Addressing Diagram
Register ROpcode
Instruction
Memory
OperandPointer to Operand
Registers
Address A
+
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Relative AddressingA version of displacement addressingR = Program counter, PCEA = A + (PC)i.e. get operand from A cells from current
location pointed to by PCc.f locality of reference & cache usage
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Base-Register AddressingA holds displacementR holds pointer to base addressR may be explicit or implicite.g. segment registers in 80x86
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Indexed AddressingA = baseR = displacementEA = A + RGood for accessing arrays
EA = A + RR++
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CombinationsPostindexEA = (A) + (R)
PreindexEA = (A+(R))
(Draw the diagrams)
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Stack AddressingOperand is (implicitly) on top of stacke.g.
ADD Pop top two items from stackand add
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Addressing Modes in 8086 Direct (??)
Mov bx, [200] Register Indirect (??)
Add ax,[bx] Based/Indexed
Mov ax,[si+2] Sub cx,2[di] Base-indexed
Mov ax,[bx+si] add bx,[bp][di] Base-indexed with displacement
Mov ax,[bx+si+2]
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Pentium Addressing ModesVirtual or effective address is offset into
segmentStarting address plus offset gives linear addressThis goes through page translation if paging enabled
12 addressing modes availableImmediateRegister operandDisplacementBaseBase with displacementScaled index with displacementBase with index and displacementBase scaled index with displacementRelative
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Pentium Addressing Mode Calculation
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PowerPC Addressing ModesLoad/store architecture
Indirect Instruction includes 16 bit displacement to be added to base
register (may be GP register) Can replace base register content with new address
Indirect indexed Instruction references base register and index register (both
may be GP) EA is sum of contents
Branch addressAbsoluteRelative Indirect
ArithmeticOperands in registers or part of instructionFloating point is register only
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PowerPC Memory Operand Addressing Modes
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Instruction FormatsLayout of bits in an instructionIncludes opcodeIncludes (implicit or explicit) operand(s)Usually more than one instruction format in
an instruction set
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Instruction LengthAffected by and affects:
Memory sizeMemory organizationBus structureCPU complexityCPU speed
Trade off between powerful instruction repertoire and saving space
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Allocation of BitsNumber of addressing modesNumber of operandsRegister versus memoryNumber of register setsAddress rangeAddress granularity
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PDP-8 Instruction Format
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PDP-10 Instruction Format
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PDP-11 Instruction Format
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VAX Instruction Examples
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Pentium Instruction Format
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PowerPC Instruction Formats (1)
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PowerPC Instruction Formats (2)