12/19/09 spie europe international symposium

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April 28, 2022 SPIE Europe International Symposium Microtechnologies for the New Millennium May 2005 Spain, VLSI Circuits and Systems II 1 Faisal Hussien, Didem Turker, Rangakrishnan Srinivasan, Mohamed Mobarak, Fernando P. Cortes Edgar Sánchez-Sinencio A M S C Texas A&M University Analog & Mixed-Signal Center Design Considerations and Design Considerations and Trade-offs for Passive RFID Trade-offs for Passive RFID tags tags

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Page 1: 12/19/09 SPIE Europe International Symposium

April 9, 2023 SPIE Europe International Symposium Microtechnologies for the New Millennium May 2005 Spain, VLSI Circuits and Systems II

1

Faisal Hussien, Didem Turker, Rangakrishnan Srinivasan,

Mohamed Mobarak, Fernando P. Cortes Edgar Sánchez-Sinencio

A M S C

Texas A&M University

Analog & Mixed-Signal Center

Design Considerations and Design Considerations and Trade-offs for Passive RFID Trade-offs for Passive RFID

tagstags

Page 2: 12/19/09 SPIE Europe International Symposium

April 9, 2023 SPIE Europe International Symposium Microtechnologies for the New Millennium May 2005 Spain, VLSI Circuits and Systems II

2

OutlineOutline : :

RFID System Architecture.

Potential Applications.

System Design Methodology.

Passive Tag Building Blocks.

Design Example: A 13.56 MHz Passive RFID tag. Future Trends.

A M S C

Page 3: 12/19/09 SPIE Europe International Symposium

April 9, 2023 SPIE Europe International Symposium Microtechnologies for the New Millennium May 2005 Spain, VLSI Circuits and Systems II

3

Passive RFID System Passive RFID System ArchitectureArchitecture::

Reader Zone

ReaderTag

RFID link

Antenna

The Reader detects any tag within its zone of operation.

Master/Slave operation.

Typical Frequencies of operation associated with their range of operations:

A M S C

Frequency of operation

Typical range of operation

125-134 KHz Less than 1 m (tens of cm)

13.56 MHz Less than 1.5 m (~ 1 m)

433 MHz 4 – 9 m

868-928 MHz 2 – 5 m

2.45 GHz 1 – 2 m

Page 4: 12/19/09 SPIE Europe International Symposium

April 9, 2023 SPIE Europe International Symposium Microtechnologies for the New Millennium May 2005 Spain, VLSI Circuits and Systems II

4

Passive RFID LinkPassive RFID Link::

The Reader provides the tag with the power, clock and data, while the tag responds with its stored data.

R FIDR eader

Clock

Data

Power

Tag

C oupling e lem ent

Tags can be passive or active, R/O or R/W.

Inductive coupling is used at Low Frequencies, while Propagating coupling is used at High Frequencies.

A M S C

Page 5: 12/19/09 SPIE Europe International Symposium

April 9, 2023 SPIE Europe International Symposium Microtechnologies for the New Millennium May 2005 Spain, VLSI Circuits and Systems II

5

OutlineOutline : :

Passive Tag Building Blocks.

Design Example: A 13.56 MHz Passive RFID tag. Future Trends.

Potential Applications.

System Design Methodology.

RFID System Architecture.

A M S C

Page 6: 12/19/09 SPIE Europe International Symposium

April 9, 2023 SPIE Europe International Symposium Microtechnologies for the New Millennium May 2005 Spain, VLSI Circuits and Systems II

6

RFID Technology – Application AreasRFID Technology – Application Areas

Access Control & SecurityElectronic Article SurveillanceEmployee Entry / ID Badges

Sensors / Data AcquisitionBiomedical MonitoringOil Drilling Pipe MonitoringCivil Engineering – Stress

Logistics / TrackingAnimal Tracking / Vaccination HistorySupply Chain ManagementAirline Baggaging

A M S C

Page 7: 12/19/09 SPIE Europe International Symposium

April 9, 2023 SPIE Europe International Symposium Microtechnologies for the New Millennium May 2005 Spain, VLSI Circuits and Systems II

7

RFID Technology - Application Specific RFID Technology - Application Specific FeaturesFeatures

Transmission Frequency

Power Generation (Passive/Active)

Read / Write Capability

Authorization Control

Transmission Range

Data Capacity

Anti-collision Procedures

Encryption Algorithms

K. Finkenzeller, RFID Handbook, 2ND ed., Wiley,West Sussex, England 2003

A M S C

Page 8: 12/19/09 SPIE Europe International Symposium

April 9, 2023 SPIE Europe International Symposium Microtechnologies for the New Millennium May 2005 Spain, VLSI Circuits and Systems II

8

OutlineOutline : :

Passive Tag Building Blocks.

Design Example: A 13.56 MHz Passive RFID tag. Future Trends.

Potential Applications.

System Design Methodology.

RFID System Architecture.

A M S C

Page 9: 12/19/09 SPIE Europe International Symposium

April 9, 2023 SPIE Europe International Symposium Microtechnologies for the New Millennium May 2005 Spain, VLSI Circuits and Systems II

9

Typical Passive RFID Tag StructureTypical Passive RFID Tag Structure::

Power G eneratingc ircu it

D em odulator

M odulator

C ontro l Logic+

R O M

A nalog section D ig ita l S ection

Com m andinterpret/write phase

Read phase

antenna

Data in

Data out

V dd

Signal in

Signal out

Possible Uplink modulation schemes: ASK, PWM or FSK modulation.Possible Downlink modulation scheme: BackScatter modulation.

A M S C

Page 10: 12/19/09 SPIE Europe International Symposium

April 9, 2023 SPIE Europe International Symposium Microtechnologies for the New Millennium May 2005 Spain, VLSI Circuits and Systems II

10

Step 1: Extraction of the design specifications for the target application:

System Design Steps:System Design Steps:

Step2: Calculation of the power budget:

Step3: Selection of the uplink modulation scheme (Reader to tag):

The frequency of operation (range of operation, complexity, and penetrating capability)The antenna directivity (expected direction of the communication link) The data rate (amount of data exchanged, and the required on-time of the tag)

( )*( )*( )

incident transmitted

dissipated in the antenna absorbed by the tag reflected

dBP P Propagation loss Antenna gains Multipath loss

P P P

( 10log )dB

SNR Signal level noise floor BW

A M S C

Page 11: 12/19/09 SPIE Europe International Symposium

April 9, 2023 SPIE Europe International Symposium Microtechnologies for the New Millennium May 2005 Spain, VLSI Circuits and Systems II

11

Step4: Decision on the downlink (tag to reader) modulation scheme:

Step5: Decision on the implementation of the power generation circuit:

( 10log )reflected receiverSNR P propagation loss noise floor BW NF

A M S C

, ,

, arg

received average reflected average antennna loss

consumed tag

Power generation losses P P P

P Power M in

Page 12: 12/19/09 SPIE Europe International Symposium

April 9, 2023 SPIE Europe International Symposium Microtechnologies for the New Millennium May 2005 Spain, VLSI Circuits and Systems II

12

OutlineOutline : :

Passive Tag Building Blocks.

Design Example: A 13.56 MHz Passive RFID tag. Future Trends.

Potential Applications.

System Design Methodology.

RFID System Architecture.

A M S C

Page 13: 12/19/09 SPIE Europe International Symposium

April 9, 2023 SPIE Europe International Symposium Microtechnologies for the New Millennium May 2005 Spain, VLSI Circuits and Systems II

13

AntennAntenna:a:

A M S C

Loop antennas are used at low frequencies to provide inductive coupling.Electric dipole, folded dipole, printed dipole, printed patch, or log-spiral antennas can be used at higher frequencies to provide propagation coupling.

Folded Dipole Dipole Patch Antenna

Power G eneratingc ircu it

D em odulator

M odulator

C ontro l Logic+

R O M

A nalog section D ig ita l S ection

Com m andinterpret/write phase

Read phase

antenna

Data in

Data out

V dd

Frequency Transmitting Antenna dimensions

13.56 MHz low reading range (30 cm) 20 cm x 20cm

13.56 MHz low reading range (2 m) 75 cm x 90cm

900 MHz 7.5cm – 15 cm

2.4 GHz 3cm – 6 cm

• Low frequency means simple and cheap tag and large antenna size

• High frequency means complex and expensive tags and smaller antenna

Page 14: 12/19/09 SPIE Europe International Symposium

April 9, 2023 SPIE Europe International Symposium Microtechnologies for the New Millennium May 2005 Spain, VLSI Circuits and Systems II

14

Uplink Data Uplink Data Modulation:Modulation:

EnvelopeDetector

Antenna

Schmitt Trigger

IntegratorComparator

Triggered

D Flip-Flop

Triggered

D Flip-Flop

Clock Clock

DigitalBit

Stream

PreamplifierResonator

ASK, PWM or FSK can be used.

Random data transmitted should not affect the power received by the tag.Clock recovery scheme should be included.

A M S C

PWM scheme provides signal power for transmission of both “0” and “1” and clock is recovered internally.

On/Off Keying lacks signal power for certain data bits and requires a coding scheme for clock recovery and to maintain tag power.

Theoretical comparison of BER vs. SNR for modulation schemes

Power G eneratingc ircu it

D em odulator

M odulator

C ontro l Logic+

R O M

A nalog section D ig ita l S ection

Com m andinterpret/write phase

Read phase

antenna

Data in

Data out

V dd

Page 15: 12/19/09 SPIE Europe International Symposium

April 9, 2023 SPIE Europe International Symposium Microtechnologies for the New Millennium May 2005 Spain, VLSI Circuits and Systems II

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Downlink Data Modulation:Downlink Data Modulation:

Changing the input impedance of the tag antenna changes the amplitude, or phase of the back scattered signal introducing Backscatter Modulation.

A modulation scheme with a low-power implementation is required.

A M S C

Trade-off remarks: power losses of the modulator circuit versus the type of modulation

Power G eneratingc ircu it

D em odulator

M odulator

C ontro l Logic+

R O M

A nalog section D ig ita l S ection

Com m andinterpret/write phase

Read phase

antenna

Data in

Data out

V dd

PA

LNAFilter

Mixer

RF SourceTransmitter

Receiver

Reader

Demodulator

DSP

11001

11001

RFID Tag

Z LData

Stream

Page 16: 12/19/09 SPIE Europe International Symposium

April 9, 2023 SPIE Europe International Symposium Microtechnologies for the New Millennium May 2005 Spain, VLSI Circuits and Systems II

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Power Generating Power Generating Circuit:Circuit:

It makes use of RF-DC conversion and subsequent voltage regulation to obtain the desired stable power supply.

Performance is affected by the choice of the downlink and uplink modulation schemes

A M S C

Power G eneratingc ircu it

D em odulator

M odulator

C ontro l Logic+

R O M

A nalog section D ig ita l S ection

Com m andinterpret/write phase

Read phase

antenna

Data in

Data out

V dd

Page 17: 12/19/09 SPIE Europe International Symposium

April 9, 2023 SPIE Europe International Symposium Microtechnologies for the New Millennium May 2005 Spain, VLSI Circuits and Systems II

17

OutlineOutline : :

Design Example: A 13.56 MHz Passive RFID tag. Future Trends.

Potential Applications.

System Design Methodology.

Passive Tag Building Blocks.

RFID System Architecture.

A M S C

Page 18: 12/19/09 SPIE Europe International Symposium

April 9, 2023 SPIE Europe International Symposium Microtechnologies for the New Millennium May 2005 Spain, VLSI Circuits and Systems II

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A M S C

Tag Specifications Tag Specifications

Parameter SpecificationTechnology 0.35 um CMOS

RF input frequency 13.56 MHz

Uplink Modulation Scheme

PWM

Downlink Modulation Scheme

ASK-BM

RF input power < 0.4 mW

Generated Power Supply 1.18 V

Data Rate 100 kbps

Charging time 150 us

Area 0.64 mm2

Page 19: 12/19/09 SPIE Europe International Symposium

April 9, 2023 SPIE Europe International Symposium Microtechnologies for the New Millennium May 2005 Spain, VLSI Circuits and Systems II

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A 13.56 MHz RFID Passive Tag (Design A 13.56 MHz RFID Passive Tag (Design Example)Example)::

A M S C

For a stream of 010101010…(a) Charge pump output.

(b) Regulator, Voltage reference output(c) Output Data stream of demodulator

(a) (b) (c)

Page 20: 12/19/09 SPIE Europe International Symposium

April 9, 2023 SPIE Europe International Symposium Microtechnologies for the New Millennium May 2005 Spain, VLSI Circuits and Systems II

20

Chip MicrographChip Micrograph

800 m

800 m

A M S C

Charge pump capacitor loadCharge pump capacitor load

rectifier

Charge pump

Voltagereference

PWM Demodulator

Regulator

Backscatter modulator

Page 21: 12/19/09 SPIE Europe International Symposium

April 9, 2023 SPIE Europe International Symposium Microtechnologies for the New Millennium May 2005 Spain, VLSI Circuits and Systems II

21

Test Setup:

N I P X I 1 0 0 0 B

5 4 1 1 -a n a lo g w a v e fo rm g e n e ra to r

R e a d e r A n te n n a T a g A n te n n a

M .N . Resonat orE nvelopedet ect or

S chmit tt r igger

DF F DF Fint egr at or

pr e- amp

compar at or

Dat a_ out

c lk

c lk

c lk

T TT

Vdd / 2

T T

N I P X I 1 0 0 0 B

6 5 3 3 -D ig ita l In p u t /O u tp u t

Backscat t ermodulat or

N I P X I 1 0 0 0 B

6 5 3 3 -D ig ita l In p u t /O u tp u t

PC

PC

PC

A g ile n t 4 3 9 5 A

N e tw o rk /S p e c tru m /Im p e d a n c e A n a ly ze r

TT

H P 6 4 6 1 6 CO sc illo sc o p eChar ge

Pumpvolt age

r ef er enceVo_ cp

T

Regulat or

PowerEnab le

T T

T

Vo_ bgVdd

Dat a_ in

r ect ifi er

A M S C

Page 22: 12/19/09 SPIE Europe International Symposium

April 9, 2023 SPIE Europe International Symposium Microtechnologies for the New Millennium May 2005 Spain, VLSI Circuits and Systems II

22

OutlineOutline : :

Potential Applications.

System Design Methodology.

Passive Tag Building Blocks.

Design Example: A 13.56 MHz Passive RFID tag. Future Trends.

RFID System Architecture.

A M S C

Page 23: 12/19/09 SPIE Europe International Symposium

April 9, 2023 SPIE Europe International Symposium Microtechnologies for the New Millennium May 2005 Spain, VLSI Circuits and Systems II

23

Future TrendFuture Trend::

A M S C

RFID systems can be used in many applications other than identification process.

Bluetooth, Wi-Fi, and Zigbee

Combining RFID standard with the existing standards such as:

Low-cost, low power systems like RFID can be integrated with other long range,

powerful systems to obtain a suitable infrastructure for different applications.

Frequency band Channels Modulation scheme Data Rate

Bluetooth 2402 to 2480 MHz 79 GFSK 12Mbps

Zigbee 2405 to 2480 MHz 16 O-QPSK with sine wave shaping

250Kbps

RFID 2422.5 to 2461.5 MHz

79 Ask (mod. index = 99%) 30 – 40 kbps

Page 24: 12/19/09 SPIE Europe International Symposium

April 9, 2023 SPIE Europe International Symposium Microtechnologies for the New Millennium May 2005 Spain, VLSI Circuits and Systems II

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A M S C

Page 25: 12/19/09 SPIE Europe International Symposium

Analog and Mixed-Signal Center, TAMU Department of Electrical Engineering

http://amsc.tamu.edu/More details, please see:

May 2005