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    Index

    S No. Experiment Name Date Sign Remark

    Design of inverter using microwind and observe the

    waveform.

    Design of NAND using microwind and observe the

    waveform.

    Design of NOR using microwind and observe the

    waveform.

    Design of AND using microwind and observe the

    waveform.

    Design of OR using microwind and observe the

    waveform.

    Design of XOR using microwind and observe the

    waveform.

    Design of XNOR using microwind and observe the

    waveform.

    Design of Full adder using microwind and observe the

    waveform.

    Design of Boolean Exression using microwind and

    observe the waveform.

    !out " #$A % B& ' ( % $DE&)

    Design of Boolean Exression using microwind and

    observe the waveform.!out " #$A'Bbar% B'Abar& ' $( % D&'(D&)

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    Experiment No.1

    Aim-Design of inverter using microwind and observe the waveform.

    Software required-*icrowind +.,

    Theor--n digital logic an in!erteror N"T gateis a logic gatewhich imlements logical

    negation. An inverter circuit oututs a voltage reresenting the oosite logic/level to its

    inut. -nverters can be constructed using two comlimentar0 transistors in a (*O1configuration. 2his configuration greatl0 reduces ower consumtion since one of the

    transistors is alwa0s off in both logic states. 3rocessing seed can also be imroved due to the

    relativel0 low resistance comared to the N*O1/onl0 or 3*O1/onl0 t0e devices.

    2ruth table of NO2 4ate5

    1tatic (*O1 -nverter5

    2raditional NO2 4ate logic s0mbol5

    Re#u$t-

    http://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/Logical_negationhttp://en.wikipedia.org/wiki/Logical_negationhttp://en.wikipedia.org/wiki/CMOShttp://upload.wikimedia.org/wikipedia/commons/8/81/CMOS_Inverter.svghttp://upload.wikimedia.org/wikipedia/commons/9/9f/Not-gate-en.svghttp://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/Logical_negationhttp://en.wikipedia.org/wiki/Logical_negationhttp://en.wikipedia.org/wiki/CMOS

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    Experiment No.%

    Aim- Design of NAND using microwind and observe the waveform.

    Software required-*icrowind +.,

    Theor-2he NAND gateis a digital logic gatethat behaves in such a wa0 that when A 6O7

    outut results onl0 if both the inuts to the gate are 8-48. -f one or both inuts are 6O7 a8-48 outut results. 2he NAND gate is a universal gate in the sense that an0 Boolean

    function can be imlemented b0 NAND gates.

    2ruth table of NAND 4ate5 2raditional NAND 4ate 6ogic s0mbol5

    (*O1 NAND 4ate5

    Re#u$t-

    http://en.wikipedia.org/wiki/Logic_gatehttp://upload.wikimedia.org/wikipedia/commons/e/e2/CMOS_NAND.svghttp://upload.wikimedia.org/wikipedia/commons/e/e6/NAND_ANSI_Labelled.svghttp://en.wikipedia.org/wiki/Logic_gate

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    Experiment No.&

    Aim- Design of NOR using microwind and observe the waveform.

    Software required-*icrowind +.,

    Theor-2he NOR gate is a digital logic gatethat imlements logical NOR. A 8-48 outut

    $9& results if both the inuts to the gate are 6O7 $,&. -f one or both inut is 8-48 $9& a 6O7outut $,& results. NOR is the result of the negationof the ORoerator. NOR is a functionall0

    comleteoeration // combinations of NOR gates can be combined to generate an0 other

    logical function. B0 contrast the ORoerator is monotonic as it can onl0 change 6O7 to8-48 but not vice versa.

    2raditional NOR 4ate logic s0mbol5 2ruth table for NOR 4ate5

    '("S N"R )ate*

    Re#u$t-

    http://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/Logical_NORhttp://en.wikipedia.org/wiki/Negationhttp://en.wikipedia.org/wiki/Logical_disjunctionhttp://en.wikipedia.org/wiki/Functionally_completehttp://en.wikipedia.org/wiki/Functionally_completehttp://en.wikipedia.org/wiki/Logical_disjunctionhttp://upload.wikimedia.org/wikipedia/commons/c/c6/NOR_ANSI_Labelled.svghttp://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/Logical_NORhttp://en.wikipedia.org/wiki/Negationhttp://en.wikipedia.org/wiki/Logical_disjunctionhttp://en.wikipedia.org/wiki/Functionally_completehttp://en.wikipedia.org/wiki/Functionally_completehttp://en.wikipedia.org/wiki/Logical_disjunction

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    Experiment No.,

    Aim- Design of OR using microwind and observe the waveform.

    Software required-*icrowind +.,

    Theor- 2he OR gate is a digital logic gate that imlements logical dis:unction. A 8-48outut $9& results if one or both the inuts to the gate are 8-48 $9&. -f neither inut is 8-48 a

    6O7 outut $,& results. -n another sense the function of OR effectivel0 finds the maximum

    between two binar0 digits :ust as the comlementar0 AND function finds the minimum.

    2raditional OR 4ate logic s0mbol5 2ruth table of OR 4ate5

    (*O1 OR 4ate5

    Re#u$t-

    http://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/Logical_disjunctionhttp://upload.wikimedia.org/wikipedia/commons/5/5e/CMOS_OR.svghttp://upload.wikimedia.org/wikipedia/commons/4/4c/Or-gate-en.svghttp://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/Logical_disjunction

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    Experiment No.

    Aim- Design of XOR using microwind and observe the waveform.

    Software required-*icrowind +.,

    Theor- 2he "R gate $sometimes E"R gate& is a digital logic gate that imlements

    exclusive dis:unction. A 8-48 outut $9& results if one and onl0 one of the inuts to the gateis 8-48 $9&. -f both inuts are 6O7 $,& or both are 8-48 $9& a 6O7 outut $,& results.

    XOR gate is short for exclusive OR. 2his means that recisel0 one inut must be 9 $true& for

    the outut to be 9 $true&. A wa0 to remember XOR is ;one or the other but not both.; 2hisfunction is addition modulo

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    Re#u$t-

    Experiment No./

    Aim- Design of N"Rusing microwind and observe the waveform.

    Software required-*icrowind +.,

    Theor-2he N"R gate$sometimes selled =exnor=& is a digital logic gate whose function isthe inverse of the exclusive OR $XOR& gate. 2he two/inut version imlements logical

    e>ualit0. A 8-48 outut $9& results if both of the inuts to the gate are the same. -f one but

    not both inuts are 8-48 $9& a 6O7 outut $,& results.

    2ruth table for Exnor 4ate5 2raditional Exnor 4ate logic s0mbol

    (*O1 Exnor 4ate5

    Re#u$t-

    http://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/XOR_gatehttp://en.wikipedia.org/wiki/Logical_equalityhttp://en.wikipedia.org/wiki/Logical_equalityhttp://upload.wikimedia.org/wikipedia/commons/7/7e/Xnor-gate.pnghttp://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/XOR_gatehttp://en.wikipedia.org/wiki/Logical_equalityhttp://en.wikipedia.org/wiki/Logical_equality

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    Experiment No.

    Aim- Design of Full adder using microwind and observe the waveform.

    Software required-*icrowind +.,

    Theor- An adderor #ummeris a digital circuitthat erforms additionof numbers. A fu$$adderis caable of adding three bits5 two bits and one carr0bit of earlier calculation. -t hasthree inuts / A B and carr0 C such that multile full adders can be used to add larger

    numbers.

    Full Adder circuit diagram5 2ruth table for full adder5

    (*O1 Full adder (ircuit5

    http://en.wikipedia.org/wiki/Digital_circuithttp://en.wikipedia.org/wiki/Additionhttp://en.wikipedia.org/wiki/Carry_(arithmetic)http://en.wikipedia.org/wiki/Digital_circuithttp://en.wikipedia.org/wiki/Additionhttp://en.wikipedia.org/wiki/Carry_(arithmetic)

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    Re#u$t-

    Experiment No.

    Aim- Design of Boolean Exression using microwind and observe the waveform.

    !out " #$A % B& ' ( % $DE&)

    Software required-*icrowind +.,

    Theor- An Euler pathin a grahis aathwhich traverses each edgeof the grah exactl0

    once. An Euler ath which is a c0cleis called anEuler cycle. For looless grahs without

    isolatedvertices the existence of an Euler ath imliestheconnectednessof the grah since

    traversing ever0 edge of such a grah re>uires visiting each vertex at least once. A connectedgrah has an Euler ath if it has exactl0 ?ero or two vertices of odddegree. -f ever0 vertex has

    evendegree the grah has an Euler c0cle.

    (*O1 (ircuit Diagram5

    Euler@s 3ath5

    http://planetmath.org/encyclopedia/Adjacent.htmlhttp://planetmath.org/encyclopedia/PathLength.htmlhttp://planetmath.org/encyclopedia/Adjacent.htmlhttp://planetmath.org/encyclopedia/OpenWalk.htmlhttp://planetmath.org/encyclopedia/IsolatedSet.htmlhttp://planetmath.org/encyclopedia/Adjacent.htmlhttp://planetmath.org/encyclopedia/VacuouslyTrue.htmlhttp://planetmath.org/encyclopedia/ConnectedComponents2.htmlhttp://planetmath.org/encyclopedia/LogOddsRatio.htmlhttp://planetmath.org/encyclopedia/TrivalentGraph.htmlhttp://planetmath.org/encyclopedia/OddInteger.htmlhttp://planetmath.org/encyclopedia/Adjacent.htmlhttp://planetmath.org/encyclopedia/PathLength.htmlhttp://planetmath.org/encyclopedia/Adjacent.htmlhttp://planetmath.org/encyclopedia/OpenWalk.htmlhttp://planetmath.org/encyclopedia/IsolatedSet.htmlhttp://planetmath.org/encyclopedia/Adjacent.htmlhttp://planetmath.org/encyclopedia/VacuouslyTrue.htmlhttp://planetmath.org/encyclopedia/ConnectedComponents2.htmlhttp://planetmath.org/encyclopedia/LogOddsRatio.htmlhttp://planetmath.org/encyclopedia/TrivalentGraph.htmlhttp://planetmath.org/encyclopedia/OddInteger.html

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    Re#u$t-

    Experiment No.10

    Aim- Design of Boolean Exression using microwind and observe the waveform.

    !out " #$A'Bbar% B'Abar& ' $( % D&'(D&)

    Software required-*icrowind +.,

    Theor- An Euler pathin a grahis aathwhich traverses each edgeof the grah exactl0

    once. An Euler ath which is a c0cleis called anEuler cycle. For looless grahs withoutisolatedvertices the existence of an Euler ath imliestheconnectednessof the grah since

    traversing ever0 edge of such a grah re>uires visiting each vertex at least once. A connectedgrah has an Euler ath if it has exactl0 ?ero or two vertices of odddegree. -f ever0 vertex has

    evendegree the grah has an Euler c0cle.

    (*O1 (ircuit Diagram5

    Euler@s 3ath5

    http://planetmath.org/encyclopedia/Adjacent.htmlhttp://planetmath.org/encyclopedia/PathLength.htmlhttp://planetmath.org/encyclopedia/Adjacent.htmlhttp://planetmath.org/encyclopedia/OpenWalk.htmlhttp://planetmath.org/encyclopedia/IsolatedSet.htmlhttp://planetmath.org/encyclopedia/Adjacent.htmlhttp://planetmath.org/encyclopedia/VacuouslyTrue.htmlhttp://planetmath.org/encyclopedia/ConnectedComponents2.htmlhttp://planetmath.org/encyclopedia/LogOddsRatio.htmlhttp://planetmath.org/encyclopedia/TrivalentGraph.htmlhttp://planetmath.org/encyclopedia/OddInteger.htmlhttp://planetmath.org/encyclopedia/Adjacent.htmlhttp://planetmath.org/encyclopedia/PathLength.htmlhttp://planetmath.org/encyclopedia/Adjacent.htmlhttp://planetmath.org/encyclopedia/OpenWalk.htmlhttp://planetmath.org/encyclopedia/IsolatedSet.htmlhttp://planetmath.org/encyclopedia/Adjacent.htmlhttp://planetmath.org/encyclopedia/VacuouslyTrue.htmlhttp://planetmath.org/encyclopedia/ConnectedComponents2.htmlhttp://planetmath.org/encyclopedia/LogOddsRatio.htmlhttp://planetmath.org/encyclopedia/TrivalentGraph.htmlhttp://planetmath.org/encyclopedia/OddInteger.html

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    Truth ta2$e for the gi!en 3oo$ean expre##ion*

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