200v epc2112 egan® hemt - system plus consulting€¦ · company profile & supply chain...

1©2019 by System Plus Consulting | 200V EPC2112 eGaN® HEMT with Monolithic Optimized Gate Driver | Sample

200V EPC2112 eGaN® HEMT with Monolithic Optimized Gate DriverSP19415 - Power Semiconductor report by Amine ALLOUCHE

Laboratory Analysis by Nicolas RADUFESeptember 2019 – SAMPLE

+33 2 40 18 09 16 [email protected] www.systemplus.fr22 Bd Benoni Goullin

44200 NANTES - FRANCE

REVERSE COSTING® – STRUCTURAL, PROCESS & COST REPORT


Table of Contents

Overview / Introduction 4

o Executive Summary

o Market

o Reverse Costing Methodology

o Glossary

Company Profile & Supply Chain 11

o EPC Profile

o EPC GaN Products

Physical Analysis 17

o Methodology

o Summary of the Physical Analysis

o Package Analysis

Package Opening

Package Cross-Section

o Die: IC Gate Driver

Die View & Dimensions

Die Cross-Section

Die Process

Die Process Characteristics

o Die: eGaN® FET

Die View & Dimensions

Die Cross-Section

Die Process

Die Process Characteristics

Manufacturing Process Flow 54

o Die Front-End Fabrication Unit

o Die Front-End Process Flow

o Final Test & Packaging Fabrication Unit

o Die Back-End Process Flow

Cost Analysis 63

o Summary of the cost analysis

o Yields Explanation & Hypotheses

o Device Cost

Wafer Front-End Cost

Wafer Front-End Cost per Step

Packaging Cost

Die Cost

Die Back-End (Probe Test and Dicing) Cost

Component Cost

Price Analysis 74

o Definition of Prices

o Estimation of selling price

Comparison 77

o Comparison between Integrated drivers GaN FET from EPC and Navitas

o Comparison between 200V EPC eGaN® FETs

Feedbacks 80

Company services 82


Overview / Introductiono Executive Summaryo Marketo Reverse Costing

Methodologyo Glossary

Company Profile & Supply Chain

Physical Analysis

Manufacturing Process Flow

Cost Analysis

Selling Price Analysis

Comparison

Related reports

About System Plus

Executive Summary

System Plus Consulting proposes a complete reverse costing of the EPC2112, the first monolithically integrated HEMTfrom Efficient Power Conversion (EPC). The device is an enhancement-mode gallium-nitride (eGaN®) single FieldEffect Transistor (FET) with a Gate Driver Integrated Circuit (IC). It is adapted for High Frequency DC-DC conversionand Wireless Power applications.

This new Integrated Gate Driver eGaN® IC design consists of a 40-mΩ, 200V eGaN® power transistor and anoptimized gate driver in a low inductance surface mount Ball Grid Array (BGA) package.

Compared with their silicon counterparts, GaN transistors have significantly lowered capacitance. This translates intolowered switching losses at higher frequencies for the same on-resistance and voltage rating. Besides this, EPC’s chip-scale packaging significantly reduces its final device costs, bringing a competitive advantage not only withcompetitors in GaN but also with silicon.

Based on a complete teardown analysis, this report provides a detailed manufacturing cost analysis of the die and thepackage as well as the estimated selling price of the device. Moreover, the report includes a technology and costcomparison of this unique EPC2112 device with the monolithic GaN solution proposed by Navitas. Finally, this reportprovides a comparison of EPC2112 with the previous 200V EPC GaN device, the EPC2010. This comparison highlightsthe differences in die design and their impact on production cost.


Overview / Introduction

Company Profile & Supply Chain o EPC Profileo EPC GaN Products

Physical Analysis


Cost Analysis


Comparison

Related reports

About System Plus

Part Number Configuration Drain Current (A) Package RdsON (mohm)

EPC2012C Single 5 LGA 1.7 x 0.9 100

EPC2019 Single 8.5 LGA 2.77 x 0.95 50

EPC2112 Driver plus FET 10 BGA 2.9 x 1.1 40

EPC2010C Single 22 LGA 3.6 x 1.6 25

EPC2034 Single 48 BGA 4.6 x 2.6 10

EPC 200V GaN products

• EPC proposes different 200V GaN on Si transistors:

Analyzed device



Company Profile & SupplyChain

Physical Analysis o Methodologyo Summaryo Packageo IC Gate Drivero eGaN® FET


Cost Analysis


Comparison

Related reports

About System Plus

Summary of the Physical Analysis

Package :

o WLP

o Dimensions: xx mm x xx mm x xx mm

o Connections: Surface-mount BGA

Die (Integrated driver + FET) :

o Dimension: xx mm x xx mm = xx mm²

Solder balls

xxx

Package Opening – Optical View©2019 by System Plus Consulting

xxx

GaN-on-Silicon substrate

xxx






Cost Analysis


Comparison

Related reports

About System Plus

Package Views & Dimensions

Package Outlines©2019 by System Plus Consulting

Source Source Source

Drain Drain Drain

GND

Drainxx

mm

xx mm

IN

Vcc

xxx xxxxx mm






Cost Analysis


Comparison

Related reports

About System Plus

Package Views – Delayering With solder balls

xxx

Without solder balls

Delayering – Optical Views ©2019 by System Plus Consulting






Cost Analysis


Comparison

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About System Plus

Package Cross-Section #1 – xxx Region

Cross-section #1

Package Cross-Section – Tilted View©2019 by System Plus Consulting

xxx

xxxxxx

xxx

Drain Drain DrainDrainVcc






Cost Analysis


Comparison

Related reports

About System Plus

Package Cross-Section #1

Cross-section #1

Package Cross-Section – Optical View©2019 by System Plus Consulting

xx xx

xx xx

xx µm

o Substrate thickness: xx µm

xx µm






Cost Analysis


Comparison

Related reports

About System Plus

Package Cross-Section #1 – xx

Die Cross-Section – SEM View©2019 by System Plus Consulting

Solder ball in xx

xx layer xx

xx layer xx

xx substrate

xx: xx µmxx layerXx layer

xx

xx layer xx µm

xx layer xx µm

xx layer xx µm

xx layer xx

xx layer xx

xx layers xx µm + xx µm

xx layer xx µm

xx/xx layer xx µm


xx: xx µm

o xx: xx µm

o xx: xx µm

o Xx: xx µm

xx

xx

M1






Cost Analysis


Comparison

Related reports

About System Plus

Package Cross-Section #2 – xx

xxSolder ball xx µm

xx substrate


xx: xx

xx substrate


xx layer

Solder ball in xx

xx layer

xx layer

xx layerxx µm

xx µm


Via xx-xx






Cost Analysis


Comparison

Related reports

About System Plus

Die Process – xx Delayering

Die after Delayering – Optical View©2019 by System Plus Consulting






Cost Analysis


Comparison

Related reports

About System Plus

Package Cross-Section #1 – xx Drain



xx layer xx µm

xx

xx

xx layer xx µm

xx layer

xx layerxx layer xx µm

xx: xx µmxx

contactx µmXx layer xx µm

xx layer xx

xx layer xx µmxx

xx

xx






Cost Analysis


Comparison

Related reports

About System Plus

xx xx

xx xx xx

EDX Material Analysis

xx: xx

xx layerxx layer

xx: xx

xx: xx






Cost Analysis


Comparison

Related reports

About System Plus

Package Cross-Section #3 – Contacts


xx

xx µm

Gate contact Drain contactSource contact

xx µm

xx µm

xx µm

xx µm

xx µm






Cost Analysis


Comparison

Related reports

About System Plus

Package Cross-Section #3 – Epitaxy


xx

xx

xx

xx µm

xx µmxx xx µm

xx µm xx µm

o Epitaxy: xx µm xx

xx xx µm

xx layer xx µm






Cost Analysis


Comparison

Related reports

About System Plus

Die Cross-Sections – SEM View©2019 by System Plus Consulting

Mesa: Silicon etch

Package Cross-Section #4 – Substrate Etch

xx etch

xx µm

xx µm

xx + xx µm

xx µm

xx µm xx

xx

xx

xxxx

o xx etch (Lithography): xx µm

o It is performed after xx patterning.

o xx etch: xx µm

o xx etch: xx µm

o xx etch: xx µm

xx

xx

xx etch

{ xx + xx} etchxx etch






Cost Analysis


Comparison

Related reports

About System Plus

Die Process

89.6 µm

1 µm

Contact between the xx of the gate and the Gate Supply Line.

Die after Delayering – SEM View©2019 by System Plus Consulting


xx µm

o Pitch: xx µm






Cost Analysis


Comparison

Related reports

About System Plus xx µm

Die Process

xx µm

xx µm





Physical Analysis

Manufacturing Process Flowo Wafer Front-End Fab Unito Front-End Process Flowo Packaging Fab Unito Back-End Process Flow

Cost Analysis


Comparison

Related reports

About System Plus

GaN Transistor - Process Flow (3/4)

Isolation

• xx & xx deposition and pattern

Metal 1

• xx deposition and pattern

Metal 1 and

IMD1

• xx/xx deposition and pattern

• Isolation depositions

xx

xx

xx/xxxx/xx/xx/xx

Drawing not to Scale




Physical Analysis

Manufacturing Process Flowo Wafer Front-End Fab Unito Front-End Process Flowo Packaging Fab Unito Back-End Process Flow

Cost Analysis


Comparison

Related reports

About System Plus

Back-End – Test, Solder Ball & xx, Dicing

Solder Ball

•Probe test

• xx deposition and pattern

• xx

Dicing

• Solder ball deposition

•Dicing

Drawing not to Scale

Solder ball

xx

xx




Physical Analysis


Cost Analysiso Summaryo Wafer Costo Packaging Costo Die Costo Component Cost


Comparison

Related reports

About System Plus

Wafer Front-End Cost

The front-end cost ranges from $xx to $xx according toyield variations.

The main part of the wafer cost is due to the xx with xx%.




Physical Analysis




Comparison

Related reports

About System Plus

FET Wafer Cost per process steps




Physical Analysis




Comparison

Related reports

About System Plus

Packaging Cost

Packaging

The component has not packaging, but connection with solder balls. These connections are assumed to bemanufactured by an OSAT.

The cost is estimated between $xx and $xx per wafer.




Physical Analysis




Comparison

Related reports

About System Plus

FET Die Cost

The FET Component cost ranges from $xx to $xx accordingto yield variations.

The Front-end manufacturing represents xx% of thecomponent cost (medium yield estimation).

Packaging cost (including probe test) represents xx% of thecomponent cost (medium yield estimation).

Dicing and scrap account for xx% of the component cost.




Physical Analysis




Comparison

Related reports

About System Plus

Component Cost

The component cost ranges from $xx to $xx according toyield variations.

The FET die manufacturing represents xx% of thecomponent cost.

Final test and yield losses account for xx% of thecomponent cost.




Physical Analysis


Cost Analysis


Comparison

Related reports

About System Plus

Estimated Manufacturer Price

The component selling price ranges from $xxto $xx according to yield variations.




Physical Analysis


Cost Analysis


Comparisono EPC vs Navitas GaN FETo 200V EPC eGaN® FETs

Related reports

About System Plus

Die Configuration Year VoltageCurrent at 25°C

Die Size Current density Pitch EpitaxyWafer

thicknessDie Cost

EPC2112 Monolithic 2018 200 V 10 A xx mm² xx A /mm² xx xx xx $ xx

NV6115 Monolithic 2018 650 V 11 A xx mm² xx A /mm² xx xx xx $ xx

Comparison between Integrated drivers GaN FET from EPC and Navitas

NV6115 GaN HEMT – Die View EPC2112 eGaN® FET – Die View

xx

xx

xx m

m

xx mm xx mm

xx mm




Physical Analysis


Cost Analysis


Comparisono EPC vs Navitas GaN FETo 200V EPC eGaN® FETs

Related reports

About System Plus

Die Configuration Year VoltageCurrent at

25°CDie Size Current density Pitch Epitaxy

Wafer thickness

Component Cost

EPC2010 Single FET 2010 200V 12A xx mm² xx A /mm² xx xx xx $ xx

EPC2112 Monolithic 2018 200 V 10 A xx mm² xx A /mm² xx xx xx $ xx

Comparison between 200V EPC eGaN® FETs

xx contact xx contactxx µm

EPC2112 eGaN® FET – SEM Cross-Section©2019 by System Plus Consulting

EPC2010 eGaN® FET – SEM Cross-Section©2019 by System Plus Consulting

xx µm

xx layer xx µm




Physical Analysis


Cost Analysis


Comparison

Related reports

About System Plus

REVERSE COSTING ANALYSES - SYSTEM PLUS CONSULTING

Power Semiconductors & Compound• GaN-on-Sapphire HEMT Power IC by Power Integrations• Navitas 650V GaNFast Power IC Family• Transphorm GaN-on-Silicon HEMT TPH3• GaN-on-Silicon Transistor Comparison 2018

Related Reports

MARKET AND TECHNOLOGY REPORTS - YOLE DÉVELOPPEMENT

POWER ELECTRONICS & COMPOUND SEMI• Power GaN 2018: Epitaxy, Devices, Applications and Technology

Trends• Status of the Power Electronics Industry 2019• Wireless Charging Technologies and Markets 2018

https://www.i-micronews.com/products/wireless-charging-technologies-and-markets-2018/


https://www.i-micronews.com/products/status-of-the-power-electronics-industry-2019/


https://www.systemplus.fr/reverse-costing-reports/transphorm-gan-on-silicon-hemt-tph3206ps/


https://www.systemplus.fr/reverse-costing-reports/gan-on-sapphire-hemt-power-ic-by-power-integrations/

https://www.systemplus.fr/reverse-costing-reports/navitas-650v-ganfast-power-ic-family/


https://www.systemplus.fr/reverse-costing-reports/gan-on-silicon-transistor-comparison-2018/

https://www.i-micronews.com/products/power-gan-2018-epitaxy-devices-applications-and-technology-trends/










COMPANYSERVICES




Physical Analysis


Cost Analysis


Comparison

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About System Pluso Company serviceso Contact

Business Models Fields of Expertise

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Reports(>60 reports per years)

Costing Tools

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Physical Analysis


Cost Analysis


Comparison

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About System Pluso Company serviceso Contact

Contact

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www.systemplus.fr

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mailto:[email protected]



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