2010 design engineer’s guide to openvpx alliances/vpx/openvpx pd… · 2010 design engineer’s...
TRANSCRIPT
OpenVPX – From Concept to Specification
Transitioning to OpenVPX for Next-Generation C4ISR Systems
Putting OpenVPX to Work
Who’s Who In OpenVPX
2010 Design Engineer’sGuide to OpenVPX2010 Design Engineer’sGuide to OpenVPX
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Supplement to Embedded Technology
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OpenVPX Design Guide, September 2010 www.embeddedtechmag.com
Foreward
Let the Show Begin
VPX is like a three act play. Act one was the launching of anew high density platform for critical embedded comput-
ing applications. Leveraging the wildly popular VMEbus in 3Uand 6U Eurocard formats, VPX added the capability of usinghigh speed serial switch fabric technologies such as Ethernet,PCI Express, serial RapidIO, and others, that can be configuredin various backplane topologies. VPX also greatly increased thenumber of backplane pins to handle more data traffic and userI/O making it more effectivefor today’s applications.
Act two was the addition ofan architectural framework thatmanages and constrains mod-ule and backplane designs,including defining pin outs,and that sets interoperabilitypoints within VPX while main-taining full compliance. Thisarchitectural framework isreferred to as OpenVPX™. Itwas recently ratified by VITAand ANSI, making it availableto the general public.
The efforts of the Open VPX(VITA 65) working group rep-resent a significant shift in theindustry. Major industry buy-ers came to VITA to get anarchitectural framework forVPX in place, and quickly. Theteam responded start to finishin less than 14 months, whichis quite incredible given thescope of the project. Muchwork is still ahead as addition-al framework alternatives aredefined to meet specific needs of new applications of the VPXtechnology.
Act three is the rollout of products, from boards to completesystems, that follow the family of VPX specifications. Over 30companies have announced, or plan to announce, productsbased on the series of specifications that define VPX. Duringthis act, there will be much jockeying for position as the vari-ous profiles defined in OpenVPX (ANSI/VITA65.0-2010) startto gain acceptance. Trends will emerge that point to specificserial switch fabrics, board/system sizes, interconnect topolo-gies, and many other configuration options possible with VPX.
VPX is initially targeted at the military and aerospace mar-kets but several other market segments have similar needs forcritical embedded systems and are showing strong interest inVPX technology. These markets include: industrial, medical,communications, transportation, and research.
In a recent survey of the embedded computing industry con-ducted by VITA, 40% of the respondents indicated that theyare designing new products with VPX now, and an additional
36% indicate that they intendto use VPX in future projects.This is an overwhelming voteof confidence for the technol-ogy. Suppliers are workinghard to expand the productofferings, ensuring thatdesigners will have the rightcommercially available prod-ucts for their upcoming proj-ects. Designers are verypleased with the perform-ance, scalable and expand-able architecture, high com-putational density, extendedtemperature, shock, and vi -bra tion capabilities, andchoices of cooling schemes.They are looking forward tothe long product life cyclesthat they have enjoyed withprevious generations of tech-nology from VITA members.
It appears that designershave plans to take advantageof the backplane topologyflexibility built into the VPXspecification. Designers are
evenly spread between centralized (star) configurations, dis-tributed switching (mesh or ring) configurations, and hybridswitching where numerous combinations exist, even some withparallel buses like VMEbus and PCI bus.
The VITA members working on VPX have over thirty addi-tional working group projects underway to improve and com-pliment the original VPX specification. New projects will sure-ly be introduced to the working groups as the technologymatures. These companies are fully committed to ensuringthat VPX is the best solution for future critical embedded com-puting systems.
Ray AldermanExecutive Director
VITA
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2 OpenVPX Design Guide, September 2010Free Info at http://info.hotims.com/28057-839
ContentsSeptember 2010
FORWARD
FEATURES
4 OpenVPX – From Concept to Specification
Transitioning to OpenVPX for Next-Generation C4ISR Systems
PRODUCT BRIEFS
OpenVPX/VITA-65 Serial RapidIO Gen-2 Switch
6U OpenVPX Rugged Single Board Computer
6U VPX Load Board
Forced Air-Cooled Enclosure
Two-Slot OpenVPX Development Platform
IPv4/IPv6 Gigabit Ethernet Switch
4
0
On the Cover
Initially targeted at the military and aerospace markets, OpenVPX will find new applications in a wide variety of critical embedded systems.
Photo courtesy of Pentek (Upper Saddle River, NJ).
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1 Let the Show Begin
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15 Putting OpenVPX to Work
19 Who’s Who In OpenVPX
21 6U OpenVPX Radar System Upgrade
151
When interoperability and open standards are musts,trust Tyco Electronics to deliver robust products andservices for your OpenVPX system architecture.
As a dedicated partner with VITA, Tyco Electronics is committed to making your OpenVPX requirements a competitive advantage.
Visit us at www.te.com/ADM/NASAtech to learn moreabout our commitment to VITA and OpenVPX.
Open VPX for your SystemArchitecture Advantage.
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TE (logo) and Tyco Electronics are trademarks.
OpenVPX logo is a trademark of VITA.
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www.embeddedtechmag.com OpenVPX Design Guide, September 2010
The OpenVPX Industry Working Group,a 28-company team founded by MercuryComputer Systems, collaborated with acommon goal and accelerated the com-pletion of a system architecture specifica-tion for open system COTS suppliers andintegrators to specify, design, and buildmulti-vendor interoperable solutions.
Timeline:• January 2009 — OpenVPX Speci -
fication effort by Mercury ComputerSystems begins, based on VPX embed-ded community’s need to acceleratemulti-vendor interoperable solutions.
• March 2009 — First open member-ship face-to-face meeting and call formembership.
• Spring/Summer 2009 — Ongoingmeetings, conference calls and discus-sions.
• October 2009 — OpenVPX specifica-tion V1.0 completed and transition toVITA 65 working group.
• January 2010 — VITA 65 Workinggroup completed comment resolu-tion, balloting and ratification of thespecification.
• June 2010 — ANSI VITA 65-2010 rat-ification of the OpenVPX SystemArchitecture Specification.
Countless hours were spent with embed-ded community technical and businessleaders (suppliers and integrators) tocome up with a system-level architecturespecification, dedicated to creating well-defined interoperability points for multi-vendor, 3U and 6U VPX integrated solu-tions. The inter-company marathon was atestament to what can be done whenexperts are dedicated to solving a signifi-cant industry issue for the good of the ulti-mate primary customer — the warfighters.
So What?If the following is important to your
company or your customer, thenOpenVPX should be important to you.• Reduce TCO in integrated systems life
cycle; • Use of common language for simpli-
fied RFP generation;• Choice of ecosystems to lower costs,
get best-of-breed capabilities;• Technology refresh possibilities with
reduced obsolescence hurdles;• Highly interoperable, multi-vendor
integrated solutions development;• Open standards, performance migra-
tion, and proliferation; • Reduced risk to deployment for QRC
programs;
• 1 GiGE, 10 GiGE, sRIO, PCIe gen 2.0fabrics;
• Optimized SWaP smart processing viaopen architectures.
VPX vs. OpenVPXA board-level specification approach
for VME bus technology was suitable dueto its architectural simplicities, and it waslogically brought forward as an approachfor VPX specifications. While significantVITA standards work was in process, manytechnology users felt that the focus on theboard-level specification(s) was not suit-able for creating interoperable solutionsfor the complex application space thatVPX technology is designed to serve. Thisincludes a next generation of complex,rugged, integrated assets that consist ofhigh-speed backplane fabrics and newprocessor technologies like multi-corex86 and GPGPUs.
In late 2008, VITA’s Executive Director,Ray Alderman, and Mercury Computer’sindustry research determined a need for anew systems approach to specifying VPX.In January 2009 the Open VPX IndustryWorking Group was formed as the firststep on the path forward to add system-level clarity to the specifications to accel-erate the commercial benefits of VPXtechnology for integrated, multi-vendorsystems. Available today, the ANSI-approved, OpenVPX systems architecturespecification builds upon VPX technology(VITA 46 and dot specs) but does so froma top down, system engineering approachto specify interoperability points at theslot, module and backplane level.
OpenVPX Taxonomy The group created a common build-
ing block language to convey the keyattributes of the OpenVPX specification.The definition of Planes, Pipes andProfiles were key taxonomy definitionsallowing the user to specify a wide rangeof “building blocks” with a common setof intersections.
OpenVPX — From Concept toSpecification
Figure 1. Cascading Challenges
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6 www.embeddedtechmag.com OpenVPX Design Guide, September 2010
Planes: Segregated architecture bound - aries for backplane and module connec-tivity • Control Plane — dedicated to applica-
tion software control traffic (1GE pipe).• Data Plane — dedicated to application
and external data traffic ( eg: 10GigEswitch fabric).
• Expansion Plane — dedicated to com-munication between logical control-ling system element and a separate,but logically adjunct, system resource (ex : PCIe lanes between multi-coreand GPGPU modules).
• Management Plane — dedicated tosupervision and management of hard-ware resources (eg. I2C).
• Utility Plane — dedicated to common sys-tems services or utilities (Eg. SYSRESET,Power, Gnd, distribution, ref clocks).
Pipes: A collection of differential pairsassigned to a plane and used by slot pro-files. Pipes are protocol- agnostic. • Ultra Thin Pipe (UTP): 2 differential
pairs (e.g. 1000BASE-KX Ethernet or1X Serial RapidIO)
• Thin Pipe (TP): 4 differential pairs(e.g. 2x PCIe interfaces)
• Fat Pipe (FP): 8 differential pairs (e.g.10GBASE-KX4, 4x PCIe)
• Double Fat Pipe (DFP):16 differentialpairs (e.g. 8x PCIe interfaces)
• Quad fat Pipe (QFP): 32 differentialpairs (e.g. 16x PCIe interfaces)
• Octal Fat Pipe (OFP): 64 differentialpairs (e.g. 32x PCIe interfaces)
Profiles: The OpenVPX specificationuses profiles for structure and hierarchy.Three Profile types exist: Slot, Moduleand Backplane.• Slot Profile: Physical mapping of ports
to a slot’s backplane connectors, usingplanes and pipes.
• Module Profile: Extends a slot profileby adding protocols, as well as thermal,power, and mechanical requirements.
• Backplane Profile: Physical backplanemapping of number of slot profilesand topology of slot interconnects.
Backplane Topologies: Different appli-cations require different backplane
Figure 2. Determine the backplane profile and chassis topology required for the development chassis, and then select a standard OpenVPX reference chas-sis or create a custom configuration development chassis for design and integration.
Figure 3. 16-Slot 6U Multi Plane Development Chassis Topology Wiring Diagram.
OpenVPX — From Concept to Specification
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OpenVPX Development Platform
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8 www.embeddedtechmag.com OpenVPX Design Guide, September 2010
topologies. OpenVPX supports Cen tral -ized Switching, Distributed Switching,and Master/Slave Topologies.• Centralized Switching: Uses dedicated
switch modules in multiple types ofswitched configurations (e.g. Dual Star).
• Distributed Switching: Full or partialmesh switching. May require switchlogic on each card for larger slot countchassis (e.g. 5 slot sRIO mesh).
• Master-Slave: Generally Master hostSBC with Slave I/O cards connectedby PCIe fabric. (e.g. SBC root com-plex connected to I/O cards via PCIefabric. Using the OpenVPX specification tax-
onomy and the architectural buildingblock language of connectivity, a systemengineer or architect can now leveragethe specification’s content and rules fortheir unique application.
OpenVPX Specification Decision TreeThe OpenVPX Specification (available
now via ANSI and www.vita.com) can beused in developing open architecture,high-performance, embedded hardwaresolutions. OpenVPX-compliant solutionsprovide a compatible hardware platformfor open embedded OS and middlewarelayering. As a result, as the target applica-tion is developed, the OpenVPX specifica-tion can provide a performance migra-tion path to using open middleware capa-bilities at the module, chassis and intra-chassis levels.
Here is a simple, high level “recipe”for using the OpenVPX specification forapplication development:
1. Establish application requirements todetermine technology choice.
2. Decide on VPX technology — 3U or6U form factor for SWaP requirements.
3. Is integrated multi-module, perhapsmulti-vendor and /or system manage-ment enabled chassis solution required?a. No — (standalone module only)
Use VITA 46 specification(s) ifdesired.
b. Yes — Use OpenVPX specification. If yes, select slot and module payload
profiles and, if switched architecture,switch module profiles that will allowassets to achieve (processing, through-put, management) application require-ments.
Once this step in the solution devel-opment process has been reached, youhave essentially constructed the archi-tecture and topology of your develop-ment solution for application integra-tion. You now have a clear templatefor design or for approaching suppli-ers for module, backplane and or chas-sis outsourcing from an ever-growingecosystem and cadre of OpenVPX sup-pliers.
Achieving Significant Results andBenefits
The OpenVPX Open Systems archi-tecture specification gives developersthe tools to create complex OpenVPXtechnology applications for mitigatingrisk to Quick Response Capabilities(QRC) development programs and,ultimately, deployment. The above tableidentifies a typical set of tasks that may
be considered for a QRC VPX technolo-gy development program, noting esti-mated benefits anticipated from usingthe OpenVPX systems specification as aclear decision making guide to develop-ment. As an early thought leader andmajor contributor to the Open VPX spec-ification content, Mercury Computer wasable to use these concepts to create anddeploy a major prime QRC programusing OpenVPX-compliant architec-tures in just 10 months. When systemsdevelopers with domain expertise andproposal writers become proficient withusing the specification, similar types ofrisk reduction and development effi-ciencies may be expected.
The Journey ContinuesA path to OpenVPX V1.1 is being
developed to create an efficient meth -od to augment the specification withnew profiles in support of technologyand market changes. Also, recommen-dations for user-defined pins are in dis-cussion, which hopefully will result infurther VITA 65 specification defini-tion, but still allow for innovation. As aresult, the team is already looking for-ward to ensuring that OpenVPX willstay current and relevant as the worldof fast-moving technology continues toevolve.
This article was written by Bob Grochmal,Director, OpenVPX Program, Mercury ComputerSystems, Inc. (Chelmsford, MA). For more informa-tion, contact Mr. Grochmal at [email protected],or visit http://info.hotims.com/28057-450.
Task
RFP generation forSystem elements
System design
Development systemreadiness for integration
Multi-vendorhardware/systemintegration
Risk to demonstratereadiness for initialfight-test
(VITA 46) or Custom COTS Approach
• Custom effort• Interoperability holes• No clear way to specify system
requirements
• Custom effort• Significant error-prone backplane
/chassis /module investigations• Difficulty in getting agreement on
needed design implementation
• Significant iterations with vendorsbefore lock down
• Room for interpretation
• Rework cycles• Finger pointing• Cost, schedule, performance hits due
to interoperability issues
• High• Reduced quality• Technical, management, customer,
team frustration
Typical OpenVPX Savings
25-50% time
50% time
33% time or50-60% time savings, ifstandard developmentchassis chosen
50% time
50%+ risk reduction forintegrated system goalswith a clean architecturemaintained
Comments
• OpenVPX assures commonlanguage and definitions
• Communications im proved onrequirements creation team
• OpenVPX establishes well-defined choices
• System issues addressed• Pinouts, placements,
protocols defined inOpenVPX specification
• OpenVPX assures commonlanguage and definitions
• Established ecosystem ofstandard backplane andchassis
• OpenVPX publishedcommon language andspecifications quicklyresolves conflicts
• OpenVPX reduces errorsearly in process
• Overall quality improves• Overall QRC improves
OpenVPX — From Concept to Specification
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www.embeddedtechmag.com OpenVPX Design Guide, September 2010
VPX systems offer tremendous per-formance for the Mil/Aero market,including naval, airborne, and ground-based computing systems. The architec-ture provides an unprecedented combi-nation of bandwidth, user IO, andrugged design, in both a 3U and 6UEurocard format. The new OpenVPXinitiative has opened up new definitionsfor VPX system interoperability, includ-ing defined module profiles, slot pro-files, backplane & chassis configura-tions, secondary expansion fabrics andcontrol planes, and higher speed fabricoptions.
Command, Control, Communi ca tions,Computers, Intelligence, Surveillanceand Reconnaissance (C4ISR)C4ISR embedded computing systemshave certain general needs, both todayand continuing into the future. Theseinclude:• Mission-critical reliability — For
Mil/Aero applications, system failurescan cost lives.
• Higher bandwidth — Weapon andintelligence gathering platforms areusing more intensive digital signal pro-cessing for gathering, relaying, andprocessing data.
• Rugged design — Platforms need tosurvive the shock, vibration, andeffects in aircraft, ground, and sea
based applications. • Stable architecture, less risk —
Platforms need to last many years, evendecades. Vendor support is also critical.
• Performance density — As spacerestrictions get tighter, the systemneeds options for small form factorswhile retaining high performance. VPX, and later OpenVPX, were collab-
oratively created within VITA (VMEInternational Trade Association) bydozens of experts in the military/aero-space community. Based on the ruggedEurocard format like VME andCompactPCI, VPX comes in both 3Uand 6U standard board sizes with typical-ly 1.0" pitch (0.80" and 1.2" pitch arealso possible). VPX uses a high-speedMulti-Gig connector and offers plenty ofIO in a rugged, open standard architec-ture. With dozens of vendors and somebackwards compatibility options toVME, the architecture is stable and willbe supported for years to come.
OpenVPX for System Interoperability If there is any fault with VPX, it was
made to be very flexible. This flexibilitywas beneficial for customized solutions,particularly for how high-speed IO istransported throughout the system.However, it was difficult, if not impossi-ble, to be assured that a board from onevendor would work with one from
another vendor, along with a backplanefrom yet another party. Therefore, theOpenVPX initiative commenced in early2009 with a goal of providing interoper-ability definitions for the VPX specifica-tion. The initiative was rolled into VITAas the VITA 65 specification, which wasapproved by ANSI in June 2010.
In short, OpenVPX provides defini-tions for backplane configurations,which are comprised of slot profiles intowhich various module profiles can beplugged. The module and slot profilesensure that a vendor’s VPX boards(modules) have pinouts that are inter-operable within the VPX backplaneslots. The backplane configuration tellsthe user which slot profiles are utilized,including information on the data rate,routing topology, and fabric used.
When it comes to backplane function-ality, there is very little change. The newstandard simply redefined two reservedP0/J0 signals Aux_Clk (+/-) and addedone P1/J1 single ended Utility signal ofMaskable Reset and redefined theRes_Bus signal to GDiscrete. TheAux_Clk and GDiscrete pins werealready bussed anyway, so the change isminimal. Also, the SysCon signal is nowconfigurable.
Let’s take a look at a standard 6U VPX 5-slot Mesh backplane and compare it to anOpenVPX version. Figure 1a shows a 6U 5-slot VPX backplane and 1b shows a side-view of how the J0-J6 connectors are used.
The standard VPX version has pinoutcharts for P0 and P1 sections with the P2-P6 as “undefined”. Although the P0 andP1 sections have defined pinouts, thereare no details in VPX as to the kind of sig-nals such as thin pipes, fat pipes, or ultrathin pipes. Also, the details of the utilityplane are not as clear.
In the OpenVPX version of the samebackplane, Figure 2 shows the payloadslot profile. It provides more informationfor the data plane section (in yellow),which in this case defines 4 fat pipe lanes.Also, the utility plane sections are clearer.Although this backplane does not have acontrol plane, if it had one we’d also seethis in the payload slot profile, along withthe type of signal (thin pipes are com-monly used for the control plane).
The Slot Profile that is referenced inFigure 2 gives us some details on the cardplugging into the slot. For example, theslot profile number SLT6 says it’s a 6U slot
Transitioning to OpenVPX for Next-Generation C4ISR Systems
Figure 1. Figure 1a shows a standard 6U 5-slot VPX backplane and 1b shows a simple side-view dia-gram of how the J0-J6 connectors are used.
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© 2010 GE Intelligent Platforms, Inc. All rights reserved. All other brands or names are property of their respective holders.
GE Intelligent Platforms
Think of this reference book as Cliffs Notes for VPX and OpenVPX.
It’s that comprehensive and easy to read. It covers all the key
topics, including the VITA 46 (VPX) specification, VITA 48 (VPX REDI),
and VITA 65 (OpenVPX). It covers the history and rationale for VPX,
its underlying principles and features, describes in detail important
technical information, and illustrates the content with over 50
diagrams, charts and photos. Ordering one is a no-brainer.
Order your free copy at www.ge-ip.com/vpx
So it’s only fitting that our 136-page reference guide is free.
It’s an open specification.
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OpenVPX Design Guide, September 2010Free Info at http://info.hotims.com/28057-845
profile (a 6U board), the PER says it’s aperipheral slot, 4F means it has 4 fat pipesand the 10.3.1 is where you can finddetails on this slot profile in the VITA 65specification. For OpenVPX, fat pipeshave 4 links (4 Tx pairs + 4 Rx pairs), thinpipes have 2 links, and ultra thin pipeshave one link. The wider bands, like fatpipes, are typically used in the data plane,while the control plane will often have thethin pipe or ultra thin-pipe signals. Slottypes are comprised of peripheral slots,payload slots, switch slots, or bridge slots.
The backplane profile of the back-plane also provides more information.For example, this 6U 5-slot’s profile is
BKP6-DIS05-11.2.16-1. The BKP6 tells usit’s a 6U backplane profile. DIS05 meansit’s a distributed (like a mesh or ring)architecture and has 5 slots. The 11.2.16is the section of the specification whereyou can find details on this backplaneprofile. The “-1” tells us the data rate is3.125 Gbps (-2 means 5 Gbps and -3means 6.250 Gbps).
The backplane profile chart in Figure 3shows the profile name, the pitch, the cor-responding slot profile for the backplane,the control plane data rate (if applicable)and the data rate of the backplane.
The slot type (like DIS05) section ofthe profile name is an important part of
Figure 2. A Slot Profile of an OpenVPX (VITA 65compliant) version of the 6U 5-slot backplane.The profile provides more details on the datasignals, utility plane, and more.
Figure 3. The Backplane Profile Chart tells us which OpenVPX Slot Profile(s) is used, the pitch, and datarate of the backplane.
Transitioning to OpenVPX
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the description. The main fabrictopologies are CEN for centralized, DISfor distributed, and HYB for hybrid.“Centralized” means it has a centralizedswitch slot and the routing could besimilar to a Star topology. The DIS andCEN configurations typically have pay-load and switch slot types. The HYB willtypically also define peripheral, bridge,and bus slot types like “VME” toaccount for connections to the legacybus slots. The bridge slot does notmean an active bridge board (like acPCI Bridge) is being used. Rather, it
just refers to the fact that this VPX slotalso has pinouts defined for the parallelbus (like VME).
Future Designs for VPX/OpenVPXThere are some interesting configu-
rations coming up in OpenVPX. Theyinclude special connections for opticalconnectors and another version for aRF connector interface. VITA 67 isunderway to add RF connectors to theOpenVPX backplanes. Figure 4 showsthe new gold connectors on a back-plane.
Another very compelling new solutionfor VPX is cabling systems. Compliant tothe latest VITA 46 specifications, thecabling system can be used for IO to bulk-head connectors, slot-to-slot connections,and out-of-band communication. Thecabling system can also be used for systemdevelopment. Figure 4 also shows an exam-ple of these cables plugged into a VPXbackplane. The direct cabling system alsohas front-plug versions, which allow testingacross the backplane or full interconnectpath. The metal shroud can be used indeployable systems to securely hold thecables in place and satisfy MIL-STD-810Eand 901D for shock and vibration.
There are several reasons to use acabling system in a deployed VPX plat-form. Many applications such as ATRs(air transport racks), may not have RTM(rear transition module) options. Insome cases, the signal speeds through theRTM are not enough. In other designs,the system cannot afford to lose a slot ofspace to an IO slot. The VPX cabling sys-tem provides a rugged and robust alter-native with a high-speed connection thatis plugged directly into the MultiGig con-nector in single or multi-wafer formats.
OpenVPX provides definitions for VPXbackplanes, modules, and chassis toensure that the products are interopera-ble. The backplane configurations havebeen defined to show the collection of slotprofiles it entails, including informationon the data rate, routing topology, and fab-ric used. Exciting VPX/OpenVPX prod-ucts have emerged that offer the perform-ance solutions required in C4ISR systems.
This article was written by MelissaHeckman, Electrical Engineeer, ElmaBustronic Corporation (Fremont, CA). Formore information, contact Ms. Heckman [email protected], orvisit http://info.hotims.com/28057-451.
OpenVPX Design Guide, September 2010
Based on the Altera Stratix family
of FPGAs for signal processing
For more information, visit bittware.com
Signal Processing HW
IP & FrameWorks
Development Tools
Systems & Services
Essential Building Blocks... Innovative Solutions.
Size Weight and Power...
Today’s military electronic systems require flexible state-of-the-art processing
performance in a low power, compact solution that meets the demands
of the extreme conditions of the battlefield. That’s where BittWare’s high
performance signal processing FPGA solutions come in. Conduction-cooled,
ruggedized, and COTS compliant OpenVPX, VME/VXS and CompactPCI
boards based on Altera’s Stratix family of FPGAs provide fast time to market,
on-the-fly flexibility and the ability to process complex, compute-intensive
algorithms in real time. BittWare military solutions for radar, sonar, SigInt
and electronic warfare provide developers the
Essential Building Blocks necessary to deliver
Innovative Solutions today for tomorrow’s state-
of-the-art military systems.
Free Info at http://info.hotims.com/28057-847
Figure 4. This photo shows two upcoming solu-tions in one. The gold connectors are for RF sig-nals per the VITA 67 specification underway. Alsoshown is a VPX cabling solution with a shroud tosecure the cables that clip into the backplane.
Transitioning to OpenVPX
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Before the advent of OpenVPX,designers of embedded systems tookadvantage of the extreme connectivityoffered by VPX (VITA 46), but werefaced with a virtually unlimited numberof possible implementations. Specificchoices for the control and data channelassignments for each slot, the backplaneconnectivity, and serial fabrics wereoften made somewhat arbitrarily to suitthe particular needs of the current sys-tem. Although following the generalframework of VITA 46, each system tend-ed to be so unique that the boards andbackplanes designed for one systemwere seldom usable in other systems,even from the same vendor.
Now, OpenVPX (VITA 65) provides aneffective taxonomy for describing VPXcomponents, and also defines numerous“profiles” for boards, slots and back-planes that detail specific configurationsof channels, interconnections, and fab-rics. Instead of starting from scratch eachtime, designers can browse through
these standardized profiles to find onethat satisfies the objectives of each newsystem. By narrowing the field of config-urations, these profiles boost reusabilityand interoperability between vendors.
Beamforming PrinciplesA multichannel software radio beam-
forming receiver system is presented asan example that illustrates how theOpenVPX system design process works.Principles from this example can be eas-ily applied to other systems.
Beamforming is extensively used incommunications, radar, direction find-ing, countermeasures, weapons systems,oil and mineral exploration, and med-ical imaging and treatment. In essence,beamforming utilizes multiple sensors toachieve directionality of the sensor array,and also to improve the signal qualityand reception range.
Beamforming achieves these benefitsby judiciously adjusting the phase shiftand gain of each sensor so that, when
the adjusted sensor signals are com-bined, they add constructively. Forreceivers, the combination is performedby summing the adjusted signals fromeach sensor. For transmitters, each sen-sor delivers a signal that adds construc-tively at the destination.
Defining System RequirementsThe sensors in a software radio receiv-
er system for beam forming are antennasarranged in a linear or two-dimensionalarray. The term “software” in softwareradio refers to the programmability of thedigital signal processing functions includ-ing the digital down conversion, phaseshifting, gain adjustments, summation ofthe received channels, and then the ulti-mate demodulation, decoding, and/ordecryption of the acquired signal.
The example system requires sixteenantennas, each followed by an RF stage toamplify and down convert the radio fre-quency signal to an intermediate frequen-cy (IF) analog signal so it can be digitizedby an A/D converter. These sixteen IF sig-nals are supplied as inputs to the system.
Each IF signal has a bandwidth of 20MHz and is centered at 70 MHz. AfterA/D conversion, all sixteen channels aredown converted to baseband and beam-formed using gain and phase shift param-eters to comply with operational objec-tives. The final beamformed sum is deliv-ered as a baseband signal to a remote sys-tem control processor PC for additionalprocessing, forwarding, or storage.
The system must operate in a limitedspace avionics equipment bay and mustcomply with typical shock, vibration,temperature, altitude, humidity, flightsafety, power consumption, power sup-ply, and EMC/EMI standards.
Choosing the OpenVPX PayloadModule for Beamforming
Since industry standard chassis areavailable in both 3U and 6U sizes, andboth are well defined for OpenVPX, thesmall avionics bay requirement favors the3U style. The next tasks are to select theappropriate 3U software radio andprocessor modules (boards) to performthe beamforming, define the requiredconnections between the modules, selecta 3U backplane to support those inter-
Putting OpenVPX To Work
GainAdjust
G1
GainAdjust
G2
GainAdjust
G3
GainAdjust
G4
PhaseAdjust
P1
PhaseAdjust
P2
PhaseAdjust
P3
PhaseAdjust
P4
t1
t2
t3
t4
BeamformedSum Out
Figure 1. Beamforming adjusts phase and gain of signals from each antenna in an array to compen-sate for different delays (tn), so that signals arriving from a particular angle relative to the array addconstructively when combined in the summer.
DP01
200 MHz 16-bit A/D
DDC 4 & shift
PCIe X4 I/F
VPX P1
FP 3 EP02
200 MHz 16-bit A/D
200 MHz 16-bit A/D
200 MHz 16-bit A/D
AURORA BEAMFORM SUMMATION
DDC 3 & shift
DDC 2 & shift
DDC 1 & shift
Aurora X4 Sum IN (Expansion Plane)
PCIe X4 (Data Plane & Control Plane)
CROSS BAR
SWITCH
Aurora X4 Sum OUT (Expansion Plane)
X4
X4
X4
EP01 X4 Sum In
X4 Sum Out
T
Figure 2. Model 5353 3U VPX Beamformer Module with four A/Ds, four DDCs, X4 PCIe interface, phaseshifters and summation engine for beamforming.
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connections, a chassis to meet the physi-cal and environmental requirements,and a link between the chassis and theremote system control processor PC.
For example, Pentek’s Model 5353Software Radio Beamformer is a 3UOpenVPX module featuring four 200 MHz16-bit A/D converters and two Virtex-5FPGAs, one for signal processing and a sec-ond one for the PCI interface. Inside thefirst FPGA are interfaces to the four A/Dconverters, four digital downconverters(DDCs) with programmable phase shiftand gain, and four power meters at eachDDC output. A simplified block diagram ofthe 5353 is shown in Figure 2.
The Model 5353 also includes a sum-mation block that adds the DDC outputsfor a four-channel beamforming sum.This block also accepts a propagatedsum in signal from another module andgenerates a propagated sum signal outto the next module. The sum in/sumout signals use two X4 Aurora gigabitserial links connected to the VPX P1backplane connector, each capable ofmoving data at 1.25 GB/sec peak.
To support the 20 MHz IF channelbandwidth with a 25% filter margin, theDDC outputs deliver complex 16-bit I+Qsamples at 25 MHz, or 100 MB/sec. Thepropagated sum in/sum out signals alsooperate at 100 MB/sec and are thus eas-ily handled by the 1.25 GB/sec X4Aurora links.
The 5353 system interface for controland data is an X4 PCIe port, also con-nected to P1. Bandwidth requirementsfor the control and data port are domi-nated by delivery of the final beam-formed sum out to the control processor.This 100 MB/sec stream falls well withinthe 2 GB/sec peak rate of the X4 PCIeport when operating in Gen 2 mode.
A programmable, fabric-transparentcrossbar switch allows free assignment ofthe two X4 Aurora ports and the X4PCIe port, in any combination, to thefour X4 fat pipes of P1. This flexibilityallows the 5353 to accommodate variousOpenVPX slot profiles and backplanes.
To accommodate 16 antennas, a totalof four 4-channel 5353 modules arerequired. Since the summation chainrequires the same data rate as each DDC,the two sum ports must simultaneouslyhandle 100 MB/sec each. This class of sig-nals falls under the definition of expan-sion plane in the OpenVPX specification.
The X4 PCIe interface for handlingthe data initialization, delivery of beam-forming parameters is described as thecontrol plane under OpenVPX. Finaldelivery of the beamformed result to the
system control processor is best classi-fied as the data plane under OpenVPX.
Choosing the OpenVPX BackplaneOpenVPX backplanes use many dif-
ferent topologies named after the geom-etry of their interconnections, includingmesh, star, leaf, and ring. Most includeslots for switch modules to supportreconfigurable inter-board connections,while some simply rely on dedicatedwiring between the slots.
After reviewing the 3U OpenVPXbackplane choices in the standard, themost appropriate for our system is the 6-Slot backplane profile BKP3-CEN06-15.2.2-1, which has five payload slots andone switch slot as shown in Figure 3.
The expansion plane fat pipes join adja-
cent payload slots 1 through 5 to supportthe sum in and sum out chaining portsbetween 5353 modules. One data planefat pipe from each payload slot to theswitch slot 6 supports the four X4 PCIelinks we need to the control processor.
This backplane defines specific slot pro-files for the two types of slots. Slots 1through 5 use the payload slot profileSLT3-PAY-1F2F2U-14.2.2 shown in theupper right section of Figure 3. To see ifwe can use the Model 5353 in the payloadslots, we must verify that the Model 5353has a module profile compatible with thisslot profile.
It is important to note that the backplaneprofiles and slot profiles do not specify anyfabric or protocol for the connections.However, the backplane profile does speci-
www.embeddedtechmag.com OpenVPX Design Guide, September 2010
VPX P1
FP 3 DP03
DP04 PCIe X4
CROSS BAR
SWITCH
X4
X4
X4
DP02
DP01
PCIe X8 Serial Cable 4 GB/sec
PCI EXPRESS SWITCH
PCIe X8 Cable
ReDriver
PCIe X4
PCIe X4
PCIe X4 X4
X4
X4
X4
X4 PCIe X8
Figure 5. Model 5308 3U VPX PCIe X8 Serial Cable Adapter with ReDriver, PCIe switch and crossbarswitch. Also shown are the X8 PCIe cable, PC host adapter board, and host PC.
Data Plane 1 Fat Pipe
Expansion Plane 8 UTPs
Control Plane 2 UTPs
DP01 EP01-EP08 CPutp01 CPutp02 PCIe Gen 2 per
Section 5.3 PCIe Gen 2 per
Section 5.3 1000BASE-BX per
Section 5.1.1
DP01
EP05- EP08
EP01- EP04
VPX P1 Data Plane 1 Fat Pipe
Expansion Plane 16 Differential Pairs
Control Plane 2 UTPs
Figure 4. Fabric definitions listed for the module Profile MOD3-PAY-1F2F2U-16.2.2-4 (for the model5353) are completely compatible with the VPX P1 connections for payload slot profile SLT3-PAY-1F2F2U-14.2.2, defined for backpane profile BKP3-CEN06-15.2.2-1.
DP01
EP05- EP08
EP01- EP04
Payload Slots 1-5 SLT3-PAY-1F2F2U-14.2.2
Data Plane 1 Fat Pipe
Expansion Plane 16 Differential Pairs
Control Plane 2 UTPs
DP01 Data Plane 1 Fat Pipe
Switch Slot 6 SLT3-SWH-6F6U-14.4.1
DP02 Data Plane 1 Fat Pipe
DP03 Data Plane 1 Fat Pipe
DP04 Data Plane 1 Fat Pipe
5 Payload Slots Switch Slot
VPX P1
VPX P1
Figure 3. OpenVPX 3U 6-Slot Backplane BKP3-CEN06-15.2.2-n showing definition for the payload slotprofiles and switch slot profiles.
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fy the maximum baud rate for each gigabitserial pipe. This scheme allows a wide vari-ety of modules to be used in a given back-plane slot, each with its own particular fab-ric and baud rate. Of course, the baud rateof each pipe of the module must be equalto or less than the maximum baud ratespecified in the backplane profile.
Because of its programmable crossbarswitch, the Model 5353 can be configuredto meet the module profile MOD3-PAY-1F2F2U-16.2.2-4, which is compatible withthe slot profile SLT3-PAY-1F2F2U-14.2.2.This module profile defines data, expan-sion and control plane fabric connectionsand baud rates. The backplane profileBKP3-CEN06-15.2.2-1 defines a single fatpipe (X4) on the DP01 data plane forPCIe Gen 2 that corresponds directly tothe PCIe interface as shown in Figure 4.
The eight expansion plane ultra thinpipes, EP01 through EP08, are alsodefined as PCIe Gen 2, capable of oper-ating at baud rates of 5 GHz. We willorganize these eight pipes as two fatpipes for the two X4 Aurora ports forsum in and sum out, which need to oper-ate at only 3.125 GHz. The two controlplane ports, CPutp01 and CPutp02, arenot implemented on the 5353.
Choosing the OpenVPX Switch/Interface Module
The selected backplane also has aswitch slot with profile SLT3-SWH-6F6U-
14.4.1, whose VPX P1 connections areshown in the bottom right section ofFigure 3. The four data plane fat pipesshown (DP01 — DP04) connect to pay-load slot fat pipes DP01 on slots 1through 4.
Now we need to find a compatibleswitch module that can plug into slot 6and connect these four PCIe links to theremote system control processor. Pentek’sModel 5308 PCIe Cable Adapter is a 3UVPX switch module with a front panel X8PCIe cable connector defined by the PCI-SIG PCI Express® External Cabling 1.0Specification. Compatible PCIe hostadapters are available for many differentsystems including PCIe cards for desktopPCs as well as avionics cockpit computers.
The 5308 features a PCIe switch that sup-ports flexible lane bonding so that a singleX4 or X8 PCIe port from the controlprocessor PC can be split into four X4 PCIeports to four individual PCIe endpoints.The fabric-transparent crossbar switchjoins these four X4 ports to the VPX1 P1backplane connector, fully compatible withOpenVPX module profile MOD3-SWH-4F-16.4.5-2 shown in Figure 6.
Inspection reveals that this moduleprofile is fully compatible with the fourVPX P1 fat pipes on the slot profile SLT3-SWH-6F6U-14.4.1. Further, the baud ratespecified for the backplane profile BPK3-CEN06-15.2.2-1 supports the PCIe Gen 2with baud rates up to 5 GHz.
The final beamforming system isshown in Figure 7, with simplified blockdiagrams of the four Model 5353Beamformers and the 5308 PCIe CableAdapter. All of the required gigabit seri-al links for Aurora expansion plane andPCIe data and control planes are con-nected by the backplane wiring.
The chart in the diagram shows theOpenVPX profiles for the backplane,the slots, and the modules that plug intothose slots. Each profile is described infull detail in the specification and thesystem designer must ensure that theprofiles are compatible.
This process of matching module pro-files, slot profiles, and backplane pro-files for a particular application is thekey to successful system configurationunder OpenVPX. Not all of theresources of each profile need to be fullyimplemented or utilized if the needs ofthe application are satisfied.
Finally, the chassis profile needs to bedefined based on the environmentaland physical constraints of the system.OpenVPX does not yet have specificchassis profiles defined, but it offers acomplete system for specifying the size,type (rack mount, tower, etc), slot count,primary power, cooling, backplanepower, and the profile name.
SummaryOpenVPX presents a formal, well-
organized system for defining all compo-nents in VPX systems, and the efforts ofthe working group should be applaud-ed. Many of the figures and all of theprofiles in this article were derived fromthe full OpenVPX VITA 65 specification,which is available from the VITA website(www.vita.com), and is definitely aworthwhile and important referencedocument.
A good metric for the significance of anew standard is how actively new exten-sions are proposed to embrace newoptions and new technology. As promisingevidence, even before final ratification,new initiatives like VITA 66 and VITA 67were proposed, adding both optical andRF I/O capabilities. As OpenVPX isapplied to an increasing number of appli-cation systems, the need for future evolu-tionary capabilities will emerge. All signspoint to growing adoption of OpenVPXfor new programs by both the embeddedsystems industry and its customers.
This article was written by RodgerHosking, Vice President, Pentek, Inc. (SaddleRiver, NJ). For more information, contact Mr.Hosking at [email protected], or visithttp://info.hotims.com/28057-452.
www.embeddedtechmag.com OpenVPX Design Guide, September 2010
FP 3DP03
DP04
DP02
DP01
PCIeSwitch
DP01PCIeX4
FP 3EP02
S
EP01
DP01PCIeX4
FP 3EP02
S
EP01
DP01PCIeX4
FP 3EP02
S
EP01
DP01PCIeX4
FP 3EP02
S
EP01
80353535353535353535
6 tolS4 tolS3 tolS2 tolS1 tolS
Aurora X4 Aurora X4 Aurora X4
PCIe X4
PCIe X4PCIe X4
PCIe X8cable
Out
S
Out
In
Out
In
Out
In
Out
In
3U VPX Backplane Profile: BKP3-CEN06-15.2.2-1
Slot 1 – 4 Slot Profile: SLT3-PAY-1F2F2U-14.2.2
Slot 6 Slot Profile: SLT3-SWH-6F6U-14.4.1
Model 5353 Module Profile: MOD3-PAY-1F2F2U-16.2.2-4
Model 5308 Module Profile: MOD3-SWH-4F-16.4.5-2
Figure 7. Complete OpenVPX beamforming system showing four 5353’s with Aurora X4 sum in/outlinks (red), and PCIe X4 links (blue) connected to one 5308 with PCIe X8 cable link to the PC.
PCIe Gen 2 per Section 5.3PCIe Gen 2 per Section 5.3
DP03 - DP04DP01 - DP02
Data Plane 2 Fat Pipes
Data Plane 2 Fat Pipes
DP01 Data Plane1 Fat Pipe
DP02 Data Plane1 Fat Pipe
DP03 Data Plane1 Fat Pipe
DP04 Data Plane1 Fat Pipe
VPX P1
Figure 6. Fabric definitions listed for the module Profile MOD3-SWH-4F-16.4.5-2 (for the model 5308)are data rate compatible with the VPX P1 connections for payload slot profile SLT3-SWH-6F6U-14.4.1,defined for backpane profile BKP3-CEN06-15.2.2-1.
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Who’s Who in OpenVPX
A directory of companies currently involved in OpenVPX4DSP, Inc.955 S Virginia Street Suite 214 Reno, NV 89502(800) [email protected]
Aitech Defense Systems, Inc.19756 Prairie StreetChatsworth, CA 91311(888) [email protected]
Amphenol Backplane Systems18 Celina AvenueSuite 200Nashua, NH 03063(603) 883-5100www.amphenol-abs.com
BittWare, Inc.9 Hills AvenueConcord, NH 03301(603) [email protected]
Creative Electronic Systems SAAvenue Eugene-Lance 38CH-1212 Grand Lancy 1Geneva, Switzerland+41 (0)22 884 51 [email protected]
Concurrent Technologies Inc.6 Tower Office ParkWoburn, MA 01801(781) [email protected]
Condurant Corporation1501 S. Sunset StreetLongmont, CO 80501(303) [email protected]
CSP Inc.43 Manning RoadBillerica, MA 01821(978) [email protected]
Curtiss-Wright Controls Embedded Computing333 Palladium DriveKanata, OntarioK2V 1A6Canada(613) [email protected]
Curtiss-Wright Controls ElectronicSystems(formerly Hybricon Corporation)151 Taylor StreetLittleton, MA 01460(978) [email protected]
Diversified Technology, Inc.476 Highland Colony ParkwayP.O. Box 748Ridgeland, MS 39157(800) [email protected]
Dynatem, Inc.23263 MaderoSuite CMission Viejo, CA 92691(800) [email protected]
Elma Bustronic Corp.44350 Grimmer Blvd.Fremont, CA 94538(510) [email protected]
Elma Electronic Inc. — Systems760 Veterans CircleWarminster, PA 18974(215) [email protected]
Emerson Network Power2900 South Diablo WaySuite 190Tempe, AZ 85282(800) 759-1107 or (602) 438-5720embeddedcomputingamericasales@emer-son.comwww.emerson.com/embeddedcomputing
Extreme Engineering Solutions, Inc. (X-ES)3225 Deming WaySuite 120Middleton, WI 53562(608) [email protected]
GE Intelligent Platforms12090 South Memorial ParkwayHuntsville, AL 35803(800) [email protected]
E l m a B u s t r o n i c
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Who’s Who in OpenVPX
General Dynamics Canada3785 Richmond RoadOttawa, Ontario K2H 5B7Canada(613) [email protected]
Hartmann Electronic300 E. Auburn Ave.Springfield, OH 45504(937) 324-4422Monika.diego@hartmann-elektronik.dewww.hartmann-electronic.com
HDL Research Lab, Inc.406 West Blue Bell RoadBrenham, TX 77833(979) [email protected]
Innovative Integration, Inc.2390-A Ward AvenueSimi Valley, CA 93065(805) [email protected]
Interface ConceptZ.I. n° 2 des Pays Bas29510 Briec de l’OdetFrance+33 (0)2 98 57 30 [email protected]
Juniper Networks1194 North Mathilda AvenueSunnyvale, CA 94089(888) 586-4737www.juniper.net
Kontron14118 Stowe DrivePoway, CA 92064(888) [email protected]
Mercury Computer Systems, Inc.199 Riverneck RoadChelmsford, MA 01824(866) 627-6951www.mc.com
Meritec/Joy Signal Technology1359 West Jackson StreetPainesville, OH 44077(888) [email protected]
North Atlantic Industries110 Wilbur PlaceBohemia, NY 11716(631) 567-1100www.naii.com
Northrop Grumman Electronic Systems1580-A West Nursery RoadLinthicum, MD 21090(800) 443-9219ww.es.northropgrumman.com
PCI-Systems Inc.13 C StreetSuite DLaurel, MD 20707(301) [email protected]
Pentek, Inc.One Park WayUpper Saddle River, NJ 07458(201) [email protected]
SIE Computing Solutions, Inc.10 Mupac DriveBrockton, MA 02301(800) 926-8722www.sie-cs.com
Technobox, Inc.140 Mount Holly BypassUnit 1Lumberton, NJ 08048(609) 267-8988www.technobox.com
TEK Microsystems, Inc.300 Apollo DriveChelmsford, MA 01824(978) 244-9200www.tekmicro.com
Themis Computer47200 Bayside ParkwayFremont, CA 94538(510) 252-0870www.themis.com
Tracewell Systems567 Enterprise DriveWesterville, OH 43081(800) [email protected]
Tyco Electronics100 Amp DriveHarrisburg, PA 17112(800) 522-6752www.tycoelectronics.com
VTI Instruments Corporation2031 Main StreetIrvine, CA 92614(949) [email protected]
Xembedded LLC1050 Highland DriveSuite EAnn Arbor, MI 48108(877) [email protected]
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Product Briefs
6U OpenVPX Radar System UpgradeAvailable in both air- and conduction-cooled configurations, the
Ensemble™ 6000 Series OpenVPX HCD6410 HighCompute Density Module from Mercury
Computer Systems (Chelmsford, MA) com-bines eight high-performance Power
Archi tecture processor cores with variousI/O capabilities and the scalable serial RapidIO
interconnect. The HCD6410 also features theMultiCore Plus® software infrastructure, which allows ease of portabil-ity in an open software development environment.
For Free Info Visit http://info.hotims.com/28057-455
OpenVPX/VITA-65 Serial RapidIO® GEN-2 SwitchCurtiss-Wright Controls Embedded Computing (Ottawa, Ontario,
Canada) has introduced the OpenVPX™/VITA-65 compliant VPX6-6902 Serial RapidIO® (SRIO) switchcard. This rugged 6U VPX board, avail-able in both air- and conduction-cooledversions, combines Ethernet and SRIOswitching in a single slot for manage-ment, control, and dataplane switchingin high performance embedded militarysystems. Supporting both Gen-1 SRIO(1.25, 2.5, 3.125 Gbaud) and Gen-2 SRIO (5.0, 6.25 Gbaud), the VPX6-6902 enables systems integrators to quickly and easily architect smallto large high-performance systems that adhere to the VITA-65OpenVPX™ systems specification.
For Free Info Visit http://info.hotims.com/28057-456
6U OpenVPX Rugged Single Board ComputerGE Intelligent Platforms (Charlottesville, VA) has announced the
SBC622 rugged 6U OpenVPX-compliant single board computer. At2.53GHz, the SBC622’s Intel Core i7 processor is 30% faster than its
predecessor, with up to 8 GBytes of solderedDDR3 SDRAM with ECC and a high band-width 10 Gigabit Ethernet I/O fabric sub-system. Customer flexibility to configure
the SBC622 according to the preciserequirements of the application is delivered
via two onboard PCI-X® PMC/XMC mezzanineexpansion sites. Provision for a higher degree of failsafe operation isdelivered through the SBC622’s onboard BIOS flash which can beoptionally backed with a second flash device.
For Free Info Visit http://info.hotims.com/28057-457
6U VPX Load BoardElma Bustronic Corporation (Fremont, CA) has
introduced a new 6U VPX Load Board that helpsconfirm the chassis meets the VITA 46/48 powerspecifications for VPX and aids in locating hotspots within the enclosure. The 6U VPX load cardfeatures a microcontroller-based stepped loadcontrol to 100W maximum. Go-No-Go indicatorsare present for 3.3V, 5V, 12V, +12V_Aux, -12V_Auxand 3.3V_Aux. The rotary switch selects the volt-age setting while pushing the ON switch will cyclebetween different power levels shown on the LEDdisplay. The set load power levels are saved inEEPROM. Other features include a power reset button (to minimumlevel) and a SYSRESET signal on the two test point outputs.
For Free Info Visit http://info.hotims.com/28057-458
Forced Air-Cooled EnclosureExtreme Engineering Solutions (X-ES) (Middleton, WI) is now shipping
the XPand4200, a sub-1⁄2 ATR, forced air-cooled enclosure for conduc-tion-cooled modules. The system measures 4.88" (W) × 6.0" (H) × 13.5"(D) and weighs 8.8 pounds. The XPand4200 has an optional removablememory module attach-ment that supports theXPort6191 Solid State Disk(SSD) removable storagemodule, with 64 GB of stor-age capacity. With the mem -ory module attachment theheight increases to 7.62" and theweight to 11.1 pounds. Up to six conduction-cooled, 0.8" pitch 3U VPX, 3UcPCI, or power supply modules can be configured into the XPand4200.Additionally, the XPand4200 can be configured to meet custom I/Orequirements with conduction-cooled PMC / XMC modules available fromX-ES or third parties.
For Free Info Visit http://info.hotims.com/28057-459
Two-Slot OpenVPX Development Platform Elma Electronic Systems Division (Fremont, CA) has released a
new two-slot VPX/OpenVPX test and development platform thataccommodates both 3U and 6U boards via a shelf divider. The new E-
Frame Series enables developersto power up one or more VPXblades under test and intercon-nect the J1 fabric connections toemulate the user’s application.The use of a standard VPX RTM(rear transition module) pluggedinto the back provides access tothe J0, J2, J3, J4, J5 and J6 con-nectors, while simultaneously
accessing high-speed signals in the J1 connector, routed out the sideof the backplane. Each slot’s J1 “A” channel is broken out into 16 SMAconnectors and the “B”, “C” and “D” channels into four SATA2 cableheaders (12 total per slot).
For Free Info Visit http://info.hotims.com/28057-460
IPv4/IPv6 Gigabit Ethernet SwitchThe new Kontron (Poway, CA) Gigabit Ethernet Switch VX3910 offers
3U VPX (VITA 46.x) and OpenVPX™ (VITA 65) platforms enterprise-class switching functionality with a total of 28 Gigabit Ethernet portsand advanced management features.The non-blocking fully man-aged L2/L3 Gigabit switch,Kontron VX3910, with its 20xGigabit ports to the backplane,offers the highest port densityfor the implementation of various net-work topologies in 3U appliances. Fouradditional 2.5-Gigabit ports to the back-plane simplify a redundant system architec-ture with multiple switches with no singlepoint of failure. The four 1000 Base-T uplinks on the front panel, onededicated for out-of-band management, expand the range to a total of28 ports. The new Kontron Gigabit Ethernet Switch VX3910 is availablein an air-cooled version for ambient temperatures from 0°C to +55°Cand in a rugged conduction-cooled version for the extended tempera-ture range from -40°C to + 85°C.
For Free Info Visit http://info.hotims.com/28057-462
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http://www.techbriefs.com/wp/8360 http://www.techbriefs.com/wp/8361 http://www.techbriefs.com/wp/8368
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OpenVPX Enables NewLevels of High-Performance VideoTechnologyApplications
With powerful and maturevideo technology applicationsavailable nowadays, two typicalbottlenecks still exist in actual
systems: data throughput in the gigabit/s range tosupport high-definition video standards, and sys-tem component interoperability due to the innercomplexity of high-performance video applications.OpenVPX can reliably address both issues.
Creative Electronic Systems (CES)
Enabling High-SpeedData Rates inConnectors forCommercial Aerospaceand DefenseApplications
A new high-speed connectorsystem for aerospace and
defense applications builds on industry-proventechnology to achieve new levels of ruggedness. Bycombining the designs of cutting-edge high-speedconnectors with proven MIL-SPEC contacts, the newFortis Zd connector meets the demands of emerg-ing military applications by enabling data rates of10 Gb/s+ while performing in military-level vibrationand shock conditions.
Tyco Electronics
The Inner Workings ofSolid State Flash:SLC versus MLC
Because all solid state flashproducts are not createdequal and flash storage isfinding its way into more andmore embedded computingapplications, system design-
ers should understand the critical tradeoffsbetween competing technologies when evaluatingflash products. Two well-known flash storage tech-nologies, Single Level Cell (SLC) and Multi Level Cell(MLC), offer distinct advantages depending upon auser’s needs.
Elma Electronic
VPX: A Rugged FabricArchitecture for the21st Century
The VMEbus architecture hasserved military embedded com-puting applications well forover a quarter of a century. In -creasingly demanding applica-tions, coupled with new tech-
nologies such as serial switched fabrics, meantthat a new derivative — VITA 46, now VPX — wasrequired that leveraged many of the familiar char-acteristics of the VMEbus architecture but broughtnew levels of performance. While introducingsome elements of incompatibility with what hasgone before, VPX brings substantial improvementsin price/performance.
GE Intelligent Platforms
Deploying RuggedizedSystems in UnmannedMilitary Vehicles forAdvanced Air-Sea-LandApplications
Over the past decade, militaryplatforms of all types and sizeshave seen a dramatic increasein the use of sophisticated
onboard electronic systems. This growing relianceon small embedded, rugged computers and complexhigh-speed I/O requirements for “mission comput-ing” provides a wide range of real-time applicationsto support both reconnaissance and war-fightingactivities on land, in the air and at sea.
Kontron
The Advantages ofOpenVPX OpenStandard for VPX COTSEquipment Suppliersand System Integrators
The OpenVPX specification wascreated with a top-down, sys-tems-level view of performance
and interoperability. Addressing the architecturalissues required to define, implement, and deployVPX-based systems from a broad choice of interop-erable, COTS hardware building blocks from multi-ple suppliers. This paper presents a specificationoverview, as well as an application-specific exampleidentifying the strategic benefits of the specifica-tion for embedded system development.
Mercury Computer Systems, Inc.
New! Software DefinedRadio Handbook, 8thEdition
The folks at Pentek, who wrotethe book on software radio, arepleased to announce theirrecently released and expand-ed 2010 Software RadioHandbook. Now in its 8th edi-
tion, the handbook shows how DDCs and DUCs, thefundamental building blocks of SDR, can replaceconventional analog receiver designs, offering sig-nificant benefits in performance, density and cost.As such, it is a useful technical reference for engi-neers. It’s yours free, just click on the link below todownload a copy.
Pentek, Inc.
Simplifying Embedded FPGADevelopment with BittWare’sATLANTiS FrameWork Methodology
While FPGAs provide significant performance bene-fits, the FPGA development process can be bothtime-consuming and difficult. BittWare’s ATLANTiSFrameWork (AFW) addresses these limitations byproviding infrastructure that supports FPGA devel-opment at a higher abstraction level, enabling AFWcustomers to move quickly and confidently fromdesign to deployment.
BittWare, Inc.
Enabling Interoperabilityin High-PerformanceEmbedded Applications -An OpenVPX SystemSpecification Primer
With the advent of high-speedserial fabrics, the VME ParallelBus proved insufficient for the
needs of higher performance embedded systems.VPX, also known as VITA 46, is the follow-on to theVME Specification for the next generation of high-speed interconnects for harsh environments. Whileadvancing the state of the technology, VPX pro-vides backwards compatibility to traditionalVMEbus through the use of specialized bridges.
Curtiss-Wright ControlsEmbedded Computing
OpenVPX BackplaneProfiles: Making Sense of System InteroperabilityFor VPX
OpenVPX has opened up new defi-nitions for VPX backplanes andsystems. This includes defined
Module Profiles, Slot Profiles, backplane & chassisconfigurations, secondary expansion fabrics andcontrol planes, and higher speed fabric options. ElmaBustronic will provide some clarity for the new defi-nitions and what they entail. We’ll provide anoverview of the various elements involved, andinclude a couple of potential backplane configura-tions. The paper will include diagrams on module andslot profile examples, illustrate signal changes forexisting VPX products, and configuration examples.
Elma Bustronic
White Paper Spotlight
2 www.embeddedtechmag.com OpenVPX Design Guide, September 2010
Embedded TechnologyOnlinewww.embeddedtechmag.comFeature articles, application notes, product briefs, white papers, and more.
Read these new reports:
• Optimizing the Interoperability ofMilitary Satellite Communications
• Ensuring Effective Thermal Design
• Achieving Embedded Software SafetyWith Agility
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