25/9/2006dmitri tsybychev stony brook1 vertex 2006 perugia, italy september 24-29, 2006 dØ silicon...
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25/9/2006 Dmitri Tsybychev Stony Brook 1
Vertex 2006Perugia, Italy
September 24-29, 2006
DØ Silicon Detector and Experience at Tevatron
D. Tsybychev (Stony Brook)On behalf of DØ collaboration
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• Outline:• Overview of Tevatron and DØ
experiment• Layer 0 concept • Layer 0 commissioning and
preliminary performance• SMT status• Summary and outlook
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The Tevatron
Proton-Antiproton collider √s = 1.96 GeV Ultimate peak luminosity 3x1032
cm-2 s-1
Expecting to accumulate 8 fb-1 by 2009
Good data taking efficiency ~ 85%
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DØ DetectorCentral Scintillator
Forward Mini-drift chamb’s
Forward Scint
Shielding
Tracking: Solenoid(2T), Silicon,
Fiber Tracker
Calorimeter
Central PDTs
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SMT Design
Barrels F- Disks H- Disks
Channels 387072 258048 147456
Modules 432 144 96
Si Area 1.3 m2 0.4 m2 1.3 m2
I nner R 2.7 cm 2.6 cm 9.5 cm
Outer R 9.4 cm 10.5 cm 26 cm
108.1 cm
6 barrels
12 F-disks
4 H-disks
4 super-layers in barrelL1in, L3in: DSDM,
90o stereoL1out, L3out: single sidedL2, L4: DS, 2o stereo
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DØ Layer 0Mitigates tracking losses due to radiation damage to Layer 1 of SMT detectorImprove IP resolution, especially for low pT tracks
Less material at first silicon hit 1st Tracking hit closer to IP
Layer-0 Physics Gains Proper Time Resolution
= 105 fs (SMT) 75 fs (layer-0, no layer-1)
b-Tagging efficiency gain ~15%
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Where does L0 go?
Very tight space constraint outer radius ~23mm inner radius ~15mm
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Layer 0 installed inside SMT in April 2006
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Layer 0 detector The detector consists of:
48 modules mounted on carbon fiber support structure
6 -segments, 8 z-segmentsFour sensor types provide 98.4% of acceptance
Sensors 12 and 7 cm lengths
71 and 81 micron pitch with intermediate strips
Signals transferred to readout chips using low mass analog cables
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Layer 0 Module
hybrid
analog cablesensor
Double-deck analog cable between sensor and hybrid• 91 m pitch, shifted by half
pitch • 17, 24, 32, 34 cm long
SVX4 readout chip
SVX4
pitch adapter
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Silicon Readout Data Flow
PlatformPlatform
SEQ
SEQ
SEQ
SEQ
SEQ
SEQ
MCH2MCH2
3/6/8/9 Chip HDI
Sensor
8’ Low Mass Cable
~19’-30’ High Mass Cable (3M/80 conductor)
Optical Link1Gb/s
V
R
B
C
V
B
D
V
R
B
PwrPC
SDAQ
VME
HV / LV
1553 Monitoring
25’ High Mass Cable (3M/50 conductor)
CLKs CLKs
Serial Command Link
PDAQ (L3)MCH3MCH3
PwrPC
1553
CathedralCathedralHorse ShoeHorse Shoe
Adapter Card
KSU
Interface Board
SEQController
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SMT and Layer 0 Electronics infrastructure
DAQ must accommodate both SVX2 and SVX4 Isolated power for SVX4 SVX4 readout chain after IB (new for Layer 0)
digital jumper cable junction card: impedance matching twisted pair cable adapter card
SVX4 voltage regulation differential (SVX4) single ended (existing system) Ground isolation
Layer 0 HV Upgraded Sequencer and Sequencer Controller
firmware to accommodate coexistence of SVX2 and SVX4
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Junction cards
Digital Cables
LV/HV cables
ClocksTwisted pair cables
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The Big Challenge – Noise
The most difficult challenge (in terms of electronics) for detectors of this type is to reduce noise
Analog cable works as a “good” antenna
Noise Sources Ground Loops
Continuous carbon fiber structure Electronics at both ends
Power Supplies Noise Other Noise conducted into the
detector Capacitive coupling is very
important
poorly grounded DØ prototype module total
noisediff. noise
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Noise elimination – Layer 0 implementation
Electronically create an isolated ground on the detector
Dedicated adapter card Use ground isolated power
regulators near the detector All signals sent differentially across
the barrier CLC filter before regulators, for
SVX4 power Isolated high voltage ground with 10K resistorIsolated ground needs reference to the outside world
This is provided by the high voltage ground resistor
Mesh spacer to minimize capacitance between analog cables
analogcable
pitchadapter
meshspacer wrap-around
bumpers
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Other Tricks
Carbon fiber cocured with flex circuit with copper trace to achieve better contactGround pads at backplane of hybridWrap-around to connect sensor GND to support (as well as bias voltage to backplane)
ground for hybridground for hybridwrap-around for wrap-around for ground and biasground and bias
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pedestal total noise 10 diff. noise 10
Test standWithout filters With filters
Installed in DØ
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Noise Performance
Outstanding noise performanceTypical noise with bias
~1.7 ADC S/N ~ 18
Pedestal peak-to-peak difference
4-5 ADC counts – acceptable
Important for online readout occupancy i.e. deadtime. Typical chip threshold 3 * (~6 counts) above pedestal
pedestal total noise 10 diff. noise 10
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Performance - Charge Distributions
More one stripClusters than MC
Better simulation of charge
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Hit Finding Efficiency
Efficiency somewhat lower in data
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CDF Layer-00 (L00)
Single sided layer of Silicon
Radiation hard 50 micron readout strip
pitch Low Mass: 0.6%-1.0% X0
Mounted directly on Be beam-pipe
6 narrow (r=1.35 cm) and 6 wide (r=1.62 cm) φ segments12 sensors along z (94 cm)
2.3cm
4.2cm
Be Beam-pipe
Sensors
SVXII Inner bore
Cooling channels
300m installation clearance
72 Ladders / 108 chips
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CDF L00
cable1 cable2
Signal Cables
Narrow Sensors
Wide Sensors
Hybrids
Large coherent noise: Continuous pattern
across all strips on a sensor
Induced by silicon readout
Different event by event Coupling between cables
Not usable for trigger
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CDF L00
Read all the channels Do pedestal subtraction offline
Pedestal fit Event by event fit to find the
pedestal distribution Ignoring sharp peaks: real
clusters Effectively finds clusters
Makes a huge difference in B physics
without L00 with L00
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L0 Alignment
Pull of the hit residiuals Residual =
expected hit position – actual position
Default geometry based on the survey data from detector assembly
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Impact parameter resolution with L0
Impact parameter resolution with Layer 0 30 % improvement
Better for low Pt tracks
Magnet off data with cosmic muons
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CurrentsLayer 0 VI Curves
1.00E-08
1.00E-07
1.00E-06
0 100 200 300 400 500 600 700 800
Voltage
Cu
rren
t
Layer 0 currents have been rising slowly since turn-on• Initial currents were tiny < 100 nA/detector• Expected current rise due to radiation ~1.8 A• Jumps between stores in some detectors.These types of detectors are known to be sensitive to surface charge and operation in low humidity.Essentially identical to LHC sensors
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SMT StatusEnabled ~50 HDI (125 were disabled)Some previous problems reoccur
Typical failure modes: No download, chip
failures, DVDD trips, no readout, high leakage current
Reasons not fully understoodDetector is not accessiblePart of readout chain in collision hall
Connections Cables SVX2 Ageing?
Repair work during shutdown
1 J
an
, 20
06
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F-disk Noise “Grassy”
noise“Grassy” noise appeared after a several months of operationOnly p-side of fraction of the Micron sensor Looks like micro-discharge
Charge-up effect observed
300
200
100
20
10
0
Micron sensors Eurysis sensors
Beam on
Beam on
Beam off
Beam off
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Before Shutdown After Shutdown Comparison
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SMT Performance
p-side pulse-height (ADC)
for a MIP
S/N
(tota
l) r
ati
o
10
15
9p 9n 6p 6n 3
Heavy flavor tagging
Vertex resolution
(cm)
0.01
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Summary and Outlook
New Layer 0 for DØ silicon detector Installed in April 2006 and fully operational Error free readout Exceptional noise performance Very few bad channels Already see improvement in tracking of
charged particles at DØ
Pursuing broad physics program