3d componentpackaging at&s company in organicsubstrate ......presentation 3d componentpackaging...
TRANSCRIPT
www.ats.net Austria Technologie & Systemtechnik Aktiengesellschaft | Fabriksgasse13 | A-8700 Leoben Tel +43 (0) 3842 200-0 | Fax +43 (0) 3842 200-216 | E-mail [email protected]
www.ats.net
AT&S Company Presentation
3D Component Packagingin Organic Substrate
Embedded Component
Mark BeesleyIPC Apex 2012, San Diego
� Introduction
� Embedded Component Technology
� Process capability – feature size
� Application examples
� Highlights
ThemesThemesThemesThemes
3D Component Packaging in Organic Substrate | Mark Beesley, AT&S | IPC Apex, San Diego 2012
Why Embedded Component?
Embedded Component is an interconnect-basedsolution that drives Miniaturization; Mobility and
Sustainability
3D Component Packaging in Organic Substrate | Mark Beesley, AT&S | IPC Apex, San Diego 2012
WhatWhatWhatWhat isisisis EEEEmbedded mbedded mbedded mbedded ComponentComponentComponentComponent????
Embedding uses the space within a substrate foractive and passive components
Main providers of embedded component technology– Europe; Japan; Taiwan; Korea
3D Component Packaging in Organic Substrate | Mark Beesley, AT&S | IPC Apex, San Diego 2012
HERMESHERMESHERMESHERMES
Largest EU funded project focussed on INDUSTRIALISATION – AT&S consortiumleader; 11 partners – driving Embedded Component technology
Embedded Embedded Embedded Embedded ComponentComponentComponentComponent ---- PrinciplePrinciplePrinciplePrinciple benefitsbenefitsbenefitsbenefits
SmartphoneTablet
Medical
Automotive
Security applications
Sensor
Aerospace/space
Data Storage
3D Component Packaging in Organic Substrate | Mark Beesley, AT&S | IPC Apex, San Diego 2012
Wireless
ProductProductProductProduct familiesfamiliesfamiliesfamilies ---- Embedded Embedded Embedded Embedded ComponentComponentComponentComponent
6
SiBSystem in Board
_________________
SiPEmbedded
Component System in Package
_________________
MODULE technology
Embedded actives + passives + SMD
Mainboard technology
Embedded passives –resistors, capacitors, diodes, inductors …
3D Component Packaging in Organic Substrate | Mark Beesley, AT&S | IPC Apex, San Diego 2012
���� Relative Market Demand ����
� Introduction
� Embedded Component Technology
� Process capability – feature size
� Application examples
� Highlights
ThemesThemesThemesThemes
3D Component Packaging in Organic Substrate | Mark Beesley, AT&S | IPC Apex, San Diego 2012
Laser- Drillingof fiducials + overlay
Dielectric Printing
Assembly
Layup & Pressing
Desmearing
Laser Drilling
Component
Mechanical Drilling
Imaging
Copper plating
Stripping + Etching
Automatic Inspection
Metallization
Onward Processing – Organic Substrate
ComponentPre-process
ProcessProcessProcessProcess OverviewOverviewOverviewOverview
3D Component Packaging in Organic Substrate | Mark Beesley, AT&S | IPC Apex, San Diego 2012
Embedded uses the largest production format size of any packaging technique
Even with the advent of 18” super wafer and wafer level packaging concepts, panel packaging has a huge advantage
21” x 24” panel~ 504sqin
ECP Gen 2
18” x 24” panel~ 432sqin
ECP
18” wafer~ 254sqin
12” wafer~ 113sqin8” wafer
~ 50sqin
6” wafer~ 28sqin
Shown approximately to scale
8” strip~ 24sqin
Panel Panel Panel Panel sizesizesizesize
3D Component Packaging in Organic Substrate | Mark Beesley, AT&S | IPC Apex, San Diego 2012
Wafer-based embeddables
� Pad finish: Cu plating needed for contacting with microvias = existingprocess for WLP components
� Pad pitch: adaptation to organicsubstrate design rule through RDL
� Wafer thinning: 100-150µm
Embedded Embedded Embedded Embedded ComponentComponentComponentComponent requirementsrequirementsrequirementsrequirements
Passive discrete components
� Use of thin components with copperterminations
� Capacitors and resistors available
� Other discretes (inductors) also in development
� Component thickness 100µm – 220µm
� Case sizes 0201; 0402; above
3D Component Packaging in Organic Substrate | Mark Beesley, AT&S | IPC Apex, San Diego 2012
� 2µm primer-coated copper foil
� Low copper roughness RA < 1µm – high “etchability”
� High copper peel strength after multiple reflow cycle – supports fine-line fan out
� Easy handling - copper carrier
CopperCopperCopperCopper foilfoilfoilfoil
Image of continuous copper foil process line, source HERMES consortium
3D Component Packaging in Organic Substrate | Mark Beesley, AT&S | IPC Apex, San Diego 2012
DielectricDielectricDielectricDielectric printingprintingprintingprinting
Printing of controlled dielectric under embedded device
Key outcome – void-free, feature size, shape and volume
� Novel 3D scanner for large panels
� Determines the thickness and uniformity of the dielectric
Dielectric screen printing using optically alignedequipment in cleanroom environment
3D Component Packaging in Organic Substrate | Mark Beesley, AT&S | IPC Apex, San Diego 2012
ComponentComponentComponentComponent alignmentalignmentalignmentalignment
Optical alignment of copper plated component
� High resolution camera
� Pattern recognition of pad design
Design
� Pad diameter: 150µm
� Pitch: 175µm
� Chip size: 7 x 7 mm
3D Component Packaging in Organic Substrate | Mark Beesley, AT&S | IPC Apex, San Diego 2012
ComponentComponentComponentComponent AssemblyAssemblyAssemblyAssembly
Screenshot showing multiple embeddeddevice types in one layer
� High speed component placement equipment
� Large production formats
� Fully flexible equipment
� Accuracy c.a. 10µm true position placement
� Ability to integrate different component types in one package
3D Component Packaging in Organic Substrate | Mark Beesley, AT&S | IPC Apex, San Diego 2012
CopperCopperCopperCopper PlatingPlatingPlatingPlating
Semi-additive technology – single board processing
� Control of parameters for each panel
� Handling of thin panels
� Unique flow system
� Pulse plating for via filling
� Full traceability of process data
� Single piece flow for improved
� Flexibility
� Risk management
3D Component Packaging in Organic Substrate | Mark Beesley, AT&S | IPC Apex, San Diego 2012
1) 0402 resistor, capacitor2) 0402 resistor3) Active component4) 0402 resistor
1
2 3
4
What it looks like … #1What it looks like … #1What it looks like … #1What it looks like … #1
3D Component Packaging in Organic Substrate | Mark Beesley, AT&S | IPC Apex, San Diego 2012
What it looks like … #2What it looks like … #2What it looks like … #2What it looks like … #2
3D Component Packaging in Organic Substrate | Mark Beesley, AT&S | IPC Apex, San Diego 2012
Minimum SYSTEM footprintthrough 3D STACKING
Embedded SiP/SiB
WhatWhatWhatWhat itititit lookslookslookslooks likelikelikelike … #3… #3… #3… #3
3D Component Packaging in Organic Substrate | Mark Beesley, AT&S | IPC Apex, San Diego 2012
� Introduction
� Embedded Component Technology
� Process capability – feature size
� Application examples
� Highlights
ThemesThemesThemesThemes
3D Component Packaging in Organic Substrate | Mark Beesley, AT&S | IPC Apex, San Diego 2012
Design Design Design Design RuleRuleRuleRule evolutionevolutionevolutionevolution
Design Rule When Volume Line / space(µm)
Componentpad (µm)
Minimumpitch (µm)
Comp toComp(µm)
ECP® Corethicknessover Cu
(µm)
V1 NOWSeries 50 / 50 200 250 200 250
Proto 25 / 25 150 175 200 200
V2 IndustrialisationSeries 25 / 25 150 175 200 200
Proto 20 / 20 130 150 200 160
V2.1 DevelopmentSeries 20 / 20 130 150 100 160
Proto 15 / 15 110 125 100 130
V3 ResearchSeries 15 / 15 110 125 100 130
Proto 10 / 10 90 100 100 100
V4 ResearchSeries 10 / 10 90 100 100 100
Proto < 10 / 10 < 75 < 85 < 75 < 75
3D Component Packaging in Organic Substrate | Mark Beesley, AT&S | IPC Apex, San Diego 2012
As complexity evolves – yield must be maintained at close to 100% due to device impact on cost of scrap
� Introduction
� Embedded Component Technology
� Process capability – feature size
� Application examples
� Highlights
ThemesThemesThemesThemes
3D Component Packaging in Organic Substrate | Mark Beesley, AT&S | IPC Apex, San Diego 2012
Embedded RFID
Chip: 400µm □
Via: 50µm Ø
ValueValueValueValue addedaddedaddedadded = System in Board= System in Board= System in Board= System in Board
3D Component Packaging in Organic Substrate | Mark Beesley, AT&S | IPC Apex, San Diego 2012
Multiple devices can beembedded in a PCB
Passive devices can be assembled on an inner layer in the PCB ….
Results ����
� High performance – short, low resistance copper connections
� Smallest PCB form factor – integrated design
� Secure against reverse engineering
� Integrated RFID - a “trace-able” PCB – from first process to “in the field”
� Industrial application
� 4 embedded MOSFETs with double side interconnection
� Logic devices and passives mounted on top
� 50µm dielectric thickness− Reduction of thermal resistance
− High breakdown voltage
− 50% footprint reduction
1000µm
Industrial Power ModuleIndustrial Power ModuleIndustrial Power ModuleIndustrial Power Module
3D Component Packaging in Organic Substrate | Mark Beesley, AT&S | IPC Apex, San Diego 2012
� High end automotive application
� Embedded processor - 416 I/O
� Stacked copper filled via
� 25µm line/space on all layers
� Active and passive SMDs
� 3D routing from front to back
EngineEngineEngineEngine ControlControlControlControl ModuleModuleModuleModule
Fanout over embedded processor usingorganic substrate redistribution
3D Component Packaging in Organic Substrate | Mark Beesley, AT&S | IPC Apex, San Diego 2012
DigitalDigitalDigitalDigital AmplifierAmplifierAmplifierAmplifier
� Parasitics affecting battery life and audio quality due to long wire-bond connections
� Solution = Embed digital audio amplifier -eliminate wire-bonding
� Maximum output power: 50 W
� 4 layer construction
� Prototype level
� Device pad pitch = 100µm (no RDL)
3D Component Packaging in Organic Substrate | Mark Beesley, AT&S | IPC Apex, San Diego 2012
Application Package Size
X,Y Reduction
Package concept
Embedded Component advantage
Voltage Convertor 7mm2 40%Smallest footprint 600mA DC DCconvertor on the Market
Charge Management 20mm2 40%Stacked silicon package for advancedLi-ion battery charge management
Media module 20mm2 30%Integrated module – discrete passivesstacked on eWLP
Silicon microphone 5mm2 > 50%Superior performance MEMS withsmallest form factor
Mobile TV 20mm2 50%Single device solution for mobile TV tuner
Identification 60mm2 New feature Integrated biometric sensing
Position sensor 60mm2 50%High accuracy Hall effect sensor –advanced micro joystick application
Wireless module 20mm2 40%Stacked package for smallest footprintsolution
RampingRampingRampingRamping Smartphone Smartphone Smartphone Smartphone ApplicationsApplicationsApplicationsApplications
3D Component Packaging in Organic Substrate | Mark Beesley, AT&S | IPC Apex, San Diego 2012
� Introduction
� Embedded Component Technology
� Process capability – feature size
� Application examples
� Highlights
ThemesThemesThemesThemes
3D Component Packaging in Organic Substrate | Mark Beesley, AT&S | IPC Apex, San Diego 2012
� Embedded component (can) dramatically reduce Package and PCB form factor – attractive to smartphone; tablet; medical; mobile device segments
� Other technology benefits include performance upgrade; reliability; integrated (modular) product --- further Market ramps expected
� The technology is thrusting in to commercialisation due to capacityavailability AND leverage of existing technologies (WLP; SMT; etc)
� Design automation is available from the mainstream providers
� Supply chain is not optimised – but big strides are being made and initialproducts launched because benefits outweigh disadvantages …
� For sure a technology to watch in 2012!
HighlightsHighlightsHighlightsHighlights
3D Component Packaging in Organic Substrate | Mark Beesley, AT&S | IPC Apex, San Diego 2012
www.ats.net Austria Technologie & Systemtechnik Aktiengesellschaft | Fabriksgasse13 | A-8700 Leoben Tel +43 (0) 3842 200-0 | Fax +43 (0) 3842 200-216 | E-mail [email protected]
www.ats.net
AT&S Company Presentation
Thank you for your attention!
Mark Beesley - COO Advanced Packaging, AT&S
3D Laminate Component Packaging
@ATS_ECP
e-mail [email protected]
cell +43 676 8955 5669
web ecp.ats.net