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3D IC and Packaging – Key for System Integration Dr. Li Li Cisco Systems, Inc.

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Page 1: 3D IC and Packaging – Key for System · PDF fileTechnology Node Scaling Recently announced 7nm test chip ... 2.5” SSD • Scaling for the next ... memory components through 3D

3D IC and Packaging – Key for System Integration

Dr. Li Li Cisco Systems, Inc.

Page 2: 3D IC and Packaging – Key for System · PDF fileTechnology Node Scaling Recently announced 7nm test chip ... 2.5” SSD • Scaling for the next ... memory components through 3D

SiP Global Summit 2015 – 3D IC Technology Forum, L. Li 2

Outline

• 50 Years Success of Moore’s Law • Evolution of Internet • The Promise of Internet of Everything (IoE) • Technology Challenges and Potential Solutions

– System Requirements and Key Drivers – Component Technology Innovation – Emerging IC Packaging Technology Platforms

• Summary

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SiP Global Summit 2015 – 3D IC Technology Forum, L. Li 3

50 Years of Moore's Law

In  1965,  Gordon  Moore  made  a  predic4on  that  would  set  the  pace  for  digital  revolu-on.  From  careful  observa4on  of  an  emerging  trend,  Moore  extrapolated  that  compu4ng  would  drama4cally  increase  in  power,  and  decrease  in  rela4ve  cost,  at  an  exponen4al  pace.  

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SiP Global Summit 2015 – 3D IC Technology Forum, L. Li 4

Evolution of Internet

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SiP Global Summit 2015 – 3D IC Technology Forum, L. Li 5

Internet Historical Perspective

Stage 1 DARPA Experiment, operation

Stage 2 Enterprise Internets, R&A scaling

Stage 3 Universality

Internet Hosts

1992-Internet Society created

1986-NSFNet created

1984-DNS created, DARPA divests Internet

Jan 1983-ARPANet adopts TCP/IP, CSNet created, first real Internet begins

1989-first public commercial Internets created

1981-Bitnet created

1995-NSFNet ceases, non-USA nets >50%

l  Kahn poses Internet challenge 2Q 73 l  Cerf-Kahn sketch gateway and TCP in

2Q 1973 l  Cerf-Kahn paper published May 1974 l  Cerf team full spec - Dec 1974

ARPANet

1990-ARPANet ceases

1

10

100

1,000

10,000

100,000

1,000,000

10,000,000

100,000,000

1968 1973 1979 1984 1990 1995 2001

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SiP Global Summit 2015 – 3D IC Technology Forum, L. Li 6

Cisco VNI Forecast, 2014 – 2019

www.cisco.com/go/vni

The world’s population, number of households, and workforce are growing moderately, but the rate of connectivity is growing faster

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SiP Global Summit 2015 – 3D IC Technology Forum, L. Li 7

Global IP Traffic to Nearly Triple

Source: Cisco VNI Global Traffic Forecast, 2014 - 2019

Exa

byte

s pe

r Mon

th

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SiP Global Summit 2015 – 3D IC Technology Forum, L. Li 8

Global Devices and Connections Growth

Bill

ions

of D

evic

es

Source: Cisco VNI Global Traffic Forecast, 2014 - 2019

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SiP Global Summit 2015 – 3D IC Technology Forum, L. Li 9

Metcalfe’s Law – The Magic of Interconnections

“the value of a network grows as the square of the number of users”

Bob Metcalfe

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SiP Global Summit 2015 – 3D IC Technology Forum, L. Li 10

Evolution of Internet – Business Perspective

Intelligent Connections

Bus

ines

s an

d S

ocia

l Im

pact

Connectivity

Networked Economy

Immersive Experience

Internet of Everything

50B Devices by

2020

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SiP Global Summit 2015 – 3D IC Technology Forum, L. Li 11

Internet of Everything: Key Drivers

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SiP Global Summit 2015 – 3D IC Technology Forum, L. Li 12

System Applications Requirements

Performance (MOPS, Gbps)

Pow

er /

Ener

gy /

Cos

t (W

, j, $

)

Networking: faster data planes and control plane architectures, heat dissipation constrained Cloud Computing: SW defined datacenters leading to a larger memory footprint and shallow/flat storage hierarchy HPC/Big Data: real time analytics with in-memory computing

IoT: cost trade-off, ultra-low power, unique form factors, energy scavenger Mobility: low power, smaller form factors and memory & storage density, battery constrained

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SiP Global Summit 2015 – 3D IC Technology Forum, L. Li 13

Will silicon technology node scaling get us to the promise of Internet of Everything (IoE)?

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SiP Global Summit 2015 – 3D IC Technology Forum, L. Li 14

Technology Node Scaling

Recently announced 7nm test chip produced by IBM Research Alliance

However, economics will likely be the key challenges to continued technology node scaling.

Cost per transistor may start to rise

Source: IBM, Broadcom

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SiP Global Summit 2015 – 3D IC Technology Forum, L. Li 15

Faith No Moore

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SiP Global Summit 2015 – 3D IC Technology Forum, L. Li 16

Drive Technology Innovation

More Bits per Watt: Computing Architecture: Compute-centric to Data-centric Component Technology: Storage Class & Emerging Memory (EM) Packaging: In-package Memory (reduce off-package BW & power)

Performance (MOPS, Gbps)

Pow

er /

Ener

gy /

Cos

t (W

, j, $

)

Power = Energy/Op * Ops/sec

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SiP Global Summit 2015 – 3D IC Technology Forum, L. Li 17

Emerging Memory (EM) Technologies

3D XPoint NVM (July 2015)

Source: Micron

Floating Gate 3D NAND (March 2015)

•  1st new memory technology in 25+ years •  1000X faster than NAND •  1000X endurance of NAND •  10X denser than conventional memory

•  3X high capacity than existing NAND technologies

•  Enables >10TB in a standard 2.5” SSD

•  Scaling for the next decade

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SiP Global Summit 2015 – 3D IC Technology Forum, L. Li 18

Future Memory Technologies

Resistive Memory Spin Torque Memory

Source: Micron, IMEC

•  Potential long-term DRAM replacement •  Early application as a high-speed cache •  Based on electron spin at atomic level

•  Flash replacement beyond 10nm •  NVM •  High-speed, low power, CMOS

compatible

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SiP Global Summit 2015 – 3D IC Technology Forum, L. Li 19

Emerging Memory Bench Marking

DRAM

NAND

STT-RAM

3D XPoint

•  STT-RAM has the best combination of low latency and high endurance as potential long-term DRAM replacement

•  3D Xpoint targeted for “Storage Class Memory”

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SiP Global Summit 2015 – 3D IC Technology Forum, L. Li 20

High Performance DRAM Technology

Wide I/O Low Power Serial I/O

Higher Power

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SiP Global Summit 2015 – 3D IC Technology Forum, L. Li 21

FC-MCP Si Interposer Embedded Si Interposer

Organic Interposer

3D IC

Dielectric Properties

Good Lossy Lossy Good Lossy

Feature Dimensions

Down to ~ 10um L/S

BEOL interconnects

BEOL interconnects

Down to ~ 5um L/S

BEOL interconnects

CTE Mismatch

Mod. High

Excellent

Mod. High Mod. High Excellent

Cost Moderate Moderate TBD Moderate High

Availability / Supply Chain

Available Available

Development Development Development

From Substrate Based to Wafer Level System Integration

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SiP Global Summit 2015 – 3D IC Technology Forum, L. Li 22

Summary • Realization of the promise of Internet of

Everything relies on next generations of computing, networking and storage systems.

• Silicon performance advancement alone may not get us there as (2D) technology node scaling is becoming more costly.

• New computing architectures, emerging memory components through 3D /volume scaling and 3D IC packaging technologies will be key in future system enablement.