3d-staf: scalable temperature and leakage aware floorplanning for three-dimensional integrated...

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3D-STAF: Scalable Temperature and Leakage Aware Floorplanning for Three-Dimensional Integrated Circuits Pingqiang Zhou, Yuchun Ma, Zhouyuan Li, Robert P. Dick, Li Shang, Hai Zhou, Xianlong Hong, Qiang Zhou CS Department, Tsinghua University, Beijing., etc. ICCAD 2007

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3D-STAF: Scalable Temperature and Leakage Aware Floorplanning for Three-Dimensional

Integrated Circuits

Pingqiang Zhou, Yuchun Ma, Zhouyuan Li, Robert P. Dick, Li Shang, Hai Zhou,

Xianlong Hong, Qiang ZhouCS Department, Tsinghua University, Beijing.,etc.

ICCAD 2007

Outline

Introduction Previous Works Algorithm Experimental Results Conclusions

Three-dimensional integration

Stack silicon dies connected through inter-die vias

Can be used to decrease wire delay, increase integration density, improve performance, and reduce power consumption

But, thermal effects become a problem

Challenges of 3D IC Floorplanning

Design space explosion The solution space of 3D floorplanning increases

by nL-1/(L-1)! times compared to the 2D cases Multi-objective optimization

Minimization of temperature complicates the optimization of area, wirelength, leakage power

Temperature-leakage dependency Subthreshold leakage increases superlinearly wit

h temperature

Previous Works

SA based stochastic optimization techniques Capable of handling heterogeneous blocks Long runtimes that scale poorly with problem size

Force-directed temperature-aware standard-cell placement Simultaneous temperature feedback to blocks Scalable performance NOT capable of handling heterogeneous blocks

Traditional Algorithm Flow

Optimize peak temperature, area, wirelength, and via count

Small local changes may cause significant changes to the global solution

Adaptive Three-Stage Flow

Force-Directed Techniques

Assume each layer and each block has the same thickness D

Blocks connected by virtual springs

cij is the weight of the connection Combine the cij coefficients in to a global stiff

ness matrix C Solve the three systems of equations to obtai

n the coordinate of each block

The Forces

Filling Force: fxF, fy

F, fzF

To eliminate overlap between blocks and distribute them evenly

The Filling Force of each bin is equal to its bin density A block receives a Filling Force equal to the sum of the pro

rated Filling Forces of the bins the cell covers

Thermal Force: fxT, fy

T, fzT

To move blocks which produce heat away from regions of high temperature

Using the thermal gradient to determine directions and magnitudes of the Thermal Forces on blocks Extract power density information into thermal analyzer

Aggregate Forces

αx,y,z: influence the amount of block displacement per iteration resulting

βx,y,z: adjust the percentages between Filling Force and Thermal Force

These parameters are experimentally determined, but are general

Adaptive Three-Stage Flow

2D Temperature-Aware Lateral Spreading

Traditionally, the initial optimization is influenced primarily by overlap instead of thermal effects Some cool blocks with large areas to be pushed n

ear the heatsink Benefits of the initial 2D lateral spreading

Evenly distribute lateral power density Overlaps are controlled to support subsequent 3D

optimization

Adaptive Three-Stage Flow

Global Optimization in Continuous 3D Space

Allow arbitrary motion in continuous 3D space

Compute power density distribution for each layer to obtain thermal gradient Stochastic mapping of blocks to layer

Thermal Analysis and Continuous 3D Force-Directed Phase

Use stochastic layer assignment results for thermal analysis The positions are only temporarily discretized

Repeat force-directed move

Adaptive Three-Stage Flow

Layer Assignment

Assign an area budget to each layer Start from the layer closest to the heatsink

Attempt to assign blocks as low as possible

Attempt to honor via count constraint Avoid assignments to layers violating area budget Choose one of three nearest layers with minimal ov

erlap with previously-assigned blocks

Optimization with Layer Assignment

In this stage, every block is assigned to one layer according to the current placement

The thermal model can be used to compute temperature gradients and Thermal Force

The changes in positions caused by layer assignment lead the subsequent force-directed iterations to adjust the placement

The optimization process ultimately converges to the final multi-layer floorplan

Adaptive Three-Stage Flow

Legalization

After force-directed iterations cease, residual overlaps remain

Use topological relations between overlapping blocks to minimize displacement Similar to [20]

Permit block rotation

Experimental Results

Effects of Optimization Stages

Comparison with CBA

CBA [12] “A Thermal-driven floorplanning algorithm for

3D ICs” Temperature-aware 3D floorplanning Handled heterogeneous blocks Simulated annealing based

Power Distribution

Power distribution during each optimization stage for n100

Leakage Power Consumption Analysis

Higher temperatures increase leakage power, which in turn further increases temperature

Impact of Leakage Power-Temperature Feedback Loop

3D-STAF: the interdependence of temperature and leakage are neglected Temp: the peak temperature estimated when the

dependence of leakage on temperature is ignored Temp (feedback): the feedback loop is considered

3D-STAF-TDLP: the interdependence is considered

Conclusions

They modified the traditional forced-directed technique flow, to smooth the transition from a 3D placement to a layer-assigned floorplan

The closed feedback loop between temperature and leakage power consumption is modeled

Less run time, compare with precious works