3rd generation intel core™ i7 seminar report

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CARMEL POLYTECHNIC COLLEGE PUNNAPRA DEPARTMENT OF COMPUTER ENGINEERING SEMINAR REPORT 2012 INTEL CORE i7 FIFTH SEMESTER COMPUTER ENGINEERING SUBMITTED BY:

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3rd generation Intel® Core™ i7

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Page 1: 3rd Generation Intel Core™ i7 Seminar Report

CARMEL POLYTECHNIC COLLEGE

PUNNAPRA

DEPARTMENT OF COMPUTER ENGINEERING

SEMINAR REPORT

2012

INTEL CORE i7

FIFTH SEMESTER COMPUTER ENGINEERING

SUBMITTED BY:

HARILAL .B

ROLLNO: 16

REGNO: 10130084

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CARMEL POLYTECHNIC COLLEGE

PUNNAPRA

DEPARTMENTCOMPUTERENGINEERING

CERTIFICATE

This is to certify that the seminar report entitled INTEL CORE i7 presented by HARILAL.B of fifth semester diploma in Computer Engineering, Carmel Polytechnic College, Punnapra, Alappuzha in partially fulfilment of the requirement for the award of Diploma in Computer Engineering under the Board of Technical Education, during the year 2012 – 2013.

Lecture in Charge Head of Section

Internal Examiner External Examiner

Carmel Polytechnic College Department Of Computer Engineering

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ACKNOWLEDGEMENT

  

I hereby gladly this report on INTEL CORE i7 as the partial fulfilment of the award of diploma in computer Engineering.

At the submission of this report I use this opportunity to say thanks to Fr.Cyriac Kurian C.M.I, Principal of CARMEL POLYTECHNIC COLLEGE and Sri.K.B Venkitachalam Iyer, Co-ordinator of Self-Financing scheme and our Head of Section Sri.M.G Sreenivasa Paniker for providing a healthy environment as well as other facilities. I would like to thank all my teachers for their Support and also thank to my friends for their kind listening. Above all I humbly express my thanks to god almighty for his blessings and helps to overcome all difficulties on the way of presenting my seminar.

TABLE CONTENTS

Carmel Polytechnic College Department Of Computer Engineering

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SLNO TITLE PAGE

1 INTODUCTION 4

2 HISTORY 5

3 USES 8

4 TYPES 10

5 INSTALLING AND CLOAKING 15

6 DETECTION 16

7 REMOVAL 20

8 PUBLIC AVALIABILITY 21

9 DEFENCES 22

Carmel Polytechnic College Department Of Computer Engineering

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1.INTRODUCTION

Intel Corporation introduced its most advanced desktop processor ever, the Intel Core i7 processor. The Core i7 processor is the first member of a new family of Nehalem processor designs and is the most sophisticated ever built, with new technologies that boost performance on demand and maximize data throughput. The Core i7 processor speeds video editing, immersive games and other popular Internet and computer activities by up to 40 percent without increasing power consumption. Broadly heralded by the computing industry as a technical marvel, the Intel Core i7 processor holds a new world record of 117 for the SPECint_base_rate2006 benchmark test that measures the performance of a processor. This is the first time ever for any single processor to exceed a score of 100 points.

Core i7 quad -core processor delivers 8-threaded performance .The Intel Core i7 processor also offers unrivaled performance for immersive 3-D games - over 40 percent faster than previous Intel high-performance processors on both the 3DMark Vantage CPU physics and AI tests, popular industry computer benchmarks that measure gaming performance. The Extreme Edition uses 8 threads to run games with advanced artificial intelligence and physics to make games act and feel real. The Intel Core i7 processors and Intel X58 Express Chipset-based Intel® Desktop Board DX58SO Extreme .Series are for sale immediately from several computer manufacturers online and in retail stores, as well as a boxed retail product via channel online sales. The Core i7 processor is the first member of the Intel Nehalem micro architecture family; server and mobile product versions will be in production later. Each Core i7 processor features an 8 MB level 3 cache and three channels of DDR3 1066 memory to deliver the best memory performance of any desktop platform. Intel's top performance processor, the Intel Core i7 Extreme Edition, also removes over speed protection ,allowing Intel's knowledgeable customers or hobbyists to further increase the chip's speed

Carmel Polytechnic College Department Of Computer Engineering

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2.MOORE’S LAW

Moore's law describes a long-term trend in the history of computing hardware. Since the invention of the integrated circuit in 1958, the number of transistors that can be placed inexpensively on an integrated circuit has increased exponentially, doubling approximately every two years. The trend was first observed by Intel co-founder Gordon E. Moore in a 1965 paper. It has continued for almost half a century and in 2005 was not expected to stop for another decade at least.

Almost every measure of the capabilities of digital electronic devices is strongly linked to Moore's law: processing speed, memory capacity, sensors and even the number and size of pixels in digital cameras. All of these are improving at (roughly) exponential rates as well. This has dramatically increased the usefulness of digital electronics in nearly every segment of the world economy. Moore's law describes this driving force of technological and social change in the late 20th and early 21st centuries.

Ultimate limits of the law

Gordon Moore stated in an interview that the law cannot be sustained indefinitely: "It can't continue forever. The nature of exponentials is that you push them out and eventually disaster happens." He also noted that transistors would eventually reach the limits of miniaturization at atomic levels:

Carmel Polytechnic College Department Of Computer Engineering

Page 7: 3rd Generation Intel Core™ i7 Seminar Report

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Ivy Bridge Microarchitecture

Ivy Bridge is the codename for Intel's 22 nm die shrink of the Sandy Bridge microarchitecture based on tri-gate ("3D") transistors. Ivy Bridge processors will be backwards-compatible with the Sandy Bridge platform, but might require a firmware update (vendor specific).Intel has released new 7-series Panther Point chipsets with integrated USB 3.0 to complement Ivy Bridge. Intel announced that volume production of Ivy Bridge chips began in the third quarter of 2011. Quad-core and dual-core-mobile models launched on April 29, 2012 and May 31, 2012 respectively.[4] Meanwhile, Core i3 desktop processors are said to arrive in the third quarter of 2012.

Ivy Bridge's temperatures are reportedly 20°C higher compared to Sandy Bridge when overclocked, even at default voltage setting. Impress PC Watch (Japanese) has performed experiments which suggest that this is because Intel used a poor quality (and perhaps lower cost) thermal interface material (thermal paste, or "TIM") between the chip and the heat spreader, instead of the fluxless solder of previous generations.The mobile Ivy Bridge processors are not affected by this issue because they do not use a heat spreader between the chip and cooling system.

Enthusiast reports describe the TIM used by Intel as "not up to scratch" for a "premium" CPU, with some speculation that this is by design to allow a longer shelf life for sales of prior processors.Further analyses caution that the processor can be damaged or void its warranty if home users attempt to remedy the matter. TIM has much lower thermal conductivity, causing heat to trap on the die. Experiments replacing this with a higher quality

Carmel Polytechnic College Department Of Computer Engineering

Page 8: 3rd Generation Intel Core™ i7 Seminar Report

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TIM or other heat removal methods showed a substantial improvement to the voltages and clocking sustainable by Ivy Bridge chips.

Intel claims that the smaller die of Ivy Bridge and the related increase in thermal density is expected to result in higher temperatures when the CPU is overclocked; Intel also stated that this is as expected and will likely not improve in future revisions

Tri-gate (3D) transistors

Tri-gate or 3-D Transistor fabrication is used by Intel Corporation for the nonplanar transistor architecture used in Ivy Bridge processors. These transistors employ a single gate stacked on top of two vertical gates allowing for essentially three times the surface area for electrons to travel. Intel reports that their tri-gate transistors reduce leakage and consume far less power than current transistors. This allows up to 37% higher speed, or a power consumption at under 50% of the previous type of transistors used by Intel.

Intel explains, "The additional control enables as much transistor current flowing as possible when the transistor is in the 'on' state (for performance), and as close to zero as possible when it is in the 'off' state (to minimize power), and enables the transistor to switch very quickly between the two states (again, for performance)."[16] Intel has stated that all products after Sandy Bridge will be based upon this 3D design.

Carmel Polytechnic College Department Of Computer Engineering

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Basic Features of Ivy Bridge architecture

Ivy Bridge feature improvements over Sandy Bridge include:

Tri-gate transistor ("3-D") technology (up to 50% less power consumption at the same performance level as 2-D planar transistors).

PCI Express 3.0 support. Max CPU multiplier of 63 (57 for Sandy Bridge). RAM support up to 2800 MT/s in 200 MHz increments. The built-in GPU will have 6 or 16 execution units (EUs), compared to Sandy Bridge's 6 or

12. Intel HD Graphics with DirectX 11, OpenGL 3.1, and OpenCL 1.1 support. OpenGL 4.0 is

supported with 9.17.10.2792 WHQL drivers[and later drivers. A new random number generator and the RdRand instruction, codenamed Bull Mountain. DDR3L and Configurable TDP for mobile processors. Multiple 4K video playback Intel Quick Sync Video . Last level cache (L3) is still shared via a ring bus between all cores Quad-core Ivy Bridge CPUs will support up to 8MB of L3 cache The private L1/L2s haven't increased from their sizes in Sandy Bridge The memory controller also remains relatively unchanged, aside from some additional

flexibility CPU / Graphics Overclocking -

Increased max ratio support (ratio 57 => 63) - Dynamic overclocking: Allows ratio change without a reboot

DDR Overclocking: - Support for up to 2800 MT/s (up from 2133) - Finer grain steps in adjusting frequency

- Added 200 MHz

Carmel Polytechnic College Department Of Computer Engineering

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Specification (Core™ i7-3960X Processor Extreme Edition)

Status Launched

Processor Number i7-3960X

# of Cores 6

# of Threads 12

Clock Speed 3.3 GHz

Max Turbo Frequency 3.9 GHz

Instruction Set 64-bit

Lithography 32nm

Max TDP 130 W

VID Voltage Range 0.6V-1.35V

Max Memory Size 64 GB

Memory Types DDR3-1066/1333/1600

# of Memory Channels 4

Intel® Turbo Boost Technology 2.0

Carmel Polytechnic College Department Of Computer Engineering

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b) Advanced Technologies

Intel® Virtualization Technology

Execute Disable Bit

Enhanced Intel® Speed step Technology

Enhanced Halt State (C1E)

Intel® 64 AES Technology

Intel® Demand Based Switching

Intel® Turbo Boost Technology

Intel® Hyper-Threading Technology

Intel® Virtualization Technology for Directed I/O

Carmel Polytechnic College Department Of Computer Engineering

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Quick Path

QuickPath allows processors to take shortcuts when they ask other processors for information. Imagine a quad-core microprocessor with processors A, B, C and D. There are links between each processor. In older architectures, if processor A needed information from D, it would send a request. D would then send a request to processors B and C to make sure D had the most recent instance of that data. B and C would send the results to D, which would then be able to send information back to A. Each round of messages is called a hop -- this example had four hops.

QuickPath skips one of these steps. Processor A would send its initial request -- called a "snoop" -- to B, C and D, with D designated as the respondent. Processors B and C would send data to D. D would then send the result to A. This method skips one round of messages, so there are only three hops. like a small improvement, but over billions of calculations it makes a big difference.

In addition, if one of the other processors had the information A requests, it can send the data directly to A. That reduces the hops to 2. QuickPath also packs information in more compact payloads.

Carmel Polytechnic College Department Of Computer Engineering

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Hyper Threading

Hyper-threading is Intel's term for its simultaneous multithreading implementation in their Pentium 4, Atom, and Core i7 CPUs. Hyper-threading (officially termed Hyper-Threading Technology or HTT) is an Intel-proprietary technology used to improve parallelization of computations (doing multiple tasks at once) performed on PC microprocessors. A processor with hyper-threading enabled is treated by the operating system as two processors instead of one. This means that only one processor is physically present but the operating system sees two virtual processors, and shares the workload between them. Hyper-threading requires only that the operating system support multiple processors, but Intel recommends disabling HT when using operating systems that have not been optimized for the technology.

Performance

The advantages of hyper-threading are listed as: improved support for multi-threaded code, allowing multiple threads to run simultaneously, improved reaction and response time.According to Intel the first implementation only used 5% more die area than the comparable non-hyperthreaded processor, but the performance was 15–30% better.

Intel turbo boost technology

Carmel Polytechnic College Department Of Computer Engineering

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Intel® Turbo Boost Technology1 provides even more performance when needed on 3rd generation Intel® Core™ processor–based systems. Intel® Turbo Boost Technology 2.0 automatically allows processor cores to run faster than the base operating frequency if they’re operating below power, current, and temperature specification limits.

Dynamically increasing performance

Intel Turbo Boost Technology 2.0 is activated when the Operating System (OS) requests the highest processor performance state (P0).

The maximum frequency of Intel Turbo Boost Technology 2.0 is dependent on the number of active cores. The amount of time the processor spends in the Intel Turbo Boost Technology 2.0 state depends on the workload and operating environment.

Any of the following can set the upper limit of Intel Turbo Boost Technology 2.0 on a given workload:

Number of active cores Estimated current consumption Estimated power consumption Processor temperature

When the processor is operating below these limits and the user's workload demands additional performance, the processor frequency will dynamically increase until the upper limit of frequency is reached. Intel Turbo Boost Technology 2.0 has multiple algorithms operating in parallel to manage current, power, and temperature to maximize performance and energy efficiency. Note: Intel Turbo Boost Technology 2.0 allows the processor to operate at a power level that is higher than its rated upper power limit (TDP) for short durations to maximize performance.

Intel® Virtualization Technology

Carmel Polytechnic College Department Of Computer Engineering

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Carmel Polytechnic College Department Of Computer Engineering

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Intel trusted execution technology.

Carmel Polytechnic College Department Of Computer Engineering

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Carmel Polytechnic College Department Of Computer Engineering