43

Abstract—Design, implementation and testing of a Low Noise

Amplifier (LNA) for a PMR446 radio receiver is described in this paper. The main features of the LNA are gain 16-17 dB, noise figure < 2 dB and IIP3 > 0 dBm. Small size, low component count, and good manufacturability are also required.

Index Terms—446 MHz, amplifier, LNA, PMR, receiver.

I. INTRODUCTION N a typical radio receiver there is a low noise amplifier as a first active part in the receiver chain. The purpose of the

LNA is to amplify incoming signal but in more remarkably doing it by keeping excess noise as low as possible. The reason is that the first stage in a cascade system is the main contributor to the noise figure of the whole system. Mathematically this can be seen from the Friis equation

12121

3

1

21 ...

1...11

−

−++−+−+=n

neq GGG

FGG

FG

FFF

where Feq = equivalent noise factor of the systen Fj = noise factor of the j:th stage Gj = gain of the j:th stage n = number of stages

It can also be seen that good gain is very important in order to suppress the next stage’s noise contribution.

Electrical requirements for the PMR446 low noise amplifier

are shown in Table I. They are quite feasible rather than stringent. T. Saari and M. Ritamäki are with the Nokia Corporation, FIN-33721, Tampere, Finland. email: timo.j.saari@nokia.com / mika.ritamaki@nokia.com

In addition to the ele

objectives are the size of tand good manufacturability.are either to use small-sizeSimple circuit topology decost.

II.

A. Component and topoloCircuit diagram of the L

common emitter topology wlow noise amplifiers. Othestudied.

R1

12p

R2

150p

C3

27k

1

L1

390R

C1

22n

BFR520

V1in

Fig. 1. Circuit diagram of the 446 M

446 MHz Low Noise Amplifier for a PMR446 Receiver

Timo Saari and Mika Ritamäki

I

T ELECTRICAL RE

min Center frequency 1 dB bandwidth ±5 Gain 16 Noise figure Return loss 10 IIP3 0 Current consuption

ABLE I QUIREMENTS OF THE LNA

nom max 446 MHz

MHz 17 dB 2 dB dB dBm 15 mA

ctrical specifications the other he design, component count, cost Nowadays, the obvious solutions SMD components or IC design. crease the component count and

DESIGN

gy selection NA is shown in Figure 1. Simple as selected, that is often used in

r topologies were not extensively

Vcc

C4

L2

C5

R3

n5

L3

22n 150p

100R

4n7

6p8

+5V

C610u

16V

C2

out

Hz low noise amplifier.

TAMPEREEN TEKNILLINEN YLIOPISTO ELEKTRONIIKAN LAITOS

44

Component selection started from the transistor. An NPN-type BJT-transistor with a low noise figure was searched. Two transistors, BFR93A and BFR520, were selected for simulat-ions. The first one is more inexpensive, while the latter has better noise figure. After simulations, BFR520 was selected, because the required performance was not achieved with BFR93A.

Resistors R1 and R3 are used for DC-biasing. Capacitors C3 and C4 provide ground at radio frequencies. Input matching is arranged with L1, L2 and C1. C2 and L3 are used for output matching. In addition, C1 and C2 work also as DC-block capacitors. Stability of the circuit is achieved with R2 and L2. C5 and C6 are for supply voltage filtering.

B. Simulation Aplac 7.90 was used in simulations. At the first phase,

gain, noise figure and impedance matching were simulated, and component values giving satisfactory results were searched. Also the effects of some minor topology changes were examined. After that, stability, compression and IIP3 were also checked. In the last phase, practical component models were utilized from the libraries of Aplac. However their influence on the results was found to be minimal.

Final simulation results are summarized in the Table II. The results fulfill the requirements. The gain is slightly too high, but the margin was considered to be reasonable due to expected losses in the practical implementation. The IIP3 performance was the biggest concern.

Two of the component values used in the final simulation differ from the component values shown in the schematic (Figure 1). R2 and L2 of 180R and 2n2, respectively were used in the simulation. The values given in the schematic were seen to work better in practice.

The simulations were carried out also to given the real tolerance variations for the components. All values were under the specification limits. The most sensitive component was the emitter coil L2.

C. Layout Circuit board layout design was made using Mentor. All

components are assembled on the topside of the board, shown in Figure 2. Bottom side of the board is a ground plane. The board is equipped with a possibility to mount an optional RF-shielding can. It did not seem to have any effect on the performance. However, shielding is needed in real application where all other radio parts are close to each other.

The thickness of the board is 1.2 mm, and the occupied component area is about 10 mm x 12 mm.

Fig. 2. Circuit board of the LNA amplifier The passive components are of the 0603-size except for C6,

the tantalum capacitor that can be left away if the amplifier is integrated to a larger system. Slightly more compact circuit size could have been made with 0402 components, but their size is impractical in a hand-made circuit board assembly. The inductors are from Murata’s LQG series.

Fig. 3. Finished LNA

TABLE II SIMULATION RESULTS OF THE LNA

Simulation result Unit Center frequency ok MHz 1 dB bandwidth ok MHz Gain 17.8 dB Noise figure 1.9 dB Return loss 11/13 dB IIP3 0 dBm Current consumption 13 mA

446 MHZ LOW NOISE AMPLIFIER FOR A PMR446 RECEIVER

45

III. TEST RESULTS Three pieces of circuit boards were milled, assembled, and

measured. The measurement results for gain and compression are shown in Figures 4 and 5. The measured and simulated gain values are shown in the same figure for comparison. The simulation result is the upper line and measured values are three lower lines in Figure 4. Gain and matching were measured with a network analyzer (Rohde&Schwarz ZVC). Compression was measured with a signal generator (Agilent E4438C) and a power meter using several input signal levels. The solid lines in Figure 5 are the output power and dashed lines are the gain.

300M 375M 450M 525M 600M12

14

16

18

20

LNA simulation vs. measurementAPLAC 7.90 User: Nokia Corporation Jan 19 2004

GAIN

dB

FREQUENCY/Hz Fig. 4. Gain of the LNA

-6-4-202468

10

-20 -18 -16 -14 -12 -10 -8 -6input power (dBm)

outp

ut p

ower

(dB

m)

024681012141618

gain

(dB

)

Fig. 5. Compression of the LNA

IIP3 was measured using the common two-tone test method. Two equal level carrier signals from two signal generators were fed to the input of the LNA through a power divider. The output was measured using a spectrum analyzer, and the result is shown in Figure 6. The input intermodulation intercept point is given by

IIP3 = L1 + ½(L1 – L2) – G

where L1 = level of the higher peaks (base frequency) L2 = level of the lower peaks (3rd order intermodulation

frequency) G = gain of the amplifier

Fig. 6. Intermodulation point of the LNA

Noise figure was measured with a noise figure meter (Agilent N8974A). The principle of it is to measure the noise power at the output an amplifier with a known noise source at the input on and off. Based on that information the meter calculates the noise figure and insertion gain.

Test results are summarized in the Table III. The figures are the averages values of all three measured boards.

TABLE III MEASUREMENT RESULTS OF THE LNA

Result Unit Ripple 446 ± 5 MHz 0.3 dB Gain 16.4 dB Noise figure 1.8 dB Return loss (in / out) 20.7 / 13.5 dB IIP3 5.2 dBm Current consumption 13 mA

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IV. CONCLUSION As it can be seen by comparing Tables I and III, all

electrical requirements are fulfilled. There were no big problems with any of the specification parameters during the simulations or testing. Of course, compromises had to made to get all parameters in the specifications.

The emitter area of the transistor is probably the most sensitive area of this amplifier design. Small changes there have major effect to the gain and input matching. Even the short microstrip line connected between emitter of the transistor and ground plane may cause considerable differences between simulations and measurements. Replacing L2 inductor with the short micro strip line is reasonable in a more optimized application.

There is quite remarkable difference (about 5 dB) in IIP3 figure between simulations and measured value. Some portion of that can be explained with the lower gain of the measured boards.

Non-electrical objectives were also reasonably well achieved. Total component count is 13 and the used board area is 120 mm2. Based on the results measured from three similar boards, certain variation between units is visible. For example keeping the gain within a 1-dB window is likely impossible unless some tuning method is utilized.

REFERENCES [1] P. Vizmuller, “RF design guide”, Artech House Inc, 1995 [2] B. Razavi, “RF microelectronics”, Prentice Hall Inc, 1998 [3] BFR520 datasheet, www.semiconductors.philips.com Timo Saari was born in Helsinki, Finland in 1973. He received the B.Sc. degree in telecommunication from the Turku Institute of Technology in 1995 and M.Sc. degree in information technology from the Tampere University of Technology in 2001. Since June 1996 he has been an RF engineer in Nokia Corporation in Tampere, working on RF circuit and antenna design for wireless terminal devices. Mika Ritamäki was born in Nokia, Finland in 1975. He received the M.Sc degree in electronic engineering from the Tampere University of Technology in 2000. Since March 1999 he has been working as a baseband and RF design engineer in Nokia Corporation, Tampere.