48v/600w prd1404 - analog devices · wide input range, full bridge phase shifted topology using...

Wide Input Range, Full Bridge Phase Shifted topology using ADP1046A

48V/600W PRD1404

Rev. 1.0 Reference designs are as supplied “as is” and without warranties of any kind, express, implied, or statutory including, but not limited to, any implied warranty of merchantability or fitness for a particular purpose. No license is granted by implication or otherwise under any patents or other intellectual property by application or use of reference designs. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Analog Devices reserves the right to change devices or specifications at any time without notice. Trademarks and registered trademarks are the property of their respective owners. Reference designs are not authorized to be used in life support devices or systems.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113 ©2009 Analog Devices, Inc. All rights reserved.

FEATURES 600W Phase Shifted Full Bridge Topology

Wide Input Range to minimize hold up capacitor

Wide ZVS range down to 10% rated load

Short circuit and Fast Over Voltage protection

Remote voltage sensing

Line voltage feedforward

I2C serial interface to PC

Software GUI

Programmable digital filters for DCM and CCM

7 PWM outputs including Auxiliary PWM

Digital Trimming

Current, voltage, and temperature sense through GUI

Calibration and trimming

CAUTION This evaluation board uses high voltages and currents. Extreme caution must be taken especially on the primary side, to ensure safety for the user. It is strongly advised to power down the evaluation board when not in use. A current limited power supply is recommended as input as no fuse is present on the board.

ADP1046A EVALUATION BOARD OVERVIEW

This evaluation board features the ADP1046A in a switching power supply application. With the evaluation board and software, the ADP1046A can be interfaced to any PC running Windows 2000/XP/Vista/NT/7 via the computer's USB port. The software allows control and monitoring of the ADP1046A internal registers. The board is set up for the ADP1046A to act as an isolated switching power supply with a rated load of 48V/12.5A from an input voltage ranging from a 340VDC to 400VDC.

Figure 1 – Prototype

Phase Shifted Full Bridge 48V/600W

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TABLE OF CONTENTS Features ....................................................................................................................................................................................... 1

CAUTION ..................................................................................................................................................................................... 1

TOPOLOGY AND circuit description ............................................................................................................................................ 3

CONNECTORS ............................................................................................................................................................................ 4

SETTING FILES AND EEPROM .................................................................................................................................................. 7

BOARD EVALUATION ................................................................................................................................................................. 8

EQUIPMENT ............................................................................................................................................................................ 8

SETUP ...................................................................................................................................................................................... 8

BOARD SETTINGS ................................................................................................................................................................ 10

Theory of operation during startup ............................................................................................................................................. 10

FLAGS SETTINGS CONFIGURATIONS ................................................................................................................................ 11

PWM SETTINGS ....................................................................................................................................................................... 12

BOARD EVALUATION AND TEST DATA ................................................................................................................................... 13

STARTUP ............................................................................................................................................................................... 13

OVERCURRENT AND SHORT CIRCUI PROTECTION ......................................................................................................... 14

PRIMARY GATE DRIVER DEADTIME ................................................................................................................................... 15

CS1 PIN VOLTAGE (PRIMARY CURRENT) .......................................................................................................................... 17

SYnchronous rectifier peak inverse voltage ............................................................................................................................ 17

OUTPUT VOLTAGE RIPPLE .................................................................................................................................................. 18

TRANSIENT Voltage at 385VDC (NOMINAL VOLTAGE) ....................................................................................................... 18

HOLD UP TIME AND VOLTAGE DROP OUT ......................................................................................................................... 20

LINE VOltage FEEDFORWARD ............................................................................................................................................. 20

ZVS WAVEFORMS FOR QA (PASSIVE TO ACTIVE TRANSITION) ...................................................................................... 21

ZVS WAVEFORMS FOR QB (PASSIVE TO ACTIVE TRANSITION) ..................................................................................... 23

ZVS WAVEFORMS FOR QC (Active TO PaSSIVE TRANSITION) ........................................................................................ 24

ZVS WAVEFORMS FOR QD (Active TO PaSSIVE TRANSITION) ........................................................................................ 24

CLOSED LOOP FREQUENCY RESPONSE .......................................................................................................................... 25

EFFICIENCY .......................................................................................................................................................................... 26

TRANSFORMER SPECIFICATION ........................................................................................................................................... 27

Thermal TEST DATA .................................................................................................................................................................. 29

APPENDIX I – SCHEMATIC ...................................................................................................................................................... 32

APPENDIX IV – LAYOUT ........................................................................................................................................................... 36

NOTES ....................................................................................................................................................................................... 39

REVISION HISTORY 04/28/2013—Revision 1.0: SPM 05/02/2013—Revision 2.0: SPM


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BOARD SPECIFICATIONS

Specification MIN TYP MAX Units Notes

VIN 340 385 400 V

VOUT 48 V

IOUT

Overload current (OCP limit)

0.0 12.5 15

15

A

A

With 400 LFM air flow.

OCP set to shutdown PSU

after~10ms

Efficiency 96.35% % Typical reading at 385Vin, 12.5A load

Switching frequency 111.6 KHz

Output Voltage Ripple 550 mV At 12.5A load

TOPOLOGY AND CIRCUIT DESCRIPTION This application note consists of the ADP1046A in a typical isolated DC/DC switching power supply in a full bridge phase shifted topology with synchronous rectification. The circuit is designed to provide a rated output load of 48V/12.5A from a nominal input voltage of 385VDC operated in CCM at all times. The ADP1046A is can provide functions such as the output voltage regulation, output over voltage protection, input and output current protection, primary cycle by cycle protection, and over temperature protection. provides a top level schematic that describes the power flow and auxiliary power supply that starts up at 50VDC and provides power to the ADP1046A through a 3.3V LDO, the iCoupler isolation plus gate drivers, the on board fan, and the synchronous rectifier drivers. The transformer is designed to provide a wide input voltage range (340-410VDC) and the circuit has wide ZVS (Zero Voltage Switching) range down to 10% of the rated load.

The auxiliary power supply using transformer (T3) and IC (U10) generates a 12V rail on the primary side and a 13V rail on the secondary side to power the iCoupler isolation devices (MOSFET drivers), synchronous rectifier driver and the ADP1046A using the 3.3V LDO. This auxiliary supply starts up at approximately 50VDC.

The primary side consists of the input terminals (JP8, JP9), switches (Q1-Q4), the current sense transformer (T5) and the main transformer (T1). There is also an resonant inductor that aids in zero voltage switching at lighter load conditions. The ADP1046A is situated on the secondary side and is powered via the auxiliary power supply or the USB connector via the LDO. The gate signal for the primary switches is generated by the ADP1046A through the iCouplers and fed into the MOSFET drivers (U17, U18). Bypass capacitors (C71, C72, C114-116) are placed closed to the primary switches. Diodes (D36-37) clamp the resonance between the resonant inductor and the output capacitance (COSS) of the output rectifiers.

The secondary (isolated) side of the transformer consists of a center tapped winding. The synchronous rectifier driver (U7) provides the drive signals for the switches (Q9, Q23). The output inductor (L8) and output capacitor (C11, C41) act as a low pass filter for the output voltage. The output voltage is fed back to the ADP1046A using a voltage divider and has a nominal voltage of 1V which is differentially sensed. Output current measured using a sense resistor (R2) which is also differentially sensed. To protect the synchronous rectifiers from exceeding the peak reverse voltage an RCD clamp is implemented (D58, D59, R112-115, C94)

The primary current is sensed through the CS1 pin with a small RC time constant (R44, C22) that act as a low pass filter to remove the high frequency noise on the signal. An additional RC can be placed, but the internal Σ-Δ ADC naturally averages the signal. The position of the current transformer is placed in series with the resonant inductor to avoid saturation.

Line voltage feedforward is implemented using an RCD circuit (D13, R59, R64, C38, C43) that detects the peak voltage at the synchronous FET. There are two time constants that can be implemented in series with each other. The time constants must be matched such that it retains the peak value during the switching frequency period but also is not too long in case there is a step down change in the input voltage. This peak voltage is further ratioed and fed in the ACSNS pin of the controller (ADP1046A). A thermistor (RT1) is placed on the secondary side close to synchronous FET and acts thermal protection for the power supply. A 16.5k resistor is placed in parallel with the thermistor that allows the software GUI to read the temperature directly in degrees Celsius.

Capacitor (C69) is a YCAP that reduces common mode noise from the transformer.


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Also present on the secondary is a 4 pin connector for I2C communication. This allows the PC software to communicate with the IC through the USB port of the PC. The user can easily change register settings on the ADP1046A, and monitor the status registers. It is recommended that the USB dongle be connected directly to the PC, not via external hub.

Switch (SW2) acts as a hardware PS_OFF switch. The polarity is configured using the GUI to be active high.

CONNECTORS The following table lists the connectors on the board:

Connector Evaluation Board Function

J8 DC Input positive terminal

J9 DC Input negative terminal

J11 Output voltage positive terminal

J12 Output voltage negative terminal

J16 Socket for auxiliary power supply

J18 I2C connector

The pin outs of the USB dongle are given below:

Figure 2 – I2C connector (pin1 on left)

Pin (left to right)

Function

1 5V

2 SCL

3 SDA

4 Ground


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Figure 3 – PCB Side View


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SETTING FILES AND EEPROM The ADP1046A communicates with the GUI software using the I2C bus.

The register settings (having extension .46r) and the board settings (having extension .46b) are two files that are associated with the ADP1046A software. The register settings file is contains information such as the over voltage and over current limits, softstart timing, PWM settings etc. that govern the functionality of the part. The ADP1046A stores all its settings in the EEPROM.

The EEPROM on the ADP1046A does not contain any information about the board, such as current sense resistor, output inductor and capacitor values. This information is stored in board setup file (extension .46b) and is necessary for the GUI to display the correct information in the ‘Monitor’ tab as well as ‘Filter Settings’ window. The entire status of the power supply such as the ORFET and synchronous rectifiers enable/disable, primary current, output voltage and current can be thus digitally monitored and controlled using software only. Always make sure that the correct board file has been loaded for the board currently in use.

Each ADP1046A chip has trim registers for the temperature, input current and the output voltage and current, and ACSNS. These can be configured during production and are not overwritten whenever a new register settings file is loaded. This is done in order to retain the trimming of all the ADCs for that corresponding environmental and circuit condition (component tolerances, thermal drift, etc.). A guided wizard called the ‘Auto Trim’ is started which trims the above mentioned quantities so that the measurement value matches the valued displayed in the GUI to allow ease of control through software.


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BOARD EVALUATION

EQUIPMENT • DC Power Supply (300-400V, 600W)

• Electronic Load (60V/600W)

• Oscilloscope with differential probes

• PC with ADP1046A GUI installed

• Precision Digital Voltmeters (HP34401or equivalent - 6 digits) for measuring DC current and voltage

SETUP NOTE: DO NOT CONNECT THE USB CABLE TO THE EVALUATION BOARD UNTIL THE SOFTWARE HAS FINISHED INSTALLING

1) Install the ADP1046A software by inserting the installation CD. The software setup will start automatically and a guided process will install the software as well as the USB drivers for communication of the GUI with the IC using the USB dongle.

2) Insert the daughter card in connector J5 as shown in Figure 6

3) Ensure that the PS_ON switch (SW1 on schematic) is turned to the OFF position. It is located on the bottom left half of the board.

4) Connect one end of USB dongle to the board and the other end to the board to the USB port on the PC using the “USB to I2C interface” dongle.

5) The software should report that the ADP1046A has been located on the board. Click “Finish” to proceed to the Main Software Interface Window. The serial number reported on the side of the checkbox indicates the USB dongle serial number. The windows also displays the device I2C address.

5. If the software does not detect the part it enters into simulation mode. Ensure that the connecter is connected to the daughter card. Click on ‘Scan for ADP1046A now’ icon (magnifying glass) located on the top right hand corner of the screen.


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5. Click on the “Load Board Settings” icon (fourth button from the left) and select the ADP1046A_FBPS_600W_xxxx.46b file. This file contains all the board information including values of shunt and voltage dividers. Note: All board setting files have an extension of .46b

6. The IC on the board comes preprogrammed and this step is optional. The original register configuration is stored in the ADP1046A_FBPS_600W_xxxx.46r register file (Note: All register files have an extension of .46r). The file can be loaded using the second icon from the left in Figure 8.

7. Connect a DC power source (385VDC nominal, current limit to ~2A) and an electronic load at the output set to 1 Ampere.

8. Connect a voltmeter on test points TP26(+) and TP46(-). Ensure that the differential probes are used and the ground of the probes are isolated if oscilloscope measurements are made on the primary side of the transformer.

9. Click on the Dashboard settings (3rd

icon in Figure 7 and turn on the software PS_ON)

10. The board should now up and running, and ready for evaluation. The output should now read 12 VDC.

11. Click on the ‘MONITOR’ tab and then on the Flags and readings icon. This window provides a snapshot of the entire state of the PSU in a single user friendly window.


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BOARD SETTINGS The following screenshot displays the board settings.

THEORY OF OPERATION DURING STARTUP The following steps briefly describe the startup procedure of the ADP1046A and the power supply and the operation of the state machine for the preprogrammed set of registers that are included in the design kit.

1. The on board auxiliary power starts up at approximately 50VDC. This provides a drive voltage on the isolated side to an LDO (3.3V) that powers up the ADP1046A. After VDD (3.3V) is applied to the ADP1046A it takes approximately 20-50µs for VCORE to reach 2.5V. The digital core is now activated and the contents of the registers are downloaded in the EEPROM. The ADP1046A is now ready for operation.

2. PS_ON is applied. The power supply begins the programmed softstart ramp of 50ms (programmable).

3. Since the ‘softstart from pre-charge’ setting is active the output voltage is sensed before the softstart ramp begins. Depending upon the output voltage level of the effective softstart ramp is reduced by the proportional amount.

4. The PSU now is running in steady state. PGOOD1 turns on after the programmed debounce.

5. If a fault is activated during the softstart or steady state, the corresponding flag will be set and the programmed action will be taken such as disable PSU and re-enable after 1 sec or ‘Disable SR and OrFET, Disable OUTAUX’ etc.


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FLAGS SETTINGS CONFIGURATIONS Basically when a flag is triggered, the ADP1046A state machine waits for a programmable debounce time before taking any action. The response to each flag can be programmed individually. The flags can be programmed in a single window by selecting the FLAG SETTINGS icon in the MONITOR tab in the GUI. This monitor window shows all the fault flags (if any) and the readings in one page. The ‘Get First Flag’ button determines the first flag that was set in case of a fault event.


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PWM SETTINGS

The ADP1046A has a fully programmable PWM setup that controls 7 PWMs. Due to this flexibility the IC can function in several different topologies such as any isolated buck derived topology, push pull, flyback and also has the control law for resonant converters.

Each PWM edge can be moved in 5ns steps to achieve the appropriate deadtime needed and the maximum modulation limit sets the maximum duty cycle.

PWM Switching element being controlled

OUTA-OUTD Primary switch PWM configured for Phase shifted topology

SR1-SR2 Synchronous rectifier PWMs

OUTAUX N/A


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BOARD EVALUATION AND TEST DATA

STARTUP

Figure 12 - Startup at 340VDC, 600W load(software PSON) Green trace: Output voltage, 10V/div, 10ms/div

Yellow trace: Load current, 2A/div, 10ms/div Red trace: Input voltage, 50V/div, 10ms/div

Figure 13 - Startup at 385VDC, 600W load (software PSON) Green trace: Output voltage, 10V/div, 10ms/div



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OVERCURRENT AND SHORT CIRCUI PROTECTION

Figure 16 - OCP at 385VDC, 15A load(Action to shutdown after ~10ms) Green trace: Output voltage, 10V/div, 5ms/div



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PRIMARY GATE DRIVER DEADTIME


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CS1 PIN VOLTAGE (PRIMARY CURRENT)

SYNCHRONOUS RECTIFIER PEAK INVERSE VOLTAGE


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OUTPUT VOLTAGE RIPPLE

TRANSIENT VOLTAGE AT 385VDC (NOMINAL VOLTAGE)

LOAD STEP OF 15-50%


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LOAD STEP OF 50-100%

LOAD STEP OF 0-50%


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HOLD UP TIME AND VOLTAGE DROP OUT

LINE VOLTAGE FEEDFORWARD


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Figure 42 – Line voltage Feed forward DISABLED, 600W load Red trace: Input voltage step 350-385VDC, 50V/div

Green trace: Output voltage (AC Coupled), 200mV/div

Figure 43 – Line voltage Feed forward ENABLED, 600W load Red trace: Input voltage step 350-385VDC, 50V/div

Green trace: Output voltage (AC Coupled), 200mV/div

ZVS WAVEFORMS FOR QA (PASSIVE TO ACTIVE TRANSITION)


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ZVS WAVEFORMS FOR QB (PASSIVE TO ACTIVE TRANSITION)

Figure 50 –Resonant transition at 300W load, 100us/div Red trace: VDS of QB, 100V/div Yellow trace: VGS of QB, 5V/div

Figure 51 –Resonant transition at 600W load, 100us/div Red trace: VDS of QB, 100V/div Yellow trace: VGS of QB, 5V/div


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ZVS WAVEFORMS FOR QC (ACTIVE TO PASSIVE TRANSITION)

ZVS WAVEFORMS FOR QD (ACTIVE TO PASSIVE TRANSITION)


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CLOSED LOOP FREQUENCY RESPONSE

A network analyzer (AP200) was used to test the bode plots of the system. A continuous noise signal of 300mV

was injected across the entire frequency range across a 10Ω resistor in series (R35) with the output voltage divider

using an isolation transformer. The operating condition was 385VDC input and a load condition of 600W with a

soaking time of 45 minutes.


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EFFICIENCY


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TRANSFORMER SPECIFICATION

PARAMETER MIN TYP MAX UNITS NOTES

Core and Bobbin PQ3535, Magnetics Inc R Material or equivalent

Primary inductance 3.316 mH Pins 1 to pin 6

Leakage inductance 4 µH Pins 1 to pin 6 with all other windings shorted

Resonant frequency 850 KHz Pins 1 to pin 6 with all other windings open

Table 5 - Transformer specifications

14T, 75 strands, 40AWG,

Litz wire

1

11,12

9,10

7,8

6

5T, Copper foil, 10 mil

5T, Copper foil, 10 mil

14T, 75 strands, 40AWG,

Litz wire

3

1


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3

6

1

7,8

11,12

3

9,10

7,8


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THERMAL TEST DATA

A thermal snapshot of the unit was taken after running at 600W with a 45 minute soaking time.


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Figure 64 – Thermals, Output inductor Figure 65 – Thermals, output current sense resistor

Figure 66 – Thermals, Transformer Figure 67 – Thermals, Resonant inductor


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Figure 68 – Thermals, Primary MOSFET Figure 69 – Thermals, Transformer


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APPENDIX I –SCHEMATICS (MAIN, DAUGHTER CARD, AND TOPLEVEL)

VDD_SEC= 13V

3.3V

5V from USBOR

VD

D_P

RI=

12V

MOSFETDrivers ADP1046 Daughter CARD Socket

SYNCFULL BRIDGEPHASE SHIFTED

RECT340-410VDC

I2C Interface

MOSFETDrivers

ADuM4223icoupler + driver

Auxillary PSUPrimary= +12VSecondary= +13V

48VDC/600W, 720W overload power

OUTA-D

3.3V LDO

Figure 70 – Schematic – Top Level Schematic


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J8

VIN

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GA

TE

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D-

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0

TP

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VO

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C94

33nF

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88A

400V

R113

90k

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90k

R109

1

SR

2_out

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1D

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88A

C53

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VIN

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250VAC 3A

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3-


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2V

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12

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PS

ON

R78

0

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R77

DN

IV

IB_U

18

VIB

_U

17

DN

ID

20

212.5V

D19

MM

SZ

5222B

T1G

21

D48

BA

V70

23

1

R44

0

C22

1000pF

R76

51

D64

BA

V99

13

2

D63

BA

V99

13

2

PG

ND

PR

I_G

ND

CS

+

CS

-

R52

22K

PG

ND

TP

23

CS

1C

S1

TE

MP

SE

NS

ING

R70

16.5

k R74

0A

GN

D

RTD

R71

0Q

10

DN

I

3

1

2

RTD

100k

AG

ND

AG

ND

AG

ND

RE

D

R93

2k2

D51

21

LE

D IN

DIC

AT

OR

S

YE

LLO

WD

49

21

R40

2k2

U7

AD

P3654 NC

11

INA

2

PN

D3

INB

4O

UTB

5

VD

D6

OU

TA

7

NC

28

VS

S

SR

1_out

SR

2_out

C82

0.1

uF

C44

4.7

uF

VD

D_S

EC

D50

BA

W56

13

2

COM1

VS

SG

AT

E D

RIV

ER

S F

OR

SR

+5V

SH

AR

EO

SC

L

SD

A

FLA

GIN

AG

ND

SH

AR

EI

SR

1

OU

TA

UX

OU

TC

SR

2

OU

TA

SD

A

SC

L

AD

P1

04

6 D

AU

GH

TE

R C

AR

D C

ON

NE

CT

ION

S

PG

ND

+5V

AG

ND

VD

D_S

EC

VS

1

VS

2

VS

3+

VS

3-

+3.3

V

GA

TE

CS

2+

+5V

C61

33pF

C60

33pF

C62

33pF

R95

100

C63

33pF

R96

100

I2C

IN

TE

RFA

CE

AN

D F

ILT

ER

ING

J16

5V

1

SC

L2

SD

A3

GN

D4

OU

TA

UX

Miro MaTch

R87

100

VD

D_S

EC

1N

4148

D47

21

Q21

BS

S138

1

2

3

J28 1

1

22

FA

N C

ON

TR

OL

Pa

rt #

: 3

10

6K

L-0

4W

-B5

0-B

01

AG

ND

120X120X25M

M 4

8V

DC

J17

SC

L1

GN

D A

2

SD

A3

VB

US

4

SP

I M

ISO

5

NC

6

SP

I S

CLK

7

SP

I M

OS

I8

SP

I C

S A

9

GN

D B

10

PG

ND

COM2

J15

AD

P1046_D

C

PG

OO

D1

8

PG

OO

D2

7

FLA

GIN

6

RTD

5

SC

L4

SD

A3

SH

AR

EI

2

SH

AR

EO

1

AC

SN

S16

CS

115

OU

TA

14

OU

TB

13

OU

TC

12

OU

TA

UX

10

PS

ON

9

OU

TD

11

SR

117

SR

218

CS

2-

19

CS

2+

20

PG

ND

21

VS

122

VS

223

GA

TE

24

VS

3+

25

VS

3-

26

5V

27

3.3

V28

AG

ND

29

12V

30

PG

OO

D2

PG

OO

D1

R64

0

C43

DN

IC

38

DN

I

PG

ND

R59

200

1N

4148

D132

1B

Vin

_A

ux

J18

VIN

_A

UX1

1

VIN

_A

UX2

2

PR

I_G

ND

13

PR

I_G

ND

24

PR

I_G

ND

35

PR

I_G

ND

46

VD

D_P

RI1

7

VD

D_P

RI2

8

NC

19

NC

210

NC

311

NC

412

PG

ND

113

PG

ND

214

VD

D_S

EC

115

VD

D_S

EC

216

400V

R66

DN

IC

VD

D_P

RI

CS

2-

LIN

E F

EE

D-F

OR

WA

RD

D1

3=

DN

I fo

r R

es

on

an

t m

od

eR

66

= 0

oh

m f

or

Re

so

na

nt

mo

de

ch

an

ge

AC

SN

S r

es

isto

r d

ivid

er

ac

co

rdin

gly

to

giv

e >

0.4

5V

on

DC


PRD1404

AC

Sen

se In

put

VS

1

VS

3+

Prim

ary

Sid

e D

iffere

ntia

l Cur

rent

Sen

se In

put

C1

10

.1uF

PW

M O

utpu

t for

Prim

ary

Sid

e S

witc

h

R152.2k

CS

2-

PW

M O

utpu

t for

Prim

ary

Sid

e S

witc

h

+3

.3V

PW

M O

utpu

t for

Prim

ary

Sid

e S

witc

h

3

SH

AR

E0

PW

M O

utpu

t for

Prim

ary

Sid

e S

witc

h

4

Aux

iliary

PW

M O

utpu

t

C1

51000pF

+5

V

C1

8D

NI

Short

tra

ce fro

m p

in 2

5 D

GN

D t

o p

in 2

AG

ND

Pow

er S

uppl

y O

n In

put

OU

TA

UX

4

R1

42

.2k

GA

TE

CS

2+

3

Pow

er G

ood

Out

put (

Ope

n D

rain

)

PS

ON

VS

2

+3

.3V

U1

AD

P1

04

6A

VS

21

AG

ND

2

VS

13

CS

2-

4

CS

2+

5

AC

SN

S6

CS

17

PG

ND

8

SR19

SR210

OUTA11

OUTB12

OUTAUX15

OUTC13

OUTD14

GATE16

SC

L17

SD

A18

PS

ON

19

FL

AG

IN20

PG

OO

D2

21

PG

OO

D1

22

SH

AR

EO

23

SH

AR

EI

24

DGND25

VCORE26

VDD27

RTD28

ADD29

RES30

VS3-31

VS3+32

33PAD

3

PG

OO

D1

Pow

er G

ood

Out

put (

Ope

n D

rain

)

VS

1

OUTAUX

PG

OO

D2

Fla

g In

put

PG

OO

D1

FL

AG

IN

RTD

AC

SN

S

C1

40

.1uF

C1

0100pF

The

rmis

tor

Inpu

t

C1

7D

NI

SC

L

SD

A

RTD

R7

46.4

k

R8

1k

I2C

Ser

ial C

lock

Inpu

t

C3

DN

I

C4

DN

I

2

SH

AR

Ei

J1

12345678910

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

I2C

Ser

ial D

ata

Inpu

t and

Out

put

R4

4.9

9k

SH

AR

E0

Ana

log

Sha

re B

us F

eedb

ack

Pin

PG

OO

D2

Sha

re B

us O

utpu

t Vol

tage

+1

2V

RED

3

Hig

h S

ide

Low

Sid

e

OUTD

+3

.3V

4.9

9k

+5

V

50V

D1

DN

I

2 1

Pow

er G

ND

+3

.3V

D2

1N

414

8

2 1

2

U2O

UT1

1

OU

T2

2

NR

3

GN

D4

SD

5

ER

R6

IN2

7IN

18

110k

C5

1.0

uF

C8

0.1

uF

C1

24

.7uF

AD

P3

30

3

+1

2V

R3

Ana

log

GN

D

R1

30

Ohm

R2010k

R2

15

.1K

2

R4

110k

4.9

9k

R1910k

CS

1

C10

D6

LE

D

2 1

FL

AG

IN

R2

92

.2k

OUTC

C13

R2

42

.2k

C16

+3

.3V

C17

VC

OR

E

PG

OO

D1/2

C26 =

330pF

50V

X7R

R14,

R15 =

2.2

k 1

%

VS

3-

33pF

33pF

J7

1 2 3 4

+5

V

SC

L

R5

46.4

k

R6

1k

C1

DN

I

C2

DN

I

OUTB

PS

ON

Inve

rting

Rem

ote

Vol

tage

Sen

se In

put

AG

ND

SD

A

VS

3+

R3

32

.2k

Non

e-In

verti

ng R

emot

e V

olta

ge S

ense

Inpu

t

OrF

ET

Gat

e D

rive

Out

put

OUTA

C6

330pF

NOTES:

1:

R3,

R4,

R5,

R6,

R7,

R8,

R10,

R11,R

20 A

RE

0.1

% 2

5ppm

UN

LE

SS

OTH

ER

WIS

E S

PE

CIF

IED

.

SH

AR

E O

/I

OrF

ET

Dra

in S

ense

Inpu

t

SD

A

R1

65

AD

D

R1

04

6.4

k

CS

2+

R1

11k

C7

DN

I

C9

DN

I

CS

2-

2

SR

2

Loca

l Vol

tage

Sen

se In

put

SH

AR

Ei

SR

1

DN

I

SR2

AC

SN

S

VS

3-

DN

I

R322.2k

SC

L

CS

1

Non

e In

verti

ng D

iffere

ntia

l Cur

rent

Sen

se In

put

R33,

R32 =

2.2

k 1

%

DN

I

DN

I

OU

TA

VS

2

R19 =

10k 1

%

Inve

rting

Diffe

rent

ial C

urre

nt S

ense

Inpu

t

OU

TB

C1

6D

NI

C1

3100pF

DN

I

OU

TC

PG

ND

SR1

Syn

chro

nous

Rec

tifier

Out

put

DN

I

R3

4.9

9k

DG

ND

OU

TD

R2

1k

GATE

Syn

chro

nous

Rec

tifier

Out

put


PRD1404

APPENDIX IV – LAYOUT

Figure 75 – Bottom side placement of components


PRD1404

Figure 77 – Layout Layer 2


PRD1404


PRD1404

NOTES

48v/600w prd1404 - analog devices · wide input range, full bridge phase shifted topology using...

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