7d59cvlsi tech tut

Upload: vipul-chauhan

Post on 14-Apr-2018

226 views

Category:

Documents


0 download

TRANSCRIPT

  • 7/29/2019 7d59cVLSI Tech Tut

    1/16

    AMITY SCHOOL OF ENGINEERING AND TECHNOLOGY

    (TUTORIAL SHEET)

    VLSI PROCESSING AND TECHNOLOGY

    TUTE-1

    In IC technology the conducting lines between devices and gates is provided by

    a) Silicon

    b) SiO2c) Polycrystalline Silicon

    d) None

    2. Thermal oxidation of polycrystalline Silicon provides

    a) Electrical Isolationb) Isolation

    c) Mechanical Isolationd) Both (a) and (d)

    3. At moderate doping levels the electrically active carrier concentration at thesurface controls

    a) Oxidation Rate

    b) Oxidation Faults

    c) Both (a) and (b)d) None

    4. Oxide thickness on Polysilicon isa) 3100Ao

    b) 3250Ao

    c) 2950Aod) 3500Ao

    5. Oxide Thickness on single crystal is approximatelya) 3850Ao

    b) 4000Ao

    c) 3000Ao

    d) 3500Ao

    6. The ratio of Polysilicon consumed oxidation to oxide growth is about

    a) 0.44b) 0.35

    c) 0.52

    d) 0.49

  • 7/29/2019 7d59cVLSI Tech Tut

    2/16

    7. Using CVD undoped polysilicon and lightly doped single crystal silicon, the

    oxidation rate increased in following ordera) ,,Polysilicon and

    b) ,, and Polysilicon

    c) ,, and Polysilicond) ,,Polysilicon and

    8. Thermal oxidation of Silicon can produce stacking faults lying ona) planes

    b) planes

    c) planes

    d) None

    9. The Silicon interstitial super saturation in the silicon determines

    a) Growth Rate

    b) Stacking Faultsc) Stacking Fault Growth Rate

    d) None

    10. The degraded junction characteristics in the form of increased reverse leakage

    current and storage time degradation in MOS structures is due toa) Oxidation Rate

    b) Thermal Oxidation

    c) Oxidation Induced Stacking Faults

    d) None

  • 7/29/2019 7d59cVLSI Tech Tut

    3/16

    TUTE-2

    11. The growth of Oxidation Induced Stacking Faults is a strong function of

    a) Substrate orientation

    b) Conductivity Typec) Defect nuclei present

    d) All the above

    12. The stacking fault length is a strong function of

    a) Oxidation Temperature

    b) Oxidation Ratec) Both (a) and (b)

    d) None

    13. At comparable temperature and time ,the oxidation stacking fault length is greater

    fora) Steam Ambients

    b) Dry Ambientsc) Wet Ambients

    d) None

    14. The model in which the oxidation rate is the controlling parameter in oxidation

    stacking fault length is

    a) dl/dt = K1[dTox/dt]n - K2

    b) dl/dt = K2[dTox/dt]n-K1c) dl/dt = K1[dTox/dl]n-K2

    d) dl/dt = K1[dTox/dt]n + K2

    15. For dry oxygen yield linear rate constant for silicon that are an avg. of

    _____ times those for silicon at corresponding temperature.

    A. 1.62B. 0.168

    C. 16.8

    D. 1.68

    16. Geometric effects are called Steric hindrance &which results in higher

    activation energy.

    17. For dry oxidation, oxidation rate v, based on data at 8000c & thickness upto150A0 is ordered in the following manner

    A. V111>V110>V100

    B. V110>V111>V100C. V111>V110>V100

    D. V110

  • 7/29/2019 7d59cVLSI Tech Tut

    4/16

    A. RAM

    B. DRAM

    C. ROMD. EEPROM

    19. Oxidation rate is ________ at lower temperature & reduced pressure.A. Normal

    B. Higher

    C. LowerD. Constant

    20. Oxides of 40-130A0 (11500, 5 to 10sec) have breakdown field of ____ for 100A0

    oxides.A. 13.6 V/cm

    B. 13.8 mV/cm

    C. 13.8 V/cm

    D. 1.36 mV/cm

  • 7/29/2019 7d59cVLSI Tech Tut

    5/16

    TUTE-3

    21. The enhancement of oxidation rate found to_____ with thickness.

    A. Increase linearly

    B. Decay ExponentiallyC. Decrease non-linearly

    D. wont change

    22. Breakdown field reduced pressure technique

    A. 12.6 V/cm

    B. 10-13 V/cmC. 13.8 V/cm

    D. 1.36 mV/cm

    23. Oxides density increase as

    A. Refractive index (RI) increasesB. Refractive index decreases

    C. Oxidation temperature decreasesD. Oxidation temperature increases

    24. Common cleaning procedure uses H20-H202-NH4 mixture to remove organiccontamination.

    25. Pyrogenic technique contains H2 & O2 to form water vapour

    26. In higher pressure oxidation, oxidation induced defects are reduced.

    27. Plasma oxidation is a low vacuum process .carried out in pure oxygendischarge.

    28. In plasma oxidation growth rate increases with increase in temperature.

    29. Oxidation of phosphorous doped silicon in wet O2, B is relatively independent

    of concentration

    30. Size of the ultra thin oxides will be

    A.

  • 7/29/2019 7d59cVLSI Tech Tut

    6/16

    TUTE-4

    31. Ultra thin oxides are produced by ______acid, boiling water and air at room

    Temperature.

    A. SulphuricB. Hot hydrochloric

    C. Hot nitric

    D. None of the above

    32. Oxidation rate will be lower at

    A. Low temperature, low pressureB. High temperature and low pressure

    C. High temperature and high pressure

    D. None of the above.

    33. The size of the oxide thickness grown using reduced pressure techniqueA)

  • 7/29/2019 7d59cVLSI Tech Tut

    7/16

    TUTE-5

    41. Plasma is produced for plasma oxidation byA. High frequency discharge

    B. DC electron source

    C. Both A and BD. None of the above.

    42. Growth rate of oxide in plasma oxidation increases with.A. Increase in substrate temperature

    B. increase in plasma density.

    C. Substrate dopant concentrationD. All the above.

    43. In dynamic RAM Quantity of charge stored depends on (in concern with silicon

    Wafer).

    A. Thickness of the waferB. Dielectric material.

    C. A& BD. None of these

    44. The oxidation technique chosen depends onA. Thickness

    B. Oxide properties

    C. A and B

    D. None of the above.

    45. What is the order of thickness of the oxide that can be grown by plasmaoxidation.A)1m C)2m C)1.5m D) 10 A0

    46. What is the growth rate we can obtain by plasma oxidation.

    A)2.5m/L B) 1m/L C)1.5m/L D) 2 m/L

    47. In plasma oxidation the plasma is obtained by

    A. High frequency discharge.B. Dc electron discharge.

    C. both a and b.

    D. none of the above.

    48.The growth rate of the oxide typically increases with

    A. Increasing substrate temperature.

    B. Increasing plasma density.C. Increasing sustrate dopant concentration.

    D. All the above.

    49. Refractive index of the dry oxide decreases with

  • 7/29/2019 7d59cVLSI Tech Tut

    8/16

    A. Increasing temperature.

    B. decreasing temperature

    C. Independent of temperature.D. None of the above.

    50. RI of the dry oxide gets saturated above.A) 11900C B) 11000C C) 12500C D) 12200C

  • 7/29/2019 7d59cVLSI Tech Tut

    9/16

    TUTE-6

    51. The etch rate of the thermal oxides at room temperature in buffered HF isgenerally quoted at about

    A. 2000A0/min

    B. 2500A0/minC. 1000A0/min

    D. 500A0/min

    52. The etch rate of thermal oxides at room temperature varies with.

    A. Temperature

    B. Etch solutionC. Temperature & Etch solution

    D. None of the above.

    53. Oxides used for masking common impurities in conventional device processing

    are of what thickness.A) 0.5 to 0.7 m B) 1.2 to 1.4 m C)0.8 to 1.0 m D)1.6 to 1.8 m.

    54. The values of the diffusion conctants for various dopants in SiO2 depends on

    A) Concentration B) properties C) structure of SiO2 D) all the above.

    55. Among the impurities given below which is having the highest diffusion

    constants.

    A) Boron B) gallium C) phosphorous D) arsenic.

    56. What is the diffusion constant value of gallium at 11000C

    A. 5.310-11B. 9.910-17C) 3.410-17 to 2.010-17

    D) 1.210-17 to 3.510-17

    57. The oxide charges are described by its equation

    A) Q=It B) N=Q/q C) N=Qt D) none

    58. interface-trapped charges are thought to result from

    A. Bond breaking process

    B. Structural defectsC. Metallic impurities

    D. All the above

    59. Thermal oxidation of Silicon can produce stacking faults lying on

    a) planesb) planes

  • 7/29/2019 7d59cVLSI Tech Tut

    10/16

    c) planes

    d) None

    60. The Silicon interstitial super saturation in the silicon determines

    a) Growth Rate

    b) Stacking Faultsc) Stacking Fault Growth Rate

    d) None

    61. The degraded junction characteristics in the form of increased reverse leakage

    current and storage time degradation in MOS structures is due to

    a) Oxidation Rate

    b) Thermal Oxidationc) Oxidation Induced Stacking Faults

    d) None

  • 7/29/2019 7d59cVLSI Tech Tut

    11/16

    TUTE-7

    1. For low charge density level, between oxide and the Si --------- oxidation is

    preferable,

    A. Plasma B. Thermal C. High pressure D. Vapor

    2. For multilevel metallization ________oxidation is used

    A. Plasma B. Thermal C. High pressure D. Vapor phase

    3. Chemical reaction in Thermal oxidation for vapor is

    A. Si + O2 SiO2B. Si + H20 SiO2 + H2

    C. Si + H2O SiO2 + H2O

    D. None of above

    4. The bond between Si and SiO2 is,A. Atomic bond

    B. Covalent bondC. Nuclear bond

    D. None

    5. If 40 A is thickness of oxidation layer, amount of Si consumed by SiO2 is,

    A. 20 A B. 1.77 A C. 12.3 A D. 17.11 A

    6. Deal and Groves model is valid for oxide thickness of,A. 300-20,000 A B. 40- 15,000 A C. 50 A

    7. When diffusivity is small, the oxidation rate depends on,A. Reaction rate at Si- Sio2 interface

    B. Supply of diffusing species.

    C. Both a and bD. None

    8. High concentration of sodium influence oxidation rateA. By changing bond structure

    B. By introducing water vapor

    C. By creating vacancies at Si-SiO2 interface

    D. None of above.

    9. Halogen species are introduced into the oxidation ambient to

    A. Improve oxide propertiesB. Underlying Si properties

    C. Both A and B

    D. None

  • 7/29/2019 7d59cVLSI Tech Tut

    12/16

    10. Parabolic rate constant ?

    A. Increases linearly with HClB. Increases exponentially with HCl

    C. Decrease linearly

    D. Doesnt depend on HCl

  • 7/29/2019 7d59cVLSI Tech Tut

    13/16

    TUTE-8

    11. the density Qit is expressedin terms ofA. number/cm2

    B. number/cm.ev

    C. number/cm2 .evD. number/ev

    12. which technique is used to determine the QitA. capacitance-voltage technique

    B. conductance-voltage technique

    C. both A and BD. current-voltage technique.

    70.the fixed oxide charge Qf is located in what thickness of Si-SiO2 interface

    A. 50 A

    B. 80 AC. 30 A

    D. 100 A

    71.Qf density ranges from 1010

    A. 1014/cm2B. 1012 /cm2

    C. 1015 /cm2

    D. 1016/cm2

    72.in which of these orientation Qf is more

    A. B. C.

    D. None

    73.ratio of equilibrium concentration of impurity in Si to that in Sio2 at the interface is

    called the

    A. Equilibrium difference co efficientB. Equilibrium segregation co efficient

    C. Non Equilibrium segregation co efficient

    D. Non Equilibrium difference co efficient

    74.direct determination of the segregation co efficient is possible using

    A. Primary ion mass spectrometry

    B. Several ion mass spectrometryC. Secondary ion mass spectrometry

    D. None of the above

    75.seggregation coefficient value for orientation

  • 7/29/2019 7d59cVLSI Tech Tut

    14/16

    A. Smaller than orientation

    B. Equal to arientation

    C. Greater than orientation.D. Unpredictable.

    76.seggregation coefficient are generally in the rangeA. 0.1 to 0.5

    B. 0.2 to 0.6

    C. 0.1 to 2.0D. None

    77.seggragation coefficient for gallium is

    A. 10B. 20

    C. 30

    D. 40

    78. Oxide stress is due to the

    A. different pressures acting on the si and sio2B. different temperatures of si and sio2

    C. differences in thermal expansion for si and sio2

    D. due to mechanical forces

    79. Stress on the oxide is of

    A. compressive form (Y)

    B. expansible formC. null, due to equilibrium

    D. none of the above

    80. As oxidation proceeds, the si-sio2 interface ,

    A. advances into sio2

    B. advances into siC. remains stationary

    D. depends on temperature and pressure

  • 7/29/2019 7d59cVLSI Tech Tut

    15/16

    TUTE-9

    81. Larger segregation coefficients values are obtainedA. for near dry oxidations

    B. for wet oxidations

    C. when special drying precautions are takenD. none of the above

    82. The equilibrium segregation coefficient is the ratio of equilibrium concentrationof impurity in __________ to that in _________ at the interface

    A. si, sio2 (Y)

    B. sio2, siC. si, oxidizing species

    D. oxidizing species , sio2

    83. The segregation coefficient increases with

    A. decrease in temperatureB. increase in temperature (Y)

    C. independent of temperatureD. none of the above

    84. The segregation coefficient isA. Orientation independent

    B. Orientation dependent with values for orientation greater then

    orientation.

    C. Orientation dependent with values for orientationgreater than orientation. (Y)

    D. Only temperature dependent.

    85. Tick the correct statements:

    A. Larger segregation coefficients values ate obtained for wet oxidation

    B. For phosphorus, Arsenic, and antimony, dopant segregates intosilicon (TRUE)

    C. Near dry oxidation and wet oxidation give virtually identical segregation

    coefficients. (TRUE)D. Gallium diffuses rapidly in silicon

  • 7/29/2019 7d59cVLSI Tech Tut

    16/16

    TUTE-10

    1. Explain the concept of Sheet resistance and its importance in layout designing.

    2. What is self aligned process in MOSFET fabrication?

    3. Explain the problem of Latch-Up in CMOS circuits, what fabrication steps need

    to be followed to avoid this?

    4. Why the input impedance of CMOS gate is so high an are the problems with this?

    5. What is Bi-CMOS process? Explain its advantages.

    6. Explain the difference between RIE and Ion-Beam etching.

    7. Explain the Sputtering process? What is its role in thin film technology?

    8. What are Guard rings and why are they required?

    9. Explain the following:

    a. Bonding Pads

    b. Packaging

    c. Photo resist

    10. Explain the Ficks law of diffusion.