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TRANSCRIPT
ANGLES
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
DATE
APPDENG
DATE
APPDCK
ECNZONEREV
DO NOT SCALE DRAWING
X.XXX
X.XX
XX
DIMENSIONS ARE IN MILLIMETERS
THIRD ANGLE PROJECTIOND
SIZE
APPLICABLENOTED AS
MATERIAL/FINISH
NONE
SCALE
DESIGNER
MFG APPD
DESIGN CK
RELEASE
QA APPD
ENG APPD
DRAFTER
METRIC
OFSHT
DRAWING NUMBER
TITLE
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PARTII NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
Apple Computer Inc.
12345678
12345678
B
C
D
A
B
C
D
A
REV.
DESCRIPTION OF CHANGE
SYSTEM BLOCK DIAGRAMPOWER BLOCK DIAGRAM
GPU CORE POWER
1.2V VREG2.5V VREGSIGNAL ALIAS
3.3V/5V PWRON SWITCHING
1314
FAN 2 AND HARD DRIVE TEMP SENSOR
56
BLOCK
44
46
52
95*
929190898887
SHASTA DISK
8
4
FAN 0, 1 AND SYSTEM TEMP SENSOR
INDICATOR LED / AMBIENT LIGHT SENSOR
5951 U3LITE HYPERTRANSPORT
3
PROCESSOR
VESTA FIREWIRE PHY
CPU LOGIC ANALYZER CONNECTOR
BLOCK
53
55
50
USB DEVICE INTERFACEMODEM CONNECTOR
SHASTA FIREWIRE
LINE OUT AMP
AUDIO CONNECTORSAUDIO POWER SUPPLIES
PCI
HT
DISK
MODEM
ETHERNET
FIREWIRE
USB
AUDIO
47
51
54
4958
PCM3052A AUDIO CODECLINE IN AMP
SPEAKER AMP
USB HOST INTERFACEFIREWIRE CONNECTORS
ETHERNET CONNECTORVESTA ETHERNET PHY
USB2 PCI
BOOT ROMSHASTA PCI
HYPERTRANSPORT LA CONNECTORS
5655
52
57
53
58
60
6462
73
77
74
7675
5980
616263
6667
6564
6968
8684
94
75
7071727374
100*101*
96*98*
102*
MEMORY
GRAPHICS
PDF1
56
4
CSA
2
5
1
7 7
PULSAR POWER
U3LITE MISC
GRAPHICS VREGS
CPU VREG
SERIES TERMINATIONDIMMS
VTT VREG
SHASTA SERIAL
U3LITE APPLE PI
PARALLEL TERMINATION
CPU BYPASS
U3LITE AGP
SMU12
109
11
1516
14
1011
89
1617
1213
18 17
27
2120
2524
1918
26
23
21
232425
29282726
35
37
30
28
31
3332
29
34
36
32
3433
35
31
3637
4038
443839
42
4546484950
GPU AGP
CPU VREG
30NEO APPLE PI
1.5V VREG / U3LITE CORE
* PAGES WHERE MASTER PAGE IS IN A DIFFERENT SCHEMATIC
41
VESTA POWER
I2C CONNECTIONS
PARALLEL TERMINATION
NEO POWER & BYPASS
6
2
SHASTA CORE22
43
GPU STRAPS
45
22
PULSAR CLOCKS
CPU STRAPS
CPU DIODE CONDITIONER
REVISION HISTORY
TABLE OF CONTENTS
40
54
GRAPHICS
CSA PDFCIRCUIT
U3LITE MEMORY
CPU VREG OUTPUT CAPS
TOP
SEEDYCIRCUIT
GPU FRAME BUFFERFRAME BUFFER TERMINATIONGRAPHICS DDR SDRAM AGRAPHICS DDR SDRAM B
EXT VGA & TMDS
SHASTA HYPERTRANSPORT
PCI SERIES TERMINATION
AIRPORT EXTREME & BLUETOOTH
DISK CONNECTORSSHASTA ETHERNET
6083
POWER CONNECTOR / POWER ALIASFUNC TESTTABLE ITEMS
3
GPU DVI & DACS48
06/13/05REV E385505 PRODUCTION RELEASEDE
SCH,MLB,SEEDY
051-67721 102
E
?06/13/05
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
U5500, U5501
I2C
1.2V/900MHZELASTIC INTERFACE
NEO 10S
DEBUG
64-BIT
EXT VGAPAGE 59
HT
PAGE 64
U2900
CPU
PAGE 18
U3LITE
HYPERTRANSPORT
HYPERTRANSPORT
480.8V/533MHZ
J6402
4X = 1.5VI/O = 1.5V
32-BIT
J6401J6400
PAGE 22
CORE
PAGE 60
CONTROL = 2.5V
HYPERTRANSPORT8-BIT
PAGE 38
PAGE 40
TERM
PAGE 37
MAIN MEMORYPAGE 28
APPLE PI
PAGE 29
32-BITAPPLE PI
2.6V/400MHZ
64/128-BITMAIN MEMORY
BUFFER B
64-BIT
FRAME BUFFER
U5400, U5401
FRAMEBUFFER A
TMDS
J5900, J5901
8X AGP
PAGE 55
FRAME
PAGE 91
PAGE 62
J4000J4001
DIMMS
MISC
PAGE
J5902, J5903
17",20" INVERTER
U3AGP
SATA U2300
SATA1
SATA2
1.2V/1.5GHZ
1.2V/1.5GHZ
SATA/150
UATA/133
SATA/150
CONNECTOR
CONNECTORSATA DEV
SATAJXXXX
PAGE 83
UATAJ8301
PAGE 83
J8302
UATA
3.3V/133MHZCONNECTORPAGE 83
PAGE 77PAGE 75
U7500
PCI
PAGE 74
GPIO/PCI64
CORE
PAGE 23
PAGE 84
ETHERNET FIREWIRE
PAGE 88I2S2I2S0
I2S
I2S1SCCA SCCB
8-bit TX/RX
2 Diff pairs
PAGE 90
J9000, J9001
1
FIREWIRE A
0
GMII (3.3V/125MHz)
8-bit TX & 8-bit RX
CONNECTOR
J8700
4 Diff pairs
PAGE 87
PAGE 27
CLOCKS
PULSARU2600
PAGE 26
POWER
ETHERNETCONNECTORS
PAGE 80
PAGE 80
PAGE 25
PAGE 25
FREQUENCIES LISTED ARE MAXIMUM DATA TRANSFER RATES SUPPORTED BY U3LITE
PAGE 54
PCI
SERIES
PAGE 76
J7600
32-bit PCI (5V-3.3V/33MHz)
SOFT MODEM
PAGE 94
PAGE 49
U4900
GPU
CONNECTOR
U9500
PAGE 95
AMP
PAGE 97
SPEAKER
PAGE 97
PAGE 98CONNECTORCOMBO OUTJ9803OPTICAL OUT
LINE OUT
PAGE 98
SPEAKERCONNECTOR
J9801
J9802
MIC
PAGE 98
LINE INCONNECTOR
PAGE 98
PAGE 97
LINE IN
J9800
AMP
U7700
uPD720101
1 2 3
USBPAGE 91
USB 2.0
4 5
J9240
USBJ9210/J9220/J9230
PAGE 92
PAGE 92
CONNECTORS
CONNECTORBLUETOOTH
PAGES 44&45
PARALLEL
TERM
CONNECTOR
AUDIO CODEC
AMPLINE OUT
1394 OHCI (3.3V/98MHz)
RTCPAGE 13
U1301
PAGE 13
SMU
U1300
S/PDIF
NCs CTL-LESS /J9401
PAGE 24
CONNECTORBOOTROM EXTREME
AIRPORT
FRAME BUFFER
RV351LE2.6V/400MHZ
2.6V/400MHZ
1.2V/800MHZ
PCM3052AU8600
FIREWIRE AGIG ETHERNET
SHASTA
VESTA
PAGE 89PAGE 86
FOR DEVELOPMENT ONLY
HARD DRIVE
OPTICAL
1022
E051-6772
SYNC_MASTER=N/A SYNC_DATE=N/A
SYSTEM BLOCK DIAGRAM
ALIAS
IN
IN IN
IN
LM339AV+
GND
IN
LM339AV+
GND
IN
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
PWRON_DISK_SBPWRON_SDSHASTA CORE
FET SWITCHPAGE 10
PP1V2_RUN
HT BUS
LINEAR
PP1V2_PWRON
GPU
GPUGPU
PP1V8_TPVDD
LINEAR
PAGE 50
LINEAR
PP1V5_VDDC_CT
PAGE 50
SWITCHERPAGE 10
1.2V
PP2V5_GPU_A2VDD
PAGE 50
FET SWITCH
PP1V2_ALL
VESTA CORE
1.20VPAGE 50
GPU CORE
IRU3037ACS
RV351
MODEM & BT USB2 HOST ENET PHY
GPU
PP1V8_GPULINEAR
PAGE 50
IRU3037ACS
3.3V
PP3V3_ALL
PAGE 11
3.3V
PAGE 11
PP3V3_PWRON
LINEAR
FW PHY SMU
PAGE 9
GRAPHIC FB
FET SWITCHPP2V5_RUN
RAM TERM
PAGE 22
1.53V
2.8VPAGE 31
SWITCHERU3LITE CORE
PP2V5_RUN_CPU_AVDD
LINEAR
CPU AVDD
PAGE 46
PP1V25_RAM_VTT
1.3V
PP1V5_RUNPOWER SW
PAGE 50
AGP BUS
LINEAR
U3LITE CORE
IRU3037CS PAGE 9
PP2V5_PWRON
RAM VTT
2.59V
SWITCHERIRU3037CS
5VPAGE 11
PP5V_PWRONFET SWITCH
USB CONN
SHASTA HT
PAGE 50
1.5V
PP1V5_PWRON
PULSAR CORE
LINEAR
PAGE 99
4.5V
PAGE 99
5V
AUDIO CODEC
PP5V_RUN_AUDIO
PP4V5_RUN_AUDIOLINEAR
LINEAR
HP/LINEOUT AMP
CPU CORE
0.8~1.2VPAGE 33
SWITCHERSC2643VX*1 SC1211*4
GPUL
POWER CONNECTORPP3V3_RUN
POWER SEQUENCE PIN
SYS_POWERUP_L
(PWR_GOOD_SB_CORE)
FET SWITCH
(TURN_ON_VTT)
(PWR_GOOD_PP2V5)
SYS_POWERUP_L
SMU
PAGE 10
5V
J700PAGE 7
FW CONN 20" LCD INVERTER
PP24V_RUN
20" LCD INVERTER
PP12V_RUN PP5V_RUN HDD & OPTICAL
PP5V_ALL PCI BUS AUDIO CODEC
20" PANEL POWER
DDR DIMM
SWITCHER
402CERM16V20%0.01UF
2
1 C340
10 10
PP2V5_PWRON
402MF-LF1/16W5%150K
2
1R342
100K5%1/16WMF-LF4022
1R343
5%1/16WMF-LF
10K
4022
1R341
5%1/16WMF-LF
10K
4022
1R331
PP5V_ALL
PP3V3_ALL
SOI
3
14
9
8
12
U1100
PP3V3_ALL
46
SOI
3
1
7
6
12
U1100
402MF-LF1/16W5%
100K21
R330
20%16VCERM402
0.01UF2
1 C330
6 7 23
402MF-LF1/16W5%
100K21
R340
3 102
E051-6772
SYNC_MASTER=N/A SYNC_DATE=N/A
POWER BLOCK DIAGRAM
COMPARE_PP2V5
PS_2V_REF
RAIL_CTL_NEG
COMPARE_SB_CORE
SMU_PWRSEQ_P1_1
SMU_PWRSEQ_P9_5
SMU_PWRSEQ_P9_6
SMU_PWRSEQ_P1_2
PWR_GOOD_SB_CORE
SMU_PWRSEQ_P1_0
SMU_PWRSEQ_P1_4PULSAR_POWER_DOWNMAKE_BASE=TRUE
=PULSAR_POWER_DOWN
=PP5V_RUN_CPU
CPU_AVDD_EN
TURN_ON_VTT
TP_SMU_PWRSEQ_P1_0MAKE_BASE=TRUE
PWR_GOOD_PP2V5
TURN_ON_PP1V2_PWRON_L
=PPVCORE_PWRON_SB
31 8 7
11
13
13
13
13
13
13
27
6
31
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
(P 10) CHANGED R1003 TO 5.62K TO RAISE 1.2V REGULATOR TO 1.25(P 80) CHANGED CAPS TO 1UF, REMOVED 10UF THAT WOULD NOT FIT03/25/05
(P 6) ADDED NO_TEST PROPERTIES ON UNUSED SATA2 NETS(P 50) CHANGED R5091 TO 61.9K TO INCREASE VDCC_CT TO ABOUT 1.54V
NO STUFF: R2768,R2772,R2805,R2910
(P 91) <RADAR 3849858> USB CAP COST REDUCTION
ADDED 0 OHM (R2570, NOSTUFF) TO BREAK FW_LOWPWR FROM SHASTA
(P 49) CONNECTED AGPTEST RESISTOR TO VDDP
CHECKIN 13002
03/22/05
VESTA ENET: R1262=10K, C1260=10U, R1251=NO STUFF, C1250=2.2U
ADDED 2.0 GHZ AND ADDITIONAL 1.8 GHZ ALTERNATE PROCESSORS
(P 16) C1653 - REPLACED WITH LOWER HEIGHT CAP
<RADAR 3849718, 3849767, 3849854> MADE ON & VISHAY FETS ALTERNATES
(P 83) <RADAR 3890225> OPTICAL DRIVE CONNECTOR CHANGED TO 516S0235
2.5 V REGULATOR - NEW NARROWER OUTPUT CAPS (C908, C909)
(P 16) CHANGED FAN1 OUTPUT CAP BACK TO THROUGH-HOLE
12/15/04
CHANGED LINE AND NECK WIDTHS TO METRTIC
(P 76) NOW HAVE CORRECT SYMBOL FOR STANDOFFS
(P 5) REMOVED ORIGINAL U3LITE (NEW LAMINATE ONLY FOR C/D)CHANGED U7700 BACK TO LEADED PART
(P 49) STUFFED 470 OHMS FOR R4912 TO AVOID PCI_RESET GLITCH FROM GPU
(P 3) CONNECTED SHASTA CORE POWER FOR POWER SEQUENCING
11/22/04
FRAME BUFFER SWAPS FOR CLEANER ROUTING
CHECKIN 00007
03/07/05
BOM RELEASE REV 11
02/16/05
REMOVED FW PORT POWER CIRCUITRYREMOVED MICRODASH CONNECTORCHECKIN 00003
(P 90) CHANGED R9090 TO 665 OHM
(P 9) <RADAR 3848846> ADDED PAD FOR 1NF CAP TO GATE OF Q903
02/01/05
(P 13) CHANGED U1301 TO LEADED PART (353S0653) DUE TO SUPPLY
(P 28) CHANGED APSYNC SERIES TERMINATION R2806 TO 10 OHM
(P 8) REMOVED SMU DOWNLOAD CONNECTOR FROM DEVELOPMENT BOM
(P 50) <RADAR 3919121> NOSTUFF U5090 AND RELATED COMPONENTS
(P 10,22) SHASTA & U3LITE VCORE IMPROVEMENT: STUFF C1005 & C2205 WITH 2200PF
(P 56) STUFF R5610 TO PULL DOWN ATI_PWM SIGNAL TO ELIMINATE GLITCH(P 27-29) CONNECTED CPU_APSYNC FROM U3LITE AND DISCONNECTED FROM PULSAR
(P 5) ADDED LEAD FREE PARTS AS ALTERNATE FOR U1301 & VRA201 DUE TO SUPPLY
(P 59) <RADAR 3849662> STUFFED PANEL POWER SEQUENCING FOR BOTH 17 AND 20 INCH
(P 92) <RADAR 3742725> CHANGED USB COMMON MODE CHOKES TO 120-OHM 155S0232(P 59) NOSTUFF R5950, STUFF R5923 FOR 17 INCH PANEL POWER FROM PP3V3_RUN
(P 90) FIXED FW PORT NAMING
(P 5) ADDED 34S0284 AND 34S0282 AS U3LITE ALTERNATES (OLD LAM)
01/11/05
01/25/05
(P 16, 17) HAROLD’S FAN CIRCUIT CHANGESCHECKIN 07002
(P 5) ADDED KQA (337S3093) TO ALTERNATE PROCESSOR TABLE
(P 5) MODIFIED PROCESSOR TABLE TO MATCH IBM’S TABLE, AGAIN.
CHECKIN 09003
VESTA RESET AND LOWPWR DELAY
CHECKIN 09002
BOM RELEASE REV 8
02/08/05
02/04/05
02/03/05
01/27/05
02/17/05
CHECKIN 09004
02/10/05
02/09/05
(P 5) CORRECTED SMU PART NUMBER TO 341T1703
(P 75) BOOTROM REFLASHING ISSUE FIX: CHANGED R7502 TO 470 OHM(PP 10, 22, 34, 50) USED COMPARATOR FOR LOW VOLTAGE RAIL LEDS
(P 5) CORRECTED 1.8GHZ CPU APPLE P/N FROM 337S2969 TO 337S2998
CHANGED SDF7601 TO PART 860-056701/18/05
(P 7) TIED BOTH EI RAILS TO 1.5V
(P 9) ADDED EXTRA 10UF INPUT CAP
(PP 16,17) REPLACED FAN CONTROL WITH NEW CIRCUIT
(P 18) <RADAR 3878118> MOVED SMU I2C E BUS
EVT RELEASE (REV 6)
(P 5) NEW SMU PART NUMBER
CHECKIN 05005
CHECKIN 05002
CHECKIN 05004
(P 7) ADDED BATTERY SAFETY BYPASS OPTION (NOSTUFF)
12/17/04
12/20/04
12/16/04
ADDED 2.5V VREG FOR A2VDD
ADDED VESTA ETHERNET LOWPWR CIRCUIT
<RADAR 3848831> MOVED SMU RESET BUTTON TO DEVELOPMENT BOM<RADAR 3849762> MOVED SMU DOWNLOAD CONNECTOR TO DEVELOPMENT BOM<RADAR 3849798> REDUCED CAPACITANCE OF C1100 & C1102
(P 76) TABLED IN NEW STANDOFFS FOR Q85 CARD
ADDED 1.2V REGULATOR FOR VESTA CORE
11/16/04
(P 8) ALIASED VESTA JTAG TO TEST POINT NETS
(P 62) <RADAR 3849855> SHASTA HT_PLL FILTER COST REDUCTION
(PP 56, 58) CONNECTED PWM FROM RV351LEP & PUT IN PROTO WORKAROUND
CHANGED ALIASES TO SYNONYMS
BOM RELEASE REV 04
CHECKIN 04001
VESTA XTAL: R5815=249, R8609=332, R8921=332
(P 56) ADDED PADS FOR STRAPPING RESISTORS TO GPU_GPIO<14>(P 58) ADDED CONSTRAINT SETS
(P 76) FIXED PCI_CBE_L<1> CONNECTION
(P5) ADDED U3L W/ NEW LAMINATE AS ALTERNATE
(PP 16,17) NEW FAN CIRCUIT CAPS (C1603, C1653, C1703)(P 50) <RADAR 3865344> VDDC_CT SET TO 1.50V(P 50) <RADAR 3877855> TP_VDD SET TO 1.80V
(P 59) LED 3 NOW DRIVEN FROM FPD_PWR_ON
MORE PHYSICAL & SPACING UPDATES
CHECKIN 02003(P 56) ADDED OPTION OF USING PWM FROM SHASTA
(P 77) USB2 IDESEL - NOW FROM USB2 SIDE
AUDIO STUFFING CHANGES
(P 36) CONNECTED NEW CPU DIODE REFERENCE
(P 56) ADDED BOMOPTIONS FOR MEMORY STRAPS
(P 25) <RADAR 3849835> NEW SHASTA XTAL
(P 76) ADDED STANDOFFS FOR Q85 CARD
(P 59) SWAPPED INVERTER CONNECTOR GENDER
(P 46) RICHTEK VTT UPDATES
(P 12) VESTA_ENET_LOWPWR UPDATE
ADDED TEST POINTS TO GRAPHICS FOR EXOR TESTINGREMOVED EXTERNAL S/PDIF TRANSMITTERCHECKIN 01005
11/15/04
ADDED Q85 AIRPORT & BLUETOOTH CONNECTORCHECKIN 01006
(P 22) CHANGED Q2250 TO 376S0143
CHECKIN 01007 / BOM RELEASE REV 02
CHECKIN 02002
<RADAR 3865344> SET GPU VDDC_CT VREG TO 1.55V<RADAR 3849854> GPU CORE VREG COST REDUCTION<RADAR 3849820> SHASTA FILTER COST REDUCTION<RADAR 3849772> REMOVED OUTPUT CAP ON 1.2V_ALL VREG
<RADAR 3848850> REGULATOR COST REDUCTIONS
CHECKIN 01001
WHITE LED - CHANGED INDUCTORS TO 0 OHM RESISTORSRGB TERMINATION NOW CONNECTED TO DIGITAL GROUND
AUDIO COST REDUCTIONS <RADAR 3849747 & 3849751>
CHANGED FW LATE VG CIRCUITRY TO MATCH Q78 & Q86REPURPOSED 1.2V REGULATOR FOR VESTA AND SHASTA
TIED PPVCORE_NB DIRECTLY TO PP1V5_PWRON (REMOVED R707)
CONNECTED GPU POWER AND POWER FILTERS
DATECHECKIN 00002
ADDED VESTA
ADDED 2.5V LDO FOR VESTA
CLONED DESIGN FROM GILA (Q45 A/B) REV G
CONNECTED GPU TMDS AND VGAADDED 1.8V GPU VREGCONNECTED FRAME BUFFER
ADDED DEVELOPMENT LEDS FOR VESTA ENET
GPU CORE POWER UPDATES
CHECKIN 00004ADDED RV351LE GPU
REMOVED VESTA CORE REGULATOR
REMOVED GPU VTT VREG
REMOVED EXTERNAL TMDS TRANSMITTER
10/20/04
REMOVED BCM5231 ETHERNET PHYADDED FW LATE VG PROTECTION
STUFFED R1604, R1654, R1704
(P 6) ADDED NO_TESET PROPERTIES(P 12) VESTA ENET LOW POWER FIX
FANS: NO STUFF DZ1601, DZ1651, DZ1701
CHECKIN 05001
BOM RELEASE REV 5
CHECKIN 04003
CHECKIN 04002
(P 90) FIXED FW_CPS SHORT
CHECKIN 03001
PROTO RELEASE (REV 3)
CONVERTED DISCRETES TO LEAD FREE
(P 83) REMOVED SECOND SATA CONNECTOR
CHECKIN 03002
CHECKIN 02004
CHECKIN 02001
ADDED REGULATOR FOR GPU TPVDDADDED POWER SEQUENCING FOR GRAPHICS REGULATORS
(P 90) FIXED ALIAS PROBLEM WITH FW_TPB2_PD
(P 46) REMOVED SEMTECH REGULATOR, ADDED RICHTEK AS ALTERNATE VTT
& STANDOFFS
12/14/04
12/02/04
12/09/04
12/07/04
12/13/04
11/20/04
11/23/04
11/18/04
10/21/04
<RADAR 3616348, 3621390> CHANGED FL5900-2 TO 220 OHM
REMOVED ON BOARD POWER SUPPLY TEMP SENSORCONNECTED GPU GPIOS
U2850 - REMOVED MAXIM AS AN ALTERNATE
REMOVED AGP VREG (VR5001)REMOVED NV18/34 GPU
MOVED VTT VREG TO 2.5V PWRON TO REDUCE CURRENT THROUGH Q903
ADDED SPACING & PHYSICAL CONSTRAINTS TO FRAME BUFFER
CHANGED VOLTAGE SETTING OF 2.5V VREG TO 2.588V FROM 2.62V
CHECKIN 01004
BOM RELEASE REV 01
CHECKIN 01002
CHECKIN 00010
CONNECTED GPU TEMP SENSOR
CHECKIN 01003UPDATED POWER BLOCK DIAGRAM
REMOVED CPU VREG 4TH PHASE
ADDED MORE GPU CONSTRAINTS
FRAME BUFFER PIN SWAPS
ADDED 8MX32 GRAPHICS MEMORY
CHECKIN 00008
CHECKIN 00009
REMOVED 1.6GHZ PROCESSORS
ADDED GPU STRAPS
AUDIO 3052A CODEC
REMOVED VESTA ROM
ADDED GIGABIT ETHERNET CONNECTOR
ADDED 1.55V VREG FOR GPU VDDC_CT
MASTER PAGE SYNC:
CHECKIN 00005
CHECKIN 00006
CHANGED FETS IN GPU CORE FOR COST REDUCTION
<RADAR 3849857> CHEAPER USB2 CRYSTAL
<RADAR 3849656> STUFFED AROUND RGB FILTERS<RADAR 3849622> STUFFED AROUND TMDS FILTERS
<RADAR 3849806> CHEAPER SMU CRYSTAL
<RADAR 3848850> 2.5V VREG COST REDUCTION
ADDED AMBIENT LIGHT SENSOR CONNECTOR
<RADAR 3848846> UPDATE OF 2.5V RUN FET COST REDUCTION<RADAR 3849743> ADDED RESISTORS TO STUFF AROUND USB FILTERS
1.2V VREG COST REDUCTIONS - Q1002 TO NTD60N02R; C1002/3 TO 10UF CERM
CHANGED SOURCE OF Q1003 TO PP1V2_ALL
<RADAR 3848859> 1.2V, 1.5V RUN FET COST REDUCTIONS
<RADAR 3849767> 2.5V VREG COST REDUCTIONS
MOVED GPU ZENER DIODES TO VREG PAGE SINCE THEY SHOULD BE PLACEDNEAR THE VREGS
11/08/04
11/07/04
11/10/04
11/09/04
11/04/04
10/28/04
11/03/04
11/01/04
11/06/04
10/26/04
10/22/04
(P 35) REMOVED DS3500 & DS3501
(P 49) CHANGED GPU TO RV351LEP (338S0231)
(P 76) J7650 - NEW TO ALLOW 5MM CONNECTED HEIGHT
ADDED PAGE TITLE PROPERTIES FOR SCHEMATIC REUSE WITH M23/M33
02/15/05
(P 56) <RADAR 3960901, 4000359> GPU GPIO GLITCH STUFFED: U5600, U5601 NOSTUFF: R5609, R5621DVT RELEASE (REV 10)
(P 12) CHANGED C1250 TO 6.3V PART, TO MATCH A PART ALREADY ON THE BOM
(P 12) YET ANOTHER VESTA RESET/LOWPWR STUFFING CHANGE
BOM RELEASE REV 7
REMOVED P50 AIRPORT AND Q23 BLUETOOTH CONNECTORS, HOLES,
<RADAR 3848887> 5V & 3.3V PWRON FET COST REDUCTIONS
ADDED DEVELOPMENT LEDS TO REGULATORS
(P 59) STUFFED AROUND Q5900 PANEL PWR SEQUENCING
CHECKIN 07003
(P 12) ADDED A CLAMP CIRCUIT FOR ENET_LOWPWR GLITCH
BOM RELEASE REV 9
(P 92) STUFFED USB COMMON MODE CHOKES FOR EMC
(P 50, 59) FINALIZED STUFFING OPTIONS FOR ATI POWER SEQUENCE HACK
(P 12) STUFF R1251, CHANGE C1250 TO 10UF, R1262=100K TO LENGTHEN(P 7) REMOVED ZH701
STUFFED R5092 FOR 1.5V GPU VDCC_CT
(P 56) <RADAR 3960901, 4000359> GPU GPIO GLITCH STUFFED: C5600, C5601
CHECKIN 11002 (03/11)
(P 8,12,89) CHANGED VESTA STRAP PULL UP/DOWN RES TO 1K PER BROADCOM
BOM RELEASE REV 12, CHECKIN 12001
(P 16) REMOVED OPTICAL TEMP SENSOR (U1602) FOR BETTER I2C BUS ROUTING
03/17/05
(P 13) RELOADED Y1300 DUE TO LIBRARY CHANGE
(P 59) HACK FOR PANEL POWER SEQ.OPTION FROM SYS_SLEEP
(P 12) MADE CONNECTION FOR VESTA RESET FINAL FOR PVT
(P 50) ADDED FET TO SPLIT 3.3V POWER TO GPU I/O
(P 6, 58) ADDED TEST POINTS FOR NEC AND ATI
BOM RELEASE REV 13
03/21/05
(P 10,80) ADDED CAPS ON 1.2V RAIL TO REDUCE SATA POWER NOISE(P 5) ADDED LEADED ALTERNATE FOR VRA200, LM1117
CHECKIN 13001
03/24/05
MINOR TEXT/COMMENT CHANGES
(P 50) GPU_VDCC_CT POWER SEQUENCINGCHECKIN 05003
(P 6) REMOVED SOME FUNC_TEST PROPERTIES
(P 92) ADDED NET_PHYSICAL_TYPE = USB2 TO TABLE(P 38) FIXED MIN_NECK_WIDTH ON TD1 AND TD2(P 56) USING PWM FROM ATI GPU(P 59) STUFFED TMDS CHOKES
FIXED I2C_TMDS_SDA/SCL ON P 6(P 46) NOSTUFF RICHTEK VTT VREG
(P 11) CHANGED C1102 TO 16V FOR SUPPLY AND COST ISSUES
(P 25) REPLACED R2566 WITH 0 OHM TO ELIMINATE FW_LOWPWR GLITCH
(P 12) NOSTUFF Q1250 TO DISCONNECT ENETFW_RESET FROM SHASTA GPIO
DESCRIPTION
(P 50) RE-STUFFED GPU 1.5V VDCC_CT BECAUSE OF LEAKAGE WORRIES(P 16,17,36) ADDED SIGNAL ALIASES FOR SCHEMATIC REUSE WITH M23
(P 5) ADDED 353S0687 (LEADED) AS ALTERNATE FOR 353S0959 (LEAD FREE) U9800
(P 59) <RADAR 3919083> CHANGED R5971 AND R5972 TO 33 OHMS
STUFF: R2806,R2911
(P 5) REMOVED BRA FROM PROCESSOR TABLE, REPLACED BPA WITH BNA
(P 50) GPU POWER SEQUENCING
(P 6) ADDED/REMOVED MORE FUNC_TEST PROPERTIES
<RADAR 3848846> 2.5V RUN FET COST REDUCTION
ADDED PHYSICAL CONSTRAINTS
(P 91) CHANGED USB2 CHIP GROUNDING
(P 59) TIED UNUSED BUFFER ENABLE PINS HIGH(P 58) REPLACED THERMAL SENSOR WITH LM63(P 46) SLEEP SIGNAL TURNS OFF VTT VREG
PVT RELEASE (REV A)
BOM RELEASE REV14, CHECKIN 14001
(P 5) ADDED BPL, BRL, AND BNA PROCESSORS TO TABLE
03/28/05
REPLACED EMC FERRITES WITH 0 OHM RESISTORS FOR GRAPHICS AND FANS
ADDED VOLTAGE, LINE WIDTH, AND NECK WIDTH PROPERTIES FOR GRAPHICS
PVT RELEASE 2 (REV B)
04/25/05
REMOVED FW802A FW PHY
(P 12) VESTA_ENET_LOWPWR UPDATE
(P 5) NEW BOOTROM P/N
(P 7) ADDED PLATED HOLE ZH710 FOR TMDS GROUNDING(P 76) FINISHED CONNECTING Q85 CONNECTOR
(P 50) ADDED Q5000 TO INPUT OF GPU VCORE VREG
(P 50) STUFFED R5020 0-OHM TO HELP ICT
(P 50) CHANGED R5091 TO 56.2K TO INCREASE VDCC_CT TO ABOUT 1.65V
(P 54,55) CHANGED HYNIX FRAME BUFFER TO 333S0341 (NEW HYNIX SCREEN, SAME PART)
04/06/05 (P 25,62) RESTUFFED C2500,C2520,C2530,C6200,C6210 FOR SHASTA POWER DECOUPLING
04/22/05
REV C RELEASE
(P 6) ADDED 338S0263 AS ALTERNATE FOR U4900 (RV351 GPU WITH EUTECTIC BUMPING)REV E RELEASE
06/13/05
06/07/05
SYNC_MASTER=N/A
ESYNC_DATE=N/A
1024E051-6772
TABLE_5_ITEM
REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD
QTY DESCRIPTIONPART#
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD
QTY DESCRIPTIONPART#
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_ALT_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD
QTY DESCRIPTIONPART#
PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD
REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD
QTY DESCRIPTIONPART#
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_11_HEAD
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_11_HEAD
REFERENCE DESIGNATOR(S) BOM OPTIONQTY DESCRIPTION VALUE VOLT. WATT. TOL.PART # PACKAGEDEVICETABLE_11_HEAD
TABLE_ALT_ITEM
TABLE_5_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
1.25V
1.25V
1.20V
1.25V
1.25V
1.20V
1.20V
1.25V
1.20V
PROCESSORS
VOLTAGE
MISC PARTS
ASICS
QUALIFIED
1.15V
ALTERNATES
337S3055 IC,DD3.0,2.0G,CPA337S3058 U2900CPU_2_0GHZ
TABLE ITEMSSYNC_DATE=N/ASYNC_MASTER=N/A
051-6772E5 102
IC,U3LITE,NEW LAM,300MM,PBGA343S0320 1 U3
IC,ASIC,VESTA,V1.3 U8600343S0324 1
U3343S0320343S0284 U3L,OLD LAM,300MM
SPEC,VENDOR PACKAGING PROCEDURE062-2082 1 VPP1
341T1703 1 IC,SMU,Q45C/D U1300
IC,FLASH,1MX8,3.3V,90NS341T1667 U75001
376S0207Q3311,Q3321,Q3411
MOSFET,N-CH,VISHAY376S0146
MAX8510,L-F PARTVRA201353S0960 353S0733
DS1338, L-F PARTU1301353S0958 353S0653
U9800 MAX9722 LEAD353S0687 353S0959
KINGBRIGHT LED378S0119LED700,LED702,LED5900
378S0114
MOSFET,N-CH,VISHAY376S0204Q3310,Q3320,Q3410
376S0130
IC,ASIC,SHASTA,V1.1,PBGA U23001343S0283
U2900337S3059 337S3055 IC,DD3.0,2.0G,CRACPU_2_0GHZ
338S0231 U4900 RV351 GPU EUTECTIC338S0263
VRA200 LM1117 LEAD353S0539 353S0898
HEAT SINK ASSEMBLY 17 IN603-6015 1 17_INCH_LCDCRITICAL MECH17
337S3060337S3061 IC,DD3.1,1.8G,JRACPU_1_8GHZ U2900
337S3055 PROCESSOR1 CPU_2_0GHZ2.0GHZ 1.20V U2900?42WIC,GPUL,DD3.1,2.0G,85C,KPACBGA-576-1MM
337S2981 337S3060 IC,DD3.0,1.8G,BPLCPU_1_8GHZ U2900
343S0320343S0321 U3L,NEW LAM,200MMU3
HEAT SINK ASSEMBLY 20 IN603-6016 20_INCH_LCD1CRITICAL MECH20
PCB,SCHEM,MLB1 SCH1051-6772
BARCODE LABEL, MLB, Q45825-6447 1 LBL1
PCB,FAB,MLB MLB11820-1747
343S0320 U3343S0282 U3L,OLD LAM,200MM
337S2969 337S3060 U2900CPU_1_8GHZ IC,DD3.0,1.8G,BPA
337S3060 CBGA-576-1MM 42W1 ? U2900 CPU_1_8GHZ1.20V1.8GHZPROCESSOR IC,GPUL,DD3.1,1.8G,85C,JPA
IC,DD3.0,1.8G,BNA337S2998 CPU_1_8GHZ337S3060 U2900
337S3060 CPU_1_8GHZ U2900337S2970 IC,DD3.0,1.8G,BRA
IC,DD3.0,1.8G,BRL337S2982 337S3060 U2900CPU_1_8GHZ
337S3055337S3093 IC,DD3.1,2.0G,KQACPU_2_0GHZ U2900
U2900 IC,DD3.1,2.0G,KRA337S3055337S3056 CPU_2_0GHZ
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
GENZ SHOULD USE J1400 FOR THE FOLLOWING NETS:
5 TEST POINTS
2 TEST POINTS
5 TEST POINTS
5 TEST POINTS
12 TEST POINTS
5 TEST POINTS
5 TEST POINTS
10 TEST POINTS
2 TEST POINTS2 TEST POINTS
2 TEST POINTS
2 TEST POINTS
2 TEST POINTS
2 TEST POINTS
5 TEST POINTS
2 TEST POINTS
2 TEST POINTS
I307
I337
I338
I344
I345
I346
I347
I348
I349
I350
I356
I357
I358
I360
I361
I362
I363
I364
I365
I371
I372
I373
I374
I375
I376
I377
I378
I379
I380
I381
I382
I383
I384
I385
I386
I387
I388
I389
I390
I391
I392
I393
I394
I395
I396
I397
I398
I399
I400
I401
I402
I403
I404
I405
I406
I407
I408
I428
I429
I430
I431
I432
I433
I434
I435
I436
I437
I438
I439
I440
I441
I442
I443
I444
PP5V_ALL
PP12V_RUN PP5V_RUN
PP3V3_PWRON
PP5V_PWRONPP2V5_RUN
PP1V5_RUN
PP1V2_PWRON
PP3V3_RUN
7 11 12
7 10 11 18
7 10 11 18 22 34 50
7 83
7 83
11 18
11 18 27 58
3 7 23
7 8 13
3 7 8 31
7 33 34 35
22
33 34
33
33
7 8
7 13
7
7
8 13
8 9 10 11 22 46 50 59
7 10 11 13 33
8 13
22
9
58 59
58 59
58 59
80 83
80 83
80 83
80 83
83
80 83
80 83
6 80 83 6 80 83
80 83
83
83
83
83
8 33
36
36
36
33 36
36
33 36
59
59
59
59
58 59
59
59
59
59
59
59
73 74 75 76 77
73 74 76 77
8
74 76
74 76
25 76
73 74 76 77
8 56 74
73 74 76 77
73 74 76 77
73 74 76 77
73 74 76 77
73 74 76 77
74 75 76
76
74 75 76
74 75 76
76
75 76
76
76
92
92
92
92
92
92
92
92
92
25 94
25 94
25 94
25 94
25 94
25 94
25 94
59
59
59
59
59
59
6 59
6 59
7 59
25 101
75
PP24V_RUN
31 36
I781
I782
I784
I785
I786
I787
I788
I789
I790
I791
I792
I793
I794
I795
I796
I797
I798
I799
I800
I801
I802
I803
I804
I805
I806
I807
I808
I809
I810
101
90
101
101
17 18
17 18
18 25
18 25
31 33 36
31 33 36
6 59
6 59
83
I824
I825
I826
I827
I828
I829
I830
I831
I832
I833
I834
I835
I836
I837
I838
I839
I840
I841
I842
I843
I844
I845
I846
I847
I848
I849
I850
I851
I852
I853
I854
I855
I856
I857
I858
I860
I861
I866
I867
I868
I869
I870
I871
I872
I873
I874
I875
I876
I878
I879
I880
I881
I882
I883
I884
I885
I886
I887
I888
I889
I890
I891
I892
I893
I894
I895
I896
I897
I898
I899
I900
I901
I902
I903
I904
I905
I906
I907
I908
I909
I910
I911
I912
I913
I914
I915
I916
I917
I918
I919
I920
I921
I922
I923
I924
I925
I926
I927
I928
I929
I930
I931
I932
I933
I934
I935
I936
I937
I938
I939
59
59
59
59
59
58 59
58 59
I947
I948
I949
I950051-6772
1026E
SYNC_MASTER=N/A SYNC_DATE=N/A
FUNC TEST
PP5V_ALL FUNC_TEST=YESPP12V_RUN FUNC_TEST=YES
PP5V_RUN FUNC_TEST=YES
GND FUNC_TEST=YES
PP3V3_PWRON FUNC_TEST=YESPP5V_PWRON FUNC_TEST=YES
PP2V5_RUN FUNC_TEST=YESPP1V5_RUN FUNC_TEST=YES
PP1V2_PWRON FUNC_TEST=YES
FUNC_TEST=YESPP3V3_RUNPP24V_RUN FUNC_TEST=YES
TP_SB_NC_U4NO_TEST=YES
NO_TEST=YES U5000_VC
TP_SATA_RXD_N2_CNO_TEST=YESTP_SATA_RXD_P2_CNO_TEST=YES
NO_TEST=YES U2200_VC
NO_TEST=YES Q5001_GATE
NO_TEST=YES U3410_DRN
NO_TEST=YES U5000_COMPU5000_FEEDBACKNO_TEST=YES
U5000_GATE_LNO_TEST=YES
U2200_GATE_HNO_TEST=YESNO_TEST=YES U2200_GATE_L
U2200_SSNO_TEST=YES
U3310_DRNNO_TEST=YES
U5000_GATE_HNO_TEST=YES
U2200_VC_DNO_TEST=YES
U2200_COMPNO_TEST=YES
NO_TEST=YES TP_SB_NC_P7
NO_TEST=YES TP_PSYNCOUT
NO_TEST=YES TP_SB_FSTEST
NO_TEST=YES TP_PLS_CLK_66M_0
TP_SB_NC_V3NO_TEST=YES
TMDS_CKM FUNC_TEST=YESTMDS_D1M FUNC_TEST=YES
FUNC_TEST=YESPP3V3_DDCPPVCC_TMDS FUNC_TEST=YES
FUNC_TEST=YESTD0M
FUNC_TEST=YESFILT_ANALOG_BLU
FUNC_TEST=YESGND_CHASSIS_TMDS
NO_TEST=YES CPU1_HTBEN_R
NO_TEST=YES EI_CPU1_SYNC_R
FUNC_TEST=YESTD0P
FUNC_TEST=YESI2C_TMDS_SDAI2C_TMDS_SCL FUNC_TEST=YES
FUNC_TEST=YESFILT_ANALOG_REDFILT_ANALOG_GRN FUNC_TEST=YES
MON_DETECT FUNC_TEST=YES
FUNC_TEST=YESVGA_VSYNC_R
FUNC_TEST=YESINV_20_CUR_HI_F
UATA_HSTROBE FUNC_TEST=YES
SATA_CLK25M_RNO_TEST=YES
I2S1_SYNC FUNC_TEST=YESFUNC_TEST=YESI2S1_BITCLK
FUNC_TEST=YESMODEM_RING2SYS_L
TD1P FUNC_TEST=YESTD2M FUNC_TEST=YES
FUNC_TEST=YESI2S1_SB_TO_DEV_DTO
PP24V_INV FUNC_TEST=YES
FUNC_TEST=YESINV_20_LCD_PWM_GND_20_INV FUNC_TEST=YES
TCKP FUNC_TEST=YES
TD2P FUNC_TEST=YES
FUNC_TEST=YESINV_17_LCD_PWM_F
FUNC_TEST=TRUECPU_VID_R<5..0>
FUNC_TEST=YESKPGND2_FMAX
FUNC_TEST=YESTDIODE_POS_FMAX
FUNC_TEST=YESCORE_ISNS_M
FUNC_TEST=YESKPVDD2_FMAX
GND_17_INV FUNC_TEST=YES
TDIODE_NEG FUNC_TEST=YESFUNC_TEST=TRUEUATA_DASP_L
UATA_CSEL_PD FUNC_TEST=YESUATA_IOCS16_PU FUNC_TEST=YES
FUNC_TEST=YESUATA_INTRQ_RUATA_DMACK_L FUNC_TEST=YESUATA_DMARQ_R FUNC_TEST=YESUATA_STOPUATA_STOP FUNC_TEST=YES
FUNC_TEST=YESUATA_DSTROBE_RUATA_RESET_L FUNC_TEST=YESUATA_CS1_L FUNC_TEST=YESUATA_CS0_L FUNC_TEST=YES
FUNC_TEST=YESU900_FEEDBACK
FUNC_TEST=YESSYS_POWERFAIL_LFUNC_TEST=YESSYS_SLEEP
=PP3V3_ALL_SMU FUNC_TEST=TRUEFUNC_TEST=YES=PPVCORE_PWRON_SB
FUNC_TEST=YES=PP5V_DISKKPVDD2 FUNC_TEST=TRUEI2C_TMDS_SCL FUNC_TEST=YES
FUNC_TEST=TRUEPCI_AD<31..0>
FUNC_TEST=TRUEPCI_CBE_L<3..0>
FUNC_TEST=YESPCI_CLK33M_AIRPORT
FUNC_TEST=YESPCI_SLOTA_REQ_L
FUNC_TEST=YESPCI_SLOTA_GNT_L
FUNC_TEST=YESPCI_SLOTA_INT_L
FUNC_TEST=YESPCI_RESET_L
FUNC_TEST=YESPCI_FRAME_L
FUNC_TEST=YESPCI_TRDY_LPCI_IRDY_L FUNC_TEST=YES
ROM_CS_L FUNC_TEST=YESROM_OE_L FUNC_TEST=YESROM_WE_L FUNC_TEST=YES
FUNC_TEST=YESI2S1_DEV_TO_SB_DTI
PP5V_AGP_RL FUNC_TEST=YES
FUNC_TEST=YESCORE_ISNS_P
I2C_TMDS_SDA FUNC_TEST=YES
FUNC_TEST=TRUEKPGND2FUNC_TEST=TRUEI2C_SB_SDAFUNC_TEST=TRUEI2C_SB_SCLFUNC_TEST=TRUEI2C_HD_TEMP_SDA
I2C_HD_TEMP_SCL FUNC_TEST=TRUEGND_AUDIO_MIC_CONN FUNC_TEST=TRUEFW_VP FUNC_TEST=TRUE
AUD_MIC_IN_N_CONN FUNC_TEST=TRUE
NO_TEST=YES SB_CLK25M_ATA_R
NO_TEST=TRUE EI_NB_TO_CPU_AD<0..43>
EI_NB_TO_CPU_CLK_PNO_TEST=YES
NO_TEST=TRUE EI_CPU_TO_NB_SR_P<0..1>
NO_TEST=YES EI_CPU_TO_NB_CLK_P
NO_TEST=YES TEK_HT_A7
PLS_CLK_66M_1_RNO_TEST=YES
NO_TEST=YES U900_SS
FUNC_TEST=YESPP5V_USB2_PORT3_FPP5V_USB2_PORT2_F FUNC_TEST=YESPP5V_USB2_PORT1_F FUNC_TEST=YES
TP_RAM_MUXEN0NO_TEST=YES
U2100_UNUSEDNO_TEST=YES
TEK_HT_A9NO_TEST=YESTEK_HT_A10NO_TEST=YES
NO_TEST=YES U900_GATE_H
NO_TEST=YES U900_GATE_L
TP_J4001_SJRESET_LNO_TEST=YES
TEK_HT_B10NO_TEST=YES
NO_TEST=YES RFBD<40>
RFBD<36>NO_TEST=YES
AGP_CLK66M_NB_RNO_TEST=YESNO_TEST=YES AGP_CLK66M_GPU_R
NO_TEST=YES ITS_RUNNING
NO_TEST=YES CPU_HTBEN_R
NO_TEST=YES HT_VREF_DEBUG
PN2NO_TEST=YES
Q800_GNO_TEST=YES
NO_TEST=YES TP_SB_NC_T2
NO_TEST=YES TP_SB_NC_R6
TP_SB_NC_R3NO_TEST=YES
TP_SB_NC_W1NO_TEST=YESTP_SB_NC_W3NO_TEST=YES
TP_DUMMY_ANO_TEST=YES
NO_TEST=YES TP_SB_NC_T4
NO_TEST=YES TP_SB_NC_R4
NO_TEST=YES TP_PLS_REF_CML
Q802_BNO_TEST=YES
NO_TEST=YES Q901_GATE
NO_TEST=YES Q902_DRAIN
NO_TEST=YES TP_SB_NC_R7
NO_TEST=YES TP_SB_NC_R8
NO_TEST=YES TP_SB_NC_T1
NO_TEST=YES TP_SB_NC_T5
TP_SB_NC_U1NO_TEST=YESTP_SB_NC_U2NO_TEST=YESTP_SB_NC_U3NO_TEST=YES
TP_SB_NC_U5NO_TEST=YES
NO_TEST=YES TP_SB_NC_V1
TP_RAM_CKE_R<2>NO_TEST=YESNO_TEST=YES Q2201_GATE
NO_TEST=YES TP_DUMMY_B
NO_TEST=YES R2204_P2RAM_CLK66M_NB_RNO_TEST=YES
TP_SB_PLLTESTNO_TEST=YES
NO_TEST=YES TP_PLS_TEST3
TP_RAM_CKE_R<6>NO_TEST=YESNO_TEST=YES TP_RAM_CKE_R<7>
TP_RAM_CS_L_R<2>NO_TEST=YESTP_RAM_CS_L_R<3>NO_TEST=YES
TP_RAM_MUXEN4NO_TEST=YESTP_NB_PM_SLEEP0NO_TEST=YES
NO_TEST=YES TEK_HT_A12
NO_TEST=YES TEK_HT_B12
NO_TEST=YES TP_RAM_CS_L_R<10>
AUD_MIC_IN_P_CONN FUNC_TEST=TRUE
PCI_DEVSEL_L FUNC_TEST=YES
FUNC_TEST=YESPCI_SLOTA_IDSELPCI_PAR FUNC_TEST=YES
FUNC_TEST=YESROM_ONBOARD_CS_L
USB_BT_N FUNC_TEST=YES
USB2_PORT2_N_F FUNC_TEST=YES
USB2_PORT3_N_F FUNC_TEST=YES
FUNC_TEST=YESI2S1_RESET_L
PCI_STOP_L FUNC_TEST=YES
FUNC_TEST=YESAIRPORT_CLKRUN_L_PD
TP_RAM_CS_L_R<11>NO_TEST=YES
TP_RAM_CKE_R<3>NO_TEST=YES
FUNC_TEST=TRUEUATA_DA<2..0>FUNC_TEST=TRUEUATA_DD<15..0>
FUNC_TEST=YESROM_WP_LAUDIO_LO_DET_L FUNC_TEST=YES
ANALOG_BLU FUNC_TEST=YESANALOG_GRN FUNC_TEST=YESANALOG_RED FUNC_TEST=YES
SMU_RESET_L FUNC_TEST=YESRESET_BUTTON_L FUNC_TEST=YESPOWER_BUTTON_L FUNC_TEST=YES
SMU_MANUAL_RESET_L FUNC_TEST=YESVCORE_SENSE_VOUT FUNC_TEST=YES
PP12V_CPU FUNC_TEST=YESPPVCORE_CPU FUNC_TEST=YESPPVCORE_NB FUNC_TEST=YES=PP5V_RUN_CPU FUNC_TEST=YES
FUNC_TEST=YESSYS_POWERUP_L
NO_TEST=TRUE EI_CPU_TO_NB_SR_N<0..1>
NO_TEST=YES EI_CPU_TO_NB_CLK_N
EI_NB_TO_CPU_SR_P<0..1>NO_TEST=TRUEEI_NB_TO_CPU_SR_N<0..1>NO_TEST=TRUE
NO_TEST=YES EI_NB_TO_CPU_CLK_N
NO_TEST=YES CHKSTOP_L
NO_TEST=YES CPU1_HTBEN
NO_TEST=YES EI_CPU1_CLK_N
NO_TEST=YES CPU_INT_LNO_TEST=YES CPU_HRESET_L
NO_TEST=YES EI_CPU1_CLK_P
NO_TEST=YES EI_QACK_L
NO_TEST=YES EI_QREQ_L
NO_TEST=YES EI_SE
NO_TEST=YES I2C_SMU_A_SDA_OUT_LNO_TEST=YES I2C_SMU_A_SCL_OUT_L
NO_TEST=YES MCP_L
NO_TEST=YES RI_L
NO_TEST=YES SYNCENABLE
NO_TEST=YES TP_PROC_TRIGGER_OUT
NO_TEST=YES EI_CPU1_SYNCNO_TEST=YES TP_VREF_CG
NO_TEST=YES TP_SB_NC_R5
HT_CLK66M_NB_RNO_TEST=YESNO_TEST=YES ERROR_LED
NO_TEST=YES AGP_CLK66M_NB_R
AUD_4V5_FBNO_TEST=YES
PLS_CLK_66M_0_RNO_TEST=YES
TP_J4000_SJRESET_LNO_TEST=YES
NO_TEST=YES TP_FBBCS1_L
FUNC_TEST=YESTDIODE_NEG_FMAX
FUNC_TEST=YESINV_17_CUR_HI_F
NO_TEST=YES TP_SB_NC_P8
TP_SB_NC_Y3NO_TEST=YES
RFBD<1>NO_TEST=YESRFBD<2>NO_TEST=YESRFBD<3>NO_TEST=YES
NO_TEST=YES RFBD<6>NO_TEST=YES RFBD<4>
RFBD<8>NO_TEST=YESRFBD<7>NO_TEST=YES
NO_TEST=YES RFBD<9>
RFBD<12>NO_TEST=YESRFBD<11>NO_TEST=YES
RFBD<14>NO_TEST=YESRFBD<13>NO_TEST=YES
NO_TEST=YES RFBD<19>RFBD<18>NO_TEST=YES
NO_TEST=YES RFBD<21>
RFBD<23>NO_TEST=YESNO_TEST=YES RFBD<22>
RFBD<24>NO_TEST=YESRFBD<25>NO_TEST=YES
NO_TEST=YES RFBD<26>
RFBD<29>NO_TEST=YESRFBD<28>NO_TEST=YES
NO_TEST=YES RFBD<35>
RFBD<37>NO_TEST=YES
RFBD<43>NO_TEST=YESNO_TEST=YES RFBD<42>
RFBD<45>NO_TEST=YES
NO_TEST=YES RFBD<47>
RFBD<30>NO_TEST=YES
RFBD<46>NO_TEST=YES
NO_TEST=YES RFBD<38>
NO_TEST=YES U3320_DRN
Q5002_DRAINNO_TEST=YES
RFBD<49>NO_TEST=YESRFBD<48>NO_TEST=YES
USB2_PORT1_P_F FUNC_TEST=YESUSB2_PORT1_N_F FUNC_TEST=YES
FUNC_TEST=YESVCORE_SENSE_GND
SYS_POWER_BUTTON_L FUNC_TEST=YESFUNC_TEST=YESUSB_BT_P
NO_TEST=YES RFBD<32>
NO_TEST=YES RFBD<33>
NO_TEST=YES Q800_D
Q1002_DRAINNO_TEST=YES
NO_TEST=YES Q802_E
NO_TEST=YES Q801_B
PN3NO_TEST=YES
LED801_1NO_TEST=YES
NO_TEST=YES TP_PSRO2
NO_TEST=YES TP_USB2_PWREN<2>
NO_TEST=YES TP_USB2_PWREN<3>
NO_TEST=YES TP_SB_NC_T6TP_SB_NC_T7NO_TEST=YESTP_SB_NC_T8NO_TEST=YES
U2200_VC_RNO_TEST=YES
U900_COMPNO_TEST=YESTP_PCI_CLK_P4NO_TEST=YES
FUNC_TEST=YESU2200_FEEDBACK
NO_TEST=YES RFBD<16>
EI_NB_SYNC_RNO_TEST=YES
NO_TEST=YES EI_CPU_SYNC_R
FUNC_TEST=YES=PP12V_DISK
NO_TEST=YES TP_SB_NC_T3
NO_TEST=YES TP_PLS_TEST2
NO_TEST=YES TP_USB2_PWREN<4>
HT_CLK66M_SB_RNO_TEST=YES
PCI_CLK_P3_RNO_TEST=YESPCI_CLK_P4_RNO_TEST=YES
NO_TEST=YES PN1
NO_TEST=YES PCI_CLK66M_SB_INT_R
NO_TEST=YES R904_P2NO_TEST=YES Q2202_DRAIN
NO_TEST=YES TP_SB_NC_Y1
TP_SB_NC_V4NO_TEST=YES
NO_TEST=YES TP_SB_NC_V2
NO_TEST=YES TP_SB_NC_U6FUNC_TEST=YESVGA_HSYNC_R
UATA_DASP_L_DSNO_TEST=YESNO_TEST=YES U1000_FEEDBACK
NO_TEST=YES U900_VCU900_VC_DNO_TEST=YES
NO_TEST=YES U900_VC_R
TP_PLS_CLK_66M_1NO_TEST=YES
NO_TEST=YES TP_PLS_TEST1
NO_TEST=YES TP_PSRO1
TP_ATTENTIONNO_TEST=YESNO_TEST=YES TP_AGP_MB_AGP8X_DET_L
Q803_BNO_TEST=YES
NO_TEST=YES TP_AFN
NO_TEST=YES TP_NEC_SMI_L
NO_TEST=YES TP_NEC_NTEST1
NO_TEST=YES TP_NEC_SMC
NO_TEST=YES TP_NEC_SRCLK
NO_TEST=YES TP_NEC_TESTNO_TEST=YES TP_NEC_TEBNO_TEST=YES TP_NEC_SRMOD
LED802_1NO_TEST=YES
NO_TEST=TRUE EI_CPU_TO_NB_AD<0..43>
USB2_PORT2_P_F FUNC_TEST=YES
USB2_PORT3_P_F FUNC_TEST=YES
FUNC_TEST=YESI2S1_MCLK
NO_TEST=YES U5000_SS
TP_USB2_PWREN<1>NO_TEST=YESTP_USB2_PWREN<0>NO_TEST=YESTP_SATA_CLK25MNO_TEST=YES
TP_SATA_TXD_N2NO_TEST=YESTP_SATA_TXD_P2NO_TEST=YES
30
30
30
29
29
29
29
29
29
29
29
29
29
29
30
29
29
29
18
18
30
30
29
27
27
28
28
28
28
54
54
27
28
28
28
28
28
14
27
25
29
27
28
28
28
14
14
29
29
29
29
27
27
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
28
91
50
83
83
22
50
34
50
50
50
22
22
22
33
50
22
22
91
29
25
27
91
14
14
27
27
14
14
14
14
64
27
9
8
21
64
64
9
9
40
64
53
53
6
27
7
27
64
33
8
91
91
91
91
91
24
91
91
27
8
9
9
91
91
91
91
91
91
91
91
91
8
22
24
22
27
25
27
8
8
8
8
8
24
64
64
8
8
8
14
14
14
14
14
8
14
14
14
14
14
14
14
14
13
13
14
14
14
14
14 48
91
27
8
6
102
27
40
52
91
91
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
33
50
53
53
53
53
8
10
8
8
34
8
29
92
92
91
91
91
22
9
8
53
27
27
91
27
92
27
27
27
33
27
9
22
91
91
91
91
83
10
9
9
9
27
27
29
29
48
8
29
77
77
77
77
77
77
77
8
14
50
92
92
27
83
83
125
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
SDF700 IS USED FOR CPU HEATSINK MOUNTING
RTC BATTERYALWAYS ON (TRICKLE)
805-5664
SILKSCREEN:POWER
ALL RAILSALWAYS ON WHEN UNIT HAS AC POWER (TRICKLE)
SILKSCREEN:RUN
POWER
GND RAILS
PWRON RAILS
CHASSIS GND
SILKSCREEN:2
RUN RAILS
SMU RESET
SILKSCREEN:1
PIN 13,19,11,22 ARE DIFFERENCE FROM ATX .
RESET
ONLY ON IN RUN
516S0248FOXCONN
P/N 518-0159
ON IN RUN AND SLEEP
PP5V_RUN
PP3V3_PWRON
PP1V5_PWRON
PP2V5_PWRON
PP1V2_PWRON
PP24V_RUN
PP5V_ALL
PP5V_ALL PP3V3_RUN
PP2V5_RUN
PP5V_PWRON
PP1V5_RUN
PP5V_RUNPP3V3_RUN
PP5V_RUNPP12V_RUN
SM21
XW700
SM21
XW701
315R1381
ZH700
SM21
XW702
SM21
XW703
0.1UF20%10VCERM402
2
1 C7040.1UF
402
10V20%
CERM2
1 C705
PP12V_RUN
SMSPST
43
21
SW702
1/16WMF-LF402
1K5%
21
R713
SM
DEVELOPMENT
SPST
43
21
SW701MF-LF1/16W
1K
402
5%
DEVELOPMENT
21
R712
SMSPST
DEVELOPMENT
43
21
SW700
7R4.151
ZH702
6.00MM-PTH1
ZH703
1K
402
1/16W5%
MF-LF
21
R702
SHLD-IO-CONNQ45-TH1
4
32
1
SH700
B0530WXF
SOD-1232 1
DS700
PP1V2_RUN
TSSOP
74LCX125
CRITICAL
314
17
2
U7000.1UF10VCERM
20%
4022
1 C700
SM
FERR-EMI-100-OHMSYS_PWR_BTN_FILT21
L700
SM
FERR-EMI-100-OHM21
L701
GREEN2.0X1.25A
DEVELOPMENT
2
1
LED701GREEN2.0X1.25A
2
1
LED702
PP3V3_PWRON
1/10W603
330
MF-LF5%
21
R700
2.0X1.25AGREEN
2
1
LED700
CRITICAL
HM96110-P2F-RT-TH
9
8
7
6
5
4
3
22
21
20
2
19
18
17
16
15
14
13
12
11
10
1
J700
SM21
XW704
SM21
XW705
SM21
XW706
SM21
XW707
NOSTUFF
THHSK-NUT-6.5MM
1
SDF700
PP12V_RUN
PP24V_RUN
PWR-BUTTST-SM3
CRITICAL
2
1
54
3
SW703
PP3V3_RUN
5%
0
NOSTUFF
MF-LF1/8W
805
21
R720
315R1381
ZH710
NOSTUFF
402MF-LF1/16W5%
021
R703
603
330
1/10W5%
MF-LF
21
R710
402
0.1UF20%
CERM10V2
1 C703
603MF-LF5%
330
1/10W
DEVELOPMENT
21
R701
PP5V_ALL
TH
CRITICAL
BB10209-A51 2
J702
E
7 102
051-6772
SYNC_MASTER=N/A SYNC_DATE=N/A
POWER CONN / ALIAS
VOLTAGE=0
GND_CHASSIS_20_INCH_INVERTER
MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MM
MIN_NECK_WIDTH=0.2MMMAKE_BASE=TRUEMIN_LINE_WIDTH=0.6MM
PP3V3_ALL_RTCVOLTAGE=3.3V
=PP5V_PWRON_VESTA
_PP5V_PWRON_USB=PP5V_PWRON_CPU
=PPPCI64_PWRON_SB=PPPCI32_PWRON_SB
=PP3V3_PWRON_USB
PP5V_AUDIO
=PP5V_PATA
=PP3V3_PWRON_RAM=PP3V3_PWRON_VESTA=PP3V3_PWRON_EI
=PP2V5_PWRON_SB=PP2V5_PWRON_RAM
=PP2V5_PWRON_HT
=PP1V5_PWRON_NB_AVDD
=PP2V5_ENET
=PP3V3_PWRON_CPU
=PPVCORE_NB
ITS_RUNNING
=PP1V2_PWRON_SB=PP1V2_PWRON_DISK_SB
SMU_MANUAL_RESET_L
RESET_BUTTON_L
SYS_POWER_BUTTON_L
ITS_PLUGGED_IN
=PP3V3_ALL_RTC
=PP1V2_PWRON_HT
PP3V3_ALL
GND_AUDIO_SPKRAMP
ITS_ALIVE
=PP24V_GRAPHICS
PP12V_AUDIO_SPKRAMP
=PPVCORE_CPUMAKE_BASE=TRUEPPVCORE_CPU
GND_AUDIO
SYS_POWER_BUTTON_L
SYS_RESET_BUTTON_L
VOLTAGE=0MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MMGND_CHASSIS_17_INCH_INVERTER
=PP5V_ALL_CPU
=PPVCORE_PWRON_SB
PPVCORE_GPU
POWER_GOODPP12V_AUDIO_CODEC
=PP12V_RUN_CPU=PP12V_AGP
SYS_POWERUP_L_BUF
=PP2V5_RUN_CPU
POWER_BUTTON_L
=PP5V_DISK
GND_SYS_PWR_BTN_FILT
=PP5V_AGP
=PP1V2_EI_NB=PP1V2_EI_CPU=PPVCORE_PULSAR
=PP2V5_RUN_RAM
=PP5V_RUN_CPU
=PP1V2_HT
=PP1V2_PULSAR
PP2V5_GPU
PP3V3_VESTA
=PP3V3_ENETFW=PP3V3_FW=PP3V3_ENET
=PP3V3_ALL_CPUMAKE_BASE=TRUEPP3V3_ALL
VOLTAGE=3.3VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MM
PP1V2_VESTA
GND_CHASSIS_AUDIO_EXTERNAL
VOLTAGE=0MAKE_BASE=TRUEMIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
=PP3V3_ALL_SMU
VOLTAGE=1.2VMAKE_BASE=TRUEMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
PP1V2_ALL=PP1V2_ENETFW
MAKE_BASE=TRUEGND_CHASSIS_AUDIO_INTERNAL
PP3V3_AUDIO
=PPVIO_PCI_USB2
=PP3V3_SB_PCI
=PP3V3_RUN_CPU
=PP3V3_PCI
=PP3V3_PATA
=PP3V3_DISK
=PP3V3_AGP
_PP3V3_PWRON_MODEM
_PP3V3_PWRON_BT
=PP3V3_PWRON_SB
=PPVCORE_PWRON_PULSAR
VOLTAGE=3.3VPP3V3_ALL_BATT_SAFETY
MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MM
PP3V3_ALL_BATTVOLTAGE=3.3VMIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MM
=PP12V_DISK
=PP2V5_HT
GND_CHASSIS_LED
GND_CHASSIS_VGA
MIN_LINE_WIDTH=0.6MMVOLTAGE=0
GND_CHASSIS_RJ45MIN_NECK_WIDTH=0.25MM
VOLTAGE=0MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MMGND_CHASSIS_TMDS
GND_CHASSIS_FIREWIREGND_CHASSIS_USB
=PP1V5_AGP
SYS_POWERUP_L
VOLTAGE=3.3V
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MMMAKE_BASE=TRUE
VOLTAGE=5VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MM
PP5V_ALL
MAKE_BASE=TRUE
MAKE_BASE=TRUEMIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.3MM
PP3V3_RUN
VOLTAGE=24V
MAKE_BASE=TRUEMIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
VOLTAGE=12V
MAKE_BASE=TRUEMIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
MAKE_BASE=TRUEVOLTAGE=1.2VMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM
VOLTAGE=1.5VMAKE_BASE=TRUEMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM
MAKE_BASE=TRUEMIN_NECK_WIDTH=0.2MMVOLTAGE=5VMIN_LINE_WIDTH=0.6MM
VOLTAGE=2.5V
MIN_LINE_WIDTH=0.6MMMAKE_BASE=TRUE
MIN_NECK_WIDTH=0.25MM
MAKE_BASE=TRUE
VOLTAGE=1.2VMIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
VOLTAGE=2.5VMIN_LINE_WIDTH=0.6MMMAKE_BASE=TRUEMIN_NECK_WIDTH=0.25MM
VOLTAGE=1.5VMIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
MAKE_BASE=TRUE
VOLTAGE=3.3V
MAKE_BASE=TRUEMIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MM
VOLTAGE=5VPP5V_RUN
VOLTAGE=0VMIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
50 34
31
77
33
22
88
46
60
36 35
30
31
102
76
59
13
18
18 74
40
48
13
59
32 34
13
23
51
28
29
8
55
59 13
101
75
56
74
50
11
12
11
11 25
37
37
8
7
11
102
31 33
7
6
50
59
83
59
18
18
45
6
60
54
90
87
11
102
8
89
100
74
50
25
83
64
59
49
10
11
10
10
59
12
92
36
23
23
91
101
83
46
12
28
23
26
62
28
87
36
22
6
25
80
6
6
6
13
62
7
100
59
100
29 6
102
6
13
59
36
3
22
8
102
33
50
31
6
6
50
14
14
26
44
3
24
26
52
12
89
89
86
36
7
12
101
6
10
86
101
95
77
74
33
25
83
83
48
94
76
23
26
6
60
21
59
87
6
90
92
48
6
6
6
6
125
125
125
G
D
S
MC33465N_30ATR
RESETDELAY
VCC
GND
VOLTAGE DETECTOR
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
DIAG LED
SMU ANALOG VREF
PULSAR ERROR_L LED
VESTA JTAG
BACKUP SMU RESET CIRCUIT
CHKSTOP LED
PULL DOWN
PLL LOCK LED
CPU VID<0:5>
THESE PINS HAVE INTERNAL PULLUPS
NET_SPACING_TYPEELECTRICAL_CONSTRAINT_SET
SMU
PCI CLOCKS
SHASTA JTAG
CONNECTION
SIGNAL FROM POWER SUPPLY
518S0104
2.2V FOR CPU VRM10.NOTE:PULL UP CPU_VID<5>TO
VID CONTROLLED BY SMU
DIFFERENTIAL_PAIR
518-0158
J802 & R826 CAN MOVE TO DEVELOPMENT BOM POST RAMP
POWER_GOOD IS A 5V DRIVEN
2K PULLUP INSIDE P/S
POWER_FAIL_L
SDF700 IS ALSOUSED FOR HEATSINKMOUNTING
CPU HEATSINK SMT NUTS
(SMU_BOOT_EPM)
CONNECTORDOWNLOAD
5%
402MF-LF
10K1/16W
2
1R825
100
5%1/16WMF-LF402
2 1
R826
402MF-LF1/16W
0
5%
21
R802
5%10K
402MF-LF1/16W
2
1R803
402MF-LF1/16W5%10KNOSTUFF
2
1R807
MF-LF
10K1/16W
402
5%
2
1R806
NOSTUFF
0
402
5%1/16WMF-LF
21
R828
74LCX125
TSSOP
614
47
5
U700
74LCX125
TSSOP
814
107
9
U700
TSSOP
74LCX12511
14
137
12
U700
4.7K5%1/16WMF-LF4022
1R870
PP2V5_PWRON
10K5%1/16WMF-LF4022
1R814
402MF-LF
5%10K1/16W
2
1R816
402MF-LF1/16W5%10K
2
1R8175%1/16WMF-LF402
10K
2
1R8085%
402
10K
MF-LF1/16W
2
1R809
402
1K
MF-LF1/16W5%
NOSTUFF
2
1R827
402MF-LF
5%1K
NOSTUFF
1/16W
2
1R829NOSTUFF
402MF-LF
5%1K1/16W
2
1R830
402MF-LF1/16W5%1K
NOSTUFF
2
1R831
PP3V3_RUN
402
10K5%1/16WMF-LF
2
1R804
402
20K5%1/16WMF-LF
2
1R811 NOSTUFF
HSK-NUT-6.5MMTH
1
SDF800TH
NOSTUFF
HSK-NUT-6.5MM
1
SDF801
HSK-NUT-6.5MMTH
NOSTUFF
1
SDF803
TH
NOSTUFF
HSK-NUT-6.5MM
1
SDF802
SM
DEVELOPMENT
RED-4.0MCD2
1D810
OMIT
6P15R5P41
ZH804
CERM16V20%0.01UF
4022
1 C880
CERM16V20%0.01UF
4022
1 C88116VCERM
20%0.01UF
4022
1 C882
CERM16V20%0.01UF
4022
1 C883
402
0.01UF20%16VCERM2
1 C884
DEVELOPMENT
5%1/16WMF-LF402
180
2
1R833
RED-4.0MCDSM
DEVELOPMENT
2
1LED801
Q800_D
DEVELOPMENT
2N7002SOT23-LF
2
1
3
Q800
DEVELOPMENT
5%
402MF-LF1/16W
180
2
1R834
DEVELOPMENT
Q801_BSOT232N3904LF
2
3
1 Q801
2N3906
DEVELOPMENT
SM2
3
1
Q802
MF-LF1/16W
1805%
402
DEVELOPMENT
2
1R835
5%
DEVELOPMENT
402MF-LF1/16W
18021
R836GREEN2.0X1.25A
DEVELOPMENT
2
1
LED802
180
DEVELOPMENT
1/16W5%
402MF-LF
2
1R837
1/16W5%
MF-LF402
DEVELOPMENT
1K
2
1R838
SOT232N3904LF
DEVELOPMENT
2
3
1 Q803
402
1/16W
180
MF-LF
5%
DEVELOPMENT
21
R839
402MF-LF1/16W5%1K
NOSTUFF
2
1R832
I246
I247
RED-4.0MCDSM
2
1LED850
SOT232N3904LF
2
3
1 Q8505%
MF-LF402
1/16W
1K21
R851
PP5V_ALL
1/16WMF-LF
5%
402
180
2
1R850
5%430
402MF-LF1/16W
2
1R813
1/16W
4.7K5%
402MF-LF
2
1R860
1/16W
NOSTUFF
1K
MF-LF5%
4022
1R890
NOSTUFF
CERM402
1uF10%6.3V2
1 C891
SM
NOSTUFF
2
1
3
5
U890
0.01UF
NOSTUFF
402
10%16V
CERM 2
1C890
402MF-LF
5%
0
1/16W
21
R810
NOSTUFF
402CERM20%10V
0.1uF2
1C800
M-ST-THHC17051
9
87
65
43
2
10
1
J802
402
1KMF-LF1/16W5%
2
1R840
5%MF-LF1/16W
402
0
NOSTUFF
2
1R805
PP3V3_ALL
U.FL-R_SMT
DEVELOPMENT
F-ST-SM
1
2
3
J800
PP3V3_ALL
NOSTUFF
5%10K1/16WMF-LF4022
1R812
2.5V
SSOT-23
NOSTUFF
31
2
VR801
2001/16WMF-LF402
1%
NOSTUFF
2
1R818
NOSTUFF
2.2UF20%10V
CERM805
2
1C801
NOSTUFF
CERM10V20%0.47UF
6032
1 C802
BM12B-SRSS-TB
NOSTUFF
F-ST-SM 98765432 12
11
10
1 13
14
J803
1/16W5%
0
MF-LF402
21
R819
MF-LF402
0
5%1/16W
21
R820
1/16W
0
MF-LF
5%
402
21
R821
402MF-LF1/16W5%
021
R822
0
1/16WMF-LF
5%
402
21
R823
0
1/16WMF-LF
5%
402
21
R824
4.7K
DEVELOPMENT
5%
402MF-LF1/16W
2
1R801
402MF-LF
DEVELOPMENT
1/16W
3305%
2
1R800
PP3V3_RUN
051-6772
1028
E
SYNC_MASTER=N/A SYNC_DATE=N/A
SIGNAL ALIAS
J802_6SMU_MANUAL_RESET_L
SMU_BOOT_TXD
SMU_MANUAL_RESET_L
CPU_VID_R<4>
CPU_VID_R<1>
MAKE_BASE=TRUETP_NB_THMI
MAKE_BASE=TRUETP_RAM_CKE_R<2>
MAKE_BASE=TRUETP_RAM_CKE_R<6>
MAKE_BASE=TRUETP_RAM_MUXEN0
MAKE_BASE=TRUETP_RAM_MUXEN4
RAM_CS_L_R<2>
RAM_CS_L_R<3>
SMU_BOOT_RXDSMU_BOOT_BUSY
SMU_BOOT_CNVSS
CPU_VID_R<3>
CPU_VID_R<2>
J802_2
NB_SUSPEND_ACK_L
=PP3V3_ALL_SMU
=PCI_USB2_RESET_L
CPU_VID_R<0>
CPU_VID_R<5>
MAKE_BASE=TRUEPCI_RESET_L
PCI_CLK_GP0
CPU_VID<4>
CPU_VID<2>
CPU_VID<0>
CPU_VID<5>
CPU_VID<3>
CPU_VID<1>
DIAG_LEDMAKE_BASE=TRUE
DIAG_LED_R
LED850P2
LED850P1
SYS_SLEEP
SMU_WARM_RESET_L SYS_WARM_RESET_L
=PPVREF_SMU
PP3V3_ALL_SMU_AVCC
HS_SDF803
HS_SDF800 HS_SDF801 HS_SDF802
Q803_CLED802_1 Q800_G
LED801_1
NB_PMR_OBSV
PPVREF_SMU_ADC_REF
SMU_SLEEP
PLLLOCK
HS_SDF804
=PP5V_RUN_CPU
POWER_GOOD
CHKSTOP_L
SMU_RESET_LERROR_LED
PCI_CLK_P3_PCI_CLK33M_AIRPORT
NB_THMI
MAKE_BASE=TRUETP_THMO NB_THMO
RAM_CKE_R<2>
MAKE_BASE=TRUETP_RAM_CKE_R<3> RAM_CKE_R<3>
RAM_CKE_R<6>
MAKE_BASE=TRUETP_RAM_CKE_R<7> RAM_CKE_R<7>
RAM_MUXEN0
MAKE_BASE=TRUEPCI_CLK33M_AIRPORT
=PCI_CLK33M_USB2MAKE_BASE=TRUEPCI_CLK33M_USB2
RAM_MUXEN4
MAKE_BASE=TRUETP_PCI_CLK_GP1 PCI_CLK_GP1
PCI_CLK_P4MAKE_BASE=TRUETP_PCI_CLK_P4
MAKE_BASE=TRUEPCI_CLK33M_SB_EXT PCI_CLK_P1
RAM_CS_L_R<10>
MAKE_BASE=TRUETP_RAM_CS_L_R<2>
MAKE_BASE=TRUETP_RAM_CS_L_R<10>
TP_ALS0_OUTMAKE_BASE=TRUE
ALS0_OUT
ALS1_OUTTP_ALS1_OUTMAKE_BASE=TRUE
MAKE_BASE=TRUETP_ALS_GAIN_BOOST ALS_GAIN_BOOST
SMU_ONEWIRETP_SMU_ONEWIREMAKE_BASE=TRUE
TP_SYS_SLOT_PWRMAKE_BASE=TRUE
MAKE_BASE=TRUETP_RAM_CS_L_R<11>
TP_SMU_PWRSEQ_P1_3MAKE_BASE=TRUE
SYS_DOOR_AJAR_L
TP_SYS_DRIVE_BAY_INT_LMAKE_BASE=TRUE
SMU_WARM_RESET_LMAKE_BASE=TRUE
NB_WARM_RESET_L
GPU_RESET_L=PCI_ROM_RESET_L
SYS_WARM_RESET_LSMU_RESET P25MM
SYS_COLD_RESET_LSMU_RESET P25MM
Q803_B
MAKE_BASE=TRUETP_JTAG_VESTA_TCK
MAKE_BASE=TRUETP_JTAG_VESTA_TDI =JTAG_VESTA_TDI
=JTAG_VESTA_TDOMAKE_BASE=TRUE
TP_JTAG_VESTA_TDO
MAKE_BASE=TRUETP_JTAG_VESTA_TMS
JTAG_SB_TCKJTAG_SB_TDI
MAKE_BASE=TRUETP_JTAG_SB_TDI
MAKE_BASE=TRUETP_JTAG_SB_TDO JTAG_SB_TDO
JTAG_SB_TMSMAKE_BASE=TRUE
TP_JTAG_SB_TMS
MAKE_BASE=TRUETP_JTAG_SB_TCK
SMU_BOOT_SCLKSMU_BOOT_CE
MAKE_BASE=TRUEJTAG_VESTA_TRST_L
=JTAG_VESTA_TMS
=JTAG_VESTA_TCK
=JTAG_VESTA_TRST_LJTAG_SB_TRST_L
MAKE_BASE=TRUEPPVREF_SMU
=PP5V_RUN_CPU
SYS_POWERFAIL_L
CLOCK_ERROR_L
Q802_B
Q802_E
GND_SMU_AVSS_DAGND
GND_SMU_AVSS
NB_SUSPENDACK_L
SMU_PWRSEQ_P1_3
SYS_SLOT_PWR
FAN_PWM8
PCI_AIRPORT_RESET_L
SYS_DRIVE_BAY_INT_L
TP_FAN_PWM8MAKE_BASE=TRUE
MAKE_BASE=TRUETP_SYS_DOOR_AJAR_L
RAM_CS_L_R<11>
MAKE_BASE=TRUETP_RAM_CS_L_R<3>
59 50 46 22
31 31
11
77
8
77
8
8
8
13
74
10
74
7
29
74
7
36
7
7
33
33
33
33
7
33
33
56
9
13 25
6
14
13
74
13
25
24
6
13
33
6
6
6
13
6
6
6
6
6
6
6
37
37
13
13
13
6
6
24
6
77
6
6
6
27
13
13
13
13
13
13
13
6
8 8
13
13
6 6
6
24
36
13
29
3
7
6
6 6
27
76
24
24
37
6 37
37
6 37
37
6
77
37
27
27 6
27 27
37
6
6
13
13
13
13
6
13
8 24
49
75
8
13
12
12
25
25
25
25
13
13
12
12
12 25
3
6
27
6
6
36
13
13
13
13
13
76
13
37
6
FB
LD
HD
GND
COMP
SS
VCC VC
G
D
S
G
D
S
G
D
S
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
HIGH TO ENABLE
2.5V VOLTAGE REGULATOR
IRU3037CS VREF=1.25VDCVOUT=VREF*(R903+R905)/R905=2.588VDC
SET OUTPUT=2.588V FOR FRAMEBUFFER. NOTE:
PEAK CURRENT OF TOTAL RAILS
9.24A WITHOUT DIMM TERMINATION12.68A WITH DIMM TERMINATION
U900_FEEDBACK
MF-LF
5%1/8W
805
021
R902
402
1%10K1/16WMF-LF
2
1R905
1/4W
1206MF-LF
5%1.1K
NOSTUFF
2
1R904
1206
20%6.3V
10UF
CERM2
1 C901
PP5V_PWRON
25V20%1UF
CERM805
2
1 C904
PP5V_PWRON
SOD-123MBR0520LXXG
2 1
D900
MBR0520LXXGSOD-123
2 1
D901SOD-123MBR0520LXXG
2
1D902
1UF20%10VCERM603
2
1 C917
CERM50V5%
603
2200PF2
1 C905
1UF20%25VCERM805
2
1 C916PP2V5_PWRON
PP2V5_RUN
402CERM
5%25V
220PF2
1 C906
1.53UH
CRITICAL
TH
21
L901SOIIRU3037CS
2 6
8
3
5
4
1
7
U900
402
1%1/16WMF-LF
10.7K
2
1R903
10V20%0.47UF
CERM603
2
1 C915 402
1%1/16W
27.4K
MF-LF2
1R901
5%
402CERM50V
56PF2
1 C913
50VCERM
NOSTUFF
10%3300PF
6032
1 C907
50VCERM
5%3900PF
6032
1 C914
5%
MF-LF1/8W
805
4.7
2
1R900
5%1/16WMF-LF
240
402
DEVELOPMENT
2
1R950
2.0X1.25A
DEVELOPMENT
GREEN
2
1
LED900
IRF7413SO-8
321
4
8765
Q903
PP12V_RUN
SOT23-LF2N7002
2
1
3
Q940
470K5%
402MF-LF1/16W
2
1R940
1206
25V20%1UF
NOSTUFF
CERM2
1 C912
CASE369NTD60N02R
3
1
4
Q901
NTD60N02RCASE369
3
1
4
Q902
1800UF
TH-KZJELEC6.3V20%
2
1 C90220%6.3VELECTH-KZJ
1800UF2
1 C903
TH-KZJ
20%6.3VELEC
1800UF2
1 C910
CERM
10UF6.3V20%
12062
1 C911
NOSTUFF
402CERM50V20%0.001UF
2
1 C940
20%4VELEC
1500UF
TH-KZV2
1 C908
TH-KZV
20%4VELEC
1500UF2
1 C909
1029
E051-6772
SYNC_MASTER=N/A SYNC_DATE=N/A
2.5V VREG
U900_VC
U900_VC_R
SYS_SLEEP
U900_SS
LED_PP2V5_RUN
R901_P2
R904_P2
U900_COMP
Q903_GATE
U900_GATE_H
U900_VC_D
U900_FEEDBACK
U900_GATE_LQ902_DRAINMIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
Q901_GATE
VOLTAGE=2.5VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
59 50 46 22 11 10 8
6
6
6
6
6
6
6
6
6
6 6
6
FB
LD
HD
GND
COMP
SS
VCC VC
G
D
S G
D
S
G
D
S
G
D
S
G
D
S
LM339AV+
GND
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
PP1V2_RUN FET SWITCH
PP1V2_ALL VOLTAGE REGULATOR
PEAK CURRENT OF TOTAL RAILS
VOUT=VREF*(R1003+R1005)/R1005=1.206VDC
~3A
NOTE:
<-- NEED TO VERIFY
IRU3037ACS VREF=0.8VDCSET OUTPUT=1.2V
@ VGS=2.5 VRDSON=0.06 OHM
PEAK CURRENT ??A
@ VGS=?? VRDSON=?? OHM
PEAK CURRENT ??A
PLACE LED1000 NEAR VREG
U1000_FEEDBACK
PP1V2_PWRON FET SWITCH
50V5%2200PFCERM603
2
1 C1005
ELECTH-KZJ6.3V20%1800UF
2
1 C1010CERM
10UF20%6.3V805
2
1 C102020%CERM6.3V10UF
8052
1 C1021TH
1.53UH21
L1001
3300PF
NOSTUFF
10%CERM50V603
2
1 C1007
402MF-LF
10K1%1/16W
2
1R1005
1206
NOSTUFF
5%1/4W
1.1K
MF-LF2
1R1004
NOSTUFF
120625VCERM20%1UF
2
1 C1012
SOD-123MBR0520LXXG
2
1 D1002
PP5V_ALL
1UF20%
60310VCERM2
1 C1017
MBR0520LXXGSOD-123
2 1D1000
MBR0520LXXGSOD-123
2 1D1001
MF-LF8051/8W5%
021
R10001UF20%
805CERM25V2
1 C1000
220PF
402CERM5%25V2
1 C1006
1UFCERM80525V20%
2
1 C1004
SOIIRU3037ACS
2 6
83
5
4
17
U1000
1800UF6.3VELECTH-KZJ
20%2
1 C1009
402
5.62K1%1/16WMF-LF
2
1R1003
PP1V2_RUN
SOT-3632N7002DW
4
5
3Q10042N7002DWSOT-363
1
2
6 Q1004
PP5V_ALL
5%
100K
4021/16WMF-LF
2 1
R1008
PP5V_ALL
SI3446DVTSOP
436521
Q1006
PP1V2_PWRON
2N7002SOT23-LF
2
1
3
Q1005
5%1/16W402
MF-LF
100K2 1
R1009
PP5V_ALL
3900PF50V603CERM5%
2
1 C101468PFCERM50V603
5%2
1 C1013
60316VCERM20%0.1UF
2
1 C10151/16WMF-LF402
1%27.4K
2
1R1001
402
0
1/16WMF-LF5%
21
R1012
NOSTUFF
MF402-11/16W5%
0 21
R1013
PP3V3_ALL
100K1/16W
5%
402MF-LF
2
1R1014
5%4.7
8051/8WMF-LF
2
1R1002
NTD60N02RCASE369
3
1
4Q1001
NTD60N02RCASE369
3
1
4Q1002
CERM
10UF20%6.3V1206
2
1 C1002
12066.3V20%10UFCERM2
1 C1003
SI3446DVTSOP
4
3 6521
Q1003
10UF
1206
20%6.3VCERM2
1 C1001
SOI
DEVELOPMENT3
2
5
4
12
U1001
402
330
DEVELOPMENT
MF-LF1/16W5%
2
1R1050
DEVELOPMENT
2.0X1.25AGREEN
2
1LED1000
DEVELOPMENT
MF-LF1/16W
5%100K
4022
1R1051
MF-LF1/16W
5%47K
402
DEVELOPMENT
2
1R1052
DEVELOPMENT
402
05%
1/16WMF-LF
21
R1053
DEVELOPMENT
402
0.1UF20%10VCERM2
1 C1050
10210E051-6772
SYNC_MASTER=N/A SYNC_DATE=N/A
1.2V VREG
MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MM Q1002_DRAIN
U1000_VC_R
U1000_GATE_H
U1000_FEEDBACK
Q1001_GATE
U1000_GATE_L
PP3V3_RUN
LED_PP1V2_RUN_P
LED_PP1V2_RUN_N
PP5V_RUN
PP3V3_RUN
1V1_REF
PP1V2_RUN_FOR_LED
Q1003_G
PP1V2_ALL
SYS_POWERUP_L
R1001_P2
U1000_SS
U1000_VC
R1004_P2
U1000_VC_D
TURN_ON_PP1V2_PWRON_L
U1000_COMP
PP1V2_ALL
Q1005_G
Q1006_G
SYS_SLEEP
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MMVOLTAGE=1.2V
PP1V2_ALL
50
50
59
34
34
50
22
22
46
18
18
33
22
11 18
11
13
11
10 11
10
50
11
9
7 7
7
34
10
7
10
8
10
6
6
6 6
6
22
7
6
3
7
6
7
D
G
S
LM339AV+
GND
LM339AV+
GND
TAB
VOUTVPWRVCTRL VOUT
ADJ
SENSE
D
G
S
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
Vpwr >= Vout+0.35V
PROCESS SWING
FET ON IN RUN
FET ON IN RUN
PP5V_PWRON
Vctrl >= Vout+1.25V
R2
R1
Iadj=50uA typ
3.30V - 3.45V
Vref=1.250V typ
Vout=Vref(1+R2/R1)+Iadj(R2)
SHUTDOWN -> FLOAT SLEEP -> FLOAT RUN -> LOW
FET ON IN SLEEP
FET ON IN SLEEP
SHUTDOWN -> FLOAT SLEEP -> LOW RUN -> FLOAT
20%10VELEC
100UF
SM2
1 C1100
SI4467DYSM-1
CRITICAL
3
2
1
4
8
7
6
5
Q1100
402MF-LF1/16W5%
100K21
R1100
SOI
CRITICAL3
13
11
10
12
U1100
SOI
3
2
5
4
12
U1100
603MF-LF1/10W
1%47.0K
2
1R1102
CS5253SM
CRITICAL
5
6
3
4
1
2
VR1100
1/16W
100K
MF-LF
5%
402
21
R1103100K
5%
MF-LF1/16W
402
21
R1104
603MF-LF1/10W1%124
2
1R1105
603MF-LF1/10W1%210
2
1R1106N20P80%
CERM
0.1UF
603
16V2
1 C1101
SM-1SI4467DY
3
2
1
4
8
7
6
5
Q1102
SM
47UF
ELEC
20%16V2
1 C1102
MF-LF1/16W1%1K
4022
1R1107
402
1K1%1/16WMF-LF
2
1R1101
SI3443DVTSOP
CRITICAL
4
3 6
5
2
1
Q1103
CRITICAL
TSOPSI3443DV
4
3 6
5
2
1
Q1101
051-6772 E
11 102
SYNC_MASTER=N/A SYNC_DATE=N/A
5V & 3.3V VREGS
MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.5MMRAIL_SLEEP_FET
PP5V_ALL
MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MM
PP3V3_ALLVOLTAGE=3.3V
PP5V_ALL
SYS_SLEEP
SYS_POWERUP_L
MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.5MM3_3V_ALL_ADJ
PP3V3_ALL
RAIL_CTL_POS
RAIL_CTL_NEG
PP5V_RUN
RAIL_RUN_FETMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.2MM
PP3V3_RUN
MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MM
PP3V3_PWRONVOLTAGE=3.3V
MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MM
PP5V_PWRONVOLTAGE=5V
59 50
50
46
34
22
33
22
12
12
10
13
18
18
58
11
59
11
9
10
59
10
10
27
7
11
7
8
7
11
7
7
18
18
6
7
6
6
6
7
3
6
6
6
6
VESTA MISC
1 OF 3
PVDDDVDD AVDDL AVDD
GNDAGNDOVDD
REGSUP1REGSEN1REGCTL1
REGSUP2REGSEN2REGCTL2
2.5V_EN
NC
DNCDNCDNC
NC
TDOTCKTMSTRST*
TDI
RESET*
GND
VOUTVIN
NOISECONT
G
D
S
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
Page Notes
L9/M9
Schmitt trigger
N5/N6
NC
- VESTA1V2_BURST / VESTA1V2_PULSE
N9/N10
BOM options provided by this page:
NC
Power aliases required by this page:
Vout = 2.5V @ 150 mA
2.5V LDO
ETHERNET PORTION IN LOW POWER MODE
Controls operating mode of Vesta 1.2V
(NONE)Signal aliases required by this page:
regulator will be in continuous mode. regulator. If both options are off the
WHEN NOT IN RUN MODE.
Ethernet LowPwr
L6/M6
R1252 to enable wirespeed feature
NOTE: Reset GPIO is active HIGHin reset when system is offTo keep Vesta from being held
CERM
0.1uF20%10V402
2
1 C12100.1uF
402CERM10V20%
2
1 C12110.1uF
402CERM10V20%
2
1 C121220%10VCERM402
0.1uF2
1 C1213
20%0.1uFCERM40210V2
1 C120310VCERM
0.1uF
402
20%2
1 C1202CERM402
0.1uF20%10V2
1 C12010.1uF
402CERM10V20%
2
1 C120020%
CERM402
0.1uF10V 2
1C122210V20%
CERM402
0.1uF2
1C1225
402
20%10V
CERM
0.1uF2
1C12210.1uF
20%10V
CERM402
2
1C1224
0.1uF
402CERM10V20%
2
1C123120%10V
CERM402
0.1uF2
1C1230
0.1uF20%10V
CERM402
2
1C12200.1uF
20%10V
CERM402
2
1C1223
0.1uF
402CERM10V20%
2
1C124320%10V
CERM402
0.1uF2
1C124210V
0.1uF
402CERM20%
2
1C12410.1uF
402CERM10V20%
2
1C1240
20%CERM8056.3V10UF
NO STUFF
2
1 C1250
OMIT
BCM5462FBGA-200D8
E8
E10D7
E7
H4
E2
E1
F2
F1
G4
G5
N4A15
K1F15A7A1
M13C3
K2
J2
F14
C14
B7
B2
A2
J1C15
B15
B1
E9C9B9
N10
N9N6N5M9M6L9L6
R12
R3P11
P10
P5P4
N8
N7
M8
M7
L8
L7
J12
J11
P9
P8
P7
P6
H12
H11
M3U8600
NO STUFF
82KMF-LF
4021/16W
5%
2
1R1251
10%10UFX5R6.3V805
2
1 C1208
FERR-EMI-600-OHM
SM
21
L1200
16VCERM402
0.01uF20%
2
1C1281
4026.3V10%
1uFCERM 2
1C12806.3VX5R805
10UF10%
2
1 C1282
CRITICAL
MM1572FNSOT-25A
51
4
2
3
U1280
402
4.7K5%
1/16WMF-LF
2
1R1252
402
10K1/16W5%MF-LF
2
1R1262
5%
402MF-LF
2.0K1/16W
NOSTUFF
2
1R1260
8056.3VCERM20%10UF
2
1 C1260
2N3904LFSOT23
2
3
1 Q1260
MF-LF4021/16W5%1K
2
1R12610.1UF10VCERM402
NOSTUFF
20%2
1 C1261
5%1/16W
402MF-LF
4.7K
2
1R1263
2N7002SOT23-LF
2
1
3
Q12702N3904LFSOT23
2
3
1 Q1271MF-LF
100K5%1/16W4022
1R1264
6.3V1UFCERM10%
4022
1 C1270
3301/10WMF-LF5%
6032
1R1265
SOT232N3904LF
2
3
1 Q1250
0
402
21
R1253
NO STUFF
402
021
R1254
SYNC_MASTER=N/A
10212E051-6772
SYNC_DATE=N/A
Vesta Core / MiscQ1271_B
VESTA_RESET_H
ENETFW_RESET
Q1271_B
PP1V2_VESTA
PP3V3_VESTA VESTA_RESET_L
=JTAG_VESTA_TCK
VESTA_ENET_LOWPWR
PP2V5_VESTA
Q1270_G
VESTA_ENET_HIGHPWR
PP3V3_VESTA
=PP5V_PWRON_VESTA
PP5V_ALL
=PP3V3_PWRON_VESTA
PP3V3_VESTA
=PP2V5_ENETFW
MIN_LINE_WIDTH=0.5 mmVOLTAGE=2.5V
PP2V5_VESTA
MAKE_BASE=TRUEMIN_NECK_WIDTH=0.25 mm
MIN_LINE_WIDTH=0.2 mmMIN_NECK_WIDTH=0.2 mm
VESTA2V5_NOISE
PP3V3_VESTA
TP_VESTA_DNC_C9
=JTAG_VESTA_TDI
TP_VESTA_REGCTL2
=JTAG_VESTA_TDO
=JTAG_VESTA_TMS
TP_VESTA_DNC_E9
TP_VESTA_2_5V_EN
TP_VESTA_REGCTL1
TP_VESTA_REGSUP1TP_VESTA_REGSEN1
TP_VESTA_REGSUP2TP_VESTA_REGSEN2
TP_VESTA_DNC_B9
=JTAG_VESTA_TRST_L
PP3V3_VESTA
PP3V3_VESTA
PP1V2_VESTA_AVDDL
MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=1.2V
11
12
12
7
12
89 12
12
12
12
25
12
7
8
86
12
7
7
6
7
7
86
12
7
8
8
8
8
7
7
P9[7]P9[6]P9[5]
P8[7]P8[6]P8[5]
P3[7]P3[6]P3[5]P3[4]
P2[6]P2[7]
P2[4]P2[5]
P1[4]P1[3]P1[2]P1[1]P1[0]
P0[4]
P0[0]
P0[2]P0[3]
P0[1]
P0[7]P0[6]P0[5]
P3[3]P3[2]P3[1]P3[0]
P2[3]P2[2]P2[1]P2[0]
P1[5]P1[6]P1[7]
PCNVSSRESET*XOUT
VREFXIN
P7[7]P7[6]P7[5]P7[4]P7[3]P7[2]P7[1]P7[0]
P6[7]P6[6]P6[5]P6[4]P6[3]P6[2]P6[1]P6[0]
P10[0]P10[1]
P9[3]P9[2]P9[1]P9[0]
P8[4]P8[3]P8[2]P8[1]P8[0]
P10[6]P10[7]
P10[2]P10[3]P10[4]P10[5]
VCC
AVSSVSS
AVCC
SQW/OUT
VBAT
SDA
SCL
X1X2
GND
VCC
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
Alternate Functions
provided on another page.
AN26
SMU_VREF should be same signal or
Signal aliases required by this page:
- _PP3V3_PWRON_SMU
- _PP3V3_ALL_SMU
NC
System Management Unit
Y
3.62.7
100K/10uF RC filter at SMU pins.
circuit, but be aware that this will
7.6
1.51.61.7
0.60.5
Port0.4
Portable
2.6
Port2.5
ConsumerPort
6.16.2
6.0
7.27.4
Tower & Server
Y
Y
IOC2IOC3
SSY
Y
YYYY
YY
IOC5
INT3*
AN22
YYYY
Y
YY
Y
Y
YYY
YY
Y
YYY
NNN
(see aliases below)
SS
YY
Y
YY
SYY
S
YY
YY
YY
YYS
YYY
S S
YY
YYY
YYY
Y
YYYY
SINT0*
S
YY
YY
YY
YY
YYSYY
YY
YY
NN
SS
YY
Y
Y
Y
YY
YY
YY
Y
YYY
Y
Y
Y
YY
YY
Entry Desktop
Entry Desktop
Desktop
S
Y
Y
YY
Y
YYYS
YY
YY
YY
YY
Y
YY
Y
Y
YNY
Y
YY
YY
YYYY
Y
YYY
Portable
YYYY Y
YYY
YYS
Y
Y
Y
SY
Y
YS
Y
Y
Y
Y
Y
SY
SY
YS
Y
Y
Y
Y
Y
SY
Y
Y
Y
Y
Y
S
Y
YY
YY Y
Y
YN
YYSS
Y
YY
SSY
YN
S SNNN
Consumer
NN
N
Server
S
YYYY
YY Y
Y
SYYYY
S
YYY
Y
Y
YY
Y
YY
YY
Y
Y
YY
YYY
Y
S
NSSYY
Y
Y
YYY
YY
S
YY
YYY
Y
Y YS
N Y
Y
Y YYYY
S SSS
SS
Consumer
YSS
Y
S
YY
YYY
N
YY
YYY
Y
YY
YY
YY
NN
YYY
YY
Y
Portable
Desktop
Server
SMU Pull-ups / pull-down
NET_SPACING_TYPE DIFFERENTIAL_PAIR
TA1out
SS
NOTE: Some primary and alternate functions
AC adapter ID. affect other analog inputs such as
those capacitors are provided on
(CPU_SENSE_I/CPU_SENSE_V) requires
TA3out
TA4in
IOC6
Power aliases required by this page:
review the latest SMU specification to ensure missing pull-ups are
TB2in
this page.
SCL
Y
IOC4
YY
KI2*
KI0*AN3AN2AN1
Sout3
YY
YY
YY
Y
Y
SCLmm
AN25
INT1*
NMI*
TB1in
AN24
TA1in
TA4out
SDA
AN05
AN07RXD1
CLK0RXD0
RTS1*
CLK1
TXD1
RTS0*/
reuire pull-ups that are not.
Real Time Clock
(NONE)
(NONE)
Sin3TB0in
(BUSY)
AN0
TA3in
AN21
AN23
AN27
Y
CE*
INT2*
AN04
TA2in
IOC7
CTS0*
AN06
AN20
Y INT4*INT5*
SDAmm
YYSS
Keep crystal subcircuit close to SMU.
S
KI3*
TXD0
AN01
AN03AN02
AN00
TA2out
CLK3
N = Alternate functionY = Primary function
S = Spare
- _PPVREF_SMU (SMU AVCC or 2.5V reference)
signal (GND_SMU_AVSS). None of
NOTE: All analog inputs to SMU should have
NOTE: Pinout matches SMU pinout v1.51.
KI1*
Y
provided on this page. Please.
a 100pF capacitor to the SMU AVSS
NY
S
reference used by monitoring
Caps should connect to GND_SMU_AVSS.
NOTE: CPU current/voltage monitoring
BOM options provided by this page:
- _PP3V3_ALL_RTC
ELECTRICAL_CONSTRAINT_SET
Page Notes
SM
CRITICAL
10.000M21
Y1300
QFP-80M30280F8
OMIT
1012
11
77
13
9
798012345
78141516171819
2021222324252627
2829303140414243
3233343536373839
4445464748495051
52535455565758
6869707172737476
59
6061626364656667
6
75
78
U1300
MSOPDS1338
21
8
37
5
6
4
U1301
PP3V3_PWRON
PP3V3_RUN
PP2V5_PWRON
5%1/16WMF-LF402
NO_SMU_I2C_D
021
R1399
MMBD914XXGSOT23
3
1
D1310
1uF
CERM
10%6.3V
4022
1 C132510K5%
MF-LF1/16W
4022
1R1325
150K1/16W
402MF-LF
5%
2
1R1322
20%
402
0.22uF6.3VCERM 2
1C1310
18pF
CERM402
5%50V 2
1C1304
402
18pF
CERM
5%50V 2
1C1305
1/16W
402MF-LF
5%0
2
1R1317
10M
402
5%
MF-LF1/16W
NO STUFF
21
R1316
402
1/16WMF-LF
5%10K
2
1R1327
2.0K
5%1/16WMF-LF402
21
R1312
NO STUFF
2.0K
402MF-LF1/16W5%
21
R1311
100K
5%1/16WMF-LF402
21
R1313
402MF-LF1/16W5%
100K21
R1310
10K
5%1/16WMF-LF402
21
R13025%
1/16WMF-LF402
10K21
R1300
402
10K
MF-LF1/16W5%
12
R1304
10V20%
CERM
0.1uF
4022
1 C1309
10V20%
0.1uF
CERM402
2
1C1308
402
10V20%
0.1uF
CERM 2
1C130210V
0.1uF
CERM402
20%2
1C13016.3V
10uF20%
CERM805
2
1C1300
402CERM
1uF10%6.3V2
1 C1303402
MF-LF1/16W5%
4.721
R1315
SM21
XW1300
32.768KSM-1
CRITICAL
4
1Y1301
10K
5%1/16WMF-LF402
21
R1303
051-677210213E
SYNC_MASTER=N/A SYNC_DATE=N/A
System Management Unit
SYS_COLD_RESET_L
SMU_PWRSEQ_P9_6
SMU_CLK10M_XINSMU_CLK10M_XTAL P25MMSMU_CLK10M_XOUTP25MM
RTC_CLK32K_XTAL RTC_CLK32K_X1P25MM
FAN_TACH4FAN_TACH3
SYS_SLOT_PWR
TP_SMU_SPARE_P10_0
SYS_RESET_BUTTON_L
NB_SUSPENDACK_L
SB_STOPXTALS_L
I2C_SMU_CPU_SDA_OUT_L
FAN_PWM8
I2C_SMU_B_SCL
SMU_PWRSEQ_P9_5
SYS_POWER_BUTTON_LSMU_SUSPENDREQ_L
SB_TO_SMU_INT_L
CLOCK_RESET_L
SMU_SLEEP
SYS_SLEWING_L
I2C_SMU_CPU_SCL_OUT_L
CPU_HRESET
FAN_RPM1
SYS_LED
FAN_RPM2
SYS_PME_LSMU_QREQ
I2C_SMU_CPU_SCL_INFAN_RPM0
I2C_SMU_B_SDA
SMU_BOOT_TXDSMU_BOOT_RXD
SYS_POWERUP_LMAKE_BASE=TRUE
CPU_VID<5>
=PP3V3_ALL_SMU
GND_SMU_AVSS
SYS_POWER_BUTTON_LFAN_TACH1
I2C_RTC_SCL
I2C_RTC_SDA
RTC_CLK32K_X2P25MM
I2C_SMU_A_SCL_OUT_LI2C_SMU_A_SCL_IN
SMU_PWRSEQ_P1_2
FAN_RPM4
CPU_BYPASS
SMU_PWRSEQ_P1_1SMU_PWRSEQ_P1_0
SYS_DRIVE_BAY_INT_L
CPU_SENSE_VCPU_SENSE_I
I2C_SMU_D_SDA
FAN_RPM5SMU_ONEWIRE
SMU_PWRSEQ_P1_4SMU_PWRSEQ_P1_3
I2C_SMU_E_SDAI2C_SMU_E_SCLFAN_TACH0
SYS_DOOR_AJAR_L
FAN_TACH2
FAN_TACH5
CPU_TEMP
SMU_CLK10M_XOUT_RP25MM
FAN_RPM3
I2C_SMU_A_SDA_OUT_LI2C_SMU_A_SDA_IN
FAN_TACH6CPU_VID<0>
FAN_TACH8CPU_VID<2>FAN_TACH7CPU_VID<1>
FAN_PWM7I2C_SMU_CPU_SCL_INFAN_PWM6I2C_SMU_CPU_SDA_IN
SYS_LED_REDFAN_TACH3SYS_LED_GREENFAN_TACH4
ALS0_OUTFAN_RPM3ALS1_OUTFAN_RPM4ALS_GAIN_BOOSTFAN_RPM5SMU_ACINSYS_POWERFAIL_LSMU_BATT_DET_LSYS_DRIVE_BAY_INT_LSYS_LID_OPENSYS_DOOR_AJAR_LSYS_KBDLEDFAN_PWM8
FAN_TACH5 SYS_LED_BLUEDIAG_LEDSMU_CHARGE_BATT
SYS_PME_L
SYS_SLEWING_L
SMU_SUSPENDREQ_L
SYS_COLD_RESET_L
SMU_SLEEP
SYS_POWERUP_L
SYS_RESET_BUTTON_L
=PP3V3_ALL_SMU
CPU_VID<4>CPU_VID<3>CPU_VID<2>CPU_VID<1>
SMU_BOOT_CESMU_BOOT_SCLKSMU_BOOT_BUSY
CPU_VID<0>
I2C_SMU_CPU_SDA_IN
=PPVREF_SMU
SYS_OVERTEMP_LSMU_CHARGE_BATT
=PP3V3_ALL_SMU
SB_SUSPENDACK_L
SMU_WARM_RESET_L
I2C_SMU_D_SCL
SYS_POWERFAIL_L
PP3V3_ALL_SMU_AVCCVOLTAGE=3.3VMIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.25MM
=PP3V3_ALL_RTC
RTC_CLK32K_X1
RTC_CLK32K_X2
SMU_CLK10M_XOUT
SMU_CLK10M_XOUT_RSMU_CLK10M_XIN
SMU_RESET_L
=PP3V3_ALL_SMU
SMU_TO_SB_INT_L
VOLTAGE=0VGND_SMU_AVSS
MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.25MM
SMU_BOOT_CNVSS
33
33
13
13
28
33
11
13
36
33
28
11
13
13
13
36
24
13
25
27
77
10
8
33
13
18
18
13
77
27
25
24
10
8
8
13
8
33
13
13
13
7
24
13
25
25
18
7
7
13
7
14
13
13
14
13
13
13
18
18 8
13
13
13
25
25
24
13
13
7
13
7
13
13
13
18
27
7
8
8
7
13
8
3
13
13
13
13
13
8
7
8
25
18
8
18
3
6
13
25
27
8
13
18
30
16
21
17
13
28
13
16
18
8
8
6
8
6
8
6 16
18
18
13
6
18
3
13
30
3
3
8
33
33
18
13
8
3
8
18
18
16
8
17
13
36
13
13
6
18
8
8
8
13
13
21 13
21 13
8 13
8 13
8 13
6
8
8
8
13 21
8 13
13
13
13
8
8
6
7
6
8
8
8
8
8
8
8
8
13
8
25
13
6
25
8
18
6
8
7
13
13
13
13
13
6
6
25
8
8
A30B30A29B29A28B28A27B27A26B26
B25B24B23B22B21
A25A24A23A22A21
C30D30C29D29C28D28C27D27C26D26C25D25
D22D23D24
D21
C24C23C22C21
E30F30E29F29E28F28E27F27E26F26E25F25
F24F23F22F21
E24E23E22E21
G30H30G29H29G28H28G27H27G26H26
H25 G25
G22G23G24
H21H22H23H24
G21H20H19H18H17H16H15H14H13H12H11H10H9H8H7H6H5H4H3H2H1
G20G19G18G17G16G15G14G13G12G11G10G9G8G7G6G5G4G3G2G1
F20F19F18F17F16F15F14F13F12F11F10F9F8F7F6F5F4F3F2F1
E10
E20E19E18E17E16E15E14E13E12E11
E9E8E7E6E5E4E3E2E1
D20D19D18D17D16D15D14D13D12D11D10D9D8D7D6D5D4D3D2D1
C20C19C18C17C16C15C14C13C12C11C10C9C8C7C6C5C4C3C2C1 B1 A1
A2A3A4A5A6A7A8A9
A10A11A12A13A14A15A16A17A18A19A20
B2B3B4B5B6B7B8B9B10B11B12B13B14B15B16B17B18B19B20
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
NC
NC
NC
DEVELOPMENT
0
5% 1/16WMF-LF 402
21
R1400
DEVELOPMENT
0
5% 1/16WMF-LF 402
21
R1401
DEVELOPMENT0
4025%21
R1402
DEVELOPMENT
5% 402
021
R1403
F-ST-BGAYFS-30-03-H-08-SB
NOSTUFF
H9
H8
H7
H6
H5
H4
H30
H3
H29
H28
H27
H26
H25
H24
H23
H22
H21
H20
H2
H19
H18
H17
H16
H15
H14
H13
H12
H11
H10
H1
G9
G8
G7
G6
G5
G4
G30
G3
G29
G28
G27
G26
G25
G24
G23
G22
G21
G20
G2
G19
G18
G17
G16
G15
G14
G13
G12
G11
G10
G1
F9
F8
F7
F6
F5
F4
F30
F3
F29
F28
F27
F26
F25
F24
F23
F22
F21
F20
F2
F19
F18
F17
F16
F15
F14
F13
F12
F11
F10
F1
E9
E8
E7
E6
E5
E4
E30
E3
E29
E28
E27
E26
E25
E24
E23
E22
E21
E20
E2
E19
E18
E17
E16
E15
E14
E13
E12
E11
E10
E1
D9
D8
D7
D6
D5
D4
D30
D3
D29
D28
D27
D26
D25
D24
D23
D22
D21
D20
D2
D19
D18
D17
D16
D15
D14
D13
D12
D11
D10
D1
C9
C8
C7
C6
C5
C4
C30
C3
C29
C28
C27
C26
C25
C24
C23
C22
C21
C20
C2
C19
C18
C17
C16
C15
C14
C13
C12
C11
C10
C1
B9
B8
B7
B6
B5
B4
B30
B3
B29
B28
B27
B26
B25
B24
B23
B22
B21
B20
B2
B19
B18
B17
B16
B15
B14
B13
B12
B11
B10
B1
A9
A8
A7
A6
A5
A4
A30
A3
A29
A28
A27
A26
A25
A24
A23
A22
A21
A20
A2
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A1
J1400
051-6772 E
14 102
SYNC_MASTER=N/A SYNC_DATE=N/A
CPU LOGIC ANALYZER
EI_CPU_TO_NB_SR_N<1>
EI_CPU1_CLK_P_R
EI_CPU1_CLK_N
EI_NB_TO_CPU_AD<16>EI_NB_TO_CPU_AD<3>EI_NB_TO_CPU_AD<4> EI_CPU_TO_NB_AD<29>
EI_CPU_TO_NB_AD<41>EI_CPU_TO_NB_AD<32>EI_CPU_TO_NB_AD<33>EI_CPU_TO_NB_AD<34>EI_CPU_TO_NB_AD<30>EI_CPU_TO_NB_AD<37>EI_CPU_TO_NB_AD<31>EI_CPU_TO_NB_AD<22>EI_CPU_TO_NB_AD<10>EI_CPU_TO_NB_AD<9>EI_CPU_TO_NB_AD<1>
EI_CPU_TO_NB_AD<2>EI_CPU_TO_NB_AD<0>
CPU1_HTBENCPU_HRESET_L
EI_CPU_TO_NB_AD<6>EI_CPU_TO_NB_AD<21>EI_CPU_TO_NB_AD<20>EI_CPU_TO_NB_AD<25>EI_CPU_TO_NB_AD<26>EI_CPU_TO_NB_SR_P<0>EI_CPU_TO_NB_SR_N<0>EI_CPU_TO_NB_AD<27>
EI_CPU_TO_NB_AD<39>
EI_CPU_TO_NB_AD<19>
CPU_INT_L
EI_CPU_TO_NB_AD<15>
=PP1V2_EI_CPU
EI_CPU_TO_NB_AD<8>EI_CPU_TO_NB_AD<13>
EI_CPU_TO_NB_AD<12>EI_CPU_TO_NB_AD<5>EI_CPU_TO_NB_AD<36>EI_CPU_TO_NB_AD<35>EI_CPU_TO_NB_AD<18>EI_CPU_TO_NB_AD<43>EI_CPU_TO_NB_AD<42>EI_CPU_TO_NB_AD<38>EI_CPU_TO_NB_AD<40>EI_NB_TO_CPU_AD<9>EI_NB_TO_CPU_AD<11>EI_NB_TO_CPU_AD<0>
EI_CPU1_CLK_N
EI_NB_TO_CPU_AD<5>
EI_CPU1_CLK_P
EI_CPU_TO_NB_AD<3>EI_CPU_TO_NB_AD<4>EI_CPU_TO_NB_AD<7>
EI_CPU_TO_NB_AD<11>EI_CPU_TO_NB_CLK_NEI_CPU_TO_NB_CLK_P
EI_CPU_TO_NB_SR_P<1>
EI_CPU_TO_NB_AD<17>EI_CPU_TO_NB_AD<14>EI_CPU_TO_NB_AD<24>EI_CPU_TO_NB_AD<28>EI_NB_TO_CPU_AD<14>EI_NB_TO_CPU_AD<12>EI_NB_TO_CPU_AD<18>EI_NB_TO_CPU_AD<19>
EI_CPU1_SYNCCHKSTOP_L
EI_NB_TO_CPU_AD<13>EI_NB_TO_CPU_AD<15>EI_NB_TO_CPU_AD<17>EI_NB_TO_CPU_AD<21>
EI_NB_TO_CPU_AD<27>EI_NB_TO_CPU_AD<26>EI_NB_TO_CPU_AD<30>EI_NB_TO_CPU_AD<42>EI_NB_TO_CPU_AD<41>
EI_NB_TO_CPU_AD<25>EI_NB_TO_CPU_AD<20>
EI_NB_TO_CPU_AD<28>EI_NB_TO_CPU_AD<29>
EI_NB_TO_CPU_AD<40>EI_NB_TO_CPU_AD<10>EI_NB_TO_CPU_AD<39>EI_NB_TO_CPU_AD<36> EI_NB_TO_CPU_SR_N<0>RI_L EI_NB_TO_CPU_SR_P<0>EI_QREQ_L I2C_SMU_A_SCL_OUT_L
EI_NB_TO_CPU_AD<1>
EI_NB_TO_CPU_AD<22>EI_NB_TO_CPU_AD<33>EI_NB_TO_CPU_AD<43>EI_NB_TO_CPU_AD<2>EI_NB_TO_CPU_AD<38>
EI_NB_TO_CPU_AD<37> SYNCENABLEEI_NB_TO_CPU_SR_N<1> TP_PROC_TRIGGER_OUTEI_NB_TO_CPU_SR_P<1>
EI_NB_TO_CPU_AD<8>EI_NB_TO_CPU_AD<24>EI_NB_TO_CPU_AD<7>EI_NB_TO_CPU_AD<6> EI_SEEI_QACK_L
EI_NB_TO_CPU_AD<35>
=PP1V2_EI_NB
EI_NB_TO_CPU_AD<34>
EI_NB_TO_CPU_AD<32>EI_NB_TO_CPU_AD<23>EI_NB_TO_CPU_CLK_NEI_NB_TO_CPU_CLK_PMCP_LI2C_SMU_A_SDA_OUT_L
=PP1V2_EI_NB
EI_CPU_TO_NB_AD<23>
EI_CPU_TO_NB_AD<16>
EI_NB_TO_CPU_AD<31>
EI_CPU1_CLK_P
EI_CPU1_CLK_N_R
EI_CPU1_SYNCEI_CPU1_SYNC_R
CPU1_HTBENCPU1_HTBEN_R
31
30
30
30
30
28
28
29
27
29
29
29 29
29
29
29
29
29
29
29
29
29
29
29
29
29
30
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
27
29
27
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
27
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29 29
30 29
29 18
29
29
29
29
29
29
29 30
29
29
29
29
29
29 29
29
29
18
29
29
29
29
29
18
18
29
29
29
27
27
28
14
28
28
28 28
28
28
28
28
28
28
28
28
28
28
28
28
28
14
29
28
28
28
28
28
28
28
28
28
28
25
28
18
28
28
28
28
28
28
28
28
28
28
28
28
28
28
14
28
14
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
14
8
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28 28
29 28
28 13
28
28
28
28
28
28
28 29
28 29
28
28
28
28
28 28
28
28
14
28
28
28
28
28
29
13
14
28
28
28
14
14 27
14 27
6
27
6
6
6
6 6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
7
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6 6
6 6
6 6
6
6
6
6
6
6
6 6
6 6
6
6
6
6
6 6
6
6
7
6
6
6
6
6
6
6
7
6
6
6
6
27
6 6
6 6
G
D
S
G
D
S
G
D
S
G
D
S
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
FAN 0
20" HD FAN 603-548717" CPU FAN 603-5519MOTOR CONTROL
TACH GND
20" SYSTEM FAN 603-552117" SYSTEM FAN 603-5518
GND12V DC
TACHMOTOR CONTROL
FAN 1
PP3V3_RUN
HF28040-BM-ST-TH
CRITICAL
4321
J1600
10K1%
4021/16WMF-LF
2
1R1610
1/16WMF-LF402
5%
0 21
R1609
10-89-7062M-ST-TH
CRITICAL
6 54
1
J1601
PP3V3_RUN
10K1/16WMF-LF402
1%
2
1R1659
0
1/16WMF-LF402
5%
21
R1650
402CERM16V20%0.01UF
2
1 C1660603MF-LF1/10W5%
021
R1660
603
05%
1/10WMF-LF
21
R1661
603
05%
1/10WMF-LF
21
R1662
MF-LF1/10W5%
0
603
21
R1663
MF-LF1/10W5%
0
603
21
R1664
CERM25V20%0.1UF
603
NOSTUFF
2
1 C16021.5K5%1/4WMF-LF12062
1R1605
NTHS5443T11206A-03
5
4
876321
Q1603
1/8W
1.5K5%
MF-LF8052
1R1607
SOT23MMBD914XXG
3
1
D1602MF-LF1/8W5%
0
805
21
R160810%0.47UF
805X7R16V2
1 C1604
3.9K5%
1/8WMF-LF805
R1606
PP12V_RUN
SOT23-LF2N7002
2
1
3
Q1602NOSTUFF
05%
1/8WMF-LF805
21
R1603
805
1.0K5%1/8WMF-LF
2
1R1602
2N7002SOT23-LF
2
1
3
Q16010
805MF-LF1/8W5%
21
R1601
1206A-03NTHS5443T1
5
4
876321
Q1653
25V
NOSTUFF
603
0.1UF20%CERM2
1 C16521/8W
1.5K5%
MF-LF8052
1R1657
MF-LF1/8W
0
805
5%
21
R165810%
805
0.47UFX7R16V2
1 C1654
3.9K5%
1/8W805
MF-LF
R1656
SOT23MMBD914XXG
3
1
D1652
MF-LF1/4W5%1.5K
12062
1R1655
SOT23-LF2N7002
2
1
3
Q1652
PP12V_RUN
NOSTUFF
5%1/8WMF-LF805
0 21
R1653
805
1.0K5%1/8WMF-LF
2
1R1652
SOT23-LF2N7002
2
1
3
Q1651
805MF-LF1/8W
05%
21
R1651
6.3X11-TH
120UF20%16VELEC2
1 C1603
120UF16V20%ELEC6.3X11-TH
2
1 C1653
NOSTUFF
FF1/10W5%1K
8052
1R1615
NOSTUFF
1K5%1/10WFF8052
1R1665
MF-LF1/8W5%
0
805
21
R1666
MF-LF8051/8W
05%
21
R1616MBRS130LT3
SM
NOSTUFF
21
D1603
SM
MBRS130LT3
NOSTUFF
21
D1653
16 102051-6772 E
SYNC_MASTER=N/A SYNC_DATE=N/A
FAN 0, 1 & SYSTEM TEMP
F1_VOLTAGE8R5
F1_DRV
FAN_1_CNTL
FAN_0_TACH
FAN_0_CNTL
MIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM
PP12V_RUN_FAN_1_LCVOLTAGE=12V
PP12V_RUN_FAN_1_LCLVOLTAGE=12VMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM
FAN_1_GND_FILTVOLTAGE=0VMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM
FAN_1_TACH_FILT
FAN_1_PWR_FILTMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM
F1_RCFEEDBK
FAN_1_TACH
F0_RCFEEDBK
F0_DRVF0_VOLTAGE8R5 F0_GATESLOWDN
F1_GATESLOWDN
FAN_1_PWRMIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MM
FAN_1_OUT
FAN_0_OUTMIN_LINE_WIDTH=0.5MM
FAN_0_PWR
MIN_NECK_WIDTH=0.25MM
FAN_TACH0
FAN_RPM0
FAN_RPM1
SMU_FAN_TACH1
SMU_FAN_RPM1
FAN_TACH1
SMU_FAN_TACH0
SMU_FAN_RPM0
13
13
13
13
G
D
S
G
D
S
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
+12V DC
I2C ADDR:92(1001001)
518S0193
FAN 2
MOTOR CONTROL
TACHGND
20" CPU FAN 603-545917" HD FAN 603-5520
REMOTE HARD DRIVE TEMP SENSOR
10-89-7062M-ST-TH
CRITICAL
6 5
4
1
J1700
PP3V3_RUN
402MF-LF1/16W1%10K
2
1R1709
05%
402MF-LF1/16W
21
R1700
PP3V3_PWRON M-RT-SM53261-0498
CRITICAL
4
3
2
1
6
5
J1701
NTHS5443T11206A-03
5
4
876321
Q1703
MMBD914XXGSOT23
3
1
D1702
NOSTUFF
CERM
20%0.1UF
603
25V2
1 C17025%
1/8W
1.5K
MF-LF8052
1R1707
0
1/8W
805MF-LF
5%
21
R17080.47UF10%
805X7R16V2
1 C1704
3.9K
5%1/8WMF-LF805
R17061206
1.5K5%1/4WMF-LF
2
1R1705
2N7002SOT23-LF
2
1
3
Q1702NOSTUFF
805MF-LF
5%
0
1/8W
21
R1703
PP12V_RUN
MF-LF1/8W5%1.0K
8052
1R1702
MF-LF805
1/8W5%
021
R1701SOT23-LF2N7002
2
1
3
Q1701
120UF
6.3X11-TH
20%16VELEC2
1 C17031/10W
NOSTUFF
805
1K5%
FF2
1R1715
805
0
5%1/8WMF-LF
21
R1716
NOSTUFF
SM
MBRS130LT3
21
D1703
051-6772 E
17 102
SYNC_MASTER=N/A SYNC_DATE=N/A
FAN 2 & HD TEMP
FAN_TACH2
SMU_FAN_TACH2
SMU_FAN_RPM2
FAN_RPM2
FAN_2_TACH
F2_RCFEEDBK
F2_DRV
FAN_2_CNTL
I2C_HD_TEMP_SDAI2C_HD_TEMP_SCL
F2_GATESLOWDN
FAN_2_PWRMIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MM
F2_VOLTAGE8R5
FAN_2_OUT
18
18
13
13
6
6
LM339AV+
GND
LM339AV+
GND
G
D
S
G
D
S
G
D
S
G
D
S
LM339AV+
GND
LM339AV+
GND
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
AMBIENT LIGHT SENSOR
CPU
J2100 CAN BE USED AS A SECOND TEMP SENSOR
I2C ADDR:94??
PINS 2, 3
PINS 26, 27
U9500 / AU300
AUDIO
PINS 18, 19
SMU NEW ’E’
I2C SB BUS
I2C_CPU_A_SCL
I2C D & E BUS
PINS 2, 3
PINS 7, 8
U5890GPU TEMP SENSOR
I2C ADDR:92
PINS C1, B1
I2C ADDR:90
J2100
I2C B BUS
SMUMASTERU1300
PINS A20, B20
PINS AA20, Y21
MASTERU1300
U1300
PINS 14,25,23,68
SMU
I2C A BUS
U3MASTER
OF EACH DIMM
DIMMSJ4000 = A0J4001 = A2
PINS 91, 92
U3LITE
I2C C BUS
PINS 5, 6
RTCU1301
MASTERU1300
U3
PINS C20, B21
U3LITE ’B’
MASTERU1300
PINS 50, 51
U3U3LITE
CPU JTAG
U2900
MASTERSMU
USE 576 OHM FOR R1811 IF 5V RAIL IS USED FOR REFERENCE
PINS Y9, AB7
SHASTA
U2300MASTER
PINS 36-39
PINS C21, E21
PINS 34, 35
U1702HD TEMP SENSOR
I2C ADDR:98
SMU OLD ’E’
PULSARU2600
PINS 1, 2
U1602OPTICAL TEMP SENSOR
NOTE: REMOVED FOR PVT
402MF-LF1/16W
5%2.0K
2
1R1812
MF-LF1/16W5%2.0K
4022
1R1813
PP2V5_PWRON
PP3V3_RUN
402MF-LF1/16W5%1K
2
1R1814
402
1/16W5%1K
MF-LF2
1R1815
MF-LF1/16W
402
2.0K5%
2
1R18002001/16W
5%
MF-LF402 2
1R18081/16W5%
MF-LF
200
4022
1R1810
SOI
3
13
11
10
12
U1800
SOI
3
2
5
4
12
U1800
2.0K1/16W5%
402MF-LF
2
1R1801
1/16WMF-LF
2.0K
402
5%
2
1R18181/16WMF-LF
2.0K5%
4022
1R1819
SM-LF
05%
1/16W
5
6
7
8
4
3
2
1
RP1800
NOSTUFF
1/16W
5%0
SM-LF
5
6
7
8
4
3
2
1
RP1801
0.1UF
402CERM10V20%
2
1C1800
05%
1/16WMF-LF
402
NOSTUFF
2
1R1820
402MF-LF1/16W5%0
NOSTUFF
2
1R1821
NOSTUFF
402MF-LF1/16W
5%0
2
1R182205%1/16WMF-LF402
NOSTUFF
2
1R1823
402
1/16W5%
0
NOSTUFF
MF-LF
2 1
R1824
0
5%1/16WMF-LF402
NOSTUFF
2 1
R1825
402MF-LF1/16W5%
02 1
R1826
402
1/16W
0
MF-LF
5%
2 1
R1827
2N7002DWSOT-363
1
2
6
Q1800
2N7002DWSOT-363
4
5
3
Q1800
1/16W
402
4.7K5%
MF-LF2
1R182820%10VCERM402
0.1UF2
1 C1802
4.7K
402
5%
MF-LF1/16W
2
1R1811
NOSTUFF
5%2.0K
402
1/16WMF-LF
2
1R1830NOSTUFF
MF-LF402
5%1/16W
2.0K
2
1R1831
603
021
R1832
NOSTUFF
603
021
R1833
2N7002DWSOT-363
4
5
3
Q1801
5%1/16WMF-LF
200
4022
1R18175%
1/16WMF-LF
200
4022
1R1816
2N7002DWSOT-363
1
2
6
Q1801
SOI
3
1
7
6
12
U1800
402MF-LF1/16W5%2.0K
2
1R18022.0K
5%1/16WMF-LF
4022
1R1803
1/16W
402MF-LF
5%4.7K
NOSTUFF
2
1R1809
2.0K5%1/16WMF-LF4022
1R1804
402MF-LF1/16W
5%2.0K
2
1R1805
PP3V3_PWRON
PP2V5_PWRON
SOI
3
14
9
8
12
U1800
PP3V3_ALL
2.0K5%
402MF-LF1/16W
2
1R18062.0K
5%
402MF-LF1/16W
2
1R1807
20%
CERM402
10V
0.1UF2
1C1801
051-6772
10218
E
SYNC_MASTER=N/A SYNC_DATE=N/A
I2C CONNECTIONS
I2C_OPTICAL_SDAI2C_OPTICAL_SCL
NET_SPACING_TYPE=I2CMAKE_BASE=TRUEI2C_SMU_B_SDA
I2C_SMU_B_SCLNET_SPACING_TYPE=I2C
MAKE_BASE=TRUE
I2C_CLOCK_SCLI2C_CLOCK_SDA
I2C_NB_A_SDAI2C_NB_A_SCL
I2C I2C_RTC_SDA
NET_SPACING_TYPE=I2CSMU_CPU_JTAG_OR_I2C
I2CI2C_SMU_E_SDA
NET_SPACING_TYPE=I2C
I2C_CPU_A_SDA
I2CMAKE_BASE=TRUEI2C_SMU_CPU_SCL_OUT_L
I2CMAKE_BASE=TRUEI2C_SMU_CPU_SDA_IN
MAKE_BASE=TRUEI2CI2C_SMU_CPU_SDA_OUT_L
I2CI2C_SMU_CPU_SCL_INMAKE_BASE=TRUE
NET_SPACING_TYPE=I2CMAKE_BASE=TRUEI2C_SMU_A_SCL_OUT_L
I2CI2C_NB_B_SDA
I2C_0V6_REF
I2C_SMU_A_SDA_IN NET_SPACING_TYPE=I2CMAKE_BASE=TRUE
=PP1V2_EI_CPU
JTAG_CPU_TCKJTAG_CPU_TMSJTAG_CPU_TDIJTAG_CPU_TDO
I2C I2C_SMU_D_SCL
I2CI2C_NB_B_SCL
PP5V_RUN
PP5V_PWRON
NET_SPACING_TYPE=I2CI2C_SMU_A_SCL_INMAKE_BASE=TRUE
NET_SPACING_TYPE=I2C
I2C_CPU_A_SDA_TO_CPU
I2C_CPU_SCL_LS
=PP1V2_EI_NB
NET_SPACING_TYPE=I2CI2C_CPU_A_SCL
I2C_CPU_A_SDA_TO_SMU
NET_SPACING_TYPE=I2CMAKE_BASE=TRUEI2C_SMU_A_SDA_OUT_L
PP5V_U1800
MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.25MM
I2CI2C_SMU_E_SCL
I2C_NB_C_SDAMAKE_BASE=TRUE
NET_SPACING_TYPE=I2C
I2C_DIMM_SDAI2C_DIMM_SCL
I2C_NB_C_SCLMAKE_BASE=TRUE
NET_SPACING_TYPE=I2C
I2C I2C_SMU_D_SDA
I2C_AUDIO_SDA
NET_SPACING_TYPE=I2CMAKE_BASE=TRUEI2C_SB_SDA
NET_SPACING_TYPE=I2CMAKE_BASE=TRUEI2C_SB_SCL
I2C_AUDIO_SCL
I2C_ALS_SDAI2C_ALS_SCL
I2C_HD_TEMP_SDAI2C_HD_TEMP_SCL
I2C_GPU_DIODE_SDAI2C_GPU_DIODE_SCL
I2C I2C_RTC_SCL
PP3V3_RUN PP3V3_PWRON
PP3V3_PWRON
50 34
31
22 58
58
30
11
11 27
27
14
29
10 28
14
10 18
18
13
14
30
30
30
30
7
11
14
13
25
25
17
17
7 11
11
13
13
27
27
24
24
13
13
29
13
13
13
13
6
24
13
7
29
29
29
29
13
24
6
6
13
7
29
6
13
24
40
40
24
13
95
6
6
95
21
21
6
6
58
58
13
6 6
6
GRN
BLUE
AMB
+-
+
-
+-
+-
DSG
TABLE_5_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD
QTY DESCRIPTIONPART#
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
J2100 CAN BE USED AS A SECOND TEMP SENSOR
AMBIENT LIGHT SENSOR
518S0193
<-- 17 INCH
<-- 17 INCH
<-- 17 INCH
MAX LED CURRENT = 0.5 / R
PLACE THESE PARTS CLOSE TO SMU IC
(STUFF WHEN SYS_LED_L = ACTIVE HIGH)(AND NO STUFF R2132, R2119 & Q2100)
PLACE THESE PARTS CLOSE TO SMU IC
TO SET LED CURRENT100% DUTY CYCLE OF 3V-PP PWM = 0.5V
PWM INPUT FROM SMU
PWM INPUT FROM SMU
5MV INPUT OFFSET
PWM INPUT FROM SMU
PLACE THESE PARTS CLOSE TO SMU IC
CHANGE R2100 VALUE
PLACE THESE PARTS CLOSE TO SMU IC
TOTAL CURRENT EXCLUDING LEDS CURRENT < 170 MICRO AMPS
20 INCH -->
PWM INPUT FROM SMU
PP5V_PWRON
PP5V_PWRON
AMB-GRN-BLUELATBG66B
RGB_LED
PLCC
4
3
1
5
2
6
LED2100
RGB_LED
TSSOP
LP3244
89
10
11
U2100
PP5V_PWRON
953K
402MF-LF
1%1/16W
RGB_LED
2
1R2109
PP5V_PWRON
RGB_LED
2N3904LFSOT23
2
3
1 Q2102
RGB_LED
1/16W
402MF-LF
1%25.5
2
1R2100
RGB_LED
TSSOP
LP3244
1413
12
11
U2100
RGB_LED
MF-LF1/16W
402
1K
1%
2 1
R2112
RGB_LED
1%1/16W
953K
402MF-LF
2
1R2104
402
1%
MF-LF1/16W
RGB_LED
200K
2
1R210510V
CERM
RGB_LED
603
0.47UF20%
2
1C2106
5%
0
402MF-LF1/16W
RGB_LED
2 1
R2101
402
953K1%
MF-LF1/16W
RGB_LED
2
1R2102
PP5V_PWRON
RGB_LED
2N3904LFSOT23
2
3
1 Q2108
RGB_LED
25.51%1/16W
402MF-LF
2
1R2113
TSSOP
LP324
RGB_LED
4
76
5
11
U2100
402
1K
MF-LF1/16W
RGB_LED
1%
2 1
R2114
MF-LF
1%
402
1/16W
953K
RGB_LED
2
1R2110
RGB_LED
1%1/16W
402MF-LF
200K
2
1R2111
CERM
RGB_LED
603
10V20%
0.47UF2
1C2112
402
1/16WMF-LF
5%
0
RGB_LED
2 1
R2115
MF-LF
1%953K
402
1/16W
RGB_LED
2
1R2118
PP5V_PWRON
RGB_LED
SOT232N3904LF
2
3
1 Q2114
RGB_LED
MF-LF402
25.51%1/16W
2
1R2126
TSSOP
RGB_LED
LP3244
12
3
11
U2100
RGB_LED
1/16W
402MF-LF
1K
1%
2 1
R2127
RGB_LED
1/16W
402MF-LF
1%953K
2
1R2116
RGB_LED
1/16W
402
1%
MF-LF
200K
2
1R2117RGB_LED
603
0.47UF20%10V
CERM 2
1C2118
402
1/16W
RGB_LED
0
5%
MF-LF
2 1
R2130
20%16VCERM402
0.022UF
RGB_LED
2 1
C2101
0.022UF
20%
RGB_LED
402CERM16V
21
C2102
RGB_LED
16VCERM402
0.022UF
20%
2 1
C2104
402CERM10V
RGB_LED
20%0.1UF
2
1C2103
1/16W
NOSTUFF
1K
402
5%
MF-LF
2 1
R2132
PP3V3_PWRONFDV302P
SOT-23
NOSTUFF
2
1
3
Q2100
SM-1
RGB_LED
400-OHM-EMI
2
1
L2100
SM-1400-OHM-EMI
RGB_LED
2
1
L2101
RGB_LED
SM-1400-OHM-EMI
2
1
L2102
5%25V
RGB_LED
CERM402
220PF21
C2105
CERM25V5%
RGB_LED
220PF
4022
1 C2107
RGB_LED
SM-1
400-OHM-EMI21
L2104
CERM402
25V5%
220PF
RGB_LED
2 1
C2108
RGB_LED
5%25V
402CERM
220PF2 1
C2109
WHITE_LED
402CERM
5%
220PF
25V
2 1
C2110220PF25V5%
CERM
WHITE_LED
4022
1 C2111
1/16W
402
5%
MF-LF
0
WHITE_LED
2 1
R2107
953K
402MF-LF
1%1/16W
NOSTUFF
2 1
R2119
SM
WHITE_LED
FDV301N
2
1
3
Q2101
WHITESM6
2 1
LED2101
PP3V3_PWRON
M-RT-SM53261-0498
CRITICAL
4
3
2
1
6
5
J2100PP3V3_PWRON
1/10W5%
0
MF-LF603
WHITE_LED
21
R2120
MF-LF1/10W5%0
603
WHITE_LED
2
1R2121
17_INCH_LCD
56.21/16W
402MF-LF
1%
2
1R2103
WHITE_LED
1K
1/16WMF-LF402
5%
2 1
R2106
WHITE_LED
4.7K5%
402
1/16WMF-LF
2
1R2129
NOSTUFFR2100,R2113,R21263114S1821 RES, 18.2 OHM, 1%, 402
RES, 39.2 OHM, 1%, 402 R21031 20_INCH_LCD114S3921
E051-6772
21 102
SYNC_MASTER=N/A SYNC_DATE=N/A
INDICATOR LED
SYS_GATE
B_DRVMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MM
SYS_DRV_AMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MM
SYS_LED_DRV_K
MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MM
MIN_LINE_WIDTH=0.6MMB_DRV_K
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.6MMR_DRV_K
MIN_NECK_WIDTH=0.2MM
G_DRV
MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MM
G_DRV_K
MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MM
GND_CHASSIS_LED
G_DRV_FBMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MM
GND_CHASSIS_LED
B_PWM_IN_H
B_PWM_DC
R_IN_OFFSET
SYS_LED_GREENMAKE_BASE=TRUE
R_PWM_IN_HSYS_LED_REDMAKE_BASE=TRUE
R_BASE_DRV
R_DRV_FBMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MM
R_DRVMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MM
MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MMB_DRV_FB
SYS_LED_BLUEMAKE_BASE=TRUE
G_PWM_IN_H
B_IN_OFFSET
GND_CHASSIS_LED
RGB_LED_AMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MM
SYS_LED_IN
G_IN_OFFSETG_PWM_DC
SYS_LED_DRV_C
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
R_PWM_DC
B_BASE_DRV
SYS_LED
G_BASE_DRV
U2100_UNUSED
I2C_ALS_SDAI2C_ALS_SCL
SYS_LED_H
SYS_DRV_K
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
21
21
21
7
7
13
13
13
7
13
6
18
18
G
D
S
GNDGND
VDD
(SYM 6 OF 7)
G
D
S
FB
LD
HD
GND
COMP
SS
VCC VC
G
D
S
LM339AV+
GND
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
PLACE LED2200 NEAR VREG
RDSON=0.012 OHM@ VGS=3.5 V
U2200_FEEDBACK
NOTE:
VOUT=VREF*(R2203+R2205)/R2205=1.53VDCIRU3037CS VREF=1.25VDCSET OUTPUT=1.5VDC FOR U3LITE CORE
7.73A OF PEAK CURRENT DRAW ON PCORE_NB
IS D2250 NEEDED?
CHECK FETS
1.5V RUN FET
20%6.3VCERM1206
10UF2
1 C2201
TH-KZJELEC6.3V20%1800UF
2
1C2209
TH-KZJ
20%1800UFELEC6.3V2
1 C2208
1/16W
10K0.5%MF-LF6032
1R2205
CERM603
1UF10V20%
NOSTUFF
2
1 C2207
25VCERM1206
1UF20%
NOSTUFF
2
1 C2212
PP5V_PWRON
NTD60N02RCASE369
Q22015%
MF-LF
0
8051/8W
21
R2202805
1UF20%25VCERM2
1 C2204
402CERM25V5%220PF
2
1 C2206
PP5V_PWRON
603
20%16VCERM
0.1UF2
1 C2214
1UF25VCERM805
20%2
1 C2216
1UF
80525VCERM20%
2
1 C2217
MBR0520LXXGSOD-123
2 1D2200
SOD-123MBR0520LXXG
2 1D2201
SOD-123MBR0520LXXG
2
1 D2202
PBGAV1.0-300MMU3LITE
OMIT
R14
T16
T11
U18
U13
U10
V15
K15
V12
K12
L17
L14
M16
M11
N18
N13
P15
P12
R17
W17
W14
AC13
B22B16B13B4
AC7
D25D19D10D7D2F22F16F13G27G23
AE25
G4H19H10J14J9K25K21K16K11K6
AE19
K2L18L13L10M20M15M12N27N23N17
AE10
N14N9N8N4P19P16P11R18
R13R10
AE4
T27T23T20T15T12T6T2
U17U14U9
AG22
V19V16V11W25W21W18W13W8W4
Y20
AG16
Y15Y12
AA19AA10AB27AB23AB6AB2
AC22AC16
AG13AG7
U3
NTD60N02RCASE369
3
1
4Q2202
1.53UH
TH
21
L2201
1.1KMF-LF1/16W1%
402
NOSTUFF
2
1R2204
IRU3037CSSOI
2 6
83
5
4
17
U2200
2.21K1/16W0.5%MF-LF6032
1R2203
402
27.4K1%1/16WMF-LF
2
1R2201
603CERM50V5%3900PF
2
1 C2215 603
68PF5%50VCERM2
1 C2213
PP5V_PWRON
4.75%1/8WMF-LF8052
1R2200
PP1V5_RUN
10BQ040PBFSMB
NOSTUFF
21
D2250
40210V
0.1UF
CERM20%
NOSTUFF
21
C2250
SOT23-LF2N7002
2
1
3
Q2251
PP5V_PWRON
1/16W5%
MF-LF402
100K2 1
R2250
TH-KZJ
20%ELEC6.3V
1800UF2
1C22026.3VELEC
1800UF20%
TH-KZJ2
1C220310UF6.3VCERM20%
12062
1 C2210
SO-8IRF7413
32
1
4
87
65
Q2250
402
330
DEVELOPMENT
MF-LF1/16W5%
2
1R2260
2.0X1.25A
DEVELOPMENT
GREEN
2
1LED2200
DEVELOPMENT
SOI
3
1
7
6
12
U1001MF-LF1/16W5%
0
402
DEVELOPMENT
21
R2261
60350V5%2200PFCERM2
1 C2205
CERM10V20%0.1UF
4022
1 C2222
402
20%10VCERM
0.1UF2
1 C2223
CERM20%0.1UF10V402
2
1 C2225
402
0.1UF20%10VCERM2
1 C2228
CERM10V20%0.1UF
4022
1 C2227
402
20%10VCERM
0.1UF2
1 C223010V20%
402CERM
0.1UF2
1 C2229
402
0.1UF20%CERM10V2
1 C2232
CERM10V0.1UF
402
20%2
1 C2231
402
0.1UF20%10VCERM2
1 C2234
CERM10V20%0.1UF
4022
1 C2233
402
0.1UF20%10VCERM2
1 C2236
CERM10V20%0.1UF
4022
1 C22350.1UF20%10VCERM402
2
1 C2238
CERM10V20%
402
0.1UF2
1 C2237
402
0.1UF20%10VCERM2
1 C224010V20%0.1UF
402CERM2
1 C2239
402
0.1UF20%10VCERM2
1 C2242
CERM10V20%0.1UF
4022
1 C22430.1UF20%10VCERM402
2
1 C2244
402
0.1UF20%10VCERM2
1 C2245
402
0.1UF20%10VCERM2
1 C2246
402
0.1UF20%10VCERM2
1 C2247
051-6772 E22 102
SYNC_MASTER=N/A SYNC_DATE=N/A
U3LITE CORE POWER
MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MM Q2202_DRAIN
U2200_GATE_L
U2200_FEEDBACK
PPVCORE_NBVOLTAGE=1.5V
MAKE_BASE=TRUEMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
Q5006G
Q2201_GATE
U2200_GATE_H
U2200_VC_DU2200_VC_R
R2204_P2
U2200_VC
R2201_P2
PPVCORE_GPU
SYS_SLEEP
U2200_SS
PP3V3_RUN
LED_PP1V5_RUN_P
1V1_REF
PP1V5_RUN_FOR_LED
LED_PP1V5_RUN_N
U2200_COMP
=PPVCORE_NB
=PPVCORE_NB
=PPVCORE_NB
59 50
50
46
34
11
18
10
11
51
9
10
50
50
8
7
34
22
22
6 6
6
6
6
6
6 6
6
6
7
6
6
6
10
6
7
7
VIO1
POWER
VDDO33
VDDO25
VIO2
VDDP_KL
VDDC
GND
GND
GND
(1 OF 8)
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
For PCI_AD<63..32>
For PCI_AD<31..0>
DIGITAL - 1.2V - 950 mA (1175 mW)ANALOG12 - 1.2V - 600 mA ( 760 mW)
I/O 3.3 - 3.3V - 220 mA ( 770 mW)
Total: 3015 mW
I/O 2.5 - 2.5V - 20 mA ( 60 mW)VDDPs - 2.5V - 100 mA ( 250 mW)
Shasta max (est 06/30/03) current:
Power aliases required by this page:
Page Notes
Must power Shasta VCore rail before any
_PPPCI64_PWRON_SB to same if 64-bit
characteristics required by the PCI
NOTE: PCI pads use the VIO supply to meet- _PPVCORE_PWRON_SB (1.2V)
Power Sequencing:
BOM options provided by this page:(NONE)
(NONE)Signal aliases required by this page:
appropriate PCI bus voltage and
spec for 5V vs. 3.3V operation. Connect _PPPCI32_PWRON_SB to
PCI, otherwise 3.3V.
different drive timing
- _PP3V3_PWRON_SB
- _PPPCI64_PWRON_SB (to 5V or 3.3V)- _PPPCI32_PWRON_SB (to 5V or 3.3V)
- _PP2V5_PWRON_SB
other Shasta supplies.
0.1uF
402CERM10V20%
2
1 C2304
20%0.1uF
402CERM10V2
1 C230520%10VCERM402
0.1uF2
1 C23060.1uF
402CERM10V20%
2
1 C230710VCERM
20%
402
0.1uF2
1 C23080.1uF
CERM402
10V20%
2
1 C2309
20%10VCERM402
0.1uF2
1 C230220%10VCERM402
0.1uF2
1 C23010.1uF
402CERM10V20%
2
1 C2300
20%10VCERM402
0.1uF2
1 C231420%10VCERM402
0.1uF2
1 C23130.1uF
CERM10V20%
4022
1 C23120.1uF
402CERM10V20%
2
1 C23110.1uF10V20%
CERM402
2
1 C2310
0.1uF
402CERM10V20%
2
1 C233420%10VCERM402
0.1uF2
1 C2333
20%10VCERM402
0.1uF2
1 C23390.1uF
402CERM10V20%
2
1 C2338
0.1uF
402CERM10V20%
2
1 C233220%10VCERM402
0.1uF2
1 C2331
20%10VCERM402
0.1uF2
1 C23370.1uF
402CERM10V20%
2
1 C2336
0.1uF
402CERM10V20%
2
1 C2330
20%10VCERM402
0.1uF2
1 C2335
20%10VCERM402
0.1uF2
1 C232420%10VCERM402
0.1uF2
1 C2323
0.1uF
402CERM10V20%
2
1 C23290.1uF
402CERM10V20%
2
1 C2328
0.1uF
402CERM10V20%
2
1 C23220.1uF
402
10V20%
CERM2
1 C2321
20%10VCERM402
0.1uF2
1 C232720%10VCERM402
0.1uF2
1 C2326
20%10VCERM402
0.1uF2
1 C2320
0.1uF
402CERM10V20%
2
1 C2325
402
0.1uF
CERM10V20%
2
1 C2351
CERM
20%10V
402
0.1uF2
1 C2350
CERM10V20%
402
0.1uF2
1 C23570.1uF
402CERM10V20%
2
1 C235620%10VCERM402
0.1uF2
1 C2355
20%10V
0.1uF
402CERM2
1 C236210V
0.1uF
402CERM
20%2
1 C236120%
CERM402
10V
0.1uF2
1 C2360
20%10VCERM402
0.1uF2
1 C2365
SHASTAV1.0BGA
OMITY19
W22
L21
K21
H17
H18
V8
D1
B5B2
B1
AB6AB2
AB10AA3
W4V7
U9
U12R2
M1L7
H1
F8F4
AA2
AA1
G15
D19
P15
N8
M15
L8
L15
K8
J15
J12
T15
T10
R9
R12
R10
H8
H15
D2C19
AB22
AB1
W5W19
U22
U13U10
T12R19
P9
P4
AA6
P14
P13
P12P10
N9
N22N13
N12N11
N10
AA10
M2
M14
M13
M12
M11
M10
L9
L16
L14
L13
A5
L12
L11
L10
K9
K7
K13
K12
K11
K10
J22
A22
J16
J14
J13J11
J10H9
H2
F7F3
E22
A2A1
U2300
0.1uF
402CERM10V20%
2
1 C2303
E051-677210223
SYNC_MASTER=N/A SYNC_DATE=N/A
Shasta Core Power
=PPVCORE_PWRON_SB
=PP2V5_PWRON_SB
=PP3V3_PWRON_SB
=PPPCI32_PWRON_SB
=PPPCI64_PWRON_SB
=PP2V5_PWRON_SB
88
88
74
74
7
25
74
25
6
23
25
23
3
7
7
7
7
7
G
D
SG
D
S
G
D
SG
D
S
SYS_ISCL0SYS_ISCA0
SYS_ISCA1SYS_ISCL1
API_ISCA
API0_ISCL
THMO
DUMMY_A
DUMMY_B
PMR_OBSV
IRQ0
THMI
(SYM 7 OF 7)
HRESET*
PURESET*
SUSPENDACK*SUSPENDREQ*
CE1_B_TDOCE1_A_TDI
CE1_LT_TCK
VSP_CLKN
VSP_CLKP
CE1_DI1_TMS
CE1_DI2_TRSTCE1_RI
CEO_TEST
PM_SLEEP0
CE0_RECE0_MC
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
U3LITE REQUIRES ALL JTAG SIGNALS
JTAG_NB_TCKJTAG_NB_TDI
JTAG_NB_TMSJTAG_NB_TDO
HIGH FOR NORMAL OPERATION
JTAG_NB_TRST_L
PP3V3_PWRON
PP3V3_PWRON PP2V5_PWRON
PP2V5_PWRON
PP2V5_PWRON
402
4.7K5%1/16WMF-LF
2
1R2435
CERM
0.1UF
402
10V20%
2
1 C2400
5%1/16WMF-LF
330
4022
1R2419
2N7002DWSOT-363
4
5
3
Q2404
MF-LF5%1/16W
330
4022
1R24201/16W
402MF-LF
1%100
2
1R2400
2N7002DWSOT-363
1
2
6
Q2404
SOT-3632N7002DW
NOSTUFF
4
5
3
Q2412
1/16W5%
402
10K
MF-LF
NOSTUFF
2
1R2438
2N7002DWSOT-363
NOSTUFF
1
2
6
Q2412
1/16W
402MF-LF
1%100
2
1R2403
402
5%1/16WMF-LF
10K
2
1R2424
402MF-LF1/16W5%10K
2
1R2426
402
10K5%1/16WMF-LF
2
1R2429
MF-LF1/16W5%10K
4022
1R2431
402
10K5%1/16WMF-LF
2
1R2433
MF-LF1/16W
402
10K5%
2
1R2436
10K
MF-LF1/16W5%
4022
1R2442
MF-LF1/16W5%10K
4022
1R2443
402
10K5%1/16WMF-LF
2
1R2444
4.7K
402MF-LF1/16W5%
NOSTUFF
2
1R2405
0
5%1/16WMF-LF402
21
R2406
0
5%1/16WMF-LF402
NOSTUFF
21
R2408
V1.0-300MMU3LITE
OMIT
PBGA
P4
R4
J18J17
C21
C20
E21
B21
D21D20
E20
D15
Y9
E9
A21
AB28
AC28
AH3
AC2
R25
F20M26
AA25
V25
AD3AD5
B20
A20
U3
402
1211%1/16WMF-LF
2
1R2402
MF-LF1/16W1%121
4022
1R2401
1000PF
NOSTUFF
CERM
5%25V
6032
1 C2401
051-6772
10224
E
SYNC_MASTER=N/A SYNC_DATE=N/A
U3LITE MISC
JTAG_NB_TMSJTAG_NB_TDO
JTAG_NB_TRST_L
JTAG_NB_TDIJTAG_NB_TCK
VSP_NB_CLK_N
SMU_SUSPENDREQ_L
I2C_NB_B_SCLI2C_NB_B_SDA
I2C_NB_C_SDAI2C_NB_C_SCL
I2C_NB_A_SDAI2C_NB_A_SCL
NB_THMONB_THMI
NB_PMR_OBSV
NB_INT_L
TP_DUMMY_ATP_DUMMY_B
NB_WARM_RESET_LNB_COLD_RESET_LNB_SUSPEND_ACK_LNB_SUSPEND_REQ_L
NB_RI_PU
NB_TEST_PD
NB_RE_PDNB_MC_PD
TP_NB_PM_SLEEP0
SYS_COLD_RESET_L
NB_PU_RESET NB_COLD_RESET_L
VSP_NB_CLK_P
MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MMVOLTAGE=0.6V
NB_VSP_CLK_VREF
PMU_SUSPEND_REQ
=PP1V2_HT
NB_SUSPEND_REQ_L
28 25
13
60
27
13
18
18
18
18
18
18
8
8
8
25
6
6
8
24
8
24
6
8
24
27
7
24
GNDPLL_49
GNDXTAL_18 PLL_45
GND
VIOPME
PLL_49VDD
PLL_45VDD
XGI
XTALS
TEST
PWR_MGT
PCI
GPIO
I2C
I2S2
I2S1
I2S0
(2 OF 8)
PCI1C_BE_4_L
PCI1C_BE_5_LPCI1C_BE_6_L
PCI1C_BE_7_L
PCI1PAR64_H
XGI_DTI_H
XGI_DTO1_H
XGI_CLK_H
XGI_DTO0_H
PCI1ACK64_LPCI1REQ64_L
PCI1AD_60_H
PCI1AD_63_H
PCI1AD_62_HPCI1AD_61_H
PCI1AD_50_H
PCI1AD_52_H
PCI1AD_53_H
PCI1AD_51_H
PCI1AD_59_HPCI1AD_58_H
PCI1AD_57_H
PCI1AD_56_HPCI1AD_55_H
PCI1AD_54_H
PCI1AD_40_H
PCI1AD_41_H
PCI1AD_42_HPCI1AD_43_H
PCI1AD_44_H
PCI1AD_49_H
PCI1AD_48_HPCI1AD_47_H
PCI1AD_46_H
PCI1AD_45_H
PCI1AD_39_H
PCI1REQ_5_L
PCI1AD_32_H
PCI1AD_34_H
PCI1AD_38_H
PCI1AD_37_HPCI1AD_36_H
PCI1AD_33_H
PCI1AD_35_H
PCI1GNT_5_L
PCI1GNT_4_L
PCI1REQ_4_L
PCI1GNT_3_L
PCI1REQ_3_L
XTAL_18XTALVDD VDD
FSTEST
XTAL_18_I
XTAL_18_O
XTALI
XTALO
PLLTESTTEST_MODE_H
TDI
TCK
TMS
TDO
INTRWD_H
I2CDATA_H
I2CCLK_H
PCI_SEL32BIT_HGPIO_H_3
GPIO_H_2
GPIO_H_1I2S2SYNC_H
I2S2BITCLK_H
I2S2MCLK_HI2S2DTO_H
I2S2DTI_H
GPIO_H_0
I2S1DTO_HI2S1MCLK_H
I2S1BITCLK_HI2S1SYNC_H
I2S1DTI_H
I2S0BITCLK_H
I2S0SYNC_H
I2S0DTI_H
I2S0DTO_H
I2S0MCLK_H
RESET_L
STOPXTALS_LSUSPENDREQ_L
SUSPENDACK_L
PCI1PME_L
TRST_L
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
(I2S2_DEV_TO_SB_DTI)
(I2S1_RESET_L)
DO NOT swap between RPAKs
42
I2S2: S/P-DIF
(I2S1_DEV_TO_SB_DTI)
I2S0: Audio DAC
I2S1: Soft Modem
DIFFERENTIAL_PAIRELECTRICAL_CONSTRAINT_SET
GPIO
NC
BOM options provided by this page:
Power aliases required by this page:
26
10
7
11
8
17
13141516
9
12
22
27
1918
20
2425
(SCCA)
(SCCB)
31
33
30
28
34
363738
43
41
4445
4746
3940
5354
50
5152
4948
(I2S2_RESET_L)
29
- _PP3V3_PCI
- _PP2V5_PWRON_SB
(NONE)
6"Slot E" - AD21
21
32
35
Signal aliases required by this page:- _PP1V2_PWRON_SB
- _PP3V3_PWRON_SB
AUDIO GPIO - see note on right
From SouthBridge <-
-> From NorthBridge
<- To CPU
Page Notes
NorthBridge / SouthBridge MPIC Routing
interrupt controller. SouthBridge MPIC will be used for
PCI 32-bit select
0 = 64-bit PCI & XGC1 = 32-bit PCI & GPIOs
(I2S0_DEV_TO_SB_DTI)
NET_SPACING_TYPE
REDUNDANT - NEED TO ADDRESS THIS
To SouthBridge ->
23
"Slot F" - AD22
REDUNDANT - NEED TO ADDRESS THIS
AUDIO GPIOS
NOTE: It is the responsibility of
necessary pull-ups & pull-downs.
the audio circuit to provide the
- MPIC_NB/MPIC_SB Selects whether NorthBridge or
NOTE: XGC required for Shasta GPIOs Configures Shasta for 64-bit PCI- PCI_64BIT
Re-pin within each RPAK as necessary
20%CERM12066.3V10uF
2
1 C25006.3V10%1uFCERM402
2
1 C2501
4026.3V1uFCERM10%
2
1 C2511
1206
10uFCERM6.3V20%
NOSTUFF
2
1 C2510
10uF
1206CERM6.3V20%
2
1C25201uF10%
6.3VCERM402
2
1C2521
6.3V20%
CERM
10uF
12062
1C25301uF10%
402CERM6.3V 2
1C2531
10K5%
1/16WMF-LF
4022
1R2500
1K5%
PCI_64BIT
402MF-LF1/16W
2
1R2501
200
402MF-LF1/16W1%
2
1R2590
CERM402
22pF5%50V2
1 C259122pF
5%50V
CERM402
2
1C2590
4.7K
4021/16W
5%MF-LF
2
1R2580
OMITSHASTA
BGAV1.0
Y13
V13W13
AB12
W14
V15U15
T9U7
W2
Y4
W17
W12Y11
A3
W11AA11
AB11
U11V11
W10E9
Y12
AA12
AA13
AB13
U14
W6
U16
AB21
U17
K17
W18
E18
Y20
AA20
AA19
K20K22H22J20
H21G22F22J19H20G21F21J17H19K18D22G20D21C22G19F20C21E20D20F19E19G18G17C20B21A21F16G16F17F18A20D18
L17
V12
W9
Y7Y8
AA5
AB4
AA7
V9AB5V10
AA8
Y6
U8Y5W7
AA4
AB7Y9
W8AB3
Y2
V5
V14
U230020%10VCERM402
0.1uF2
1 C2540
1/16W5%
10K
SM-LF
63
RP2551
10K
1/16W5%
SM-LF
81
RP2550
10K
5%
SM-LF1/16W
54
RP2550
1/16W5%
10K
SM-LF
72
RP2550
5%
10K
1/16WSM-LF
81
RP2551
10K
5%1/16WSM-LF
72
RP2551
5%1/16W
10K
SM-LF
54
RP2551
1/16W5%
SM-LF
10K81
RP2552
10K
5%1/16WSM-LF
63
RP2550
10K
SM-LF1/16W5%
72
RP2552
10K
5%1/16WSM-LF
54
RP25521/16W
10K
SM-LF
5%
63
RP2552
10K
1/16W5%
SM-LF
72
RP25531/16WSM-LF
5%
10K54
RP2553
10K
SM-LF1/16W5%
81
RP255310K
1/16W5%
SM-LF
63
RP2553402
5%1/16WMF-LF
10K 21
R2550
402
5%1/16WMF-LF
10K 21
R2551
MF-LF
10K5%
1/16W402
21
R2552
402
10K
MF-LF1/16W5%
21
R2553
402
10K
MF-LF1/16W5%
21
R2556
402
10K
MF-LF1/16W5%
21
R2557
402
5%1/16WMF-LF
10K21
R2558
402
5%1/16WMF-LF
10K21
R2559
10K5%
1/16WMF-LF402
21
R25645%
1/16WMF-LF402
10K 21
R2563
1K5%
1/16WMF-LF402
21
R2560
1/16W
10K
402MF-LF5%
21
R2561
10K
402MF-LF1/16W5%
21
R2565
10K
402MF-LF1/16W5%
21
R2567
1/16W
10K
402MF-LF5%
21
R2568
1K5%
1/16WMF-LF402
NO STUFF
21
R2562
402
NO STUFF
5%1/16WMF-LF
10K21
R25551/16W402
MF-LF5%
1K21
R2554
PP3V3_RUN
MF-LF
10K5%1/16W4022
1R2576
MPIC_SB
2N3904LFSOT23
2
3
1 Q2576
MPIC_SB
10K
402MF-LF1/16W5%
21
R2575
0
402MF-LF1/16W
5%
MPIC_NB
2
1R2579
402
47
MPIC_SB
MF-LF1/16W5%
21
R2578
1/16WSM-LF
335%
7865
2134RP2510
1/16W5%33
SM-LF 8765
1234RP2530
SM-LF
335%
1/16W6587
3412RP2520
3.35%
1/8WMF-LF805
21
R2505
3.3
805MF-LF1/8W5%
21
R2510
5%1/8WMF-LF805
3.3 21
R2520
805
3.3
MF-LF5%
1/8W
21
R2530
1/16W402
05%
MF-LF
21
R2511
11.4X4.7X4.2-SM
18.432M21
Y2590
05%
1/16WMF-LF402
21
R2566
402
NOSTUFF
0
MF-LF
5%1/16W
21
R2570
051-6772 E10225
SYNC_MASTER=N/A SYNC_DATE=N/A
Shasta Serial / Misc
VOLTAGE=1.2VMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM
PP1V2_PWRON_SB_PLL45VDD
PP2V5_PWRON_SB_XTALVDD
MIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MMVOLTAGE=2.5V
VOLTAGE=2.5VPP2V5_PWRON_SB_XTAL18VDD
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MM
I2S0_BITCLKI2S0_MCLK
I2S0_DEV_TO_SB_DTI
SB_CLK18M_XTALOCLOCKS
I2S2_SYNCI2S2_BIDIR
PCI_SLOTE_INT_L
SB_GPIO23SB_GPIO24
FW_LOWPWR_SHASTA
FW_LOWPWR
PCI_SLOTA_INT_L
I2S1_TO_SB I2S1_DEV_TO_SB_DTI
UDASH_SDOWNUDASH_RESET_LAGP_INT_L
PCI_SLOTB_INT_LPCI_SLOTC_INT_L
SB_GPIO30
AUDIO_LO_DET_L
PCI_SLOTD_INT_L
SB_SATABR_RESET_L
SB_CLK18M_XTALO_RCLOCKS
FW_LOWPWR
PCI_SLOTF_GNT_L
SYS_OVERTEMP_LSB_GPIO12
PCI_SLOTF_REQ_L
PCI_SLOTE_REQ_L
CPU_SRESET_L
PCI_SLOTG_INT_L
ENETFW_RESET
SB_GPIO25
ENET_ENERGYDET
ENETFW_RESET
PCI_SLOTE_GNT_L
SB_SATABR_RESET_L
MODEM_RING2SYS_L
UDASH_RESET_L
SYS_OVERTEMP_L
=PP3V3_PWRON_SB
I2S0_RESET_LSB_GPIO45SB_GPIO46
I2S1_SB_TO_DEV_DTOI2S1_TO_DEV
I2S1_BIDIR I2S1_SYNC
I2S2_DEV_TO_SB_DTII2S2_TO_SBI2S2_TO_DEV I2S2_SB_TO_DEV_DTO
=PP1V2_PWRON_SB
MIN_NECK_WIDTH=0.25MMVOLTAGE=1.2VMIN_LINE_WIDTH=0.5MM
PP1V2_PWRON_SB_PLL49VDD
I2S0_TO_SB I2S0_DEV_TO_SB_DTI
I2S1_BIDIR I2S1_BITCLK
I2S2_TO_DEV I2S2_MCLKP25MMI2S2_BITCLKI2S2_BIDIR
SB_CLK18M_XTAL SB_CLK18M_XTALICLOCKS
SB_CLK18M_XTALO
SB_CLK18M_XTALI
SB_GPIO46
SB_GPIO49
SB_GPIO51
=PP3V3_PWRON_SB
I2S1_RESET_L
CPU_SRESET_L
SYS_SLEWING_L
I2S0_BITCLK_RI2S0_MCLK_R
SB_TO_SMU_INT_L
PCI_SLOTF_INT_L
AUDIO_GPIO_11AUDIO_EXT_MCLK_SEL
AUDIO_HP_MUTE_L
AUDIO_HP_DET_LAUDIO_LI_OPTICAL_PLUG_LAUDIO_LI_DET_L
AUDIO_GPIO_12
AUDIO_SPKR_MUTE_L
AUDIO_LO_MUTE_LAUDIO_SPKR_DET_L
SMU_TO_SB_INT_LNB_TO_SB_INTSB_GPIO52SB_GPIO51
SB_GPIO49SB_GPIO50
SYS_SLEWING_L
SB_GPIO47
I2S1_TO_DEV I2S1_MCLKP25MM
SB_INT_L
NB_INT_L_R
CPU_INT_L
NB_INT_L
NB_TO_SB_INT
=PP2V5_PWRON_SB
I2S2_MCLK_R
I2S2_DEV_TO_SB_DTI
CLOCKS SB_CLK25M_ATASB_CLK25M_ATA
I2S2_BITCLK
SB_CLK18M_XTALO_R
SYS_WARM_RESET_L
JTAG_SB_TDO
PCI_SLOTG_INT_L
PCI_SLOTD_INT_L
PCI_SLOTE_INT_L
PCI_SLOTA_INT_L
PCI_SLOTF_GNT_L
PCI_SLOTE_GNT_L
PCI_SLOTF_REQ_L
PCI_SLOTE_REQ_L
=PP3V3_PCI
SB_CLK25M_ATA
TP_SB_PLLTEST
JTAG_SB_TDI
JTAG_SB_TCK
TP_SB_WATCHDOG
I2C_SB_SDA
MODEM_RING2SYS_LSB_INT_L
SB_STOPXTALS_LSMU_SUSPENDREQ_LSB_SUSPENDACK_L
I2C_SB_SCL
SYS_PME_L
I2S0_SB_TO_DEV_DTO_R
I2S0_SYNC_R
I2S1_SB_TO_DEV_DTO_RI2S1_MCLK_RI2S1_BITCLK_RI2S1_SYNC_R
I2S2_SB_TO_DEV_DTO_R
I2S2_BITCLK_RI2S2_SYNC_R
I2S2_SB_TO_DEV_DTO
I2S1_SB_TO_DEV_DTO
I2S1_SYNC
I2S0_SB_TO_DEV_DTO
I2S2_RESET_L
=PP3V3_PWRON_SB
SB_TEST_MODE_PD
SB_TO_SMU_INT_L
PCI_SLOTB_INT_L
PCI_SLOTF_INT_L
PCI_SLOTC_INT_L
SB_GPIO12
SB_GPIO24
SB_GPIO30
SB_GPIO23
SB_GPIO25
SB_GPIO45
SB_GPIO47
SMU_TO_SB_INT_L
SB_GPIO50
SB_GPIO52
JTAG_SB_TMSJTAG_SB_TRST_L
SB_PCI_SEL32BIT
TP_SB_FSTEST
I2S2_SYNC
I2S0_SYNC
I2S1_DEV_TO_SB_DTI
I2S2_MCLK
I2S1_RESET_L
I2S1_MCLKI2S1_BITCLK
=PP3V3_PWRON_SB
ENET_ENERGYDET
AUDIO_LO_OPTICAL_PLUG_L
I2S0_SYNCI2S0_BIDIR
I2S0_TO_DEV I2S0_SB_TO_DEV_DTO
I2S0_BITCLKI2S0_BIDIRAUDIO I2S0_MCLKI2S0_TO_DEV
77
74
74
33
33
30
88
76
74
74
76
94
27
30
94
27
25
94
94
94
25
94
30
27
27
94
29
74
77
76
75
94
28
94
94
25
94
94
94
94
25
102
102
95
102
89
25
25
101
89
56
25
29
77
25
86
25
25
25
23
25
25
102
102
95
25
102
102
23
25
29
25
25
25
25
25
14
23
102
27
102
74
77
25
56
74
27
18
25
24
18
77
102
25
25
95
23
25
25
102
95
25
102
25
25
25
23
86
95
95
102
102
25
25
25
25
25
25
25
25
25
6
6
94
25
49
25
25
25
6
25
25
25
25
25
13
25
25
25
25
25
12
25
25
12
25
25
6
25
13
7
95
25
25
6
6
25
25
7
25
6
25
25
25
25
25
25
25
25
7
6
25
13
13
25
102
102
102
102
102
101
101
100
98
102
13
25
25
25
25
25
13
25
6
25 6
24
25
7
25
25
25
25
8
8
25
25
25
6
25
25
25
25
7
25
6
8
8
6
6
25
13
13
13
6
13
25
6
6
25
102
7
13
25
25
25
25
25
25
25
25
25
25
13
25
25
8
8
6
25
25
6
25
6
6
6
7
25
101
25
25
25
25
SYM 2 OF 2
VDD33
VDD25
VDD25
VDD_PLL3VDD_PLL2
VDD_PLL1
C4_VDDC3_VDD
C2_VDD
VDD_PLL4
VDD_I2CVDD_NBSYNC
VDD_PCLK
VDD33_BC
VDD33_BC1
VDD_HCLK0
VDD_HSYNC
VDD_HCLK2
VDD_HCLK0
VDD_HCLK1
VDD_HCLK2
VDD_HSYNC
VDD15_HSYNC
VDD15_PCLK
VDD_XTALVDD_VCLK
VSS_XTALVSS_VCLK
VSS_HSYNC
VSS_HCLK2
VSS_HCLK0VSS_HCLK1
VSS_HCLK2
VSS_HSYNC
VSS_HCLK0
VSS33_BC1
VSS33_BCVSS33
VSS_PCLK
VSS_NBSYNC
VSS25
VSS25
VSS_I2C
VSS_CML
VSS_PLL4
VSS_PLL3VSS_PLL2
C2_VSS
C3_VSSC4_VSS
VSS_PLL1
C1_VSSC1_VDD
TABLE_5_ITEM
REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD
QTY DESCRIPTIONPART#
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
PLACE NEAR PIN D10 D12
A8, C5, B4, K10, H12 J11, M11, A1PINS G12, M12, H3, K1, L5, M9, A11, A9
CAN BE TURNED OFF IN SLEEP
PLACE NEAR PIN D2 D1
PLACE NEAR PIN M3 M2
PLACE NEAR PIN L8 K8
402 CAPS NOT NEEDED
IF 603 CAN BE PLACED CLOSE TO PULSAR
MF-LF1/16W5%
402
4.721
R2601
PP3V3_RUN
PP3V3_PWRON
CERM20%10V402
0.1UF2
1 C2601402
4.75%
1/16WMF-LF
21
R2603
402
4.75%
1/16WMF-LF
21
R2605
0.1UF
40210V20%CERM2
1 C2605
180-OHM-1.5A
0603
21
L2601
CERM40210V0.1UF20%
2
1 C2609
40210V20%CERM
0.1UF2
1 C2611
0603
180-OHM-1.5A21
L2603
0.1UFCERM20%10V402
2
1 C2613
0603
180-OHM-1.5A21
L2605
0.1UFCERM20%10V402
2
1 C2615
0603
180-OHM-1.5A21
L2607
402CERM20%10V0.1UF
2
1 C2617
0.1UF20%10V402CERM2
1 C2619
0.1UF
40210V20%CERM2
1 C2622MF-LF1/16W5%
4.7
402
21
R26070603
180-OHM-1.5A21
L2609
10V20%CERM
0.1UF
4022
1 C2620
CERM20%10V402
0.1UF2
1 C26270.1UF
40210V20%CERM2
1 C2628
CERM20%
402
0.1UF10V2
1 C2629
CERM20%10V402
0.1UF2
1 C2630
CERM20%10V402
0.1UF2
1 C2651
0.1UF
40210V20%CERM2
1 C26230.1UF
40210V20%CERM2
1 C26240.1UF
40210V20%CERM2
1 C26250.1UF
40210V20%CERM2
1 C2626
0.1UF
40210V20%CERM2
1 C26310.1UF
40210V20%CERM2
1 C26320.1UF
40210V20%CERM2
1 C26330.1UF
40210V20%CERM2
1 C26340.1UF
40210V20%CERM2
1 C26350.1UF
40210V20%CERM2
1 C26360.1UF
40210V20%CERM2
1 C26370.1UF
40210V20%CERM2
1 C2638
10V402
20%0.1UFCERM2
1 C2665
CERM20%10V402
0.1UF2
1 C2667
CERM20%10V402
0.1UF2
1 C2671
402
0.1UF10V20%CERM2
1 C2640
402CERM
0.1UF20%10V2
1 C2639
402
4.75%
1/16WMF-LF
21
R2609
20%6.3V
2.2UF
603CERM12
1 C2645
603
20%2.2UF6.3VCERM12
1 C2669
603
20%
CERM16.3V
2.2UF2
1 C2603
603
20%6.3VCERM1
2.2UF2
1 C2607
603
20%
CERM16.3V
2.2UF2
1 C2621
PULSAR
OMIT
FSBGA
C12A3
M2
K8D1
D12
L12
F11
C2
K12
H10
A7A4
B7
B11C10
A6
M5
L7E2
H2L2
A12A1
M3
L8D2
D10
M12
G12
B2
H12
K10
B4C5
A8
A9A11
M9
L5E1
K1H3
M11
J11
C9B9
E10E12M4L3
G1F1
U2600
PP3V3_PWRON
PP3V3_PWRON
PP3V3_PWRON
PP3V3_RUN
PULSAR, PBGA U26001359S0076
10226051-6772 E
SYNC_MASTER=N/A SYNC_DATE=N/A
PULSAR POWER
=PP1V2_PULSAR
=PPVCORE_PULSAR
=PPVCORE_PULSAR
=PPVCORE_PWRON_PULSAR
=PPVCORE_PWRON_PULSAR
=PP1V2_PULSAR
=PPVCORE_PULSAR
=PP1V2_PULSAR
=PP2V5_PWRON_RAM
=PP2V5_PWRON_RAM
VOLTAGE=1.5VPP1V5_PSL_PLL1
MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MM
PP3V3_PSL_XTALVOLTAGE=3.3VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MM
=PPVCORE_PWRON_PULSAR
PP1V5_PSL_PLL3VOLTAGE=1.5VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MM
VOLTAGE=1.5VPP1V5_PSL_PLL2
MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MM
PP1V5_PSL_PLL4VOLTAGE=1.5VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MM
46
46
40
40
37
37
26
26
26
26
26
26
26
26
26
26
26
7
7
7
7
7
7
7
7
7
7
7
REFCLK_1
SYM 1 OF 2
SCLK
SDATA
RESET*
XIN
XOUT
REF25REF15
TEST3TEST2
TEST1
ADDRSEL
REF33
REF_CML
PRES_CML
FORCESPO*
PD
VCLKNVCLKP
HCLKN_0
HCLKN_1HCLKN_2
GPCLK33_1
GPCLK33_0
HCLKP_0
HCLKP_2HCLKP_1
PCLK33_1PCLK33_0
PCLK25_1
PCLK25_0
GPCLK25_0
GPCLK25_1
PCLK33_2PCLK33_3
PCLK33_4
HTBEN_0
HTBEN_1
NBSYNC
HSYNC_0HSYNC_1
REFCLK_0
ERROR*SLEWING*
PCLK12
PCLK15
SCAN_MODE
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
1=IIC ADDR D4/D5
1.2V
DIFFERENTIAL_PAIR
33MHZ
33MHZ
66MHZ
66MHZ33MHZ66MHZ
66MHZ66MHZ
3.3V
1.2V
1.2V
1.2V1.5V 66MHZ
66MHZ
NET
TYPESPACING
66MHZ
NET_SPACING_TYPE
3.3V
3.3V
2.5V
2.5V2.5V
25MHZ25MHZ
3.3V3.3V
2.5V
2.5V2.5V
3.3V 33MHZ
0=IIC ADDR D2/D3
33MHZ
ELECTRICAL_CONSTRAINT_SET
DIFFERENTIAL SIGNALS SHOULD HAVE 5 MIL SPACING TO EACH OTHER
EI_NB_SYNC IS PART OF EI_CPU_SYNC TOPOLOGY
ALL SPACING GROUPS SHOULD HAVE 15 MIL SPACING TO SIGNALS NOT IN THEIR GROUP
NET_PHYSICAL_TYPE
5%021
R2701
I100
I101
I102
I103
4025%
021
R2704
1%402249 21R2706
PULSAR
OMIT
FSBGA
B12
C11
B3A2
D11E11K3
K9
B1
C1
M1
D3
H1G2
A5
M6J2
G11
B6
C3
M10L9M7L6K5
L1K2
L10L11
F12
J12K11
H11J10
B5B8A10C4C8B10
K4L4
J1J3
F2
M8
E3
U2600
F-ST-SM
NOSTUFF
U.FL-R_SMT
1
2
3
J2700
25.0000M
8X4.5MM-SM
CRITICAL
21
Y2701
MF-LF1/16W5%1K
4022
1R2722
MF-LF1/16W5%
0NOSTUFF
402
21
R2748
I116
I117
I118
I119
I120
5% 402
2021
R2703
5%
0
40221
R2705
5% 402
021
R2707
5% 402
2021
R2709
5%
0
40221
R2711
0
4025%21
R2715
5% 402
021
R2717
5%
0
40221
R2719
402
0
5%21
R2720
NOSTUFF 5%4021K 21R2724
NOSTUFF1K
5% 40221
R2738
1K 1%40221R2740
402806 1%21R2742
1%402681 21R2744
1%1K 40221R2746
40247 5%21R2750
5%
NO STUFF
402MF-LF
0
1/16W
21
R2752
MF-LF1/16W
05%
402
21
R2754
MF-LF1/16W5%
0
402
21
R2756MF-LF1/16W5%
330KNO STUFF
402
21
R2758
402
0
5%21
R2761
24MF-LF5%
402
NOSTUFF
1/16W
2
1R2762
5%241/16W402MF-LF
NOSTUFF
2
1R2764
402
33PFCERM50V5%
2
1 C2705
402
33PF5%50V
CERM 2
1C2707
NOSTUFF
5% 402
021
R2768
4025%
2021
R2770
NOSTUFF
5% 402
021
R2772
0.001UF50V CERM
40210%21
C2708
10% 402CERM50V
0.001UF21
C2710
10% 402CERM50V
0.001UF21
C2713
0.001UF50V CERM
40210%21
C2715
10% 402CERM50V
0.001UF21
C2700
40210%CERM50V
0.001UF21
C2702
0
5% 402
NOSTUFF21
R2775
5%
0
402
NOSTUFF21
R2776
5%
0
40221
R2702
402
0
5%21
R2779
5%
22
402
NOSTUFF21
R2700
I86
I87
I90
I91
I94
I95
I96
I97
I98
I99
10227E051-6772
SYNC_MASTER=N/A SYNC_DATE=N/A
PULSAR CLOCKS
VSP_NB_CLK_P
EI_CPU_CLK_P
EI_CPU_CLK_N_C CLOCKS
PCI_CLK_P4_R CLOCKS
CPU_HTBEN
EI_CPU_SYNC
TP_SATA_CLK25M
PCI_CLK_P3_R CLOCKS
CLOCKSPLS_CLK_66M_1_R
PCI_CLK66M_SB_INT_R CLOCKSCLOCKSPCI_CLK_P1_R
CLOCKSEI_NB_SYNC_R
CLOCKSHT_CLK66M_NB_R
TP_PLS_CLK_66M_0
EI_NB_CLK_N_C CLOCKS
CLOCKSVSP_NB_CLK_P_C
CLOCKSHT_NB_CLKHT_CLK66M_NB CLOCKS
SB_CLK25M_ATA_R CLOCKS
EI_NB_SYNC
HT_CLK66M_SBAGP_CLK66M_NB
CLOCKSCPU_HTBEN_R
CLOCKSEI_CPU_SYNC_R
CLOCKSSATA_CLK25M_R
CLOCKSSLEWING_L_R
CLOCKSHT_CLK66M_SB_R
CLOCKSAGP_CLK66M_NB_R
CPU_HTBEN CLOCKS CLOCKS
CLOCKSPLS_EXTCLK CLOCKSPLS_XTAL
VSP_NB_CLK VSP_NB_CLKCLOCKSVSP_NB_CLK_P CLOCKS
CLOCKSAGP_CLK66M_GPU AGP_GPU_CLK CLOCKS
EI_CPU_CLK_P CLOCKS EI_CPU_CLKEI_CPU_CLK CLOCKSEI_CPU_CLK_N CLOCKS EI_CPU_CLKEI_CPU_CLK CLOCKS
CLOCKSEI_CPU1_CLK_P EI_CPU1_CLK EI_CPU1_CLKCLOCKS
EI_NB_CLK_N EI_NB_CLK CLOCKS EI_NB_CLKCLOCKSEI_CPU_SYNC EI_SYNC CLOCKSCLOCKSEI_NB_SYNC CLOCKSCLOCKS
CLOCKSEI_CPU1_SYNC EI_CPU1_SYNC CLOCKS
EI_CPU_CLK_N
EI_CPU_CLK_P_C CLOCKS
SB_CLK25M_ATA
AGP_CLK66M_GPU_R CLOCKS
PLS_X_OUT_BPLS_X_IN_B
PLS_FORCE_P0_L_R
PLS_X_IN
CLOCKSHT_SB_CLKHT_CLK66M_SB CLOCKS
AGP_CLK66M_GPU
EI_NB_CLK_N
PCI_CLK_P3
PCI_CLK_P1
TP_PLS_CLK_66M_1
EI_NB_CLK_P
PCI_CLK33M_SB_EXT CLOCKSCLOCKS_PCI CLOCKSCLOCKS_PCI CLOCKSPCI_CLK66M_SB_INT CLOCKS
CLOCKSVSP_NB_CLK_N VSP_NB_CLKVSP_NB_CLK CLOCKS
RAM_CLK66M_NB
PCI_CLK66M_SB_INT
CLOCKSPCI_CLK_GP0_R
CLOCKSEI_CPU1_CLK_P_R
CLOCKSEI_CPU1_CLK_N_R
CLOCKSPCI_CLK_GP1_R
CLOCKSEI_CPU1_SYNC_R
HT_CLK66M_NB
CPU1_HTBEN_R CLOCKS
VSP_NB_CLK_N
PCI_CLK_GP1
PLS_RESET_L
I2C_CLOCK_SDA
PLS_X_ADDRSEL
I2C_CLOCK_SCL
SYS_SLEWING_L
PLS_PRES_CML
PLS_REF33
PLS_REF15
PLS_SCAN_MODE
CLOCK_ERROR_L
TP_PLS_REF_CML
TP_PLS_TEST1TP_PLS_TEST2
PLS_INTERM
CLOCK_RESET_L
PP3V3_PWRON
PCI_CLK_GP0
VSP_NB_CLK_N_C CLOCKS
CLOCKSAGP_CLK66M_NB AGP_NB_CLK CLOCKS
EI_NB_CLK_P EI_NB_CLK CLOCKS EI_NB_CLKCLOCKS
CLOCKSRAM_CLK66M_NB_R
EI_NB_CLK_P_C CLOCKS
PCI_CLK_P4
CLOCKSPLS_CLK_66M_0_R
SYS_OVERTEMP_L
PLS_EXTCLK
CLOCKSEI_CPU1_CLK_N EI_CPU1_CLK EI_CPU1_CLKCLOCKS
=PULSAR_POWER_DOWN PULSAR_POWER_DOWN_R
PLS_X_OUT
TP_PLS_TEST3
PLS_REF2558
30
30
33
18
27
29
29
29
60
28
62
48
29
27
49
29
29
14
28
29
28
14
29
62
49
28
28
74
74
27
74
14
60
14
27
25
11
48
28
25
14
24
27
6
27
27
6
6
6
6
6
6
6
27
6
27
27
27
6
6
6
6
6
27
27
24
27
27
27
6
27
27
27
6
27
25
6
27
27
27
8
8
6
27
8
27
24
37
27
14
14
6
27
6
24
8
18
18
13
8
6
6
6
13
6
8
27
27
6
8
6
13
27
6
3
6
API_APCLKP
API_APCLKN
API0_SRIP1
API0_SRIN0
API0_SROP1
API0_SRON0
API0_BCLKIN
API0_BCLKIP
INTERFACEAPPLE PI
API_APCLK_AVSS
(SYM 1 OF 7)
API0_ADO35
API0_ADO36
API0_ADO37API0_ADO38
API0_ADO39API0_ADO40
API0_ADO41
API0_ADO43API0_ADO42
API0_SROP0
API0_SRON1
API_QREQ0
API_CSTP
API0_ADO34
API0_ADO0
API0_ADO1API0_ADO2
API0_ADO3
API0_ADO4API0_ADO5
API0_ADO8
API0_ADO7API0_ADO6
API0_ADO10API0_ADO9
API0_ADO12
API0_ADO11
API0_ADO13
API0_BCLKON
API0_BCLKOP
API0_ADO14
API0_ADO15
API0_ADO18API0_ADO17
API0_ADO16
API0_ADO19
API0_ADO20API0_ADO21
API0_ADO22
API0_ADO23API0_ADO24
API0_ADO25
API0_ADO26
API0_ADO28
API0_ADO27
API0_ADO29
API0_ADO30
API0_ADO31
API0_ADO33
API0_ADO32
VDD_APIAPCLK_AVDD
API
API0_ADI3
API0_ADI2API0_ADI1
API0_ADI0
API0_ADI5API0_ADI4
API0_ADI13API0_ADI12
API0_ADI11
API0_ADI10API0_ADI9
API0_ADI8
API0_ADI7API0_ADI6
API0_ADI15
API0_ADI14
API0_ADI17API0_ADI18
API0_ADI19
API0_ADI20API0_ADI21
API0_ADI22
API0_ADI23
API0_ADI16
API0_ADI24
API0_ADI33
API0_ADI32API0_ADI31
API0_ADI25
API0_ADI26
API0_ADI30
API0_ADI29API0_ADI28
API0_ADI27
API0_ADI34
API0_SE
API0_APSYNC
API0_ADI42API0_ADI43
API0_ADI37API0_ADI38
API0_ADI39API0_ADI40
API0_ADI41
API0_SRIP0
API0_SRIN1
API_QACK0
API0_ADI36
API0_ADI35
VCC
GNDPART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD
TABLE_ALT_ITEM
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
QREQ_L HACK QREQ TO SMU
ELECTRICAL_CONSTRAINT_SET NET_PHYSICAL_TYPE NET_SPACING_TYPE DIFFERENTIAL_PAIR
EI_NB_CLK_PEI_NB_CLK_N
TI
PLACE QREQ CIRCUITS BETWEEN CPU AND U3LITE
NEAR U3LITEPLACE R2805 AND R2806
OMIT
HOLE-VIA-20R101
ZT2800
OMIT
HOLE-VIA-20R101
ZT2801
OMIT
HOLE-VIA-20R101
ZT2802
HOLE-VIA-20R10
OMIT
1
ZT2803
OMIT
HOLE-VIA-20R101
ZT2804
402
0.1UF20%10VCERM2
1 C2813
OMIT
HOLE-VIA-20R101
ZT2805
OMIT
HOLE-VIA-20R101
ZT2806
OMIT
HOLE-VIA-20R101
ZT2807
HOLE-VIA-20R10
OMIT
1
ZT2808
OMIT
HOLE-VIA-20R101
ZT2809
CERM10V20%0.1UF
4022
1 C2812
OMIT
HOLE-VIA-20R101
ZT2810
OMIT
HOLE-VIA-20R101
ZT2811
OMIT
HOLE-VIA-20R101
ZT2812
OMIT
HOLE-VIA-20R101
ZT2813
OMIT
HOLE-VIA-20R101
ZT2814
402
0.1UF20%10VCERM2
1 C2811
OMIT
HOLE-VIA-20R101
ZT2815
OMIT
HOLE-VIA-20R101
ZT2816
OMIT
HOLE-VIA-20R101
ZT2817
HOLE-VIA-20R10
OMIT
1
ZT2818
OMIT
HOLE-VIA-20R101
ZT2819
CERM10V20%0.1UF
4022
1 C2810
OMIT
HOLE-VIA-20R101
ZT2820
OMIT
HOLE-VIA-20R101
ZT2821
OMIT
HOLE-VIA-20R101
ZT2822
HOLE-VIA-20R10
OMIT
1
ZT2823
OMIT
HOLE-VIA-20R101
ZT2824
402
0.1UF20%10VCERM2
1 C2809
OMIT
HOLE-VIA-20R101
ZT2825
HOLE-VIA-20R10
OMIT
1
ZT2826
HOLE-VIA-20R10
OMIT
1
ZT2827
HOLE-VIA-20R10
OMIT
1
ZT2828
HOLE-VIA-20R10
OMIT
1
ZT2829
10V20%
402
0.1UFCERM2
1 C2808
HOLE-VIA-20R10
OMIT
1
ZT2830
HOLE-VIA-20R10
OMIT
1
ZT2831
HOLE-VIA-20R10
OMIT
1
ZT2832
HOLE-VIA-20R10
OMIT
1
ZT2833
HOLE-VIA-20R10
OMIT
1
ZT2834
402
0.1UF20%10VCERM2
1 C2807
HOLE-VIA-20R10
OMIT
1
ZT2835
HOLE-VIA-20R10
OMIT
1
ZT2836
HOLE-VIA-20R10
OMIT
1
ZT2837
HOLE-VIA-20R10
OMIT
1
ZT2838
HOLE-VIA-20R10
OMIT
1
ZT2839
CERM10V20%0.1UF
4022
1 C2806
HOLE-VIA-20R10
OMIT
1
ZT2840
HOLE-VIA-20R10
OMIT
1
ZT2841
HOLE-VIA-20R10
OMIT
1
ZT2842
HOLE-VIA-20R10
OMIT
1
ZT2843
HOLE-VIA-20R10
OMIT
1
ZT2844
402
0.1UF20%10VCERM2
1 C2805
HOLE-VIA-20R10
OMIT
1
ZT2845
NOSTUFF
402
021
R2805
CERM10V20%0.1UF
4022
1 C2804
U3LITEPBGA
OMIT
V1.0-300MM
D13
D4
F10
F7
G2
H16
H13
J13
B19
B10
B7
D16
K8
K4
E14D14
F14
G20
F21
D18C18
B5
A3
B6
A4E17
D17
B18
A19
H17
D6E6
F15E15
E8
H2G1H4J4F2
B8A7B3A2
E1
C8A6C1B1D1B2C6C5C3C2
K1
A5D8E4D5E5F6J8F3J7H6
J1
F5E2F4E3J6J5J3H3H5F1
H1J2
C9D9G14H14H12
C17B17A18A17
G12
E18F18H18G18G17F17G15H15C15B15
H11
A15A16C14B14A14A13E12D12C12B12
G11
A12A11B11C11B9A8A9A10E11D11
F12F11
U3
NOSTUFF
1211%MF-LF1/16W4022
1R28031%1211/16WMF-LF
NOSTUFF
4022
1R28040.001UF
40250V
NOSTUFF
10%CERM2
1 C2821
402
20%10VCERM
0.1UF2
1 C2803I212
I213
I214
I215
I216
I217
I218
I219
CERM10V20%0.1UF
4022
1 C2802
I220
I221
I222
I223
I224
I225
NOSTUFF
10K5%1/16WMF-LF4022
1R2898
2N3904LF
NOSTUFF
SOT232
3
1 Q2899NOSTUFF
1805%
1/16WMF-LF402
21
R2899
402
0.1UF20%10VCERM2
1 C2801
402
0.1UF20%10V
CERM 2
1C2850
MF-LF1/16W5%
0
NOSTUFF
402
21
R2850402
10KMF-LF1/16W
5%
2
1R2851
CRITICAL
SOT23-574LVC1G66DBVG4
21
5
3
4
U2850
5%
10402 1/16W
MF-LF
21
R2806
10V20%
402CERM
0.1UF2
1 C2800CERM10V20%0.1UF
4022
1 C2814
402
0.1UF20%10VCERM2
1 C2815
402
0.1UF20%10VCERM2
1 C2816
402
0.1UF20%10VCERM2
1 C2817
1001%1/16WMF-LF402
NOSTUFF
2
1R2801
402
NOSTUFF
0.1UF20%CERM10V2
1 C2820
NOSTUFF
1001%1/16WMF-LF4022
1R2802
0.1UF20%CERM40210V2
1 C2819CERM6.3V10%1UF
4022
1 C2818
2.2
1/10W5%
MF-LF603
21
R2800
OMIT
HOLE-VIA-20R101
ZT2846
HOLE-VIA-20R10
OMIT
1
ZT2847
HOLE-VIA-20R10
OMIT
1
ZT2848
HOLE-VIA-20R10
OMIT
1
ZT2849
HOLE-VIA-20R10
OMIT
1
ZT2850
HOLE-VIA-20R10
OMIT
1
ZT2851
HOLE-VIA-20R10
OMIT
1
ZT2852
HOLE-VIA-20R10
OMIT
1
ZT2853
HOLE-VIA-20R10
OMIT
1
ZT2854
OMIT
HOLE-VIA-20R101
ZT2855
OMIT
HOLE-VIA-20R101
ZT2856
OMIT
HOLE-VIA-20R101
ZT2857
HOLE-VIA-20R10
OMIT
1
ZT2858
OMIT
HOLE-VIA-20R101
ZT2859
OMIT
HOLE-VIA-20R101
ZT2860
OMIT
HOLE-VIA-20R101
ZT2861
OMIT
HOLE-VIA-20R101
ZT2862
OMIT
HOLE-VIA-20R101
ZT2863
OMIT
HOLE-VIA-20R101
ZT2864
OMIT
HOLE-VIA-20R101
ZT2865
OMIT
HOLE-VIA-20R101
ZT2866
OMIT
HOLE-VIA-20R101
ZT2867
HOLE-VIA-20R10
OMIT
1
ZT2868
OMIT
HOLE-VIA-20R101
ZT2869
PERICOM ANALOG SWITCHU2850353S0920 CRITICAL353S0867
10228E051-6772
SYNC_MASTER=N/A SYNC_DATE=N/A
U3LITE APPLE PI
EI_SYNC_FROM_NB
EI_SE
EI_NB_SYNC
EI_NB_TO_CPU_SR_P<1>EI_NB_TO_CPU_SR_N<0>
EI_NB_CLK_N
MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MMEI_APCLK_VREF
VOLTAGE=0.6V
EI_NB_CLK_P
EI_SREI_SREI_NB_TO_CPU_SR_N<1> EI_NB_TO_CPU_SR1EI_NB_TO_CPU_CAD
EI_SR EI_SREI_CPU_TO_NB_SR_P<0> EI_CPU_TO_NB_SR0EI_CPU_TO_NB_CAD
EI_SREI_SREI_NB_TO_CPU_SR_P<0> EI_NB_TO_CPU_SR0EI_NB_TO_CPU_CAD
EI_SREI_SREI_NB_TO_CPU_SR_P<1> EI_NB_TO_CPU_SR1EI_NB_TO_CPU_CAD
EI_SREI_SREI_CPU_TO_NB_SR_N<0> EI_CPU_TO_NB_SR0EI_CPU_TO_NB_CAD
EI_SREI_SREI_NB_TO_CPU_SR_N<0> EI_NB_TO_CPU_SR0EI_NB_TO_CPU_CAD=PP1V2_EI_NB
EI_CPU_TO_NB_AD<12>
EI_CPU_TO_NB_AD<16>
EI_CPU_TO_NB_AD<20>
EI_CPU_TO_NB_AD<23>
EI_NB_TO_CPU_CLK_P
EI_CPU_TO_NB_AD<24>
EI_NB_QREQ_L
SMU_SUSPENDREQ_L
=PP3V3_PWRON_EI
SMU_QREQ
=PP3V3_PWRON_EI
EI_NB_TO_CPU_SR_P<0>
=PP1V5_PWRON_NB_AVDD
=PP1V2_EI_NB
MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MM
PP1V5_PWRON_EI_NB_AVDDVOLTAGE=1.5V
EI_NB_TO_CPU_AD<0>
EI_NB_TO_CPU_AD<2>EI_NB_TO_CPU_AD<1>
EI_NB_TO_CPU_AD<4>
EI_NB_TO_CPU_AD<8>EI_NB_TO_CPU_AD<9>EI_NB_TO_CPU_AD<10>EI_NB_TO_CPU_AD<11>EI_NB_TO_CPU_AD<12>
EI_NB_TO_CPU_AD<14>EI_NB_TO_CPU_AD<15>
EI_NB_TO_CPU_AD<13>
EI_NB_TO_CPU_AD<17>EI_NB_TO_CPU_AD<16>
EI_NB_TO_CPU_AD<18>
EI_NB_TO_CPU_AD<20>EI_NB_TO_CPU_AD<19>
EI_NB_TO_CPU_AD<22>EI_NB_TO_CPU_AD<21>
EI_NB_TO_CPU_AD<23>
EI_NB_TO_CPU_AD<25>
EI_NB_TO_CPU_AD<28>EI_NB_TO_CPU_AD<27>EI_NB_TO_CPU_AD<26>
EI_NB_TO_CPU_AD<29>EI_NB_TO_CPU_AD<30>
EI_NB_TO_CPU_AD<32>EI_NB_TO_CPU_AD<33>
EI_NB_TO_CPU_AD<31>
EI_NB_TO_CPU_AD<35>EI_NB_TO_CPU_AD<34>
EI_NB_TO_CPU_AD<38>EI_NB_TO_CPU_AD<37>
EI_NB_TO_CPU_AD<39>EI_NB_TO_CPU_AD<40>EI_NB_TO_CPU_AD<41>EI_NB_TO_CPU_AD<42>EI_NB_TO_CPU_AD<43>
EI_NB_TO_CPU_SR_N<1>
EI_CPU_TO_NB_CLK_PEI_CPU_TO_NB_CLK_N
EI_CPU_TO_NB_AD<8>
EI_CPU_TO_NB_AD<10>EI_CPU_TO_NB_AD<9>
EI_CPU_TO_NB_AD<13>
EI_CPU_TO_NB_AD<11>
EI_CPU_TO_NB_AD<14>EI_CPU_TO_NB_AD<15>
EI_CPU_TO_NB_AD<17>EI_CPU_TO_NB_AD<18>
EI_CPU_TO_NB_AD<21>
EI_CPU_TO_NB_AD<19>
EI_CPU_TO_NB_AD<22>
EI_CPU_TO_NB_AD<26>
EI_CPU_TO_NB_AD<32>EI_CPU_TO_NB_AD<33>EI_CPU_TO_NB_AD<34>EI_CPU_TO_NB_AD<35>
EI_CPU_TO_NB_SR_N<1>
EI_NB_TO_CPU_CLK_N
EI_CPU_TO_NB_SR_P<1>EI_CPU_TO_NB_SR_N<0>
EI_NB_TO_CPU_AD<7>
EI_NB_TO_CPU_AD<3>
EI_CPU_TO_NB_AD<25>
EI_CPU_TO_NB_AD<7>
EI_NB_QREQ_L_R
EI_NB_TO_CPU_AD<5>
EI_NB_TO_CPU_AD<24>
EI_NB_TO_CPU_AD<6>
EI_NB_TO_CPU_AD<36>
=PP1V2_EI_NB
EI_CPU_TO_NB_AD<0..43> EI_CPU_TO_NB_ADEI_CPU_TO_NB_CAD EI_CADEI_NB_TO_CPU_CADEI_NB_TO_CPU_AD<0..43> EI_NB_TO_CPU_ADEI_CAD
EI_CPU_TO_NB_CLK_P EI_CPU_TO_NB_CLKEI_CPU_TO_NB_CLKEI_CPU_TO_NB_CLK EI_CLKEI_CPU_TO_NB_CLK_N EI_CPU_TO_NB_CLKEI_CPU_TO_NB_CLKEI_CPU_TO_NB_CLK EI_CLK
EI_NB_TO_CPU_CLKEI_NB_TO_CPU_CLK_N EI_NB_TO_CPU_CLKEI_NB_TO_CPU_CLKEI_CLKEI_NB_TO_CPU_CLKEI_NB_TO_CPU_CLK EI_NB_TO_CPU_CLKEI_NB_TO_CPU_CLK_P EI_CLK
EI_CPU_TO_NB_AD<40>EI_CPU_TO_NB_AD<41>
EI_CPU_TO_NB_AD<43>
EI_CPU_TO_NB_SR_P<0>
EI_QACK_L
EI_CPU_TO_NB_AD<30>EI_CPU_TO_NB_AD<31>
EI_CPU_TO_NB_AD<36>EI_CPU_TO_NB_AD<37>EI_CPU_TO_NB_AD<38>EI_CPU_TO_NB_AD<39>
CPU_CHKSTOP_L
EI_CPU_TO_NB_AD<42>
EI_QREQ_L
NB_APSYNC
EI_CPU_TO_NB_AD<6>EI_CPU_TO_NB_AD<5>EI_CPU_TO_NB_AD<4>EI_CPU_TO_NB_AD<3>EI_CPU_TO_NB_AD<2>
EI_SREI_SREI_CPU_TO_NB_SR_N<1> EI_CPU_TO_NB_SR1EI_CPU_TO_NB_CADEI_SREI_SREI_CPU_TO_NB_SR_P<1> EI_CPU_TO_NB_SR1EI_CPU_TO_NB_CAD
EI_CPU_TO_NB_AD<29>EI_CPU_TO_NB_AD<28>EI_CPU_TO_NB_AD<27>
EI_CPU_TO_NB_AD<1>EI_CPU_TO_NB_AD<0>
30
29
29
29
29
29
29
29
29 28
29
29
29
29
29
29
29
60
28
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
28
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
30
29
29
29
29
29
29
29
29
29
29
29
29
29
28
28
28
28
28
28
28
28 18
28
28
28
28
28
28
25
28
48
18
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
18
28
28
28
28
28
28
28
28
28
28
29
28
28
28
28
28
28
28
29
28
28
28
28
28
28
28
28
28
28
28
28
14
14
14
14
14
14
14
14
14 14
14
14
14
14
14
14
24
28
28
14
37
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
29
6
27
6
6
27
27
6
6
6
6
6
6 7
6
6
6
6
6
6
13
7
13
7
6
7
7
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
7
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
29
6
6
6
6
6
6
6
6
6
6
6
6
6
6
(1 OF 3)
PLLTESTOUT
PLLRANGE1
SPARE
PLLTEST
PLLRANGE0
JTAGMODEGPUL_DBG
EI_DISABLE
ATTENTION
TMSTRST*
TCK
TDOTDI
PLLMULT
BYPASS*PLLLOCK
BUSCFG0BUSCFG1BUSCFG2
EI_SRO1*
EI_SRO0*
CKTERMDIS
APSYNCIN
IIC_SDAIIC_SCL
I2CGO
INT*
EI_SRO1
EI_SRO0
QREQ*
EI_ADO33EI_ADO34
EI_ADO39EI_ADO40EI_ADO41EI_ADO42
EI_ADO35EI_ADO36EI_ADO37EI_ADO38
EI_ADO43
EI_ADO32
EI_ADO26EI_ADO27
EI_ADO31EI_ADO30EI_ADO29EI_ADO28
EI_ADO25
SYSCLK
EI_ADO24
EI_ADO22EI_ADO23
EI_ADO21EI_ADO20EI_ADO19EI_ADO18
EI_ADO16EI_ADO17
EI_ADO15EI_ADO14EI_ADO13EI_ADO12
EI_ADO10EI_ADO11
EI_ADO9EI_ADO8EI_ADO7
EI_ADO4
EI_ADO6EI_ADO5
EI_CLKO*
EI_ADO3EI_ADO2EI_ADO1EI_ADO0
EI_CLKO
PSRO1PSRO2
RI*SYNCENABLE*
RAMSTOPENABLEPULSESEL2PULSESEL1PULSESEL0
MCP*
DI2*
AFN
BIMODE*
LSSDSTOPENABLELSSDSTOPC2STARENABLELSSDSTOPC2ENABLELSSDSCANENABLELSSDMODE
C2UNDGLOBALC1UNDGLOBAL
AVPRESET*
PROCID1PROCID2
TRIGGER_INTRIGGER_OUT
PROCID0
TBEN
QACK*
SRESET*
HRESET*
THERM_INT*
APSYNCOUT
EI_SRI0
EI_SRI1
CHKSTOP*
EI_SRI1*
EI_SRI0*
EI_ADI43
EI_ADI33
EI_ADI36EI_ADI37
EI_ADI34
EI_ADI40EI_ADI41
EI_ADI39
EI_ADI35
EI_ADI38
EI_ADI42
EI_ADI32
EI_ADI27EI_ADI26EI_ADI25
EI_ADI30EI_ADI31
EI_ADI29EI_ADI28
EI_ADI24EI_ADI23EI_ADI22
EI_ADI13EI_ADI14EI_ADI15
EI_ADI17EI_ADI16
EI_ADI19EI_ADI20
EI_ADI18
EI_ADI21
EI_ADI12
EI_ADI5EI_ADI6EI_ADI7
EI_ADI9
EI_ADI4
EI_ADI8
EI_ADI10EI_ADI11
EI_ADI3EI_ADI2
EI_ADI0
EI_CLKI
EI_ADI1
EI_CLKI*
SYSCLK*
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
PLACE AT PROCESSOR PINS.
PLACE NEAR PROCESSOR.
MATCH TO SYSCLK
80,84
PLACE BY PROCESSOR PIN.
MORE PROCESSOR DECOUPLINGON PAGES 31 & 32
PROCESSOR IIC ADDRESS:
PROCESSOR LOGIC I/O
402CERM6.3V10%1UF
2
1 C2900
1UF10%6.3VCERM402
2
1C29021UF10%6.3VCERM402
2
1 C29031UF10%6.3VCERM402
2
1 C29041UF10%6.3VCERM402
2
1 C29051UF10%CERM4026.3V2
1 C29061UF10%6.3VCERM402
2
1 C29071UF6.3V402CERM10%
2
1 C2908
402
1UF10%6.3VCERM2
1 C2909
CERM
1UF10%6.3V402
2
1 C29101UF10%6.3VCERM402
2
1 C2911
NOSTUFF
1001%1/16WMF-LF4022
1R2909
4026.3VX5R
NOSTUFF
0.22UF20%
2
1 C2901NOSTUFF
MF-LF1/16W1%100
4022
1R2907
NOSTUFF
5%1/16W
0
MF-LF402
21
R2910
CBGA
OMITCRITICAL
1.8GHZ-76C
NEO-10S-REV2
W20
N19N21
AD22
V22
AD13AB21
AD21
AD17
T22R22
AB24
AB4
AA13
AA5AB6
AB12V21
AC10AB11
AC9V5
V23
M18
M19L19
T19W22AA9
AB7AA8
T20AD18
AD11
AD7AD8U19
AB5
W4
AB19
Y21AA20
N22
V20
AA22
F1G1L2
L3
L22L21K24
L24
P20
E3
D3
D24E24
G4H1
H3K2K4
A6A8
C10A10
M3
C9
A9A4C6
C8A7C7
C4B4B6
L1
A12C12D8
D2A2A5D6
B2C5C1
K3
C11B10A11
E12D11B8
G3E2F4
F2
H2
N3
G20J24
H23K22A13
A19C16
A17A15
C13
A18
A20A23A21
C18C19A22
D20B21D18
J22
C17C14B19
B17F21B24B23
E21E20C22
H22
A16D15C15
A14B15G19
G24D22G21
F23
J21
H21
U24
AA14
R20
AC15AC16
V24
AB16AC19AA19
AC24
W23AD12
AD14 AA10
AA12
U2900
1/16W402
MF-LF1%
46.4NOSTUFF
21
R2901
1%MF-LF402
NOSTUFF
46.4
1/16W
21
R2903
MF-LF402
1%
49.9
1/16W
NOSTUFF
21
R2905
MF-LF402
1/16W
0
5%
21
R2902
0
MF-LF402
5%1/16W
NOSTUFF
21
R2904
5%MF-LF
1K1/16W4022
1R2906
MF-LF
1K5%1/16W
4022
1R2908
5%1/16W
0
MF-LF402
21
R2911
6.3V10%1UFCERM402
2
1 C2912
402CERM6.3V10%1UF
2
1 C2913
402CERM6.3V10%1UF
2
1 C2914
402CERM6.3V10%1UF
2
1 C2915
402CERM6.3V10%1UF
2
1 C2916
402CERM6.3V10%1UF
2
1 C2917
402CERM6.3V10%1UF
2
1 C2918
402CERM6.3V10%1UF
2
1 C2919
402CERM6.3V10%1UF
2
1 C2920
402CERM6.3V10%1UF
2
1 C2921
402CERM6.3V10%1UF
2
1 C2922
402CERM6.3V10%1UF
2
1 C2923
402CERM6.3V10%1UF
2
1 C2924
402CERM6.3V10%1UF
2
1 C2925
402CERM6.3V10%1UF
2
1 C2926
402CERM6.3V10%1UF
2
1 C2927
402CERM6.3V10%1UF
2
1 C2928
402CERM6.3V10%1UF
2
1 C2929
402CERM6.3V10%1UF
2
1 C2930
402CERM6.3V10%1UF
2
1 C2931
402CERM6.3V10%1UF
2
1 C2932
402CERM6.3V10%1UF
2
1 C2933
402CERM6.3V10%1UF
2
1 C2934
402CERM6.3V10%1UF
2
1 C2935
402CERM6.3V10%1UF
2
1 C2936
402CERM6.3V10%1UF
2
1 C2937
402CERM6.3V10%1UF
2
1 C2938
402CERM6.3V10%1UF
2
1 C2939
402CERM6.3V10%1UF
2
1 C2940
402CERM6.3V10%1UF
2
1 C2941
402CERM6.3V10%1UF
2
1 C2942
402CERM6.3V10%1UF
2
1 C2943
402CERM6.3V10%1UF
2
1 C2944
402CERM6.3V10%1UF
2
1 C2945
402CERM6.3V10%1UF
2
1 C2946
402CERM6.3V10%1UF
2
1 C2947
402CERM6.3V10%1UF
2
1 C2948
402CERM6.3V10%1UF
2
1 C2949
402CERM6.3V1UF10%
2
1 C2950
402CERM6.3V10%1UF
2
1 C2951
402
1UF10%6.3VCERM2
1 C2952
402CERM6.3V10%1UF
2
1 C2953
402CERM6.3V10%1UF
2
1 C2954
402CERM6.3V10%1UF
2
1 C2955
402CERM6.3V10%1UF
2
1 C2956
402CERM6.3V10%1UF
2
1 C295710%CERM4026.3V1UF
2
1 C2958
CERM6.3V10%1UF
4022
1 C2959
4026.3V10%1UFCERM2
1 C2960
10229
051-6772 E
SYNC_MASTER=N/A SYNC_DATE=N/A
NEO APPLE PI
EI_CPU_SYNC
EI_CPU_TO_NB_AD<32>
EI_SYNC_FROM_NB
SYSCLK_TERMVOLTAGE=0.6V
MCP_L
CHKSTOP_L
CPU_CHKSTOP_L
=PP1V2_EI_CPU
CPU_HTBEN
=PP1V2_EI_CPU
CPU_SPARE
PLLRANGE0PLLRANGE1PLLTESTPLLTESTOUT
JTAG_CPU_TRST_L
PLLMULTPLLLOCK
CPU_BYPASS_L
JTAG_CPU_TDI
JTAG_CPU_TMSJTAG_CPU_TDO
JTAG_CPU_TCK
GPUL_DBGJTAGMODE_SPARE2
TP_ATTENTION
BUSCFG2
BUSCFG0BUSCFG1
EI_DISABLE
I2CGO
CKTERMDIS_L
I2C_CPU_A_SDAI2C_CPU_A_SCL
CPU_APSYNC
EI_QREQ_L
CPU_INT_L
EI_CPU_TO_NB_SR_N<1>EI_CPU_TO_NB_SR_P<1>EI_CPU_TO_NB_SR_N<0>EI_CPU_TO_NB_SR_P<0>
EI_CPU_TO_NB_AD<41>EI_CPU_TO_NB_AD<40>
EI_CPU_TO_NB_AD<43>EI_CPU_TO_NB_AD<42>
EI_CPU_TO_NB_AD<39>
EI_CPU_TO_NB_AD<34>EI_CPU_TO_NB_AD<35>
EI_CPU_TO_NB_AD<38>EI_CPU_TO_NB_AD<37>EI_CPU_TO_NB_AD<36>
EI_CPU_TO_NB_AD<30>
EI_CPU_TO_NB_AD<33>
EI_CPU_TO_NB_AD<31>
EI_CPU_TO_NB_AD<29>
EI_CPU_TO_NB_AD<25>
EI_CPU_TO_NB_AD<27>EI_CPU_TO_NB_AD<28>
EI_CPU_TO_NB_AD<26>
EI_CPU_CLK_P
EI_CPU_TO_NB_AD<24>
EI_CPU_TO_NB_AD<21>
EI_CPU_TO_NB_AD<23>EI_CPU_TO_NB_AD<22>
EI_CPU_TO_NB_AD<20>EI_CPU_TO_NB_AD<19>
EI_CPU_TO_NB_AD<14>
EI_CPU_TO_NB_AD<18>EI_CPU_TO_NB_AD<17>EI_CPU_TO_NB_AD<16>EI_CPU_TO_NB_AD<15>
EI_CPU_TO_NB_AD<10>EI_CPU_TO_NB_AD<11>EI_CPU_TO_NB_AD<12>EI_CPU_TO_NB_AD<13>
EI_CPU_TO_NB_AD<9>EI_CPU_TO_NB_AD<8>
EI_CPU_TO_NB_AD<5>
EI_CPU_TO_NB_AD<7>
EI_CPU_TO_NB_AD<4>
EI_CPU_TO_NB_AD<6>
EI_CPU_TO_NB_AD<3>
EI_CPU_TO_NB_AD<1>
EI_CPU_TO_NB_CLK_P
RI_LRAMSTOPENABLE
SYNCENABLE
PULSESEL2
PULSESEL0TP_PSRO2TP_PSRO1
PULSESEL1
LSSDSTOPC2STARENABLELSSDSTOPC2ENABLE
MCP_LLSSDSTOPENABLE
LSSDSCANENABLE
C1UNDGLOBAL
DI2_LC2UNDGLOBAL
LSSDMODE
BIMODE_LAVPRESET_L
TP_AFN
TP_PROC_TRIGGER_OUTEI_SE
PROCID1PROCID0
PROCID2
CPU_SRESET_L
PROC_THERM_INT_L
TP_PSYNCOUT
CPU_HTBEN
CHKSTOP_L
EI_QACK_L
EI_NB_TO_CPU_SR_P<0>
EI_NB_TO_CPU_SR_P<1>
EI_NB_TO_CPU_AD<43>EI_NB_TO_CPU_AD<42>EI_NB_TO_CPU_AD<41>EI_NB_TO_CPU_AD<40>EI_NB_TO_CPU_AD<39>
EI_NB_TO_CPU_AD<34>EI_NB_TO_CPU_AD<35>EI_NB_TO_CPU_AD<36>EI_NB_TO_CPU_AD<37>EI_NB_TO_CPU_AD<38>
EI_NB_TO_CPU_AD<33>
EI_NB_TO_CPU_AD<31>EI_NB_TO_CPU_AD<30>EI_NB_TO_CPU_AD<29>
EI_NB_TO_CPU_AD<24>EI_NB_TO_CPU_AD<25>EI_NB_TO_CPU_AD<26>
EI_NB_TO_CPU_AD<28>EI_NB_TO_CPU_AD<27>
EI_NB_TO_CPU_AD<22>EI_NB_TO_CPU_AD<23>
EI_NB_TO_CPU_AD<21>EI_NB_TO_CPU_AD<20>EI_NB_TO_CPU_AD<19>
EI_NB_TO_CPU_AD<14>
EI_NB_TO_CPU_AD<16>EI_NB_TO_CPU_AD<17>EI_NB_TO_CPU_AD<18>
EI_NB_TO_CPU_AD<13>EI_NB_TO_CPU_AD<12>EI_NB_TO_CPU_AD<11>EI_NB_TO_CPU_AD<10>EI_NB_TO_CPU_AD<9>EI_NB_TO_CPU_AD<8>
EI_NB_TO_CPU_AD<4>EI_NB_TO_CPU_AD<5>EI_NB_TO_CPU_AD<6>EI_NB_TO_CPU_AD<7>
EI_NB_TO_CPU_AD<1>EI_NB_TO_CPU_AD<2>
EI_NB_TO_CPU_AD<0>
EI_NB_TO_CPU_CLK_NEI_NB_TO_CPU_CLK_P
EI_CPU_CLK_N
CPU_HRESET_L
EI_NB_TO_CPU_AD<3>EI_CPU_TO_NB_AD<2>
EI_CPU_TO_NB_AD<0>
EI_NB_TO_CPU_AD<15>
EI_NB_TO_CPU_SR_N<0>
EI_NB_TO_CPU_SR_N<1>
=PPVCORE_CPU
EI_CPU_TO_NB_CLK_N
EI_NB_TO_CPU_AD<32>
31
31
30
30
29
29
29
30
30
30
29
36
28
29
14
18
30
18
28
25
28 28 28 28
28 28
28 28
28
28 28
28 28 28
28
28
28
28
28
28 28
28
28
28
28 28
28 28
28
28 28 28 28
28 28 28 28
28 28
28
28
28
28
28
28
28
30 30
29
28
30
14
28
28
28
28 28 28 28 28
28 28 28 28 28
28
28 28 28
28 28 28
28 28
28 28
28 28 28
28
28 28 28
28 28 28 28 28 28
28 28 28 28
28 28
28
28 28
30
28 28
28
28
28
28
32
28
28 14
14
8
14
29
14
30
30 30
30
14
14
14 14 14 14
14 14
14 14
14
14 14
14 14 14
14
14
14
14
14
14 14
14
14
14
14 14
14 14
14
14 14 14 14
14 14 14 14
14 14
14
14
14
14
14
14
14
14 14
14
14 14
30
29
8
14
14
14
14 14 14 14 14
14 14 14 14 14
14
14 14 14
14 14 14
14 14
14 14
14 14 14
14
14 14 14
14 14 14 14 14 14
14 14 14 14
14 14
14
14 14
14
14 14
14
14
14
14
31
14
14
27
6
28
6
6
28
7
27
7
30
30 30 30 30
30
30 8 30
18
18 18
18
30 30
6
30
30 30
30
30
30
18 18
6
6
6 6 6 6
6 6
6 6
6
6 6
6 6 6
6
6
6
6
6
6 6
6
27
6
6
6 6
6 6
6
6 6 6 6
6 6 6 6
6 6
6
6
6
6
6
6
6
6 30
6
30
30
6
30
30 30
6 30
30
30
30 30
30
30 30
6 6
30 30
30
25
30
6
27
6
6
6
6
6 6 6 6 6
6 6 6 6 6
6
6 6 6
6 6 6
6 6
6 6
6 6 6
6
6 6 6
6 6 6 6 6 6
6 6 6 6
6 6
6
6 6
27
6
6 6
6
6
6
6
7
6
6
G
D
S
G
D
S
TABLE_5_ITEM
TABLE_5_ITEM
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD
QTY DESCRIPTIONPART#
TABLE_5_ITEM
REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD
QTY DESCRIPTIONPART#
TABLE_5_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD
QTY DESCRIPTIONPART#
TABLE_5_ITEM
REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD
QTY DESCRIPTIONPART#
TABLE_5_ITEM
REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD
QTY DESCRIPTIONPART#
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
SELECT PLL FREQUENCY RANGE.
*
*
SELECT EI BUS DIVIDER. BUS DATA RATE(BPS)= (PROCESSOR CLOCK) / BUSCFG.
AVPRESET OFF
RESERVED
PROC / 2
PROC / 12
PROC / 6
PROC / 4
BYPASS MODE
*
* STUFF THESE ON Q45.
AVPRESET ON
SELECT PROCESSOR CLOCK MULTIPLIER. PROCESSOR CLOCK(MHZ)= SYSTCLOCK * PLLMULT.
PROC / 16
PROC / 8
PROC / 3
SYSCLK * 12
SYSCLK * 8
SYSTEM CONFIGURATION
SELECT ELASTIC MODE OR BYPASS.
>= 1.8 GHZ *<= 1.6 GHZ *
402MF-LF1/16W
0
5%
21
R3001
1K
5%1/16WMF-LF402
21
R3003
402
5%1/16WMF-LF
1K21
R3005
402MF-LF1/16W5%
1K21
R3007
402MF-LF1/16W5%
1K2 1
R3009
1K
5%1/16WMF-LF402
21
R3002
1K
5%1/16WMF-LF402
21
R3004
402MF-LF1/16W5%
1K21
R3006
OMIT
402MF-LF1/16W5%1K
2
1R3008
OMIT
402MF-LF1/16W5%1K
2
1R3024OMIT
402MF-LF1/16W5%1K
2
1R3026OMIT
402MF-LF1/16W5%1K
2
1R3028OMIT
MF-LF1/16W5%1K
4022
1R3030OMIT
1K5%1/16WMF-LF4022
1R3032
402
OMIT
MF-LF1/16W5%1K
2
1R3034
OMIT
1K5%1/16WMF-LF4022
1R3012OMIT
1K5%1/16WMF-LF4022
1R3018OMIT
402MF-LF1/16W5%1K
2
1R3016OMIT
1K5%
MF-LF402
1/16W
2
1R3014OMIT
1K5%1/16WMF-LF4022
1R3010OMIT
402MF-LF1/16W5%1K
2
1R3020OMIT
402
1K5%1/16WMF-LF
2
1R3022
402
1K
5%
MF-LF1/16W
21
R3040
MF-LF
5%
1K
402
1/16W
NOSTUFF
21
R3042
OMIT
402
1K5%1/16WMF-LF
2
1R3036OMIT
402MF-LF1/16W5%1K
2
1R3038
10K5%1/16WMF-LF4022
1R3068
SOT-3632N7002DW
1
2
6
Q3000
5%
402MF-LF1/16W
1K2
1
R3083
2N7002DWSOT-363
4
5
3
Q3000
402
1K5%1/16WMF-LF
2
1R3059
NOSTUFF
402
1K5%1/16WMF-LF
2
1R3057
1K
5%1/16WMF-LF402
21
R3031
402MF-LF1/16W5%
1K21
R3033
402MF-LF1/16W5%
1K21
R3035
402MF-LF1/16W5%
1K21
R3037
0
5%1/16WMF-LF402
21
R3039
402MF-LF1/16W5%
1K21
R30411/16W
1K
5%
MF-LF402
21
R3043
402MF-LF1/16W5%
1K21
R3045
1K
5%1/16W
402MF-LF
21
R3047
1/16W
402MF-LF
5%
1K21
R3049
402
5%
MF-LF1/16W
1K21
R3051
MF-LF1/16W5%
10K
402
21
R3053
1K
402MF-LF1/16W5%
21
R3055
402
1K
5%1/16WMF-LF
21
R3061
402
1K
5%1/16WMF-LF
NOSTUFF
21
R3063
402MF-LF1/16W5%
1K21
R3065
NOSTUFF
1K
5%
MF-LF402
1/16W
21
R3067
1K
5%1/16W
402MF-LF
21
R3069
NOSTUFF
MF-LF
5%
1K
402
1/16W
21
R3071402
1K
5%1/16WMF-LF
21
R3073
402
1K
5%1/16WMF-LF
NOSTUFF
21
R3075
1K
5%1/16WMF-LF
NOSTUFF
402
21
R3077
1K
5%
MF-LF402
NOSTUFF
1/16W
21
R3079
1K
402MF-LF1/16W5%
21
R3081
402
1K
5%1/16WMF-LF
21
R3085
402MF-LF
1K
5%1/16W
21
R3087
402MF-LF1/16W5%
1K21
R3089
MF-LF1/16W5%
1K
402
21
R3091
402MF-LF1/16W
1K
5%
21
R309310K
402MF-LF1/16W5%
21
R3095
402
5%1/16WMF-LF
10K21
R3097
402MF-LF1/16W5%
10K21
R3099
0
5%
MF-LF402
1/16W
NOSTUFF
21
R3000
114S1103 2 R3014,R3016RES,1K OHM,1/16W,5%,0402 NOSTUFF
1 RES,1K OHM,1/16W,5%,0402114S1103 R3020 NOSTUFF
R3024,R3026,R30283 RES,1K OHM,1/16W,5%,0402114S1103 EI_2TO1
CPU_PLL_HIGH114S1103 2 R3030,R3016RES,1K OHM,1/16W,5%,0402
R3024,R3026,R3012114S1103 3 RES,1K OHM,1/16W,5%,0402 EI_3TO1
R3008,R3026,R3012RES,1K OHM,1/16W,5%,04023114S1103 NOSTUFF
1114S1103 RES,1K OHM,1/16W,5%,0402 R3036
CPU_PLL_LOWRES,1K OHM,1/16W,5%,0402 R3030,R3032114S1103 2
R3008,R3010,R3012114S1103 3 RES,1K OHM,1/16W,5%,0402 NOSTUFF
CPU_PLL_MEDIUM114S1103 2 R3014,R3032RES,1K OHM,1/16W,5%,0402
E051-6772
10230
SYNC_MASTER=N/A SYNC_DATE=N/A
CPU STRAPS
114S1103 RES,1K OHM,1/16W,5%,0402 R3008,R3026,R30283 NOSTUFF
114S1103 RES,1K OHM,1/16W,5%,04021 R3038 NOSTUFF
RES,1K OHM,1/16W,5%,04021114S1103 R3018 EI_2TO1
RES,1K OHM,1/16W,5%,0402 R3008,R3010,R3028114S1103 3 NOSTUFF
RES,1K OHM,1/16W,5%,0402 R30341114S1103 EI_3TO1
114S1103 RES,1K OHM,1/16W,5%,04021 R3022
R3024,R3010,R30123 RES,1K OHM,1/16W,5%,0402114S1103 NOSTUFF
R3024,R3010,R30283 RES,1K OHM,1/16W,5%,0402114S1103 NOSTUFF
CPU_BYPASS_L
CPU_BYPASS
CPU_HRESET
CPU_HRESET_L
=PP1V2_EI_CPU
=PP1V2_EI_CPU
=PP1V2_EI_CPU
CPU_HTBEN
I2CGO
CPU_SRESET_L
PROC_THERM_INT_L
CPU_INT_L
RI_L
DI2_L
BIMODE_L
JTAG_CPU_TDO
JTAG_CPU_TRST_L
GPUL_DBG
CKTERMDIS_L
PLLTEST
C2UNDGLOBAL
C1UNDGLOBAL
EI_SE
JTAG_SEL
PLLTESTOUT
BUSCFG2
PROCID2
PROCID1
PROCID0
PULSESEL2
RAMSTOPENABLE
SYNCENABLE
LSSDSTOPC2ENABLE
LSSDSCANENABLE
JTAGMODE_SPARE2
PULSESEL0
PULSESEL1
JTAG_CPU_TMS
JTAG_CPU_TDI
JTAG_CPU_TCK
LSSDMODE
EI_QREQ_L
LSSDSTOPC2STARENABLE
CPU_SPARE
BUSCFG1
EI_DISABLEPLLMULTPLLRANGE1PLLRANGE0
LSSDSTOPENABLE
AVPRESET_L
BUSCFG0
=PP1V2_EI_CPU
=PP1V2_EI_CPU=PP1V2_EI_CPU
31
31
31
31
31
31
30
30
30
30
30
30
29
29
29
29
29
29
29
29
29
29
18
18
18
25
29
28
29
28
18
18
18
14
14
14
14
29
29
14
14
29
14
14
29
29
29
14
14
14
14
29
13
13
6
7
7
7
27
29
25
29
6
6
29
29
18
29
29
29
29
29
29
6
29
29
29
29
29
29
29
6
29
29
29
29
29
18
18
18
29
6
29
29
29
29
29
29
29
29
29
29
7
7
7
KPVDD2
(2 OF 3)
KPVDD1AVDD
GNDX105
VCOREX105
KPGND2KPGND1AGND
GNDX99
VCOREX100
(3 OF 3)GND
VOUTVIN
NOISECONT
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD
QTY DESCRIPTIONPART#
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
0805
PLACE ALL THESE PARTS VERY CLOSE TO U2900
1/10WMF-LF
5%
603
2.221
R3101
0.22UF6.3V20%
402X5R2
1 C3100
NOSTUFF
20%0.22UF
402
6.3VX5R2
1 C31015%
MF-LF402
0
NOSTUFF
1/16W
21
R3103
NOSTUFF
0
5%1/16WMF-LF402
21
R3105
20%6.3VCERM805
10UF2
1 C3102
60-OHM-EMI
SM
21
L3101
5%
MF-LF1/16W
402
021
R3127
0
MF-LF
5%1/16W
402
21
R3129
5%1/16WMF-LF
0
402
21
R3131
10%1UF
402
6.3VCERM2
1 C3103
CERM6.3V10%
402
1UF2
1 C3104
402CERM6.3V10%1UF
2
1 C3105
402CERM6.3V10%1UF
2
1 C3106
402CERM6.3V10%1UF
2
1 C3107
CERM6.3V10%
402
1UF2
1 C3108
402CERM
10%1UF6.3V2
1 C3109
402CERM6.3V10%1UF
2
1 C3110
402CERM6.3V10%1UF
2
1 C3111
402CERM6.3V
1UF10%
2
1 C3112
402CERM6.3V10%1UF
2
1 C3113
805
20%6.3VCERM
10UF2
1 C311410UF6.3V20%
805CERM2
1 C3115
CERM6.3V20%
805
10UF2
1 C3116
805CERM6.3V20%10UF
2
1 C3117
402CERM6.3V10%1UF
2
1 C3118
402CERM6.3V10%1UF
2
1 C3119
402CERM6.3V10%1UF
2
1 C3120
CERM6.3V10%1UF
4022
1 C3121
402CERM6.3V10%1UF
2
1 C3122
402CERM6.3V10%1UF
2
1 C3123
402
6.3V10%1UF
CERM2
1 C3124
402CERM6.3V10%1UF
2
1 C3125
402CERM6.3V10%1UF
2
1 C3126
402CERM6.3V10%1UF
2
1 C3127
6.3V10%1UF
CERM402
2
1 C3128
402CERM6.3V10%1UF
2
1 C3129
402CERM6.3V10%1UF
2
1 C3130
402CERM
10%1UF6.3V2
1 C3131
402CERM6.3V10%1UF
2
1 C3132
402CERM
10%1UF6.3V2
1 C3133
402CERM6.3V10%1UF
2
1 C3134
402
6.3V10%1UF
CERM2
1 C3135
CERM6.3V
1UF10%
4022
1 C3136
402CERM6.3V10%1UF
2
1 C3137
402CERM6.3V10%1UF
2
1 C3138
6.3V10%1UF
CERM402
2
1 C3139
402CERM6.3V
1UF10%
2
1 C3140
402CERM6.3V10%1UF
2
1 C3141
402
10%1UF
CERM6.3V2
1 C3142
402CERM
10%1UF6.3V2
1 C31431UF
402CERM
10%6.3V2
1 C3144
402CERM6.3V10%1UF
2
1 C3145
6.3V10%1UF
CERM402
2
1 C3146
6.3V10%1UF
402CERM2
1 C3147
1/10W
603
5%
MF-LF
2.2
NOSTUFF
21
R3132
20%6.3VCERM805
10UF2
1 C3150
20%
603CERM10V
1UF
CPU_AVDD_2V6&CPU_AVDD_2V7&CPU_AVDD_2V8
2
1 C314916V
CERM
20%0.01UF
402
CPU_AVDD_2V6&CPU_AVDD_2V7&CPU_AVDD_2V8
2
1C3148
1UF10%
CERM402
6.3V2
1 C3199
SM
OMIT2
1
XW3100
CBGA
1.8GHZ-76C
NEO-10S-REV2
CRITICALOMIT
N18N16N14N12N10M9M7M5
M23M21
C2
M17M15M13M11M1L8L6L4
L20L18
B7
L16L14L12L10K9K7K5
K23K21K19
B3
K17K15K13K11J8J6J4
J20J2
J18
B20
J16J14J12J10J1H9H7H5
H24H19
B16
H17H15H13H11G8G6
G22G18G16G14
B13
G12G10F9F7F5F3
F19F17F15F13
B11
F11E8E6E4
E22E18E16E14E10E1
A24
D9D7D5
D23D21D19D17D13C24
N8N6N4
N24N20N2
C20
A1
R2Y1
T2AA1
N5N23N17N15N13N11N1M8M6M4
C21
M24M22M20M2M16M14M12M10L9L7
B9
L5L23L17L15L13L11K8K6K20K18
B5
K16K14K12K10K1J9J7J5J3J23
B22
J19J17J15J13J11H8H6H4H20H18
B18
H16H14H12H10G9G7G5G23G2G17
B14
G15G13G11F8F6F24F22F20F18F16
B12
F14F12F10E9E7E5E23E19E17E15
B1
E13E11D4D16D14D12D10D1C3
P16P14P12P10N9N7
C23
A3
P24
R24
U2900
1.8GHZ-76C
NEO-10S-REV2
CBGA
OMITCRITICAL
AD9AD5AD3
AD23AD19AD15AD1AC8AC6AC4
AC22AC20AC2
AC18AC14AC12AB9AB3
AB23AB17AB15AB13AB1AA6AA4
AA24AA2
AA18AA16
Y9Y7Y5Y3
Y23Y22Y19Y17Y15Y13Y11W8W6
W24W2
W18W16W14W12W10V9V7V3
V19V17V15V13V11V1U8U6U4
U22U20U2
U18U16U14U12U10T9T7T5T3
T23T21T17T15T13T11T1R8R6R4
R18R16R14R12R10P9P7P5P3
P23P21P19P17P15P13P11P1
AD6AD4AD24AD20AD2AD16AD10AC7AC5AC3AC23AC21AC17AC13AC11AC1AB8AB22AB20AB2AB18AB14AB10AA7AA3AA23AA21AA17AA15AA11Y8Y6Y4Y24Y20Y2Y18Y16Y14Y12Y10W9W7W5W3W21W19W17W15W13W11W1V8V6V4V2V18V16V14V12V10U9U7U5U3U23U21U17U15U13U11U1T8T6T4T24T18T16T14T12T10R9R7R5R3R23R21R19R17R15R13R11R1P8P6P4P22P2P18U2900
MM1572JNSOT-25A
OMIT
51
4
2
3
VR3100
CRITICAL CPU_AVDD_2V6VR31001353S0806 VREG MM1572 2.6V
CRITICAL CPU_AVDD_2V8353S0807 1 VR3100VREG MM1572 2.8V
CRITICAL 1 VR3100VREG MM1572 2.7V CPU_AVDD_2V7353S0886
051-6772 E
10231
SYNC_MASTER=N/A SYNC_DATE=N/A
CPU POWER AND BYPASS
VOLTAGE=2.5V
PP2V5_RUN_CPU_AVDD
MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MM
GND_CPU_AVDD
=PPVCORE_CPUVOLTAGE=1.2VMIN_LINE_WIDTH=0.25MMMIN_NECK_WIDTH=0.2MM
=PP1V2_EI_CPU
PP2V5_RUN_CPU_AVDD_R
MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MM
VOLTAGE=2.5V
GND_Z_OUT
GND_Z_SENSE
GND_SPARE_GND
DIFFERENTIAL_PAIR=P_KP2
MIN_LINE_WIDTH=0.25MM
NET_SPACING_TYPE=PROC_DIFF
KPVDD2
MIN_NECK_WIDTH=0.2MM
NET_SPACING_TYPE=PROC_DIFFDIFFERENTIAL_PAIR=P_TDD
MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.2MMTDIODE_POS
GND_SPARE_GND
DIFFERENTIAL_PAIR=P_KP2
MIN_LINE_WIDTH=0.25MM
NET_SPACING_TYPE=PROC_DIFF
KPGND2
MIN_NECK_WIDTH=0.2MM
TDIODE_NEG
NET_SPACING_TYPE=PROC_DIFF
DIFFERENTIAL_PAIR=P_TDDMIN_LINE_WIDTH=0.25MMMIN_NECK_WIDTH=0.2MM
GND_Z_OUT
GND_Z_SENSE
=PP2V5_RUN_CPU
PP2V5_RUN_CPU_AVDD_R_LVOLTAGE=2.5VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MM
=PPVCORE_CPU
=PP5V_RUN_CPU
CPU_AVDD_EN CPU_AVDD_NOISE
36 30
36
32 29
32
8
31 18
36
36
31
7
29 14
33
33
36
29
6
7 7
35
31
31
31
6
36
31
6
6
31
31
7
7
3
3
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
1UF10%
CERM402
6.3V2
1 C3200
1UF10%
CERM402
6.3V2
1 C3201
1UF10%
CERM402
6.3V2
1 C3202
402
1UF10%
CERM6.3V2
1 C3203
1UF10%
CERM402
6.3V2
1 C3204
1UF10%
CERM402
6.3V2
1 C3205
1UF10%
CERM402
6.3V2
1 C3206
1UF10%
CERM402
6.3V2
1 C3207
1UF10%
CERM402
6.3V2
1 C3208
1UF10%
CERM402
6.3V2
1 C3209
1UF10%
CERM402
6.3V2
1 C3210
1UF10%
CERM402
6.3V2
1 C3211
1UF10%
CERM402
6.3V2
1 C3212
402
1UF10%
CERM6.3V2
1 C3213
402
1UF10%
CERM6.3V2
1 C3214
1UF10%
CERM402
6.3V2
1 C32151UF10%
CERM402
6.3V2
1 C32161UF10%
CERM402
6.3V2
1 C32171UF10%
CERM402
6.3V2
1 C32181UF10%
CERM402
6.3V2
1 C32191UF10%
CERM402
6.3V2
1 C32201UF10%
CERM402
6.3V2
1 C32211UF10%
CERM402
6.3V2
1 C3222
1UF10%
CERM402
6.3V2
1 C32231UF10%
CERM402
6.3V2
1 C3224
1UF10%
CERM402
6.3V2
1 C3225
1UF10%
CERM402
6.3V2
1 C3226
1UF10%
CERM402
6.3V2
1 C3227
1UF10%
CERM402
6.3V2
1 C3228
1UF10%
CERM402
6.3V2
1 C3229
1UF10%
CERM402
6.3V2
1 C3230
1UF10%
CERM402
6.3V2
1 C3231
1UF10%
CERM402
6.3V2
1 C3232
1UF10%
CERM402
6.3V2
1 C32331UF10%
CERM402
6.3V2
1 C3234
1UF10%
CERM402
6.3V2
1 C3235
1UF10%
CERM402
6.3V2
1 C3236
1UF10%
CERM402
6.3V2
1 C3237
1UF10%
CERM402
6.3V2
1 C3238
1UF10%
CERM402
6.3V2
1 C3239
1UF10%
CERM402
6.3V2
1 C3240
1UF10%
CERM402
6.3V2
1 C3241
1UF10%
CERM402
6.3V2
1 C3242
1UF10%
CERM402
6.3V2
1 C3243
1UF10%
CERM402
6.3V2
1 C3244
1UF10%
CERM402
6.3V2
1 C3245
1UF10%
CERM402
6.3V2
1 C3246
1UF10%
CERM402
6.3V2
1 C3247
1UF10%
CERM402
6.3V2
1 C3248
1UF10%
CERM402
6.3V2
1 C3249
1UF10%
CERM402
6.3V2
1 C3250
1UF10%
CERM402
6.3V2
1 C3251
1UF10%
CERM402
6.3V2
1 C3252
1UF10%
CERM402
6.3V2
1 C3253
1UF10%
CERM402
6.3V2
1 C3254
1UF10%
CERM402
6.3V2
1 C3255
1UF10%
CERM402
6.3V2
1 C3256
1UF10%
CERM402
6.3V2
1 C3257
1UF10%
CERM402
6.3V2
1 C3258
1UF10%
CERM402
6.3V2
1 C3259
1UF10%
CERM402
6.3V2
1 C3260
1UF10%
CERM402
6.3V2
1 C3261
1UF10%
CERM402
6.3V2
1 C3262
1UF10%
CERM402
6.3V2
1 C3263
1UF10%
CERM402
6.3V2
1 C3264
1UF10%
CERM402
6.3V2
1 C3265
1UF10%
CERM402
6.3V2
1 C3266
1UF10%
CERM402
6.3V2
1 C3267
1UF10%
CERM402
6.3V2
1 C3268
1UF10%
CERM402
6.3V2
1 C3269
1UF10%
CERM402
6.3V2
1 C3270
1UF10%
CERM402
6.3V2
1 C3271
1UF10%
CERM402
6.3V2
1 C3272
1UF10%
CERM402
6.3V2
1 C3273
1UF10%
CERM402
6.3V2
1 C3274
1UF10%
CERM402
6.3V2
1 C3275
1UF10%
CERM402
6.3V2
1 C3276
1UF10%
CERM402
6.3V2
1 C3277
1UF10%
CERM402
6.3V2
1 C3278
1UF10%
CERM402
6.3V2
1 C3279
1UF10%
CERM402
6.3V2
1 C3280
1UF10%
CERM402
6.3V2
1 C3281
1UF10%
CERM402
6.3V2
1 C3282
1UF10%
CERM402
6.3V2
1 C3283
1UF10%
CERM402
6.3V2
1 C3284
402
1UF10%
CERM6.3V2
1 C3285
402
1UF10%
CERM6.3V2
1 C3286
402
1UF10%
CERM6.3V2
1 C3287
402
1UF10%
CERM6.3V2
1 C3288
1UF10%
CERM402
6.3V2
1 C3289
402
1UF10%
CERM6.3V2
1 C3290
402
1UF10%
CERM6.3V2
1 C3291
402
1UF10%
CERM6.3V2
1 C3292
1UF10%
CERM402
6.3V2
1 C3293
1UF10%
CERM402
6.3V2
1 C3294
1UF10%
CERM402
6.3V2
1 C3295
1UF10%
CERM402
6.3V2
1 C3296
1UF10%
CERM402
6.3V2
1 C3297
1UF10%
CERM402
6.3V2
1 C3298
1UF10%
CERM402
6.3V2
1 C3299
051-6772
10232
E
SYNC_MASTER=N/A SYNC_DATE=N/A
PROC DECOUPLING
=PPVCORE_CPU36 31 29 7
AGND
VCC
BGOUT
PGOOD
ERROUT
DACSTEP
GSENSE
FB
OUT4
OUT1
OUT3OUT2
VID5
VID2
VID3VID4
VID1
VID0
OUTSEN
OSCREF
OS2OS3
OS1
OS4
TG
VREG
VIN
CO
BST
DRN
BG
VPNTHMPAD
TG
VREG
VIN
CO
BST
DRN
BG
VPNTHMPAD
G
D
S
GND
OUT
VIN+ VIN-
V+
G
D
S
D
GS
G
D
S
D
GS
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
KEEP SHORTS NEXT TO U3301
PLACE REGULATOR SENSE POINTS AT DESIGNATED LOCATIONS.
0 TO 2.5V
0 TO 2.5VADC IS 10BIT 0 TO 1023
.00675 A/COUNT
CURRENT SENSE
PLACE NEXT TO SMU
FOR REMOTE SENSE
DIFFERENTIAL PAIR
FAR SIDE
CPU SENSE SIDE
NEAR SIDE
UNDER PROCESSOR
PLACE R3344 AND C3331 BY SMU
CONNECT BETWEEN THE INDUCTOR & BULK CAPS.
PLACE R3325 CLOSE TO INDUCTOR OUTPUT LEAD.
COUNTSCALE
VOLTAGE SENSE
COUNTSCALE2.73224 A/V
6 V/V .01464 V/COUNT
ADC IS 10BIT 0 TO 1023
SC2643VX
TSSOP
1510
11
1213
14
9
16
23
22
2120
19
17
241
2
3
6
7
5
8
4
18
U3300
NOSTUFF
0.0022UF50VCERM402
10%2
1 C3315
402
1.5K
1/16W5%
MF-LF
21
R3300
402CERM6.3V
1UF10%
2
1 C3301
50V
330PF
402CERM
10%2
1 C3302402
NOSTUFF
MF-LF1/16W5%0
2
1R3302
603
1/10W5%
MF-LF
2.7M
NOSTUFF
21
R3303
SC1211SOIC
7
5
6
2
9
1
4
3
8
U3320TH-KZJ
20%1000UF
16VELEC
2
1 C3321
0.6UH-24A
TH1
21
L3320
5%
1
1/16WMF-LF402
21
R3320
NOSTUFF
0.0022UF10%50VCERM402
2
1 C3325
1/16W
0
5%
402MF-LF
21
R3330
SM
OMIT
21
XW3300
1206
20%
CERM16V
1UF2
1 C3313
1206CERM16V20%1UF
2
1 C3329
1206
20%
1UF
CERM16V
21
C3310
1206
1UF20%16VCERM2
1 C3323
1206
1UF
CERM16V20%
21
C3320
603
2.2
1/10W5%
MF-LF
21
R3307
1210CERM16V10%10UF
2
1 C3322
CERM
CRITICAL
10UF
1210
10%16V2
1 C3312
TH-KZJELEC
20%6.3V
1800UF2
1 C3317
ELEC6.3V20%
CRITICAL
TH-KZJ
1800UF2
1 C3318
6.3V
1800UF20%
TH-KZJELEC2
1 C3328330
MF-LF1/16W
402
NOSTUFF
5%
2
1R3324
1/16WMF-LF
1K
5%
402
NOSTUFF
21
R3325
402X7R
0.0082UF25V10%
2
1 C3304
402X7R
0.0082UF25V10%
2
1 C3305
402X7R
0.0082UF25V10%
2
1 C3306
20.5K1%1/16WMF-LF4022
1R331320.5K1/16WMF-LF
1%
4022
1R3316
SC1211SOIC
7
5
6
2
9
1
4
3
8
U3310
20.5K1%1/16WMF-LF4022
1R3317
301
402
1%1/16WMF-LF
21
R332610%10VCERM402
0.068UF21
C3308
BAS16SOT23
3
1
D3310
SOT23BAS16
3
1
D3320
402
332K
MF-LF1/16W1%
2
1R3328
20%10VCERM402
0.1UF2
1 C3300
CERM
10%0.0047UF25V
4022
1 C3326
5%1/8W
1
MF-LF8052
1R3321
5%
805
11/8WMF-LF
2
1R3311
0.0047UF
402
25V10%
CERM2
1 C3316
MF-LF402
1/16W5%30K
2
1R3301
MF-LF1/16W1%
4.99K
402
21
R3305
402
1%
261
1/16WMF-LF
21
R3304
402MF-LF1/16W5%
021
R3335
1/16W
402MF-LF
5%
021
R3336 1UH-20A-4.5MOHM
TH-VERT
CRITICAL
21
L3300
NOSTUFF
5%1/16WMF-LF402
021
R3337
1/16W
402MF-LF
5%
0
NOSTUFF
21
R3338
402
NOSTUFF
0
5%1/16WMF-LF
21
R3339
1/16W5%
NOSTUFF
402MF-LF
021
R3340
NOSTUFF
402MF-LF1/16W5%
021
R3341
NOSTUFF
402MF-LF1/16W5%
021
R3342
1UF20%
1206
16VCERM2
1 C3330
402
20%0.001UF50VCERM2
1 C3314
1005%1/16WMF-LF4022
1R3312
0.001UF20%
CERM402
50V2
1 C3324
MF-LF1/16W5%100
4022
1R3322
2N7002SOT23-LF
2
1
3 Q3312
SOT23-5INA138
43
5 1
2
U3301
1W
0.025
1%
2512MF
21
R3343
CERM
20%6.3V
10UF
8052
1 C3331
402
73.2K1%
MF-LF1/16W
2
1R3345
BAS16SOT23
NOSTUFF3
1
D3300
MF-LF
5%1/16W
100K
402
21
R3344
20.5K
402MF-LF1/16W1%
NOSTUFF
2
1R33181/16W
402
20.5K1%
MF-LF
NOSTUFF
2
1R33151/16W
NOSTUFF
402MF-LF
1%20.5K
2
1R3314
5%1/16W
10K
MF-LF4022
1R3350
10K
402MF-LF1/16W5%
2
1R3351
SM
OMIT
21
XW3301
SM
OMIT
21
XW3303
SM
OMIT
21
XW3304
NOSTUFF
1/16W
100K
5%
402MF-LF
21
R3308
805
10UF6.3V20%
CERM2
1 C3303
603
2.2
1/10W5%
MF-LF
21
R3306
ELECTH-KZJ
1800UF20%6.3V2
1 C3332
1800UF
ELEC
20%6.3V
TH-KZJ2
1 C3333
SM
OMIT
21
XW3302
MF-LF1/16W
5%
402
0
2
1R3390
MF-LF1/16W5%0
4022
1R3391
1%1/16WMF-LF
10K
4022
1R3360
MF-LF1/16W1%2.0K
4022
1R3361
NTD60N02RCASE369
CRITICAL
3
1
4
Q3310
NTD70N03RCASE369
CRITICAL
3
1
4
Q3311
CRITICAL
CASE369NTD60N02R
3
1
4
Q3320
NTD70N03RCASE369
CRITICAL
3
1
4
Q3321
0.6UH-24A
TH1
CRITICAL
21
L3310
TH-KZJ
1000UF20%
ELEC16V
CRITICAL
2
1 C3311
10%
NOSTUFF
0.015UF
16VX7R 402
21
C3309
402
1.5K
1%1/16WMF-LF
21
R3327
402
1/16WMF-LF
5%10
2
1R3329
CERM
1UF20%16V
12062
1 C3319
1/16W
1
MF-LF402
5%
21
R3310
E
33 102
051-6772
SYNC_MASTER=N/A SYNC_DATE=N/A
CPU VREG
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
PN2
U3320_BG
U3320_TG
PP12V_CPU
U3310_VREGVPN1
U3310_BG
PN1MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
U3310_TG
PP12V_CPU
PPVCORE_CPU
U3310_DRN
PPVCORE_CPU
U3320_DRN
VCORE_SENSE_VOUT
R3325_2
CPU_SENSE_I
SC2643_ERROUT
CPU_VID_R<1>CPU_VID_R<2>
SC2643_AGND
VOLTAGE=12VPP12V_CPU
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
VCORE_SENSE_GND
VRM_EN
PP12V_CPU
SC2643_OSCREF
SC2643_OS3
CPU_VID_R<0>
CPU_VID_R<3>
U3300_BGOUT
SC2643_DACSTEP
SC2643_OUTSEN_R
U3310_BST
U3320_BST
CORE_ISNS_M
C3326_1
OUT2
AUX2
PN2
VPN2
C3316_1AUX1
PN1
CORE_ISNS_PINA138_OUT
SC2643_AGND
AUX3AUX2AUX1
SYS_POWERUP_L
SC2643_VCC
C3302_1
SC2643_VCC
KPVDD2
KPGND2
CPU_SENSE_I_R
GND_SMU_AVSS
OUT1
SYS_SLEWING_LPP12V_CPU
PPVCORE_CPU
CPU_VID_R<4>CPU_VID_R<5>
=PP12V_RUN_CPU
=PP12V_RUN_CPU
=PP3V3_RUN_CPU
PPVCORE_CPU
GND_SMU_AVSS
PP12V_CPU
SC2643_PGOOD
SC2643_AGND
U3320_BST_R
SC2643_OUTSEN
SC2643_AGND
U3320_VREG
OUT1OUT2OUT3
SC2643_OS2
SC2643_AGND
U3310_BST_R
CPU_SENSE_V
SC2643_OS1
SC2643_OS4
SC2643_OS_HUB
OUT4
SC2643_VCC
VCORE_SENSE_VOUTDIFFERENTIAL_PAIR=P_SENSE_COREMIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.2MMNET_SPACING_TYPE=PROC_DIFF
VCORE_SENSE_GNDDIFFERENTIAL_PAIR=P_SENSE_CORE
NET_SPACING_TYPE=PROC_DIFF
MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.2MM
PPVCORE_CPUMIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.25MM
PP12V_CPU_R
35
35
13
35
35
35
34
34
11
36
34
34
36
34
34
34
33
33
34
34
10
36
36
33
27
34
33
33
33
34
33
33
33
33
33
7
7
33
8
8
33
33
33
8
8
36
33
33
36
7
31
31
13
25
33
7
8
8
33
33
7
13
33
33
33
7
6
6
6
6
6
6
6
6
6
13
6
6
33
6
6
6
6
6
6
33
33
6
33
6
6
33
34 33 33
6
33
33
6
6
8
33
13
6
6
6
6
7
7
7
6
8
6
33
33
33
33
34
33
13
33
6
6
6
TG
VREG
VIN
CO
BST
DRN
BG
VPNTHMPAD
LM339AV+
GND
G
D
S
D
GS
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
PLACE LED3400 NEAR VREG
1206
10UF20%6.3VCERM
EXTRA_C
2
1 C3400
CERM6.3V20%10UF
12062
1 C3401
CERM6.3V20%10UF
1206
EXTRA_C
2
1 C3402
CERM6.3V20%10UF
1206
EXTRA_C
2
1 C3403
CERM6.3V20%10UF
12062
1 C3404
1206
10UF20%6.3VCERM
EXTRA_C
2
1 C3405
1206
10UF20%6.3VCERM2
1 C3406
CERM6.3V20%10UF
1206
EXTRA_C
2
1 C3407
CERM6.3V20%10UF
12062
1 C3408
1206
10UF20%6.3VCERM
EXTRA_C
2
1 C3409
1206
10UF20%6.3VCERM2
1 C3419
CERM6.3V20%10UF
12062
1 C3429
1206
10UF20%6.3VCERM2
1 C3430
1206
10UF20%6.3VCERM
EXTRA_C
2
1 C3431
CERM6.3V20%10UF
12062
1 C3432
EXTRA_C
CERM6.3V20%10UF
12062
1 C3433
1206
10UF20%6.3VCERM
EXTRA_C
2
1 C3434
1206
10UF20%6.3VCERM
EXTRA_C
2
1 C3435
1206
10UF20%6.3VCERM
EXTRA_C
2
1 C3436
CERM6.3V20%10UF
1206
EXTRA_C
2
1 C3437
CERM6.3V20%10UF
12062
1 C3438
1206
10UF20%6.3VCERM
EXTRA_C
2
1 C3439
1206
10UF20%6.3VCERM2
1 C3440
CERM6.3V20%10UF
1206
EXTRA_C
2
1 C3441
CERM6.3V20%10UF
1206
EXTRA_C
2
1 C3442
1206
10UF20%6.3VCERM
EXTRA_C
2
1 C3443
10UF
1206
20%6.3VCERM
EXTRA_C
2
1 C3444
1206
10UF20%6.3VCERM
EXTRA_C
2
1 C3445
1206
10UF20%6.3VCERM2
1 C3446
CERM6.3V20%10UF
12062
1 C3447
CERM6.3V20%10UF
1206
EXTRA_C
2
1 C3448
1206
10UF20%6.3VCERM
EXTRA_C
2
1 C3449
1206
10UF20%6.3VCERM
EXTRA_C
2
1 C3450
CERM6.3V20%10UF
1206
EXTRA_C
2
1 C3451
CERM6.3V20%10UF
1206
EXTRA_C
2
1 C3452
1206
10UF20%6.3VCERM2
1 C3453
1206
10UF20%6.3VCERM2
1 C3454
CERM6.3V20%10UF
1206
EXTRA_C
2
1 C3455
EXTRA_C
CERM6.3V20%10UF
12062
1 C3456
CERM6.3V20%10UF
1206
EXTRA_C
2
1 C3457
CERM6.3V20%10UF
12062
1 C3458
1000UF
16VELEC
20%
TH-KZJ
2
1 C3412
ELEC
1000UF
16V20%
TH-KZJ
2
1 C3411
0.6UH-24A
TH1
21
L3410
1/16W5%
1
MF-LF402
21
R3410
SOICSC1211
7
5
6
2
9
1
4
3
8
U3410
402
NOSTUFF
0.0022UF10%50VCERM2
1 C3415CERM1206
1UF20%16V2
1 C3413
20%16V
1206CERM
1UF21
C341010UF
1210CERM16V10%
2
1 C3468
20%6.3V
TH-KZJELEC
1800UF2
1 C34176.3VELEC
20%1800UF
TH-KZJ2
1 C3418BAS16SOT23
3
1
D3410
1/8W
805
15%
MF-LF2
1R3411
10%
CERM25V
402
0.0047UF2
1 C3416
16VCERM
20%1UF
12062
1 C3470
0.001UF20%
402CERM50V2
1 C3414
402
1005%1/16WMF-LF
2
1R3412
402MF-LF1/16W5%10K
2
1R3450
603
2.2
1/10W5%
MF-LF
21
R3423
1800UF6.3VELEC
20%
TH-KZJ2
1 C3472
TH-KZJ
20%
ELEC6.3V
1800UF2
1 C3473
1000UF20%
ELEC16V
TH-KZJ
2
1 C3422
1800UF6.3VELEC
20%
TH-KZJ2
1 C34751800UF6.3VELEC
20%
TH-KZJ2
1 C3474
ELEC6.3V20%1800UF
TH-KZJ2
1 C3427
402
330
DEVELOPMENT
MF-LF1/16W5%
2
1R3490
DEVELOPMENT
2.0X1.25AGREEN
2
1
LED3400
SOI
DEVELOPMENT3
14
9
8
12
U1001MF-LF1/16W5%
0
402
DEVELOPMENT
21
R3491
CRITICAL
CASE369NTD60N02R
3
1
4
Q3410
NTD70N03RCASE369
CRITICAL
3
1
4
Q3411
CERM6.3V20%10UF
1206
EXTRA_C
2
1 C3459
1206
10UF20%6.3VCERM
EXTRA_C
2
1 C3460
1206
10UF20%6.3VCERM
EXTRA_C
2
1 C3461
CERM6.3V20%10UF
1206
EXTRA_C
2
1 C3462
1206
10UF20%6.3VCERM2
1 C3463
1206
10UF20%6.3VCERM2
1 C3464
CERM6.3V20%10UF
12062
1 C3465
CERM6.3V20%10UF
1206
EXTRA_C
2
1 C3466
1206
10UF20%6.3VCERM
EXTRA_C
2
1 C3467
051-6772
10234
E
SYNC_MASTER=N/A SYNC_DATE=N/A
CPU VREG
U3410_TG
PP12V_CPU
U3410_BG
VPN3U3410_VREG
U3410_DRN
PPVCORE_CPU
CPU_CORE_FOR_LED
1V1_REF
LED_CPU_CORE_N
LED_CPU_CORE_P
PP3V3_RUN
U3410_BST
U3410_BST_R
PN3
AUX3C3416_1
OUT3
PPVCORE_CPU
PN3MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
PP12V_CPU
50 22
35
18
35
34
11
34
34
33
50
10
33
34
33
7
22
7
34
7
34
33
6
6
6
10
6
6
33
33
6
6
6
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
1206
20%
CERM6.3V
10UF
CRITICALEXTRA_C
2
1 C3500EXTRA_C
1206
10UF20%6.3VCERM2
1 C3501
1206
10UF20%6.3VCERM
EXTRA_C
2
1 C3502
10BQ040PBF
SMB21
DS3502CERM6.3V20%10UF
1206
EXTRA_C
2
1 C3503
1206
10UF20%6.3VCERM
EXTRA_C
2
1 C350410UF
CERM6.3V20%
1206
EXTRA_C
2
1 C350510UF
1206
20%6.3VCERM
EXTRA_C
2
1 C3506
CERM6.3V20%10UF
1206
EXTRA_C
2
1 C3507
CERM6.3V20%10UF
1206
EXTRA_C
2
1 C3508
1206
10UF20%6.3VCERM
EXTRA_C
2
1 C350910UF
CERM6.3V20%
12062
1 C35106.3V
1206
10UF20%
CERM2
1 C3511
CERM6.3V20%10UF
1206
EXTRA_C
2
1 C3512
EXTRA_C
CERM6.3V20%10UF
12062
1 C3513
10UF20%
1206
6.3VCERM2
1 C351420%
1206CERM6.3V
10UF
EXTRA_C
2
1 C3515
CERM1206
6.3V20%10UF
EXTRA_C
2
1 C3516
CERM1206
6.3V
10UF20%
2
1 C351710UF
1206CERM6.3V20%
2
1 C35186.3VCERM1206
20%10UF
EXTRA_C
2
1 C3519
1206CERM6.3V
10UF20%
EXTRA_C
2
1 C3520
1206CERM6.3V20%10UF
2
1 C3521
1206CERM6.3V20%10UF
EXTRA_C
2
1 C3522
1206
10UF20%6.3VCERM
EXTRA_C
2
1 C3523
CERM1206
6.3V20%10UF
EXTRA_C
2
1 C3524
20%
1206
10UF6.3VCERM
EXTRA_C
2
1 C3525
1206
6.3VCERM
20%10UF
2
1 C3526EXTRA_C
CERM6.3V
1206
20%10UF
2
1 C35276.3VCERM1206
10UF20%
EXTRA_C
2
1 C3528EXTRA_C
6.3V
1206CERM
20%10UF
2
1 C3529
CERM6.3V
1206
20%10UF
EXTRA_C
2
1 C3530
1206
6.3VCERM
10UF20%
2
1 C3531EXTRA_C
1206
6.3VCERM
20%10UF
2
1 C3532EXTRA_C
1206
6.3VCERM
20%10UF
2
1 C3533
CERM6.3V20%10UF
1206
EXTRA_C
2
1 C3534
EXTRA_C
CERM6.3V
1206
20%10UF
2
1 C3535
20%
1206
10UF6.3VCERM
EXTRA_C
2
1 C3536
CERM6.3V
1206
20%10UF
EXTRA_C
2
1 C3537EXTRA_C
1206
6.3VCERM
20%10UF
2
1 C3538
CERM6.3V
1206
20%10UF
2
1 C3539
1206
6.3VCERM
20%10UF
2
1 C3540
CERM6.3V
1206
20%10UF
2
1 C3541EXTRA_C
1206
6.3VCERM
20%10UF
2
1 C354210UF
CERM6.3V
1206
20%
EXTRA_C
2
1 C3543
1206
6.3VCERM
20%10UF
2
1 C3544
1206
10UF20%6.3VCERM
EXTRA_C
2
1 C3545
1206CERM6.3V20%10UF
2
1 C3546
CERM6.3V
1206
20%10UF
EXTRA_C
2
1 C3547
1206
6.3VCERM
20%10UF
EXTRA_C
2
1 C3548
CERM6.3V
1206
20%10UF
EXTRA_C
2
1 C3549
1206
6.3VCERM
20%10UF
EXTRA_C
2
1 C3550
CERM6.3V
1206
20%10UF
2
1 C3551
CERM6.3V
1206
20%10UF
EXTRA_C
2
1 C3552
1206
6.3VCERM
20%10UF
2
1 C3553
CERM6.3V
1206
20%10UF
EXTRA_C
2
1 C3554
1206
6.3VCERM
20%10UF
EXTRA_C
2
1 C3555
1206
10UF20%6.3VCERM
EXTRA_C
2
1 C3556
CERM6.3V
1206
20%10UF
2
1 C3557
1206
10UF20%6.3VCERM2
1 C3558
CERM6.3V20%10UF
12062
1 C3559
1206
10UF20%6.3VCERM2
1 C3560
CERM6.3V20%10UF
12062
1 C3561EXTRA_C
1206
10UF20%6.3VCERM2
1 C3562EXTRA_C
1206
10UF20%6.3VCERM2
1 C3563
CERM6.3V20%10UF
12062
1 C3564
1206
10UF20%6.3VCERM
EXTRA_C
2
1 C3565
CERM6.3V20%10UF
1206
EXTRA_C
2
1 C3566
CERM6.3V20%10UF
12062
1 C3567
6.3V
1206
10UF20%
CERM2
1 C3568
1206
10UF20%6.3VCERM
EXTRA_C
2
1 C3569
CERM6.3V20%10UF
1206
EXTRA_C
2
1 C3570
1206
10UF20%6.3VCERM2
1 C35716.3V20%10UF
CERM1206
EXTRA_C
2
1 C3572
1206
10UF20%6.3VCERM
EXTRA_C
2
1 C357310UF
1206
20%6.3VCERM
EXTRA_C
2
1 C35746.3VCERM
20%10UF
1206
EXTRA_C
2
1 C3575
1206
10UF20%6.3VCERM2
1 C3576
CERM6.3V20%10UF
1206
EXTRA_C
2
1 C3577
1206
10UF20%6.3VCERM
EXTRA_C
2
1 C3578
6.3V
1206
10UF20%
CERM2
1 C3579
1206
10UF20%6.3VCERM2
1 C3580
CERM6.3V20%10UF
1206
EXTRA_C
2
1 C3581
1206
10UF20%6.3VCERM
EXTRA_C
2
1 C3582
CERM6.3V20%10UF
1206
EXTRA_C
2
1 C3583
1206
10UF20%6.3VCERM
EXTRA_C
2
1 C358410UF
1206
20%6.3VCERM2
1 C358510UF
CERM6.3V20%
12062
1 C3586
1206
10UF20%6.3VCERM
EXTRA_C
2
1 C35876.3V20%10UF
1206CERM2
1 C3588
CERM6.3V20%10UF
12062
1 C3589
1206
10UF20%6.3VCERM
EXTRA_C
2
1 C3590
1206
10UF20%6.3VCERM
EXTRA_C
2
1 C3591
CERM6.3V20%10UF
12062
1 C359210UF6.3V
1206
20%
CERM2
1 C3593
CERM6.3V20%10UF
12062
1 C3594
1206
10UF20%6.3VCERM
EXTRA_C
2
1 C359520%
1206
10UF6.3VCERM2
1 C3596
CERM6.3V20%10UF
12062
1 C359710UF20%6.3VCERM
EXTRA_C
12062
1 C3598
CERM6.3V20%10UF
1206
EXTRA_C
2
1 C3599
051-6772
10235
E
SYNC_MASTER=N/A SYNC_DATE=N/A
CPU VREG OUTPUT CAPS
PPVCORE_CPU
PP2V5_RUN_CPU_AVDD_RPPVCORE_CPU
35
35
34
34
33
33
7
7
6
31 6
ADJ
NC1NC2NC3
NC5NC4
VREF
GND
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
THESE SIGNALS HAVE A MIN_LINE_WIDTH=0.25MMAND MIN_NECK_WIDTH=0.2MM
PLACE CLOSETO U2900
PLACE AT BOARD EDGE
100UA CURRENT SOURCE
XW3600, R3602, AND DS3602 MUST BE PLACED CLOSE TO SMU
BUFFER
NEED TO CONNECT TO P65 OF 80PIN SMU OR PIN 49 OF 64PIN SMU
NEEDED FOR FMAX
NC
POWER MONITOR
10V20%
805CERM
2.2UF2
1 C3600
805CERM10V20%2.2UF
2
1 C36012001/10WMF-LF
1%
6032
1R3601
2.5VSSOT-23
NOSTUFF
3
12
D3600
CERM10V20%0.47UF
6032
1 C3602
SOT23-5LMV2011
2
5
1
4
3
U3601
OMIT
SM21
XW3601603
2
5%1/10WMF-LF
21
R3602
10VCERM
20%
805
2.2UF2
1 C3603
805
20%
CERM10V
2.2UF2
1 C360410VCERM
20%
805
2.2UF2
1 C3605
0.1%1/16W
603MF-LF
10.0K21
R3603
0.1%
MF-LF603
20.0K
1/16W
21
R3604
MF-LF
0.1%1/16W
603
10.0K21
R3605
0.1%1/16W
603MF-LF
10.0K21
R3606
20.0K
1/16W0.1%
603MF-LF
21
R3607
12.7K
MF-LF603
1%1/10W
2
1R3608LMV2011SOT23-5
2
5
1
4
3
U3602
SOT23-5LMV2011
2
5
1
4
3
U3603
0.1%1/16WMF-LF
10.0K
603
21
R3609
0.1%1/16W
603
10.0K
MF-LF
21
R3610
603
100K
0.1%
MF-LF1/16W
21
R3611
603
40.2K
MF-LF1/16W0.1%
21
R3612
603
40.2K
0.1%1/16WMF-LF
TD421
R3613
603
100K
0.1%
MF-LF1/16W
21
R3614
0.0022UF
CERM50V
402
10%2
1 C3606
402
1/16WMF-LF
5%0
2
1R3615
1K
402MF-LF
1%1/16W
NOSTUFF
2
1R3616
CERM
20%
805
10UF
6.3V
21
C3607
6.3V
10UF
CERM
20%
805
21
C3608
0.0022UF
CERM50V10%
4022
1 C3610
NOSTUFF
MF-LF805
5%1/8W
0
2
1R3619
51
402
5%
MF-LF1/16W
NOSTUFF
21
R3620
1/16W5%
51
MF-LF402
NOSTUFF
21
R3621
NOSTUFF
BM12B-SRSS-TBF-ST-SM
9
8
7
6
5
4
3
2
12
11
10
1
13
14
J3600
100K
1/16WMF-LF
5%
402
21
R3628
CERM6.3V20%10UF
8052
1 C3613
OMIT
SM21
XW3611
SM
OMIT
21
XW3612
OMIT
SM21
XW3613
SM
OMIT
21
XW3614
402
1/16W5%
0
MF-LF
21
R3690
402MF-LF1/16W
0
5%
NOSTUFF
21
R3691
SOD-123
B0530WXF
NOSTUFF
21
DS3602
B0530WXF
NOSTUFF
SOD-123
2
1DS36501/10WMF-LF
5%0
6032
1R3650
NCV1009DSO-8
6
87321
4
5U3650
10236
051-6772 E
SYNC_MASTER=N/A SYNC_DATE=N/A
CPU DIODE CONDITIONER
KPVDD2_FMAXDIFFERENTIAL_PAIR=KP2_FMAX
NET_SPACING_TYPE=PROC_DIFFMIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.25MM
NET_SPACING_TYPE=PROC_DIFFMIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.25MMDIFFERENTIAL_PAIR=KP2_FMAXKPGND2_FMAX
TDIODE_NEG_FMAX
MIN_LINE_WIDTH=0.25MMMIN_NECK_WIDTH=0.2MMNET_SPACING_TYPE=PROC_DIFF
DIFFERENTIAL_PAIR=TDIODE
DAVDDMIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.25MM
=PP5V_PWRON_CPU
DAGND
ADC_REFMIN_LINE_WIDTH=0.25MMMIN_NECK_WIDTH=0.2MM
PP3V3_CPU_DIODEMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
=PP3V3_ALL_CPU =PP3V3_PWRON_CPU
GND_SMU_AVSS_DAGND
PPVREF_SMU_ADC_REF
CPU_TEMP_R
DAGNDMIN_LINE_WIDTH=0.25MMMIN_NECK_WIDTH=0.2MM
=PP5V_ALL_CPU
DAGND
DAGND
GND_SMU_AVSS
CPU_TEMPMIN_LINE_WIDTH=0.25MMMIN_NECK_WIDTH=0.2MM
FMAXT_MDIFFERENTIAL_PAIR=P_FMAXTNET_SPACING_TYPE=PROC_DIFF
DAVDD
DAVDD
DAGND
ADC_REF
ADC_REF
NET_SPACING_TYPE=PROC_DIFFDIFFERENTIAL_PAIR=P_FMAXTFMAXT_P
DAGND=PPVCORE_CPU
ADC_REF
KPVDD2
KPGND2
TDIODE_POS
TDIODE_NEG
DAGND
CPU_TEMP
MIN_LINE_WIDTH=0.25MMNET_SPACING_TYPE=PROC_DIFFMIN_NECK_WIDTH=0.2MMDIFFERENTIAL_PAIR=TDIODETDIODE_POS_FMAX
CORE_ISNS_PDIFFERENTIAL_PAIR=CORE_ISNS
NET_SPACING_TYPE=PROC_DIFFMIN_LINE_WIDTH=0.25MMMIN_NECK_WIDTH=0.2MM
NET_SPACING_TYPE=PROC_DIFF
CORE_ISNS_MDIFFERENTIAL_PAIR=CORE_ISNSMIN_LINE_WIDTH=0.25MMMIN_NECK_WIDTH=0.2MM
0.25MM0.2MM
0.2MM
TD30.25MM
DAGND
DAGND TD_CURRENT
DAVDD
TD_BUFFERED
MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.2MM
TD1
MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.25MM
TD2
CPU0_DIODE_POS
TDIODE_NEG
TDIODE_POS
CPU0_DIODE_NEG
32
33
31
33
33
36
36
13
36
29
31
31
36
31
36
33
33
31
36
6
6
6
36
7
36
36
7 7
8
8
36
7
36
36
8
13
36
36
36
36
36
36
7
36
6
6
31
6
36
13
6
6
6
36
36
36
6
31
INTERFACEDATA
MEMORY
DDR_DQ5
DDR_DQ0DDR_DQ1
DDR_DQ2
DDR_DQ3DDR_DQ4
DDR_DQ6DDR_DQ7
DDR_DQ8DDR_DQ9
DDR_DQ10
DDR_DQ11DDR_DQ12
DDR_DQ13
DDR_DQ14DDR_DQ15
DDR_DQ16
DDR_DQ26DDR_DQ25
DDR_DQ24
DDR_DQ23DDR_DQ22
DDR_DQ21
DDR_DQ20DDR_DQ19
DDR_DQ18DDR_DQ17
DDR_DQ36
DDR_DQ35
DDR_DQ34DDR_DQ33
DDR_DQ32
DDR_DQ31DDR_DQ30
DDR_DQ29DDR_DQ28
DDR_DQ27
DDR_DQ46
DDR_DQ45DDR_DQ44
DDR_DQ43
DDR_DQ42DDR_DQ41
DDR_DQ40DDR_DQ39
DDR_DQ38
DDR_DQ37
DDR_DQ47DDR_DQ48
DDR_DQ49
DDR_DQ50DDR_DQ51
DDR_DQ52DDR_DQ53
DDR_DQ54
DDR_DQ55DDR_DQ56
DDR_DQ57
DDR_DQ58DDR_DQ59
DDR_DQ60
DDR_DQ61DDR_DQ62
DDR_DQ63
VDD_DDR
(SYM 2 OF 7) DDR_DQ64DDR_DQ65
DDR_DQ69
DDR_DQ68DDR_DQ67
DDR_DQ66
DDR_DQ70
DDR_DQ74
DDR_DQ73DDR_DQ72
DDR_DQ71
DDR_DQ75
DDR_DQ79DDR_DQ78
DDR_DQ77
DDR_DQ76
DDR_DQ80
DDR_DQ81DDR_DQ82
DDR_DQ83
DDR_DQ85
DDR_DQ84
DDR_DQ90DDR_DQ89
DDR_DQ88
DDR_DQ87DDR_DQ86
DDR_DQ95DDR_DQ94
DDR_DQ93DDR_DQ92
DDR_DQ91
DDR_DQ99
DDR_DQ98DDR_DQ97
DDR_DQ96
DDR_DQ100
DDR_DQ104
DDR_DQ105DDR_DQ106
DDR_DQ107
DDR_DQ108DDR_DQ109
DDR_DQ110
DDR_DQ103
DDR_DQ102
DDR_DQ101
DDR_DQ111DDR_DQ112
DDR_DQ113
DDR_DQ114DDR_DQ115
DDR_DQ116DDR_DQ117
DDR_DQ118
DDR_DQ119DDR_DQ120
DDR_DQ121
DDR_DQ127
DDR_DQ126DDR_DQ125
DDR_DQ124
DDR_DQ123DDR_DQ122
DDR_VREF7
DDR_VREF6DDR_VREF5
DDR_VREF4
DDR_VREF3
INTERFACECONTROLMEMORY
DDRCLK_AVDD
VDD_DDR
(SYM 3 OF 7)
DDR_CK_DDDR_CK_CN
DDR_CK_C
DDR_CK_BNDDR_CK_B
DDR_CK_ANDDR_CK_A
DDR_CK_DN
DDR_CK_EN
DDR_CK_FN
DDR_CK_F
DDR_CK_E
DDR_CLKP
DDR_CKE7DDR_CKE6
DDR_CKE5
DDR_CKE4DDR_CKE3
DDR_CKE1
DDR_CKE2
DDR_CKE0
DDR_VREF1
DDR_RAS
DDR_CAS
DDR_WE
DDR_BA1DDR_BA0
DDR_MUXEN0
DDR_MAD5
DDR_MAD4DDR_MAD3
DDR_MAD2
DDR_MAD1DDR_MAD0
DDR_MUXEN4
DDR_MAD9DDR_MAD8
DDR_MAD6
DDR_MAD7
DDR_MAD13
DDR_MAD12DDR_MAD11
DDR_MAD10
DDR_CS1
DDR_CS0
DDR_CS2
DDR_CS8
DDR_CS3
DDR_CS11
DDR_CS10
DDR_CS9
DDR_DQSP1
DDR_DQSP0
DDR_DQSP2
DDR_DQSP3
DDR_DQSP8
DDR_DQSP7DDR_DQSP6
DDR_DQSP9DDR_DQSP10
DDR_DQSP11
DDR_DQSP12
DDR_DQSP4
DDR_DQSP5
DDR_DQSP13
DDR_DQSP15DDR_DQSP14
DDR_CLK_AVSS
DDR_VREF2
DDR_VREF0
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
U3TWINS DO NOT HAVE MASKS
402
0.1UF20%10VCERM2
1 C3713
CERM10V20%0.1UF
4022
1 C3712
402
0.1UF20%10VCERM2
1 C3711
CERM10V20%0.1UF
4022
1 C3710
402
0.1UF20%10VCERM2
1 C3709
CERM10V20%0.1UF
4022
1 C3708
402
0.1UF20%10VCERM2
1 C3707
CERM10V20%0.1UF
4022
1 C3706
402
0.1UF20%10VCERM2
1 C3705
CERM10V20%0.1UF
4022
1 C3704
402
0.1UF20%10VCERM2
1 C3703
CERM10V20%0.1UF
4022
1 C3702
402
0.1UF20%10VCERM2
1 C370110V20%
402CERM
0.1UF2
1 C3700
CERM10V20%0.1UF
4022
1 C3714
CERM10V20%0.1UF
4022
1 C3729
402
0.1UF20%10VCERM2
1 C3728
CERM10V20%0.1UF
4022
1 C3727
402
0.1UF20%10VCERM2
1 C3726
CERM10V20%0.1UF
4022
1 C3725
402
0.1UF20%10VCERM2
1 C3724
402
0.1UF20%10VCERM2
1 C3722
CERM10V20%0.1UF
4022
1 C3721
402
0.1UF20%10VCERM2
1 C3720
CERM10V20%0.1UF
4022
1 C3719
402
0.1UF20%10VCERM2
1 C3718
CERM10V20%0.1UF
4022
1 C3717
402
0.1UF20%10VCERM2
1 C371610V20%
402CERM
0.1UF2
1 C3715
402
0.1UF20%10VCERM2
1 C3731
CERM10V20%0.1UF
4022
1 C3732
CERM10V20%0.1UF
4022
1 C3733
CERM10V20%0.1UF
4022
1 C3734
CERM10V20%0.1UF
4022
1 C3735
CERM10V20%0.1UF
4022
1 C3730
CERM10V20%0.1UF
4022
1 C3736
CERM10V20%0.1UF
4022
1 C3737
402
0.1UF20%10VCERM2
1 C3738
402
0.1UF20%10VCERM2
1 C3739
402
0.1UF20%10VCERM2
1 C3740
402
0.1UF20%10VCERM2
1 C3742
402
0.1UF20%10VCERM2
1 C3743
5%
603MF-LF1/10W
2.221
R3702
0.1UF20%10VCERM402
2
1 C3744
402MF-LF
1%1K
1/16W
2
1R3700
CERM
10%1UF
402
6.3V2
1 C3745
402
20%10VCERM
0.1UF2
1 C374610V
402
0.1UF20%
CERM2
1 C3747
402
0.1UF20%10VCERM2
1 C3748
MF-LF1/16W
1%1K
4022
1R3701
PBGA
OMIT
V1.0-300MMU3LITE
AA16
AA13
AB25
AC19
AE27
AE22
AE16
AE13
V20
W27
W23
Y19
Y16
AG25
AG19
P27
R28R26
R27
U26T28
V28
U27W28
V24
AH25
V27V26
Y24Y28
Y25
Y26AA28
AA24
AA26AA27
AH26
AD27
AC27AC25
AC26AF27
AD26
AE28AF28
AG28
AD25
AD21
AD24
AF26
AG26AE24
AF24AG27
H22
G21
H21J21
AD23
H23
E23J22
F24A26
B28
A28A27
A24
A23
AC21
B23
B24
C23C24
A25A22
C27
C26D24
D23
AB20
J23L23
L22
M24P22
P21M23
M25
P23P24
AG21
R24
P26U23
R21
R22P25
U22V22
V23
U24
AH21
AA22
Y22
AA23U25
AH28
AF23AG24
E24
E25
C28D28
E26
F26E27
E28
AH27
H26
F27
H24H25
G28
J26J24
J25
L24J27
AH23
H28H27
K28
L27L26
L25
P28L28
N28
M28
AH24
AH22AF20
U3
OMIT
V1.0-300MMU3LITE
PBGA
B25
D27
D22
F19
G25
K27
K23
K19
M19
N25
N21
P20
T25
T21
T19
AC23
J20
V21M21
AA21
H20L21
U21
Y21
AE21
AH18AH16
AF15AG15
AC12
AD12AE12
AF12
AH15AH14
AG17
AH17
AG14AF14
AH13
AG12
AD28AE23
F23B27
B26
M22R23
Y23
F25F28
J28
M27U28
Y27
AG23AC24
AD18AC18
AH20
AG20
AH19AG18
AE18
AF18
AA20
AB21
AC20
AB15AA15
AC15
AD15AD14
AC14AE14
AE15
AA14AB14
AB12
AA12
AA18
AB18AA17
AB17AF17
AE17
AD17AC17
AD20
AE20AF21
U3
E
37 102
051-6772
SYNC_MASTER=N/A SYNC_DATE=N/A
U3LITE MEMORY
RAM_CKE_R<5>
RAM_DQ_R<92>RAM_DQ_R<93>
RAM_DQ_R<90>
RAM_DQ_R<86>RAM_DQ_R<87>RAM_DQ_R<88>RAM_DQ_R<89>
=PP2V5_PWRON_RAM
=PP2V5_PWRON_RAM
=PP2V5_PWRON_RAM
=PP2V5_PWRON_RAM
VOLTAGE=1.25VPP1V25_PWRON_RAM_VREF_NB
MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
RAM_CLK_E_N_R
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MMVOLTAGE=1.5V
PP1V5_PWRON_RAM_NB_AVDD
RAM_DQ_R<64>
RAM_DQ_R<71>
RAM_DQ_R<75>
RAM_DQS_R<15>RAM_DQS_R<14>RAM_DQS_R<13>
RAM_DQS_R<11>
RAM_DQS_R<9>RAM_DQS_R<10>
RAM_DQS_R<8>RAM_DQS_R<7>RAM_DQS_R<6>RAM_DQS_R<5>RAM_DQS_R<4>RAM_DQS_R<3>RAM_DQS_R<2>RAM_DQS_R<1>RAM_DQS_R<0>
RAM_CS_L_R<9>RAM_CS_L_R<8>
RAM_CS_L_R<1>RAM_CS_L_R<0>
RAM_A_R<13>RAM_A_R<12>RAM_A_R<11>RAM_A_R<10>RAM_A_R<9>RAM_A_R<8>RAM_A_R<7>
RAM_A_R<3>RAM_A_R<4>
RAM_A_R<2>RAM_A_R<1>RAM_A_R<0>
RAM_BA_R<0>
RAM_WE_L_R
RAM_CAS_L_R
RAM_RAS_L_R
RAM_DQ_R<127>RAM_DQ_R<126>
RAM_DQ_R<124>RAM_DQ_R<125>
RAM_DQ_R<121>
RAM_DQ_R<123>RAM_DQ_R<122>
RAM_DQ_R<119>RAM_DQ_R<120>
RAM_DQ_R<117>RAM_DQ_R<118>
RAM_DQ_R<116>
RAM_DQ_R<114>RAM_DQ_R<115>
RAM_DQ_R<111>
RAM_DQ_R<113>RAM_DQ_R<112>
RAM_DQ_R<110>RAM_DQ_R<109>RAM_DQ_R<108>RAM_DQ_R<107>
RAM_DQ_R<104>RAM_DQ_R<105>
RAM_DQ_R<103>
RAM_DQ_R<101>RAM_DQ_R<102>
RAM_DQ_R<99>RAM_DQ_R<98>
RAM_DQ_R<100>
RAM_DQ_R<96>RAM_DQ_R<97>
RAM_DQ_R<94>RAM_DQ_R<95>
RAM_DQ_R<91>
RAM_DQ_R<85>RAM_DQ_R<84>RAM_DQ_R<83>
RAM_DQ_R<81>RAM_DQ_R<80>
RAM_DQ_R<82>
RAM_DQ_R<79>
RAM_DQ_R<76>RAM_DQ_R<77>
RAM_DQ_R<74>RAM_DQ_R<73>
RAM_DQ_R<70>
RAM_DQ_R<72>
RAM_DQ_R<69>RAM_DQ_R<68>
RAM_DQ_R<65>
RAM_DQ_R<67>
RAM_DQ_R<59>
RAM_DQ_R<0>
RAM_DQ_R<5>
RAM_DQ_R<3>RAM_DQ_R<2>
RAM_DQ_R<4>
RAM_DQ_R<10>
RAM_DQ_R<6>RAM_DQ_R<7>RAM_DQ_R<8>RAM_DQ_R<9>
RAM_DQ_R<11>
RAM_DQ_R<15>
RAM_DQ_R<12>RAM_DQ_R<13>RAM_DQ_R<14>
RAM_DQ_R<16>
RAM_DQ_R<21>RAM_DQ_R<20>RAM_DQ_R<19>
RAM_DQ_R<17>RAM_DQ_R<18>
RAM_DQ_R<26>
RAM_DQ_R<22>RAM_DQ_R<23>RAM_DQ_R<24>RAM_DQ_R<25>
RAM_DQ_R<31>
RAM_DQ_R<27>RAM_DQ_R<28>RAM_DQ_R<29>RAM_DQ_R<30>
RAM_DQ_R<36>
RAM_DQ_R<32>RAM_DQ_R<33>RAM_DQ_R<34>RAM_DQ_R<35>
RAM_DQ_R<41>
RAM_DQ_R<37>RAM_DQ_R<38>RAM_DQ_R<39>RAM_DQ_R<40>
RAM_DQ_R<46>RAM_DQ_R<45>RAM_DQ_R<44>RAM_DQ_R<43>RAM_DQ_R<42>
RAM_DQ_R<51>
RAM_DQ_R<47>RAM_DQ_R<48>RAM_DQ_R<49>
RAM_DQ_R<52>
RAM_DQ_R<56>RAM_DQ_R<55>RAM_DQ_R<54>RAM_DQ_R<53>
RAM_DQ_R<57>
RAM_DQ_R<60>
RAM_DQ_R<58>
RAM_DQ_R<61>RAM_DQ_R<62>RAM_DQ_R<63>
RAM_DQ_R<1>RAM_DQ_R<66>
RAM_CKE_R<7>
RAM_BA_R<1>
RAM_MUXEN4RAM_MUXEN0
RAM_CS_L_R<3>RAM_CS_L_R<2>
RAM_CS_L_R<11>RAM_CS_L_R<10>
RAM_CKE_R<1>
RAM_CLK_F_P_R
RAM_CLK_E_P_R
RAM_CKE_R<0>
RAM_CKE_R<4>
RAM_CKE_R<6>
RAM_CKE_R<3>
RAM_CLK_D_N_R
RAM_CLK_C_N_RRAM_CLK_D_P_R
RAM_CLK_C_P_R
RAM_CLK_A_N_R
RAM_CLK_B_N_RRAM_CLK_B_P_R
=PP1V5_PWRON_NB_AVDD
RAM_CKE_R<2>
RAM_DQ_R<78>
RAM_A_R<5>
RAM_CLK_A_P_R
RAM_CLK66M_NB
RAM_A_R<6>
RAM_DQS_R<12>
RAM_CLK_F_N_R
RAM_DQ_R<106>
RAM_DQ_R<50>
46
46
46
46
40
40
40
40
60
37
37
37
37
48
26
26
26
26
28
38
38
38
38
38
38
38
38
7
7
7
7
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
8
38
8
8
8
8
8
8
38
38
38
38
38
8
8
38
38
38
38
38
38
38
7
8
38
38
38
27
38
38
38
38
38
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
ALL R PACKS ARE 1/16W 5% ELECTRICAL_CONSTRAINT_SET NET_PHYSICAL_TYPE NET_SPACING_TYPE DIFFERENTIAL_PAIR
RAM_CLK LINE-LINE SPACING SET TO 15MILTOTAL LENGTH TOLERENCE = 20PS = 2.82MM
RAM_CAD SPACING IS 10MIL
THE FOLLOWING ARE 0402 5% RESISTORS
THE FOLLOWING IS A SWAPPABLE GROUP
THE FOLLOWING IS A SWAPPABLE GROUP
RAM_CLK PRIMARY SPACING SET BASED ON DIFF IMPEDANCE
2272RP3818
2281RP3818
2263RP38262254RP3807
2263RP3807
2281RP38262281RP3807
2281RP38112272RP3811
2254RP3811
2272RP3814
2281RP3814
2263RP3817
2254RP38142263RP3814
2263RP3811
2272RP38302254RP3830
2263RP38302281RP3830
2272RP3812
2254RP38122263RP3812
2254RP3817
2281RP38132281RP3812
2254RP3831
2272RP38312272RP3813
2281RP38312263RP3831
2263RP3813
2254RP3813
1563RP3832
2272RP3802
1554RP3832
1572RP3832
1563RP38331554RP3800
1572RP3833
1581RP3833
1581RP3834
1572RP38341563RP3800
1572RP3800
2281RP3817
1581RP38321554RP3833
1581RP3800
1581RP3804
1554RP3804
1563RP3804
1563RP3834
1572RP3804
1554RP3834
2281RP3802
2263RP3802
1563RP3841
1581RP3841
1554RP3841
1572RP3841
1581RP3842
2272RP3806
1572RP3842
1554RP38421563RP3842
2281RP3821
1521R38001521R3801
2254RP3821
1521R38021521R38031521R38041521R38051521R38061521R38071521R38081521R38091521R38101521R3811
2272RP3805
2272RP3821
1521R38121521R38131521R38141521R3815
I206
I207
I208
I209
2281RP3806
I210
I211
I212
I213
I214
I215
I216
I217
I218
I219
2263RP3806
I220
I221
I222
I223
I224
I225
I226
I227
I228
I229
2263RP3821
I230
I232
I234
I235
I236
I237
I238
2254RP3806
I241
I242
I243
I244
I245
I246
I248
2263RP3819
I251
I252
I253
I254
I255
I256
I257
I258
I259
2281RP3819
I260
I261
I262
I263
I264
I265
I266
I267
I268
I269
2254RP3803
I270
I271
I272
I273
I274
I275
I276
I277
I278
I279
2254RP3819
I280
1521R38161521R38171521R38181521R38191521R38201521R38211521R38221521R38231521R3824
2272RP3803
1521R38251521R38261521R3827
I293
I294
I295
I296
I297
I298
I299
2254RP3818
2263RP3803
I300
I301
I302
I303
I304
I305
2272RP3819
2281RP3803
2254RP3820
2263RP3820
2272RP3820
2281RP3820
2272RP3825
2263RP3825
2281RP3825
2281RP3805
2254RP3825
2281RP3809
2263RP3809
2272RP3809
2272RP3829
2254RP3829
2263RP3829
2254RP3809
2281RP3829
2254RP3828
2263RP3818
2272RP3815
2281RP3815
2281RP3828
2263RP3815
2263RP3828
2272RP3828
2254RP3815
2263RP3827
2272RP3827
2254RP3827
2254RP3805
2272RP3810
2281RP3827
2254RP3810
2281RP3810
2263RP3810
2254RP3836
2272RP3836
2281RP3836
2263RP3836
2272RP3816
2254RP3802
2281RP3816
2263RP3816
2254RP3835
2254RP3816
2263RP38012281RP3801
2254RP3801
2272RP38012272RP3835
2263RP3835
2272RP3817
2281RP3835
2281RP3822
2272RP38222254RP3822
2263RP38232263RP3822
2254RP3823
2281RP38232272RP3823
2281RP3808
2263RP3805
2272RP38242263RP3808
2254RP38082281RP3824
2272RP3808
2263RP38242254RP3824
2272RP3826
2254RP3826
2272RP3807
051-6772
10238
E
SYNC_MASTER=N/A SYNC_DATE=N/A
SERIES TERM
RAM_CAD RAM_CADRAM_CS_L<9> RAM_CKECS1
RAM_CADRAM_DQ<127..0> RAM_CADRAM_CADRAM_DQS0RAM_DQS<0> RAM_CADRAM_CADRAM_DQS0RAM_DQ<7..0> RAM_CAD
RAM_CADRAM_DQS_R<15..0> RAM_CAD
RAM_CLK_F_N RAM_CLK RAM_CLK_FRAM_CLK1 RAM_CLKRAM_CLK_FRAM_CLKRAM_CLK_F_P RAM_CLK1 RAM_CLK
RAM_CLK_DRAM_CLKRAM_CLK_D_P RAM_CLK1 RAM_CLK
RAM_CLK0 RAM_CLKRAM_CLK_B_P RAM_CLK_BRAM_CLK
RAM_CAD RAM_CADRAM_CS_L<8> RAM_CKECS1
RAM_CLKRAM_CLK_D_N_R RAM_CLK_D_RRAM_CLK
RAM_CLK_CRAM_CLKRAM_CLK_C_P RAM_CLK0 RAM_CLK
RAM_CAD RAM_CADRAM_CKE_R<5..4>
RAM_CLK RAM_CLK_ERAM_CLK_E_N RAM_CLK1 RAM_CLK
RAM_CLKRAM_CLK_D_N RAM_CLK_DRAM_CLK1 RAM_CLK
RAM_CLKRAM_CLK_D_P_R RAM_CLK_D_RRAM_CLK
RAM_CLKRAM_CLK_E_P_R RAM_CLK_E_RRAM_CLKRAM_CLKRAM_CLK_E_N_R RAM_CLK_E_RRAM_CLK
RAM_CLK0 RAM_CLK_BRAM_CLKRAM_CLK_B_N RAM_CLK
RAM_CAD RAM_CADRAM_CKE_R<1..0>
RAM_CAD RAM_CADRAM_CKE<1> RAM_CKECS0RAM_CAD RAM_CADRAM_CKE<4> RAM_CKECS1RAM_CAD RAM_CADRAM_CKE<5> RAM_CKECS1
RAM_CAD RAM_CADRAM_CS_L_R<9..8>
RAM_CADRAM_CKECS0 RAM_CADRAM_CS_L<1>
RAM_CLK_A_P_R RAM_CLK RAM_CLK_A_RRAM_CLKRAM_CLKRAM_CLK_A_N_R RAM_CLK_A_RRAM_CLKRAM_CLKRAM_CLK_B_P_R RAM_CLK_B_RRAM_CLKRAM_CLKRAM_CLK_B_N_R RAM_CLK_B_RRAM_CLK
RAM_CLK_C_P_R RAM_CLK RAM_CLK_C_RRAM_CLKRAM_CLKRAM_CLK_C_N_R RAM_CLK_C_RRAM_CLK
RAM_DQ_R<42>RAM_DQ<40>
RAM_DQ<68>RAM_DQ<65>
RAM_DQ<75>
RAM_DQ<66>RAM_DQ<70>
RAM_DQ<69>
RAM_DQ<71>RAM_DQ<64>RAM_DQ<67>
RAM_DQ<74>RAM_DQ<73>RAM_DQ<72>
RAM_DQ<79>RAM_DQ<78>
RAM_DQ<77>RAM_DQ<76>RAM_DQ<87>
RAM_DQ<81>RAM_DQ<86>
RAM_DQ<80>RAM_DQ<84>RAM_DQ<85>RAM_DQ<83>
RAM_DQ<89>
RAM_DQ<82>RAM_DQ<91>RAM_DQ<93>
RAM_DQ<88>RAM_DQ<90>RAM_DQ<94>
RAM_DQ<92>RAM_DQ<95>
RAM_DQ<103>RAM_DQ<96>RAM_DQ<98>
RAM_DQ<97>RAM_DQ<100>RAM_DQ<99>RAM_DQ<102>RAM_DQ<101>RAM_DQ<111>RAM_DQ<106>RAM_DQ<105>
RAM_DQ<118>
RAM_DQ<115>
RAM_DQ<107>RAM_DQ<108>
RAM_DQ<110>RAM_DQ<104>RAM_DQ<109>RAM_DQ<119>RAM_DQ<112>RAM_DQ<117>
RAM_DQ<116>
RAM_DQ<113>
RAM_DQ<114>RAM_DQ<121>RAM_DQ<124>RAM_DQ<120>RAM_DQ<123>RAM_DQ<125>RAM_DQ<122>RAM_DQ<126>RAM_DQ<127>
RAM_DQ_R<106>RAM_DQ_R<111>
RAM_DQ_R<68>
RAM_DQ_R<70>
RAM_DQ_R<69>
RAM_DQ_R<71>RAM_DQ_R<64>RAM_DQ_R<67>
RAM_DQ_R<74>
RAM_DQ_R<75>
RAM_DQ_R<73>RAM_DQ_R<72>
RAM_DQ_R<79>RAM_DQ_R<78>
RAM_DQ_R<77>RAM_DQ_R<76>RAM_DQ_R<87>
RAM_DQ_R<81>RAM_DQ_R<86>
RAM_DQ_R<80>RAM_DQ_R<84>RAM_DQ_R<85>RAM_DQ_R<83>
RAM_DQ_R<93>
RAM_DQ_R<88>RAM_DQ_R<90>RAM_DQ_R<94>
RAM_DQ_R<103>RAM_DQ_R<96>RAM_DQ_R<98>
RAM_DQ_R<97>
RAM_DQ_R<99>RAM_DQ_R<102>
RAM_DQ_R<108>RAM_DQ_R<105>
RAM_DQ_R<110>RAM_DQ_R<104>RAM_DQ_R<109>RAM_DQ_R<119>RAM_DQ_R<112>RAM_DQ_R<117>RAM_DQ_R<118>
RAM_DQ_R<116>RAM_DQ_R<115>RAM_DQ_R<113>
RAM_DQ_R<114>RAM_DQ_R<121>RAM_DQ_R<124>RAM_DQ_R<120>
RAM_DQ_R<125>RAM_DQ_R<122>RAM_DQ_R<126>
RAM_DQ_R<65>
RAM_DQ_R<66>
RAM_DQ_R<95>
RAM_DQ_R<123>
RAM_DQ_R<127>
RAM_DQ_R<82>RAM_DQ_R<91>
RAM_DQ_R<89>RAM_DQ_R<92>
RAM_DQ_R<100>
RAM_DQ_R<101>
RAM_DQ_R<107>
RAM_DQ<2>RAM_DQ<7>
RAM_DQ<9>RAM_DQ<10>
RAM_DQ<14>RAM_DQ<12>
RAM_DQ<22>
RAM_DQ<6>
RAM_DQ<8>RAM_DQ<17>
RAM_DQ<19>RAM_DQ<18>RAM_DQ<20>RAM_DQ<16>
RAM_DQ<1>
RAM_DQ<11>
RAM_DQ<13>RAM_DQ<15>
RAM_DQ<21>
RAM_DQ<3>RAM_DQ<0>
RAM_DQ<4>
RAM_DQ<5>
RAM_DQ_R<7>RAM_DQ_R<2>
RAM_DQ_R<22>
RAM_DQ_R<18>
RAM_DQ_R<8>RAM_DQ_R<15>
RAM_DQ_R<17>
RAM_DQ_R<20>RAM_DQ_R<16>RAM_DQ_R<21>
RAM_DQ_R<19>
RAM_DQ_R<0>
RAM_DQ_R<12>RAM_DQ_R<13>
RAM_DQ_R<3>
RAM_DQ_R<4>
RAM_DQ_R<9>
RAM_DQ_R<1>
RAM_DQ_R<6>RAM_DQ_R<5>
RAM_DQ_R<10>RAM_DQ_R<11>RAM_DQ_R<14>
RAM_DQ<27>RAM_DQ<28>
RAM_DQ<38>RAM_DQ<35>
RAM_DQ<23>RAM_DQ<30>
RAM_DQ<24>RAM_DQ<26>
RAM_DQ<31>
RAM_DQ<32>
RAM_DQ<39>RAM_DQ<37>
RAM_DQ<34>RAM_DQ<36>
RAM_DQ<33>
RAM_DQ<46>RAM_DQ<47>
RAM_DQ<43>
RAM_DQ<25>RAM_DQ<29>
RAM_DQ<60>
RAM_DQ<61>RAM_DQ<57>
RAM_DQ<41>RAM_DQ<45>
RAM_DQ<51>RAM_DQ<50>
RAM_DQ<44>
RAM_DQ<42>
RAM_DQ<48>
RAM_DQ<53>RAM_DQ<54>
RAM_DQ<52>
RAM_DQ<49>
RAM_DQ<56>RAM_DQ<55>
RAM_DQ<63>RAM_DQ<59>
RAM_DQ<58>RAM_DQ<62>
RAM_DQ_R<24>
RAM_DQ_R<23>RAM_DQ_R<30>RAM_DQ_R<26>
RAM_DQ_R<27>RAM_DQ_R<28>RAM_DQ_R<31>
RAM_DQ_R<25>RAM_DQ_R<29>
RAM_DQ_R<38>
RAM_DQ_R<32>RAM_DQ_R<35>
RAM_DQ_R<39>RAM_DQ_R<37>
RAM_DQ_R<34>RAM_DQ_R<36>
RAM_DQ_R<33>
RAM_DQ_R<46>RAM_DQ_R<47>
RAM_DQ_R<43>
RAM_DQ_R<51>
RAM_DQ_R<53>
RAM_DQ_R<60>RAM_DQ_R<58>
RAM_DQ_R<61>
RAM_DQ_R<48>RAM_DQ_R<49>
RAM_DQ_R<57>
RAM_DQ_R<41>RAM_DQ_R<45>
RAM_DQ_R<40>
RAM_DQ_R<50>
RAM_DQ_R<44>
RAM_DQ_R<54>
RAM_DQ_R<52>
RAM_DQ_R<56>RAM_DQ_R<55>
RAM_DQ_R<63>RAM_DQ_R<59>
RAM_DQ_R<62>
RAM_CLK_F_N_R
RAM_CLK_E_N_RRAM_CLK_F_P_R
RAM_A<4>RAM_A<6>
RAM_A<12>RAM_A<2>RAM_A_R<2>
RAM_A_R<12>
RAM_A_R<7>
RAM_A_R<9>RAM_A_R<8> RAM_A<8>
RAM_A_R<4>
RAM_A_R<10>RAM_A<1>RAM_A<10>
RAM_BA_R<0>
RAM_BA_R<1>RAM_RAS_L_R
RAM_A_R<5>RAM_A_R<0>
RAM_CS_L_R<0>RAM_CS_L_R<1>
RAM_CS_L_R<8>
RAM_A_R<1>
RAM_WE_L_R
RAM_A_R<6>
RAM_CKE_R<1>
RAM_CS_L_R<9>RAM_CS_L<1>
RAM_CLK_C_N_R
RAM_CADRAM_DQS2RAM_DQ<23..16> RAM_CADRAM_CADRAM_DQS<2> RAM_DQS2 RAM_CAD
RAM_RAS_LRAM_A<9>
RAM_BA<1>
RAM_BA<0>RAM_CAS_LRAM_CAS_L_R
RAM_A<3>RAM_A_R<3>RAM_A<13>RAM_A_R<13>RAM_A<5>RAM_A<0>
RAM_A<7>
RAM_WE_L
RAM_A<11>RAM_A_R<11>
RAM_CS_L<0>
RAM_CS_L<9>RAM_CS_L<8>
RAM_CKE<0>RAM_CKE_R<0>RAM_CKE<5>RAM_CKE_R<5>
RAM_CKE<1>
RAM_CKE<4>RAM_CKE_R<4>
RAM_CADRAM_CKECS0 RAM_CADRAM_CS_L<0>
RAM_CAD RAM_CADRAM_CS_L_R<1..0>
RAM_CAD RAM_CADRAM_CKE<0> RAM_CKECS0
RAM_CLKRAM_CLK_E_P RAM_CLK_ERAM_CLK1 RAM_CLK
RAM_CLKRAM_CLK_C_N RAM_CLK_CRAM_CLK0 RAM_CLK
RAM_CLK RAM_CLK_ARAM_CLK_A_N RAM_CLK0 RAM_CLKRAM_CLK_ARAM_CLK_A_P RAM_CLK0 RAM_CLKRAM_CLK
RAM_CLK_F_N_R RAM_CLK RAM_CLK_F_RRAM_CLKRAM_CLKRAM_CLK_F_P_R RAM_CLK_F_RRAM_CLK
RAM_CADRAM_DQ_R<127..0> RAM_CAD
RAM_CADRAM_DQS<3> RAM_DQS3 RAM_CAD
RAM_CADRAM_DQS4RAM_DQ<39..32> RAM_CAD
RAM_CADRAM_DQS<8> RAM_DQS8 RAM_CAD
RAM_CADRAM_DQS9RAM_DQ<79..72> RAM_CAD
RAM_CADRAM_DQS10RAM_DQ<87..80> RAM_CAD
RAM_CADRAM_DQS1RAM_DQ<15..8> RAM_CAD
RAM_CADRAM_DQS8RAM_DQ<71..64> RAM_CAD
RAM_CADRAM_DQS<7> RAM_DQS7 RAM_CADRAM_CADRAM_DQS6RAM_DQ<55..48> RAM_CAD
RAM_CADRAM_DQS<1> RAM_DQS1 RAM_CAD
RAM_CADRAM_DQS3RAM_DQ<31..24> RAM_CAD
RAM_CADRAM_DQS12RAM_DQ<103..96> RAM_CAD
RAM_CADRAM_CAS_L_R RAM_CAD
RAM_CADRAM_A_CTLRAM_WE_L RAM_CAD
RAM_CADRAM_DQS<4> RAM_DQS4 RAM_CAD
RAM_DQS<0>RAM_DQS_R<0>RAM_DQS<1>RAM_DQS_R<1>RAM_DQS<2>RAM_DQS_R<2>RAM_DQS<3>RAM_DQS_R<3>
RAM_DQS<5>RAM_DQS_R<5>RAM_DQS<4>RAM_DQS_R<4>
RAM_DQS<6>RAM_DQS_R<6>
RAM_DQS<8>RAM_DQS_R<8>RAM_DQS<7>RAM_DQS_R<7>
RAM_DQS<10>RAM_DQS_R<10>RAM_DQS<9>RAM_DQS_R<9>
RAM_DQS<11>RAM_DQS_R<11>RAM_DQS<12>RAM_DQS_R<12>RAM_DQS<13>RAM_DQS_R<13>RAM_DQS<14>RAM_DQS_R<14>RAM_DQS<15>RAM_DQS_R<15>
RAM_CLK_B_P_RRAM_CLK_B_N_RRAM_CLK_C_P_R
RAM_CLK_D_P_RRAM_CLK_D_N_RRAM_CLK_E_P_R
RAM_CLK_A_P_RRAM_CLK_A_N_R
RAM_CLK_A_PRAM_CLK_A_NRAM_CLK_B_PRAM_CLK_B_NRAM_CLK_C_PRAM_CLK_C_NRAM_CLK_D_PRAM_CLK_D_NRAM_CLK_E_PRAM_CLK_E_NRAM_CLK_F_PRAM_CLK_F_N
RAM_CADRAM_DQS<5> RAM_DQS5 RAM_CADRAM_CADRAM_DQS5RAM_DQ<47..40> RAM_CADRAM_CADRAM_DQS<6> RAM_DQS6 RAM_CAD
RAM_CADRAM_DQS7RAM_DQ<63..56> RAM_CAD
RAM_CADRAM_DQS9RAM_DQS<9> RAM_CAD
RAM_CADRAM_DQS10RAM_DQS<10> RAM_CAD
RAM_CADRAM_DQS11RAM_DQS<11> RAM_CADRAM_CADRAM_DQS11RAM_DQ<95..88> RAM_CADRAM_CADRAM_DQS12RAM_DQS<12> RAM_CAD
RAM_CADRAM_DQS13RAM_DQS<13> RAM_CADRAM_CADRAM_DQS13RAM_DQ<111..104> RAM_CADRAM_CADRAM_DQS14RAM_DQS<14> RAM_CADRAM_CADRAM_DQS14RAM_DQ<119..112> RAM_CAD
RAM_CADRAM_DQS15RAM_DQ<127..120> RAM_CADRAM_CADRAM_DQS15RAM_DQS<15> RAM_CAD
RAM_CADRAM_A_R<13..0> RAM_CADRAM_CADRAM_BA_R<1..0> RAM_CADRAM_CADRAM_RAS_L_R RAM_CAD
RAM_CADRAM_WE_L_R RAM_CAD
RAM_CADRAM_A_CTLRAM_RAS_L RAM_CADRAM_CADRAM_A_CTLRAM_BA<1..0> RAM_CADRAM_CADRAM_A_CTLRAM_A<13..0> RAM_CAD
RAM_CADRAM_A_CTLRAM_CAS_L RAM_CAD
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VREFTOP SIDEBOT SIDE
DQ4
DQ5
VSS
VDDQ
DM0/DQS9
DQ7
VSS
DQ6
NC
NC
VSSDQ1
DQ0
DQS0
NC
NCDQ3
DQ2VDD
DM1/DQS10
DQ12
VDDQA13
DQ13
VDDQCKE1
DQ14DQ15
VDD
VDDQ
VSS
DQS1
DQ9
DQ8
DQ11DQ10
CK1*
CK1
VSS
A12
VSS
DQ20
BA2
DQ21
DM2/DQS11
DQ22VDD
A11
A8
VDDQ
CKE0
DQS2
DQ17
DQ16
VDDQ
A7
A9
DQ18
VSS
A6DQ28
DQ23
VSS
DQ29
VDDQDM3/DQS12
A3
DQ30VSS
VSS
A5
DQ25
DQ24
DQ19
DQS3
DQ27
A4
DQ26
VDD
A2 DQ31NC
VDDQ
NC
CK0
CKO*
NCVSS
A10
NC
NCNC
A1
VSS
VDD
VSS
NC
A0NC
NC VDDQ
VSS
NC
DQ36
DQ37
VDDDM4/DQS13
VSSDQ39
DQ38
DQ33
DQ32
BA1
VDDQ
DQS4
DQ35
DQ34
BA0
VSS
DQ40 DQ44
DQ45
VDDQ
RAS*
S0*
S1*
DM5/DQS14VSS
DQ46
DQ47
DQ41
VDDQ
CAS*
WE*
VSS
VDD
DQ43
DQ42DQS5
NC,S2* NC,S3*
DQ52
DQ53
VDDQ
VDDNC,FETEN
DQ55DQ54
DM6/DQS15
VDDQ
NC
DQ49DQ48
CK2CK2*
VSS
VSS
DQ50DQS6
VDDQ
DQ51
VSS
DQ60
DQ61
DQ62
DM7/DQS16
SA0SA1
VDDQ
DQ63
SA2
VDD
DQ56
DQS7
VDDID
DQ57
SDA
DQ59
DQ58
VSSWP
SCL VVDDSPD
VREFTOP SIDEBOT SIDE
DQ4DQ5
VSS
VDDQ
DM0/DQS9
DQ7VSS
DQ6
NC
NC
VSS
DQ1
DQ0
DQS0
NC
NC
DQ3
DQ2
VDD
DM1/DQS10
DQ12
VDDQ
A13
DQ13
VDDQ
CKE1
DQ14
DQ15
VDD
VDDQ
VSS
DQS1DQ9
DQ8
DQ11
DQ10
CK1*CK1
VSS
A12
VSS
DQ20BA2
DQ21
DM2/DQS11
DQ22
VDD
A11
A8
VDDQCKE0
DQS2DQ17
DQ16
VDDQA7
A9DQ18
VSS
A6
DQ28
DQ23
VSS
DQ29VDDQ
DM3/DQS12
A3DQ30
VSS
VSS
A5
DQ25
DQ24
DQ19
DQS3
DQ27
A4
DQ26VDD
A2 DQ31
NC
VDDQNC
CK0
CKO*
NC
VSS
A10NC
NC
NCA1
VSS
VDD
VSSNC
A0
NC
NC VDDQ
VSS
NC
DQ36
DQ37VDD
DM4/DQS13
VSS
DQ39DQ38
DQ33
DQ32
BA1
VDDQ
DQS4
DQ35
DQ34
BA0VSS
DQ40 DQ44
DQ45VDDQ
RAS*
S0*
S1*DM5/DQS14
VSS
DQ46DQ47
DQ41
VDDQ
CAS*
WE*
VSS
VDDDQ43
DQ42
DQS5
NC,S2* NC,S3*
DQ52
DQ53
VDDQ
VDD
NC,FETEN
DQ55
DQ54DM6/DQS15
VDDQNC
DQ49DQ48
CK2
CK2*VSS
VSS
DQ50
DQS6VDDQ
DQ51
VSS
DQ60
DQ61
DQ62DM7/DQS16
SA0
SA1
VDDQ
DQ63
SA2
VDD
DQ56
DQS7
VDDID
DQ57
SDA
DQ59
DQ58
VSS
WP
SCL VVDDSPD
REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD
QTY DESCRIPTIONPART#TABLE_5_ITEM
TABLE_5_ITEM
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
516-0086
NC
GND: VDD & VDDQ ARE DIFFERENT
PIN 82:NC: VDD & VDDQ ARE THE SAME
NC
NC
NCNC
NC
NCNC
NC
NC
NC
SA1
NCNC
NC
NC
NC
NC
NC
NC
NCNC
NC
SA0SA1SA2
V’S ADJACENT TO G’S FORBIDDENR’S ADJACENT TO V’S OR G’S
NC
NC
NC
NC
VVRRV
NC
NC
NC
NC
NC
NC
NCNC
NC
SA2
NC
NC
NC
ADDR=0(A0/A1)ADDR=1(A2/A3)
FETENNCFETENNC
20%10VCERM402
0.1UF
2
1 C4001
0.1UF20%10VCERM402
2
1 C4004
402CERM10V20%0.1UF
2
1 C4005
0.1UF20%10VCERM402
2
1 C4009
402CERM10V20%0.1UF
2
1 C40100.1UF20%10VCERM402
2
1 C4011
0.1UF20%10VCERM402
2
1 C4012
20%10VCERM402
0.1UF
2
1 C4013
CERM20%10V402
0.1UF
2
1 C4014
CERM40210V20%0.1UF
2
1 C4015
10VCERM402
20%0.1UF
2
1 C4016
402CERM10V20%0.1UF
2
1 C4017
0.1UF20%10VCERM402
2
1 C4018
0.1UF20%10VCERM402
2
1 C4019
0.1UF20%10VCERM402
2
1 C4021
5%1/16WMF-LF402
10K21
R4006
0.1UF20%10VCERM402
2
1 C4023
20%10VCERM402
0.1UF
2
1 C4024
0.1UF20%10VCERM402
2
1 C4025
CERM10V20%
402
0.1UF
2
1 C4026
10V20%
402
0.1UF
CERM2
1 C4029
0.1UF20%10VCERM402
2
1 C4030
20%10VCERM402
0.1UF
2
1 C4032
0.1UF20%10VCERM402
2
1 C4033
402MF-LF1/16W1%150
2
1R4008
1%
MF-LF402
1/16W
150
2
1R4010
603CERM6.3V10%1UF
2
1 C4035
0.1UF20%10VCERM402
2
1 C4037
CERM10V20%
402
0.1UF
2
1 C4038
402
0.1UF20%10VCERM2
1 C4039
20%10VCERM402
0.1UF
2
1 C4040
CERM10V402
0.1UF20%
2
1 C404120%10VCERM402
0.1UF
2
1 C4042
0.1UF20%10VCERM402
2
1 C4043
20%10VCERM402
0.1UF
2
1 C4044
0.1UF20%10VCERM402
2
1 C4045
20%10VCERM402
0.1UF2
1 C4046
402CERM10V20%0.1UF
2
1 C4047
0.1UF20%10VCERM402
2
1 C4048
0.1UF20%10VCERM402
2
1 C40490.1UF20%10VCERM402
2
1 C4050
10K
402MF-LF1/16W5%
21
R4014
0.1UF
CERM10V20%
4022
1 C4031
0.1UF20%10VCERM402
2
1 C40280.1UF20%10VCERM402
2
1 C4022
0.1UF
402CERM10V20%
2
1 C4000
0.1UF
402CERM10V20%
2
1 C4020
0.1UF20%10VCERM402
2
1 C4027
0.1UF20%10VCERM402
2
1 C4051
0.1UF20%10VCERM402
2
1 C40520.1UF20%10VCERM402
2
1 C40020.1UF20%10VCERM402
2
1 C4003
20%10UF6.3V
1206CERM2
1 C4036
CERM1206
6.3V
10UF20%
2
1 C4008
CERM1206
6.3V
10UF20%
2
1 C400620%10UF6.3V
1206CERM2
1 C4007
OMIT
F-28DEG-THDDR-DIMM-STD
90
63
184
66
58
50
42
34
26
18
176
160
152
11
145
139
132
124
116
100
93
89
81
74
3
1
112
104
96
77
62
54
30
22
180
172
164
156
143
136
128
15
82
148
120
108
85
70
46
38
168
7
91
92
183
182181
158
157
154
101
71
51
49
47
4544
10
173
167
163
144
142
140
135134
1029
86
78
67
56
36
25
14
5
13
12
99
179178
175
174
98
88
87
84
83
171170
166165
80
79
95
73
72
162
161
155
153
69
68
64
61
94
151
150
147
146
60
57
55
53
133
131
8
127
126
4039
35
33
123
121
117
114
6
31
28
24
23
110109
106
105
20
19
4
2
177
169
159
149
129
119
107
97
111
21
7576
17
16
138
137
65
113
52
59
27
122
29
125
32
37
130
41
103
115
118
141
43
48
J4000 DDR-DIMM-STDF-28DEG-TH
OMIT
90
63
184
66
58
50
42
34
26
18
176
160
152
11
145
139
132
124
116
100
93
89
81
74
3
1
112
104
96
77
62
54
30
22
180
172
164
156
143
136
128
15
82
148
120
108
85
70
46
38
168
7
9192
183
182
181
158
157
154
101
71
51
49
47
45
44
10
173
167
163
144
142
140
135
134
102
9
86
78
67
56
36
25
14
5
13
12
99
179178
175
174
98
88
87
8483
171
170
166
165
80
79
95
7372
162161
155
153
69
68
64
61
94
151150
147
146
60
57
55
53
133
131
8
127
126
40
39
35
33
123
121
117
114
6
31
28
24
23
110
109
106105
2019
4
2
177
169
159
149
129
119
107
97
111
21
7576
1716
138
137
65
113
52
59
27
122
29
12532
37
130
41
103
115
118
141
43
48
J4001
2 CONN,DDR DIMM 30 DEG J4000,J4001 17_INCH_LCD CRITICAL516-0086
J4000,J40012 CONN,DDR DIMM REVERSE 30 DEG 20_INCH_LCD CRITICAL516-0087
051-6772
10240
E
SYNC_MASTER=N/A SYNC_DATE=N/A
DIMMS
RAM_A<13>RAM_A<13>
RAM_CKE<1>
=PP2V5_PWRON_RAM
RAM_DQ<1>
=PP2V5_PWRON_RAM
=PP2V5_PWRON_RAM =PP2V5_PWRON_RAM
PP1V25_RAM_VREF_DIMMRAM_DQ<11>RAM_DQ<13>
RAM_DQ<8>RAM_DQ<12>
RAM_DQ<7>RAM_DQ<3>
RAM_DQ<4>
RAM_DQ<17>RAM_A<12>
RAM_DQ<22>RAM_A<11>
RAM_A<8>RAM_DQ<21>
RAM_A<6>
RAM_DQ<20>
RAM_DQ<25>RAM_DQ<26>
RAM_A<3>RAM_DQ<24>
RAM_DQ<14>
RAM_DQ<10>
TP_J4000_SJRESET_L
RAM_DQ<15>
RAM_DQ<2>RAM_DQ<0>RAM_DQS<0>
RAM_CLK_A_NRAM_CLK_A_P
RAM_DQ<5>RAM_DQ<6>
RAM_CKE<0>
RAM_DQ<19>RAM_DQ<18>RAM_DQS<2>
RAM_DQ<23>RAM_A<7>
RAM_A<5>RAM_DQ<16>
RAM_DQ<27>
RAM_DQ<29>
RAM_A<4>RAM_DQS<3>
RAM_DQ<28>RAM_DQ<31>
RAM_DQ<30>
RAM_CLK_C_PRAM_CLK_C_N
RAM_A<10>
RAM_DQ<35>RAM_DQ<33>
RAM_DQ<36>RAM_DQ<39>
RAM_DQ<60>RAM_RAS_LRAM_DQ<63>
RAM_CS_L<0>RAM_CS_L<1>
RAM_DQ<58>RAM_DQ<62>
RAM_DQ<40>RAM_DQ<42>
RAM_DQ<46>RAM_DQ<45>
RAM_A<2>
RAM_A<1>
RAM_A<0>
RAM_DQ<34>
RAM_BA<1>
RAM_DQ<37>
RAM_DQ<38>RAM_DQS<4>
RAM_DQ<32>RAM_BA<0>
RAM_DQ<61>
RAM_WE_L
RAM_CAS_LRAM_DQ<57>
RAM_DQ<59>RAM_DQS<7>
RAM_DQ<56>
RAM_DQ<41>RAM_DQ<43>
RAM_CLK_B_PRAM_CLK_B_N
RAM_DQS<5>
RAM_DQ<44>RAM_DQ<47>
RAM_DQ<48>RAM_DQ<49>
RAM_DQ<54>RAM_DQ<55>
SD_A_SA0
RAM_DQ<50>RAM_DQ<51>
RAM_DQS<6>
RAM_DQ<52>RAM_DQ<53>
I2C_DIMM_SDAI2C_DIMM_SCL
PP1V25_RAM_VREF_DIMMRAM_DQ<74>RAM_DQ<72>
RAM_DQ<76>RAM_DQ<78>
RAM_DQ<64>RAM_DQ<65>
RAM_DQ<69>
RAM_CKE<5>RAM_DQ<68>
RAM_DQ<81>RAM_A<12>
RAM_DQ<86>RAM_A<11>
RAM_A<8>RAM_DQ<85>
RAM_A<6>
RAM_DQ<84>
RAM_DQ<93>RAM_DQ<91>
RAM_A<3>RAM_DQ<92>
RAM_DQ<75>
RAM_DQ<79>RAM_DQS<9>RAM_DQ<73>
TP_J4001_SJRESET_L
RAM_DQ<77>
RAM_DQ<66>RAM_DQ<67>RAM_DQS<8>
RAM_CLK_F_NRAM_CLK_F_P
RAM_DQ<70>RAM_DQ<71>
RAM_CKE<4>
RAM_DQ<83>RAM_DQ<80>RAM_DQS<10>
RAM_DQ<82>RAM_A<9>
RAM_A<7>
RAM_A<5>RAM_DQ<87>
RAM_DQ<90>
RAM_DQ<89>
RAM_A<4>RAM_DQS<11>
RAM_DQ<94>RAM_DQ<88>
RAM_DQ<95>
RAM_CLK_D_PRAM_CLK_D_N
RAM_A<10>
RAM_DQ<96>RAM_DQ<97>
RAM_DQ<99>RAM_DQ<100>
RAM_DQ<104>RAM_RAS_LRAM_DQ<105>
RAM_CS_L<8>RAM_CS_L<9>
RAM_DQ<109>RAM_DQ<108>
RAM_DQ<112>RAM_DQ<117>
RAM_DQ<119>RAM_DQ<116>
RAM_A<2>
RAM_A<1>
RAM_A<0>
RAM_DQ<98>
RAM_BA<1>
RAM_DQ<103>
RAM_DQ<101>RAM_DQS<12>
RAM_DQ<102>RAM_BA<0>
RAM_DQ<106>
RAM_WE_L
RAM_CAS_LRAM_DQ<111>
RAM_DQ<107>RAM_DQS<13>
RAM_DQ<110>
RAM_DQ<113>RAM_DQ<114>
RAM_CLK_E_PRAM_CLK_E_N
RAM_DQS<14>
RAM_DQ<118>RAM_DQ<115>
RAM_DQ<121>RAM_DQ<120>
RAM_DQ<122>RAM_DQ<123>
SD_B_SA2
=PP2V5_PWRON_RAM
RAM_DQ<124>
=PP2V5_PWRON_RAM
RAM_DQ<125>
RAM_DQS<15>
RAM_DQ<126>RAM_DQ<127>
I2C_DIMM_SDAI2C_DIMM_SCL
RAM_DQ<9>RAM_DQS<1>
PP1V25_RAM_VREF_DIMM
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
RAM_A<9>
=PP2V5_PWRON_RAM 46 46
46 46
46 46 46 40 40
40 40
40 40 40
44 44
37 37
37 37
44
44
44
44
44
44
44
44
45
45
44
44
44
45
45
45
45
44
44
44
44
44
44
44
44
44
45
45
44
44
44
45
45
45
45
37 37
44
37
40 40
44
26
44
26
26 26
44
44
44
44
44
44
44
44
40
44
40
40
44
40
44
44
44
40
44
44
44
44
44
44
44
44
44
44
44
44
44
44
40
40
44
44
44
40
44
44
44
44
40
44
44
44
44
44
40
44
44
44
44
44
44
44
44
44
40
40
40
44
40
44
44
44
44
40
44
40
40
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
40
40
45
45
45
45
45
45
45
45
45
45
40
45
40
40
45
40
45
45
45
40
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
40
40
40
45
45
45
40
45
45
45
45
40
45
45
45
45
45
40
45
45
45
45
45
45
45
45
45
40
40
40
45
40
45
45
45
45
40
45
40
40
45
45
45
45
45
45
45
45
45
45
45
45
45
26
45
26
45
45
45
45
40
40
44
44
40
26
38 38
38
7
38
7
7 7
40
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
6
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
18
18
40
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
6
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
7
38
7
38
38
38
38
18
18
38
38
40
38
7
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
5%1/16WSM-LF
82
RAM_VTT6
3
RP4417
5%
RAM_VTT
82
SM-LF1/16W
7
2
RP4428
5%
RAM_VTT
82
SM-LF1/16W
8
1
RP4428
5%
RAM_VTT
82
1/16WSM-LF
5
4
RP4413
5%
RAM_VTT
82
1/16WSM-LF
6
3
RP4413
5%
RAM_VTT
82
SM-LF1/16W
7
2
RP4413
5%
RAM_VTT
82
1/16WSM-LF
8
1
RP4413
5%
RAM_VTT
82
1/16WSM-LF
5
4
RP4412
5%1/16W
RAM_VTT
82
SM-LF
6
3
RP4404
1/16W5%
RAM_VTT
82
SM-LF
7
2
RP4404
5%1/16W
RAM_VTT
82
SM-LF
8
1
RP4404
5%1/16WSM-LF
82
RAM_VTT6
3
RP4408
1/16W5%
SM-LF
82
RAM_VTT7
2
RP4408
5%1/16WSM-LF
82
RAM_VTT8
1
RP4408
5%
RAM_VTT
82
1/16WSM-LF
6
3
RP4412
5%1/16W
RAM_VTT
82
SM-LF
5
4
RP4421
5%
RAM_VTT
82
1/16WSM-LF
7
2
RP4412
5%
RAM_VTT
82
1/16WSM-LF
8
1
RP4412
1/16W5%
RAM_VTT
82
SM-LF
6
3
RP4421
5%1/16W
RAM_VTT
82
SM-LF
7
2
RP4421
5%1/16W
RAM_VTT
82
SM-LF
8
1
RP4421
5%1/16W
RAM_VTT
82
SM-LF
5
4
RP4420
1/16W5%
RAM_VTT
82
SM-LF
6
3
RP4420
1/16W5%
SM-LF
82
RAM_VTT5
4
RP44170.1UF20%10VCERM402
RAM_VTT
2
1 C4400
0.1UF
RAM_VTT
CERM
20%10V
4022
1 C4401
0.1UF20%10VCERM402
RAM_VTT
2
1 C4402
0.1UF
RAM_VTT
20%10VCERM402
2
1 C44030.1UF20%10VCERM402
RAM_VTT
2
1 C4404
0.1UF20%10VCERM
RAM_VTT
4022
1 C4405
0.1UF20%10V
RAM_VTT
CERM402
2
1 C4406
0.1UF20%10VCERM402
RAM_VTT
2
1 C4407 0.1UF20%10VCERM
RAM_VTT
4022
1 C4408
0.1UF20%10VCERM402
2
1 C4409
CERM10V20%0.1UF
4022
1 C4411
5%1/16W
120
MF-LF
RAM_VTT
4022
1R4400
1/16W5%120
MF-LF
RAM_VTT
4022
1R44015%1/16W
120
MF-LF
RAM_VTT
4022
1R4402
1/16W5%120
MF-LF402
RAM_VTT
2
1R44035%1/16W
120
402MF-LF
RAM_VTT
2
1R4404
1/16W5%120
MF-LF402
RAM_VTT
2
1R44055%1/16W
120
402MF-LF
RAM_VTT
2
1R4406
82
RAM_VTT
SM-LF
5%1/16W
5
4
RP4425
1/16W5%120
RAM_VTT
MF-LF4022
1R44070.1UF20%10VCERM402
RAM_VTT
2
1 C4412
0.1UF
RAM_VTT
CERM
20%10V
4022
1 C4413
0.1UF
402CERM10V20%
RAM_VTT
2
1 C4416
0.1UF
RAM_VTT
20%10VCERM402
2
1 C4417
0.1UF20%10VCERM
RAM_VTT
4022
1 C4414
RAM_VTT
0.1UF
402
20%10VCERM2
1 C4415
0.1UF20%10VCERM
RAM_VTT
4022
1 C4419
20%0.1UF10VCERM402
RAM_VTT
2
1 C4418
SM-LF1/16W5%82
RAM_VTT6
3
RP4425
402CERM10V20%0.1UF
2
1 C4421
CERM
RAM_VTT
402
10V20%0.1UF
2
1 C4420
1/16W5%
SM-LF
82
RAM_VTT7
2
RP4425
1/16WSM-LF
5%150
8
1
RP44381505%1/16WSM-LF
7
2
RP4438
5%1/16WSM-LF
150
8
1
RP44391505%1/16WSM-LF
6
3
RP44381505%1/16WSM-LF
5
4
RP4438
5%150
SM-LF1/16W
7
2
RP4439
5%1501/16WSM-LF
6
3
RP44391501/16WSM-LF
5%
5
4
RP4439
1505%1/16WSM-LF
7
2
RP4437
1/16W5%
SM-LF
150
5
4
RP4436
1/16WSM-LF
1505%
6
3
RP4436
SM-LF1/16W5%150
7
2
RP4436
5%1/16WSM-LF
150
8
1
RP44361505%
SM-LF1/16W
5
4
RP4437
1/16W5%150
SM-LF
6
3
RP4437
1/16W5%150
SM-LF
8
1
RP4437
SM-LF
1505%1/16W
7
2
RP4442
0.1UF20%10VCERM402
2
1 C4422
402CERM10V20%0.1UF
2
1 C44101501/16WSM-LF
5%
5
4
RP4441
5%150
SM-LF1/16W
6
3
RP4441
1/16W5%
SM-LF
82
RAM_VTT7
2
RP4417
SM-LF1/16W5%82
RAM_VTT8
1
RP4425
1/16W5%150
SM-LF
5
4
RP4442
5%1/16W
150
SM-LF
6
3
RP4442
1505%
SM-LF1/16W
7
2
RP4441
SM-LF
150
1/16W5%
8
1
RP4441
5%1/16WSM-LF
150
8
1
RP4442
SM-LF
5%1/16W
82
RAM_VTT5
4
RP4424
402
1/16WMF-LF
1505%
2
1R4416
402
1/16WMF-LF
1505%
2
1R4417
SM-LF1/16W5%82
RAM_VTT6
3
RP4424
5%150
MF-LF1/16W
4022
1R4421
5%150
MF-LF1/16W
4022
1R4420
120
MF-LF1/16W5%
4022
1R4408
1/16WMF-LF
5%150
4022
1R4411
402
1505%
MF-LF1/16W
2
1R4415
402
4.7K1/16WMF-LF
5%
2
1R4412
402
1505%
MF-LF1/16W
2
1R44101205%1/16WMF-LF4022
1R4409
5%
MF-LF1/16W
4.7K
4022
1R4413
1/16WMF-LF
5%150
4022
1R4414
RAM_VTT
82
1/16WSM-LF
5%
5
4
RP4429
5%
RAM_VTT
82
SM-LF1/16W
6
3
RP4429
5%
RAM_VTT
82
SM-LF1/16W
7
2
RP4429
5%
RAM_VTT
82
SM-LF1/16W
8
1
RP4429
5%
RAM_VTT
82
SM-LF1/16W
5
4
RP4428
5%
RAM_VTT
82
SM-LF1/16W
6
3
RP4428
1/16W5%
SM-LF
82
RAM_VTT7
2
RP4416
5%1/16WSM-LF
82
RAM_VTT8
1
RP4416
SM-LF
5%1/16W
82
RAM_VTT5
4
RP4401
SM-LF1/16W5%82
RAM_VTT6
3
RP4401
SM-LF
5%1/16W
82
RAM_VTT7
2
RP4401
SM-LF1/16W5%82
RAM_VTT8
1
RP4401
SM-LF
5%1/16W
82
RAM_VTT5
4
RP4400
SM-LF1/16W5%82
RAM_VTT6
3
RP4400
5%1/16WSM-LF
82
RAM_VTT8
1
RP4417
SM-LF1/16W5%82
RAM_VTT7
2
RP4400
5%1/16WSM-LF
82
RAM_VTT8
1
RP4400
5%1/16W
RAM_VTT
82
SM-LF
7
2
RP4420
1/16W5%
RAM_VTT
82
SM-LF
8
1
RP4420
1/16W5%
SM-LF
82
RAM_VTT5
4
RP4416
SM-LF
5%1/16W
82
RAM_VTT7
2
RP4424
SM-LF1/16W5%82
RAM_VTT8
1
RP4424
1/16W5%
RAM_VTT
82
SM-LF
5
4
RP4405
5%1/16W
RAM_VTT
82
SM-LF
6
3
RP4405
1/16W5%
RAM_VTT
82
SM-LF
7
2
RP4405
1/16W5%
RAM_VTT
82
SM-LF
8
1
RP4405
1/16W5%
RAM_VTT
82
SM-LF
5
4
RP4404
5%1/16WSM-LF
82
RAM_VTT6
3
RP4416
1/16W5%
SM-LF
82
RAM_VTT5
4
RP4409
5%1/16WSM-LF
82
RAM_VTT6
3
RP4409
1/16W5%
SM-LF
82
RAM_VTT7
2
RP4409
5%1/16WSM-LF
82
RAM_VTT8
1
RP4409
1/16W5%
SM-LF
82
RAM_VTT5
4
RP4408
102
E
44
051-6772
SYNC_MASTER=N/A SYNC_DATE=N/A
PARALLEL TERM
RAM_DQ<53>RAM_DQ<55>RAM_DQ<52>RAM_DQ<49>RAM_DQ<50>RAM_DQ<48>
RAM_DQ<54>
PP1V25_RAM_VTT
RAM_DQ<51>
RAM_DQ<21>RAM_DQ<16>RAM_DQ<20>RAM_DQ<17>
RAM_DQ<23>
PP1V25_RAM_VTT
RAM_DQ<19>
RAM_DQ<22>RAM_DQ<18>
RAM_DQ<38>RAM_DQ<36>
RAM_DQ<32>RAM_DQ<34>
RAM_DQ<39>
RAM_DQ<35>RAM_DQ<37>
PP1V25_RAM_VTT
RAM_DQ<33>
RAM_DQ<6>RAM_DQ<1>
RAM_DQ<5>RAM_DQ<2>
RAM_DQ<4>
RAM_DQ<3>RAM_DQ<0>RAM_DQ<7>
PP1V25_RAM_VTT
RAM_DQ<13>
RAM_DQS<7>
PP1V25_RAM_VTT
=PP2V5_RUN_RAM
RAM_A<5>RAM_A<7>
RAM_DQ<41>
RAM_CS_L<0>RAM_CKE<1>
PP1V25_RAM_VTT =PP2V5_RUN_RAM
RAM_CKE<0>
RAM_CS_L<1>
RAM_A<2>
RAM_DQS<5>
PP1V25_RAM_VTT
RAM_A<1>
RAM_A<3>RAM_A<4>
RAM_A<0>
RAM_A<6>
RP4441_NCRAM_A<8>RAM_A<9>RAM_A<11>RAM_A<12>RAM_A<13>
PP1V25_RAM_VTT
RAM_DQ<57>RAM_DQ<63>RAM_DQ<60>
RAM_DQS<6>
RAM_DQ<26>RAM_DQ<27>
RAM_DQ<43>
RAM_DQS<2>RAM_DQS<3>RAM_DQS<4>
RAM_DQ<42>
RAM_DQ<44>
PP1V25_RAM_VTT
PP1V25_RAM_VTT
RAM_DQ<8>
RAM_DQ<15>
RAM_DQ<31>
RAM_DQ<29>
RAM_DQS<1>RAM_DQS<0>
RAM_DQ<56>RAM_DQ<62>RAM_DQ<58>
RAM_DQ<9>
RAM_DQ<14>
RAM_DQ<25>
RAM_DQ<24>
RAM_DQ<10>
RAM_DQ<30>RAM_DQ<28>
RAM_DQ<61>
RAM_DQ<59>
RAM_DQ<12>
RAM_DQ<11> RAM_DQ<40>
RAM_DQ<45>
=PP2V5_RUN_RAM
RAM_DQ<46>RAM_DQ<47>
46 46
46 46
46
45
46 45
46
46 46
46
45
40
40
40
40
40
40
40
45
40
40
40
40
40
40
45
40
40
40
40
40
40
40
40
40
40
45
40
40
40
40
40
40
40
40
40
45
40
40
45
44
40
40
40
40
40
45 44
40
40
40
40
45
40
40
40
40
40
40
40
40
40
40
45
40
40
40
40
40
40
40
40
40
40
40
40
45
45
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40 40
40
44
40
40
38
38
38
38
38
38
38
44
38
38
38
38
38
38
44
38
38
38
38
38
38
38
38
38
38
44
38
38
38
38
38
38
38
38
38
44
38
38
44
7
38
38
38
38
38
44 7
38
38
38
38
44
38
38
38
38
38
38
38
38
38
38
44
38
38
38
38
38
38
38
38
38
38
38
38
44
44
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38 38
38
7
38
38
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
SM-LF
5%1/16W
82
RAM_VTT5
4
RP4517
5%
RAM_VTT
82
1/16WSM-LF
6
3
RP4528
5%
RAM_VTT
82
1/16WSM-LF
7
2
RP4528
5%
RAM_VTT
82
1/16WSM-LF
8
1
RP45285%1/16W
RAM_VTT
82
SM-LF
5
4
RP4513
1/16W5%
RAM_VTT
82
SM-LF
6
3
RP4513
5%1/16W
RAM_VTT
82
SM-LF
7
2
RP4513
1/16W5%
RAM_VTT
82
SM-LF
8
1
RP4513
5%1/16W
RAM_VTT
82
SM-LF
5
4
RP4512
1/16W5%
SM-LF
RAM_VTT
82
5
4
RP4521
SM-LF1/16W5%
RAM_VTT
82
6
3
RP4504
SM-LF
5%1/16W
RAM_VTT
82
7
2
RP4504
SM-LF1/16W5%
RAM_VTT
82
8
1
RP4504
SM-LF1/16W5%
RAM_VTT
82
6
3
RP4521
SM-LF1/16W5%
RAM_VTT
82
6
3
RP4508
SM-LF
5%1/16W
RAM_VTT
82
7
2
RP4508
SM-LF1/16W5%82
8
1
RP4508
1/16W5%
RAM_VTT
82
SM-LF
6
3
RP4512
5%1/16W
RAM_VTT
82
SM-LF
7
2
RP4512
1/16W5%
SM-LF
RAM_VTT
82
7
2
RP4521
1/16W5%
RAM_VTT
82
SM-LF
8
1
RP4512
5%1/16WSM-LF
RAM_VTT
82
8
1
RP4521
1/16W5%
SM-LF
RAM_VTT
82
5
4
RP4520
0.1UF
CERM
20%10V
402
RAM_VTT
2
1 C4500
CERM
0.1UF
RAM_VTT
402
10V20%
2
1 C4501
RAM_VTT
0.1UF
CERM
20%10V
4022
1 C4502
RAM_VTT
0.1UF10V20%
402CERM2
1 C4503
402CERM10V20%0.1UF
RAM_VTT
2
1 C4504
0.1UF20%10V
RAM_VTT
CERM402
2
1 C4505
0.1UF20%10V
RAM_VTT
CERM402
2
1 C4506
RAM_VTT
402CERM10V20%0.1UF
2
1 C4507 0.1UF20%10V
RAM_VTT
CERM402
2
1 C4508
SM-LF1/16W5%82
RAM_VTT6
3
RP4517
MF-LF1/16W5%120
402
RAM_VTT
2
1R4500
MF-LF
5%1/16W
120
402
RAM_VTT
2
1R4501
MF-LF1/16W5%120
402
RAM_VTT
2
1R4502
MF-LF
5%1/16W
120
402
RAM_VTT
2
1R4503
MF-LF1/16W5%120
402
RAM_VTT
2
1R4504
MF-LF
5%1/16W
120
402
RAM_VTT
2
1R4505
MF-LF1/16W5%120
402
RAM_VTT
2
1R4506120
402
5%1/16WMF-LF
RAM_VTT
2
1R450720%10V
402
0.1UF
CERM
RAM_VTT
2
1 C4510
1/16W5%
SM-LF
RAM_VTT
82
5
4
RP4525
RAM_VTT
0.1UF
CERM402
10V20%
2
1 C4511
0.1UF20%10V
RAM_VTT
CERM402
2
1 C4514
0.1UF20%10V
RAM_VTT
CERM402
2
1 C4515
0.1UF20%10V
RAM_VTT
CERM402
2
1 C4512
0.1UF20%10VCERM
RAM_VTT
4022
1 C4513
402
0.1UF20%10VCERM
RAM_VTT
2
1 C4516
0.1UF20%10VCERM
RAM_VTT
4022
1 C4517
0.1UF20%10V
RAM_VTT
CERM402
2
1 C4518
5%1/16WSM-LF
RAM_VTT
82
6
3
RP4525
1/16W5%
SM-LF
RAM_VTT
82
7
2
RP4525
0.1UF20%10VCERM402
2
1 C45190.1UF20%10VCERM402
2
1 C4509
1/16W5%150
SM-LF
7
2
RP4530
5%1/16W
150
SM-LF
8
1
RP4530
SM-LF
1505%1/16W
6
3
RP4530
1/16W5%150
SM-LF
7
2
RP4531
SM-LF
1501/16W5%
5
4
RP45305%1/16W
150
SM-LF
8
1
RP4531
SM-LF
1501/16W5%
5
4
RP45311501/16W5%
SM-LF
8
1
RP45325%1/16W
150
SM-LF
5
4
RP45321501/16W5%
SM-LF
8
1
RP4533
SM-LF
1505%1/16W
6
3
RP45311505%1/16WSM-LF
7
2
RP4532
1/16W5%150
SM-LF
6
3
RP45321505%1/16WSM-LF
7
2
RP45335%1/16WSM-LF
RAM_VTT
82
8
1
RP4525
SM-LF1/16W5%150
6
3
RP4533
5%1/16W
150
SM-LF
5
4
RP4533
120
RAM_VTT
MF-LF1/16W5%
4022
1R4508120
402
5%1/16WMF-LF
RAM_VTT
2
1R4509
402
4.7K5%1/16WMF-LF
2
1R4510
MF-LF1/16W5%4.7K
4022
1R4511
1/16W5%
SM-LF
RAM_VTT
82
5
4
RP4524
SM-LF
5%1/16W
82
RAM_VTT7
2
RP4517
5%
RAM_VTT
82
1/16WSM-LF
5
4
RP4529
5%
RAM_VTT
82
1/16WSM-LF
6
3
RP4529
5%
RAM_VTT
82
1/16WSM-LF
7
2
RP4529
5%
RAM_VTT
82
1/16WSM-LF
8
1
RP4529
5%
RAM_VTT
82
1/16WSM-LF
5
4
RP4528
5%
SM-LF1/16W
82
RAM_VTT6
3
RP4516
SM-LF
5%1/16W
82
RAM_VTT7
2
RP4516
5%
SM-LF1/16W
82
RAM_VTT8
1
RP4516
1/16W5%
SM-LF
82
RAM_VTT5
4
RP4501
5%
SM-LF1/16W
82
RAM_VTT6
3
RP4501
1/16W5%
SM-LF
82
RAM_VTT7
2
RP4501
5%1/16WSM-LF
82
RAM_VTT8
1
RP4501
1/16W5%
SM-LF
82
RAM_VTT5
4
RP4500
5%1/16WSM-LF
82
RAM_VTT6
3
RP4500
1/16W5%
SM-LF
82
RAM_VTT7
2
RP4500
1/16W5%
SM-LF
82
RAM_VTT8
1
RP4500
5%1/16WSM-LF
RAM_VTT
82
6
3
RP4520
1/16W5%
SM-LF
RAM_VTT
82
7
2
RP4520
5%1/16WSM-LF
RAM_VTT
82
8
1
RP4520
5%1/16WSM-LF
RAM_VTT
82
6
3
RP4524
1/16W5%
SM-LF
RAM_VTT
82
7
2
RP4524
SM-LF1/16W5%82
RAM_VTT8
1
RP4517
5%1/16WSM-LF
RAM_VTT
82
8
1
RP4524
SM-LF
5%1/16W
RAM_VTT
82
5
4
RP4505
SM-LF1/16W5%
RAM_VTT
82
6
3
RP4505
SM-LF
5%1/16W
RAM_VTT
82
7
2
RP4505
SM-LF1/16W5%
RAM_VTT
82
8
1
RP4505
SM-LF
5%1/16W
RAM_VTT
82
5
4
RP4504
SM-LF
5%1/16W
RAM_VTT
82
5
4
RP4509
SM-LF
5%1/16W
82
RAM_VTT5
4
RP4516
SM-LF1/16W5%
RAM_VTT
82
6
3
RP4509
SM-LF
5%1/16W
RAM_VTT
82
7
2
RP4509
SM-LF1/16W5%
RAM_VTT
82
8
1
RP4509
SM-LF
5%1/16W
RAM_VTT
82
5
4
RP4508
10245
E051-6772
SYNC_MASTER=N/A SYNC_DATE=N/A
PARALLEL TERM
RAM_DQ<100>RAM_DQ<99>RAM_DQ<101>
RAM_DQ<102>RAM_DQ<98>
RAM_DQ<103>RAM_DQ<96>
RAM_DQ<97>
PP1V25_RAM_VTT
RAM_DQ<107>RAM_DQ<110>RAM_DQ<108>
PP1V25_RAM_VTT
RAM_DQ<116>
RAM_DQ<109>RAM_DQ<104>RAM_DQ<106>
RAM_DQ<111>RAM_DQ<105>
RAM_DQ<118>RAM_DQ<114>RAM_DQ<113>RAM_DQ<112>RAM_DQ<117>
RAM_DQ<119>RAM_DQ<115>
PP1V25_RAM_VTT
RAM_DQ<71>RAM_DQ<68>RAM_DQ<69>
RAM_DQ<70>RAM_DQ<66>RAM_DQ<65>
RAM_DQ<64>RAM_DQ<67>
PP1V25_RAM_VTT
PP1V25_RAM_VTT
RAM_DQ<76>RAM_DQ<73>
RAM_DQ<78>RAM_DQ<77>RAM_DQ<75>
RAM_DQ<80>RAM_DQ<83>
RAM_DQ<86>RAM_DQ<82>
RAM_DQ<81>
PP1V25_RAM_VTT
RAM_DQ<79>
RAM_DQ<74>RAM_DQ<72>
RAM_DQ<85>
RAM_DQ<84>RAM_DQ<87>
PP1V25_RAM_VTT
PP1V25_RAM_VTT=PP2V5_RUN_RAM
RAM_RAS_L
RAM_BA<1>RAM_A<10>
RAM_CS_L<8>RAM_CS_L<9>RAM_WE_LRAM_CAS_LRAM_BA<0>
RAM_DQ<120>RAM_DQ<121>RAM_DQ<124>
RAM_DQ<126>
RAM_DQ<125>
RAM_DQ<127>RAM_DQ<122>
RAM_DQ<123>
RAM_DQ<93>RAM_DQ<88>
RAM_DQ<89>RAM_DQ<91>RAM_DQ<90>
RAM_DQ<95>RAM_DQ<94>RAM_DQ<92>
RAM_DQS<10>RAM_DQS<9>RAM_DQS<8>
PP1V25_RAM_VTTPP1V25_RAM_VTT
RAM_DQS<12>RAM_DQS<11>
RAM_DQS<13>
RAM_DQS<15>RAM_DQS<14>
RAM_CKE<4>RAM_CKE<5>
46
46
46
46
46
46
46
46
46 46
40
40
40
40
40
40
40
40
45
40
40
40
45
40
40
40
40
40
40
40
40
40
40
40
40
40
45
40
40
40
40
40
40
40
40
45
45
40
40
40
40
40
40
40
40
40
40
45
40
40
40
40
40
40
45
45 44
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
45 45
40
40
40
40
40
40
40
38
38
38
38
38
38
38
38
44
38
38
38
44
38
38
38
38
38
38
38
38
38
38
38
38
38
44
38
38
38
38
38
38
38
38
44
44
38
38
38
38
38
38
38
38
38
38
44
38
38
38
38
38
38
44
44 7
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
44 44
38
38
38
38
38
38
38
VSS VSS
SHTDWN
VTTREFOUTVDD
G
D
S
(TAB)VCNTRL
VIN
REFEN
VOUT
GND
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
353S0603PHILIPS
ONLY STUFF ONE VTT VREG
NOTE: U4700 PIN 4 IS LOW ACTIVE.
PLACE 10UF CAPS NEAR DIMMS
10K
402MF-LF1/16W5%
NOSTUFF
2
1R4603
10%16VX7R603
NOSTUFF
0.1UF
2
1 C4601
NE57811SPAK-5
RAM_VTT
1
6 3
2
4
5
U4600X7R
RAM_VTT
0.1UF16V10%
603
2
1 C4606
2N7002SOT23-LF
2
1
3
Q4600
7343
20%2V
220UF
TANT2
1 C4609
NOSTUFF
MF-LF1/16W5%
0
402
21
R4610
1206
6.3V20%10UF
CERM2
1 C4600
1206
6.3V20%10UF
CERM2
1 C4602
1206
6.3V20%
CERM
10UF
2
1 C4608
NOSTUFF
RT9173A
TO-252
51
3 6
4
2
U4660
6.3V
1UF
CERM402
10%
NOSTUFF
2
1 C4660
402
1%20.5K1/16WMF-LF
NOSTUFF
2
1R4660
402
1%1/16W
20.5K
MF-LF
NOSTUFF
2
1R4661
20%
NOSTUFF
10UF6.3VCERM1206
2
1 C4661
20%10UF
CERM6.3V
1206
2
1 C4610
NOSTUFF
1206
10UF
6.3VCERM
20%
2
1 C4611
051-6772
46 102
E
SYNC_MASTER=N/A SYNC_DATE=N/A
MEM TERM VREGS
MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
PP1V25_RAM_VTT
VOLTAGE=1.25V
TURN_ON_VTT
SYS_SLEEP
U4600_REFOUT
=PP3V3_PWRON_RAM
=PP2V5_PWRON_RAM
VR4600_SHTDWN
59 50 22 11 10
40
9
37
45
8
26
44
3
6
7
7
G
D
S
AGPREFCLK_AVDD
VDD_AGP
AGP_CBE2
AGP_AD_STBS0AGP_AD_STBF0
AGP_DBI_LO
AGP_CBE1
AGP_CBE0
AGP_SB_STBS
AGP_SB_STBF
AGP_AD_STBS1
AGP_AD_STBF1
AGP_DBI_HI
AGP_CBE3
AGP_STOP
AGP_REQ
AGP_DEVSELAGP_FRAME
AGP_GNTAGP_IRDY
AGP_TRDY
AGP_PAR
AGP_ST0
AGP_ST1
AGP_ST2
AGP_RBFAGP_WBF
AGP_GC_AGP8X_DETAGP_TYPEDET
AGP_AD0AGP_AD1
AGP_AD2
AGP_AD3AGP_AD4
AGP_AD5
AGP_AD6AGP_AD7
AGP_AD9AGP_AD8
AGP_AD15
AGP_AD16
AGP_AD12AGP_AD11
AGP_AD10
AGP_AD13
AGP_AD14
AGP_AD21AGP_AD20
AGP_AD19
AGP_AD18AGP_AD17
AGP_AD26
AGP_AD25
AGP_AD24AGP_AD23
AGP_AD22
AGP_AD27
AGP_SBA2
AGP_SBA3
AGP_AD31
AGP_AD30
AGP_AD29AGP_AD28
AGP_SBA1
AGP_SBA0
AGP_SBA4
AGP_STP_AGP*AGP_BUSY*
AGP_REFCLK
AGP_SBA5
AGP_SBA6AGP_SBA7
AGP_VREFCG
AGP_PVTREF2
AGP_PVTREF1
AGP_VREFGC
AGP_MB_AGP8X_DET
AGP_REFCLK_AVSS
(SYM 4 OF 7)
AGPINTERFACE
G
D
SG
D
S
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
GROUPS WITH STROBE1DBI_HI IS NOT A STROBE BUT SHARES THE SAME TOPOLOGY AS A STROBE
FOR CONSTRAINTS
DIFFERENTIAL_PAIRNET_SPACING_TYPENET_PHYSICAL_TYPE
PVTREF RESISTOR
DBIHI AND DBILO
LEVEL SHIFTER FOR U3LITEAGP BUSY AND STOP ARE NOT USED IN ALL DESIGNS
ELECTRICAL_CONSTRAINT_SET
CERM10V20%0.1UF
4022
1 C4808
402MF-LF1/16W5%10K
AGP_BUSYSTOP
2
1R4811
1/16W
402
10K5%
MF-LF2
1R4812
AGP_BUSYSTOP
10K
MF-LF402
5%1/16W
2
1R4808MF-LF402
10K5%1/16W
2
1R4810
2N3904LFSOT23
AGP_BUSYSTOP
2
3
1 Q4802 2N7002SOT23-LF
AGP_BUSYSTOP
2
1
3
Q4803
MF-LF
10K5%1/16W
4022
1R4809
402
0.1UF20%10VCERM2
1 C4807
AGP_BUSYSTOP
5%
402MF-LF1/16W
1K21
R4813
402MF-LF1/16W5%10K
2
1R4807
CERM10V20%0.1UF
4022
1 C4806
402
0.1UF20%10VCERM2
1 C4805
CERM20%0.1UF
40210V2
1 C4804
402
0.1UF20%10VCERM2
1 C4803
CERM10V20%0.1UF
4022
1 C4802
402
0.1UF20%10VCERM2
1 C480110V20%
402CERM
0.1UF2
1 C4800
603
5%
2.2
1/10WMF-LF
21
R4800
1UF6.3VCERM402
10%2
1 C4811
CERM10V402
0.1UF20%
2
1 C4816
1%1/16WMF-LF
182
402
21
R4801
10V402
0.1UF20%CERM2
1 C4812
CERM20%0.1UF
40210V2
1 C4813
CERM20%0.1UF
40210V2
1 C4814
CERM20%0.1UF
40210V2
1 C4815
0.01UF
402
20%16VCERM2
1 C4817
I46
I48
I49
I50
I51
I52
I53
I54
I55
I56
I57
I58
I59
V1.0-300MMPBGA
U3LITE
OMIT
W10
W6
W2Y11
AB4
AC10
AE7
AE2
V9
AG10
AG4
AD6
AA9AC5
AC9
AH5
AD4
AH4
AB1AC1AC4
AE1AD1
AF1AG1AF2AD2AG3AH1AF3AG2
AB9
AE5
AE6
AH2
AC6
AF5AG5
AH7
AA8
AG6AC3
AB8
AH6AF6
AA6
AA4
AA5Y8
AF8AG8
AC8
AA2
AD8
AA3
AE8
AH9AH8AF11AE11AD11AC11
AA7W1
AH12
V7V8V3V4V6V5Y7Y1Y2AA1
AG11
Y5Y6Y3Y4
AD9AE9AF9AG9AH11AH10
AA11AB11U3
CERM20%0.1UF
40210V2
1 C4810
SOT-3632N7002DW
AGP_BUSYSTOP
4
5
3
Q4801SOT-3632N7002DW
AGP_BUSYSTOP
1
2
6
Q4801
E48 102
051-6772
SYNC_MASTER=N/A SYNC_DATE=N/A
U3LITE AGP
AGP_SB_STBF AGP_SB_STBS AGP_SB_STBAGP_STROBEAGP_STROBE
AGP_CBE<3..2> AGP_DATAAGP_AD_1 AGP_DATA
AGP_AD_STB0AGP_AD_STBS<0> AGP_STROBEAGP_AD_STB_0 AGP_STROBE
AGP_AD_1 AGP_DATAAGP_DBI_LO AGP_DATAAGP_AD<0>
AGP_AD_0AGP_AD<15..0> AGP_DATAAGP_DATA
STOP_AGP_L_RNB_STOP_AGP_L
STOP_AGP_L
AGP_BUSY_L
AGP_BUSY_L_F
=PP3V3_AGP
NB_AGP_BUSY_L
=PP1V5_AGP
AGP_AD<4>
AGP_FRAME
AGP_TYPEDET_LNB_AGP_GCDET_L
AGP_GNT
AGP_STOP
AGP_ST<0>AGP_ST<1>
AGP_AD<26>
AGP_AD<22>
AGP_AD<20>
AGP_AD<15>AGP_AD<14>
AGP_AD<12>
AGP_AD<10>AGP_AD<9>AGP_AD<8>
AGP_AD<6>AGP_AD<5>
AGP_AD<25>
AGP_AD<30>
AGP_CLK66M_NB
AGP_SBA_L<6>
AGP_SBA_L<4>
AGP_REQ
AGP_AD<13>
AGP_DEVSEL
AGP_ST<2>
AGP_WBF
AGP_AD<17>
AGP_SB_STBF
AGP_AD<27>AGP_AD<28>
AGP_AD_STBF<0>
AGP_CBE<2>AGP_CBE<3>
AGP_SBA_L<2>AGP_SBA_L<1>
AGP_AD<11>
AGP_AD_1AGP_AD<31..16> AGP_DATAAGP_DATA
AGP_AD<16>
AGP_AD<18>AGP_AD<19>
AGP_SBA_L<3>
AGP_AD<31>
AGP_AD<29>
AGP_AD<7>
AGP_AD<3>AGP_AD<2>
AGP_AD<21>
AGP_AD<23>AGP_AD<24>
TP_AGP_MB_AGP8X_DET_L
AGP_VREF_GC
AGP_DBI_HI
AGP_SBA_L<0>
AGP_AD_STBF<1>
TP_VREF_CG
AGP_SBA_L<5>
AGP_DATAAGP_DBI_HI AGP_AD_1 AGP_DATA
=PP1V5_PWRON_NB_AVDD=PP1V5_AGP
=PP3V3_AGP
=PP1V5_AGP
=PP3V3_AGP
=PP1V5_AGP
AGP_STROBEAGP_AD_STBS<1> AGP_AD_STB1AGP_AD_STB_1 AGP_STROBEAGP_AD_STB1AGP_STROBEAGP_AD_STBF<1> AGP_AD_STB_1 AGP_STROBE
AGP_SB_STBS AGP_SB_STBAGP_STROBEAGP_SB_STBS AGP_STROBEAGP_AD_STBF<0> AGP_AD_STB0AGP_STROBEAGP_AD_STB_0 AGP_STROBE
AGP_DBI_LO
AGP_CBE<1>AGP_CBE<0>
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
PP1V5_PWRON_AGP_NB_AVDDVOLTAGE=1.5V
AGP_AD_STBS<0>
AGP_AD<1>
AGP_CBE<1..0> AGP_DATAAGP_AD_0 AGP_DATA
AGP_SBA AGP_DATAAGP_SBA_L<7..0> AGP_DATA
AGP_IRDYAGP_TRDY
AGP_PAR
AGP_SB_STBS
AGP_AD_STBS<1>
AGP_SBA_L<7>
NB_AGP_BUSY_LNB_STOP_AGP_L
STOP_AGP_L_F
AGP_RBF
AGP_PVTREF1AGP_PVTREF2
59
59
59
56
50
60
50
56
50
56
50
50
49
37
49
50
49
50
49
49
49
49
49 49
49
48
48
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
28
48
48
48
48
48
49
49
49
49
49
49
49
49
49
49
49
49
49
49
48
48
48
48 48
48
48
7
48
7
48
49
49
49
49
49
49
49
48
48
48
48
48
48
48
48
48
48
48
48
48
27
48
48
49
48
49
49
49
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
6
49
48
48
48
6
48
48
7
7
7
7
7
7
48
48
48
48
48
48
48
48
48
48
48
49
49
49
48
48
48
48
48 49
AD_STBS_1*
AGPTEST*
SBA2
FRAME*WBF*RBF*
AD4AD3AD2AD1AD0
PCICLK
ST2ST1
REQ*
SB_STBS*SB_STBF
AD22
AD5
AD7
AD10
AD12AD13AD14AD15
AD18AD17
AD19
AD21AD20
AD23AD24AD25AD26AD27
AD29AD28
AD31AD30
SBA0SBA1
SBA4SBA5SBA6
RST*
GNT*STOP*
TRDY*DEVSEL*
IRDY*
AD11
AD9AD8
AD6
AGPREF
CBE0*CBE1*
DBI_LO
AD_STBF_0AD_STBS_0*
CBE2*CBE3*
DBI_HI
PAR
AGP8X_DET*
AD16
AD_STBF_1
VDDP
SBA3
INTA*
SBA7
ST0
(1 OF 5)
AGP
TABLE_5_ITEM
REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD
QTY DESCRIPTIONPART#
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
(PLACE CLOSE TO GPU AGP BALL)
U3LITE SIGNALS
0.233 * VDDP
AGP VERSION SELECT
(HIGH = AGP V2.X)(LOW = AGP V3.X)
AGP 3.0
0.35V
PLACE C4910 CLOSE TO BALL M26
GPU AGP I/O REFERENCE(PLACE CLOSE TO GPU AGP BALLS)
U3LITE AGP I/O REFERENCE
POWER SEQUENCING REQUIREMENTSSERIES R NEEDED TO PREVENT GPU GLITCHWE CAN LOWER OR REMOVE THIS IF WE MEET GPU
402
330
5%
MF-LF1/16W
21
R4912
1/16WMF-LF1%
402
3.32K
2
1R4906
402MF-LF
1.02K1%1/16W
2
1R4907
40216VCERM
0.01UF20%
2
1 C4957
1/16WMF-LF
10K5%
4022
1R490905%1/16WMF-LF4022
1R4913
1%1/16WMF-LF402
1.02K
2
1R4940
402
3.32K1%1/16WMF-LF
2
1R4914
CERM16V20%0.01UF
4022
1 C4940RV351
BGA
OMIT
AC26
Y27
W30
V24
V23
U27
T30
T24
T23
P27
P23
N30
M24
M23
J30
AF27
AE30
AC27
AC23
AB30
AA24
AA23
V28
N26
AE28
AD27AF29
Y29
Y28
AA29AA28
AC29AC28
AD29
AD28
AB28
AB29
AG28
AF28
AE29
AG30
M25
W29
AE26
AD26
W28
V29
AB26
AB25
U26
P26
U28
N29
M27
M26
AC25
V26
M29
V25
M28
P29
N28
L28L29
K28K29
AA27
AA25
J28
AA26
Y25
Y26W25
W26V27
U25
T26T25
R25
J29
R27P25
R26
N25
U29
T28
T29R28
R29
P28
H28
H29
U4900
CERM6.3V10%1UF
4022
1 C4900
CERM402
0.01UF20%16V2
1 C4910
402
1UF10%6.3VCERM2
1 C49010.01UF
402
16V20%
CERM2
1 C490216V20%0.01UF
CERM402
2
1 C490316V20%0.01UF
CERM402
2
1 C490416V20%0.01UF
CERM402
2
1 C4905
402
10K5%
MF-LF1/16W
2
1R4908
MF-LF1/16W1%
47
402
21
R4910
338S0231 U49001 IC,RV351LE, GRAPHICS CTLR
GPU AGPSYNC_DATE=N/ASYNC_MASTER=N/A
49
E
102
051-6772
GPU_RESET_L
AGP_FRAME
AGP_VREF_GC
MIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.6 MMVOLTAGE=0.35V
AGP_PAR
AGP_SB_STBF
AGP_DBI_HI
AGP_CBE<2>
AGP_AD_STBS<1>
AGP_SB_STBS
AGP_AD_STBF<1>
AGP_CBE<3>
AGP_AD_STBS<0>AGP_AD_STBF<0>
AGP_DBI_LO
AGP_CBE<1>AGP_CBE<0>
AGP_AD<7>
GPU_AGP_VREF
AGP_IRDY
AGP_DEVSELAGP_TRDY
AGP_STOPAGP_GNTAGP_REQ
VOLTAGE=0.35VMIN_LINE_WIDTH=0.6 MM
GPU_AGP_VREF
MIN_NECK_WIDTH=0.2 MM
=PP1V5_AGP
ATI_PCIRST_L
AGP_ST<0>
AGP_SBA_L<7>
AGP_SBA_L<3>
AGP_AD<16>
AGP_AD<6>
AGP_AD<8>AGP_AD<9>
AGP_AD<11>
AGP_SBA_L<6>AGP_SBA_L<5>AGP_SBA_L<4>
AGP_SBA_L<1>AGP_SBA_L<0>
AGP_AD<30>AGP_AD<31>
AGP_AD<28>AGP_AD<29>
AGP_AD<27>AGP_AD<26>AGP_AD<25>
AGP_AD<23>
AGP_AD<20>AGP_AD<21>
AGP_AD<19>
AGP_AD<17>AGP_AD<18>
AGP_AD<15>AGP_AD<14>AGP_AD<13>AGP_AD<12>
AGP_AD<10>
AGP_AD<5>
AGP_ST<1>AGP_ST<2>
AGP_CLK66M_GPU
AGP_AD<0>AGP_AD<1>AGP_AD<2>AGP_AD<3>AGP_AD<4>
AGP_RBFAGP_WBF
AGP_SBA_L<2>
=PP1V5_AGP
AGP_AD<24>
AGP_AD<22>
NB_AGP_GCDET_L
AGP_TYPEDET_L
=PP1V5_AGP
GPU_AGPTEST_L =PP1V5_AGP
AGP_INT_L
PP3V3_GPU
50
50
50
50
59
49
49
49
49
58
48
48
48
48
56
8
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
49
48
48
48
48
48
48
49
7
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
27
48
48
48
48
48
48
48
48
7
48
48
48
48
7
7
25
50
FB
LD
HD
GND
COMP
SS
VCC VC
GND
VOUTVIN
NOISECONT
ENGND
IN OUTADJ
PGEN
VIN
ADJ
VOUT
GND
G
D
S
G
D
S
PGEN
VIN
ADJ
VOUT
GND
LM339AV+
GNDG
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
GPU 2.5V A2VDD
GPU 1.80V TPVDDGPU 1.50V VDDC_CTTHIS RAIL SHOULD BE THE LAST UP AND THE FIRST DOWN
GPU 1.8V VREG
POWER SEQUENCING FOR RV351: =PP3V3_AGP > PP2V5_GPU > PPVCORE_GPU > VDDC_CT
VOUT = 0.59V * [1 + R5060 / R5061]
GPU VCORE VREG
PP2V5_GPU_A2VDD > PP1V8_GPUHOWEVER IDEALLY ALL POWER RAILS SHOULD RAMP TOGETHER
VOUT = 1.80V
POWER DOWN SEQUENCE SHOULD BE IN REVERSE ORDER
PLACE LED5000 NEAR VREG
NOTE: SET OUTPUT = 1.20V +/- 5% FOR RV351LE
IRU3037ACS VREF = 0.8 VDC
PEAK CURRENT OF TOTAL RAILS5A WITH RV351LE
VOUT=VREF*(R5003+R5005)/R5005 = 1.199 VDC
U5000_FEEDBACK
VOUT = 1.50V
GPU 3.3V I/O
VOUT = 0.59V * [1 + R5090 / R5091]
CERM
10UF20%6.3V
12062
1 C5001
1%1/16W
402MF-LF
10K
2
1R5005
CERM603
3300PF50V
NOSTUFF
10%2
1 C50071/4W5%
FF1206
0.51
2
1R5004
CERM
20%50V
0.1UF
12062
1 C5012
CERM
2200PF5%
603
50V2
1 C5005
1/8WMF-LF
0
805
5%
21
R5002CERM25V
1UF
805
20%2
1C5004
1.53UH
TH
21
L5001
805
20%25VCERM
1UF2
1 C5016
5%220PF
402CERM25V2
1 C50060.1UF
603
16VCERM
20%2
1 C5014
SOIIRU3037ACS
2 6
8
3
5
4
1
7
U5000
MF-LF1/16W1%4.99K
4022
1R5003
CERM
0.0018UF10%50V
4022
1 C5023
20PF5%50VCERM603
2
1 C50131%61.9K1/16WMF-LF4022
1R5001
4.75%1/8W
805MF-LF
2
1R5000
6.3VCERM805
20%10UF
2
1 C5072
MM1572FNSOT-25A
51
4
2
3
U5070
20%16V
402CERM
0.01UF2
1C50715%10K1/16WMF-LF4022
1R507010VCERM
20%1UF
8052
1 C5070
CRITICAL
SOP-8MIC39102
32
8765
1 4
U5080
402
1%453
MF-LF1/16W
2
1R5081
402
5%3.3K
MF-LF1/16W
2
1R5080
SM-1ELEC6.3V20%330UF
2
1 C508320%10UF
1206CERM6.3V2
1 C5080
MF-LF1/16W1%
402
1K
2
1R5082
CERM6.3V10%1uF
4022
1 C5092
56.2K
MF-LF
1%1/16W
4022
1R5091
402
10%50VCERM
0.001UF2
1 C5091CRITICAL
SOT23-6FAN2558
61
4
2
3 5
U50904.7UF6.3V20%
CERM805
2
1C5090
NTD60N02RCASE369
3
1
4Q5001
NTD60N02RCASE369
3
1
4Q5002
SMB10BQ040PBF
2
1
D5000
10BQ040PBFSMB
2
1
D5090NOSTUFF
5%
0
805MF-LF1/8W
21
R5092
1%100K1/16W
402MF-LF
2
1R5090
20%
TH-KZJ
6.3V
1800UF
ELEC2
1 C5009
805CERM6.3V20%10UF
2
1 C5008
6.3V
TH-KZJ
20%1800UF
ELEC2
1 C50026.3V
TH-KZJ
20%1800UF
ELEC2
1 C500310UF6.3VCERM1206
20%2
1 C5010
1uF10%
402CERM6.3V2
1 C5062402
1/16W
100K1%
MF-LF2
1R5060
1%1/16WMF-LF
48.7K
4022
1R5061
0.001UF50V
402
10%
CERM2
1 C5061SOT23-6
CRITICAL
FAN2558
61
4
2
3 5
U50604.7UF6.3VCERM805
20%2
1C5060
402
330
DEVELOPMENT
MF-LF1/16W5%
2
1R5019
DEVELOPMENT
2.0X1.25AGREEN
2
1
LED5000
SOI
DEVELOPMENT3
13
11
10
12
U1001402
MF-LF1/16W
0
5%
21
R5020
SOT23-LF2N7002
2
1
3
Q5000
5%1/16W
3.3K
402MF-LF
2
1R5097
SOT23-LF2N7002
2
1
3
Q5080
2N7002SOT23-LF
2
1
3
Q5090
402MF-LF1/16W
3.3K5%
2
1R5062
SOT23-LF2N7002
2
1
3
Q5060
2N7002SOT23-LF
2
1
3
Q5070
SOT23-LF2N7002
2
1
3
Q5050
3.3K
MF-LF402
1/16W5%
2
1R5050
PP12V_RUN
MF-LF402
5%
470
1/16W
21
R5051
0.1UF20%
402
10VCERM
NOSTUFF
2
1 C5050
402
5%
MF-LF1/16W
47K
2
1R5052
TSOPSI3446DV
4
3 6
5
2
1
Q5051
805MF-LF1/8W5%0
NOSTUFF
2
1R5053
50
051-6772 E
102
SYNC_MASTER=N/A SYNC_DATE=N/A
GRAPHICS VREGS
=PP3V3_AGP
Q5050_D
=PP3V3_AGP
U5080_EN
U5000_GATE_H
U5000_COMP
R5001_2
U5000_VC
Q5001_GATE
R5004_P2
GPU_CORE_FOR_LED
LED_GPU_CORE_N
LED_GPU_CORE_P
=PP5V_AGP
=PP12V_AGP
=PP3V3_AGP
=PP1V8_GPU
PP3V3_RUN
=PP3V3_AGP
SYS_SLEEP
U5060_ADJ
SYS_SLEEP
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MMVOLTAGE=1.2VPPVCORE_GPU
U5000_SS
U5080_ADJ
=PP3V3_AGP
=PP3V3_AGP
U5090_EN
SYS_SLEEP
U5000_GATE_L
=PP3V3_AGP
U5070_NOISE
U5060_EN
U5070_CONT
SYS_SLEEP
MAKE_BASE=TRUE
PP1V8_GPU
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MMVOLTAGE=1.8V
PP2V5_GPU_A2VDDVOLTAGE=2.5VMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM
SYS_SLEEP
=PP3V3_AGPVOLTAGE=1.8VMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM
PP1V8_GPU_TPVDD
Q5051_G
MIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM
VOLTAGE=3.3VPP3V3_GPU
=PP3V3_AGP
SYS_SLEEP
U5000_FEEDBACK
=PP1V5_AGP
FAN2558_ADJ
PP1V5_GPU_VDDC_CT
MIN_LINE_WIDTH=0.5MMVOLTAGE=1.5VMIN_NECK_WIDTH=0.25MM
Q5002_DRAIN
1V1_REF59
59
59
59
59
59
50
50
50
50
50
50
34
46
46
46
46
46
46
22
22
22
22
22
22
22
59
59
59
18
59
11
11
59
59
11
59
11
11
59
59
11
56
56
56
11
56
10
10
56
56
10
56
10
10
56
59
56
10
50
50
50
58
10
50
9
9
51
50
50
9
50
9
9
50
58
50
9
49
34
48
48
59
59
48
52
7
48
8
8
22
48
48
8
48
8
58
8
48
56
48
8
48
22
7
7
6
6
6
6
7
7
7
51
6
7
6
6
7
6
7
7
6
6
7
6
51
6
7
58
49
7
6
6
7 51
6
10
PVSSPVDD
VDD15
VDDC
VSS
VSS
VDDCI
VDDL0
VDDL1
(2 OF 5)
CORE POWER
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
25MA MAX
BGA
OMIT
RV351
AD18
Y4W8
W7
W27W24
W23
W15V30
V16
V15
U8U4
U23U16
U15
T27T19
T18
T17T16
T15
T14
T13T1
R8R7
R30
R24R23
R18
R17
R16
R15
R14
R13R12
P4P16
P15
N27N24
N23N16
N15M8
M7
M30M16
L4K8
K7
K30K27
K24
K23
K1H9
H8
H4H27
H23H21
H18
H16
H14
H12
G9
G24
G21
G18
G16
G12
F27
E4
D9
D6
D4
D27
D25
D24
D21
D18
D15
D12
D10
C30
C3
C28
C1
AK29
AK25
AK2
AJ30
AJ19
AJ1
AG9AG5
AG27
AG22AG18
AG15
AG11AF20
AF15
AE27
AE19
AE16
AD30AD25
AD16
AD12AC4
AC18
AC16AC14
AC12
AB8AB7
AB4
AB27AB24
AB23
AB1AA30
A29
A22
A2
A16
A10
AE20AE17
AJ20AF21
AE15
W16
T12
R19M15
W19
W18
W17
W14
W13
W12
V19
V18
V17
V14
V13
V12
U19
U18
U17
U14
U13
U12
P19
P18
P17
P14
P13
P12
N19
N18
N17
N14
N13
N12
M19
M18
M17
M14
M13
M12
AD15
AD13
AC17
AC15
AC13
Y8
Y23P8
L23
H20H11
AC20
AC11
AJ28
AK28
U4900
CERM6.3V10%1UF
4022
1 C51026.3V
402
1UF10%
CERM2
1 C5101
402CERM
0.01UF20%16V2
1 C5110
402CERM
20%16V
0.01UF2
1 C5109
402CERM
0.01UF20%16V2
1 C5108
CERM
20%16V
402
0.01UF2
1 C5107
402
1UF10%6.3VCERM2
1 C5103
CERM6.3V10%1UF
4022
1 C5104
16V20%0.01UF
CERM402
2
1 C510516V20%0.01UF
CERM402
2
1 C510616V20%0.01UF
CERM402
2
1 C511116V20%0.01UF
CERM402
2
1 C5112
402CERM
0.01UF20%16V2
1 C5120
402CERM
0.01UF20%16V2
1 C511916V20%0.01UF
CERM402
2
1 C511816V20%
CERM402
0.01UF2
1 C511716V20%0.01UF
CERM402
2
1 C51160.01UF
402
16V20%
CERM2
1 C5115
402CERM
0.01UF20%16V2
1 C5114
402CERM
0.01UF20%16V2
1 C5113
402
1UF10%6.3VCERM2
1 C51431UF10%6.3VCERM402
2
1 C5142
402
1UF10%6.3VCERM2
1 C51411UF
CERM6.3V10%
4022
1 C5140
402CERM6.3V
1UF10%
2
1 C5131
805
NOSTUFF
10UF20%6.3VCERM2
1 C51300805
1.8UH21
L5130
SM21
XW5130
FERR-220-OHM
0805
21
L5150
NOSTUFF
805
10UF20%6.3VCERM2
1 C5100
51 102
051-6772 E
SYNC_MASTER=N/A SYNC_DATE=N/A
GPU CORE POWER
PP1V5_GPU_VDDC_CT
PP2V5_GPU_A2VDDPP2V5_GPU_VDDL1
MIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MMVOLTAGE=2.5V
PPVCORE_GPU
=PP1V8_GPU
PPVCORE_GPU
GND_GPU_PVSSVOLTAGE=0VMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM
PP1V8_GPU_PVDD
MIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MMVOLTAGE=1.8V
PP1V8_GPU_TXVDDR
51
51
50
58
50
58
22
52
22
50
50
7
50
7
58
VDDRH1
VDDRH0
DQA5DQA6DQA7
DQA4
DQA0DQA1DQA2
DQA23
DQA21DQA20
DQA18
DQA22
DQA52
DQA25DQA24
DQA8DQA9DQA10DQA11DQA12DQA13DQA14DQA15DQA16DQA17
DQA19
DQA26DQA27DQA28DQA29DQA30DQA31DQA32DQA33DQA34DQA35DQA36DQA37DQA38DQA39DQA40DQA41DQA42DQA43DQA44DQA45DQA46DQA47DQA48DQA49DQA50DQA51
DQA53DQA54DQA55DQA56DQA57DQA58DQA59DQA60
DQA62
DQA3 MAA1MAA0
MAA2
MAA4MAA3
MAA5
MAA8
MAA14
DQMA1*DQMA0*
DQMA2*
DQMA6*DQMA5*
QSA0
DQMA7*
QSA1QSA2QSA3
QSA5QSA4
RASA*
CASA*
WEA*
CSA1*
CSA0*
CKEA
CLKA0*CLKA0
CLKA1*CLKA1
MVREFS
MVREFD
DIMA_1DIMA_0
VDDR1
DQA63
DQA61
QSA6QSA7
MAA6MAA7
MAA9MAA10MAA11MAA12MAA13
DQMA4*DQMA3*
VSSRH1VSSRH0
(3 OF 5)
MEMORY INTERFACE A
MEMVMODE0
CLKB1*
CLKB0
VDDR1
MAB5MAB4
MAB10MAB11
MAB13
DQB33
DQB14
DQB29DQB30DQB31DQB32
DQB34DQB35DQB36DQB37
DQB39DQB38
DQB40
DQB42DQB41
DQB43DQB44DQB45DQB46DQB47DQB48
DQB50DQB49
DQB51DQB52DQB53
DQB55DQB54
DQB58DQB57DQB56
DQB59DQB60
DQB63
DQB61DQB62
DQB3DQB4DQB5DQB6DQB7DQB8
DQB12
DQB17
DQB15
DQB19DQB20
DQB22DQB23DQB24DQB25
DQB27DQB26
DQB28
DQB9DQB10DQB11
DQB13
DQB16
DQB18
DQB21
MAB0MAB1
MAB3MAB2
MAB6MAB7MAB8MAB9
MAB14
DQMB0*
DQMB2*DQMB1*
DQMB3*
DQMB5*DQMB4*
DQMB6*DQMB7*
QSB0QSB1QSB2
QSB4QSB3
QSB5
QSB7QSB6
RASB*
WEB*
CKEB
CLKB0*
DIMB_0DIMB_1
DQB1DQB2
CASB*
CSB0*
CSB1*
CLKB1
ROMCS*
MEMVMODE1
MEMTEST
DQB0
MPVSSMPVDD
MAB12
MEMORY INTERFACE B
(4 OF 5)
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
10MA MAX
0110
MEMVMODE 01
1.8V2.5V2.8V 11
RV351OMIT
BGA
E19
M6
F19
N6
F18
V8
V7
V4
T8
M4
H17
F4
D5
D26
D23
D20
D19
D17
D14
D13
D11
B30
B1
AD4
AA8
AA7
AA4
AA1
A9
A3
A28
A21
A15
A19
F10B11B16E16B27F24F30J27
B8
B7
A24C21F21F22C22C23B24B23
C19B20E21A25C24
B22E22
E11C11C15F15A27E25F29J25
D29G30G26
F8F9E9F11
H26
F12E10E12E13B10B9C9C10B12C12
H25
A12A13C16C14B14C13B15B17B18C17
J26
F13E14F14E15F16D16E17F17B26C26
K26
B25B28C27C25C29B29D22E23F23E24
K25
F25E26F26G25F28G28G29E29E28D28
L26L25
B13D30
F20
E20
A18C18
C20B21
B19
E18
U4900
0.01UF16V20%
CERM402
2
1 C52120.01UF
402CERM
20%16V2
1 C52110.01UF
402CERM
20%16V2
1 C5210
402CERM
20%16V
0.01UF2
1 C52090.01UF
402CERM16V20%
2
1 C5208
CERM
20%16V
402
0.01UF2
1 C52070.01UF
CERM402
20%16V2
1 C52060.01UF
CERM402
20%16V2
1 C5205
BGA
OMIT
RV351
T6
T7
T4
R4
R1N8
N7
N4L8
L27
J8
J7J4
J24
J23
J1
H22
H19
H15
H13
H10
G7
G27
G22
G19
G15
G13
G10
E27
D8
AF5
R2
AD1AC5W1V5G1K6B3F6
A6A7
C7
C6
C8
K2N3P6M5M2L2L3M3
P2P3P5J2K3
M1N5
AD2AC6W2W6G3J5B2E6
C5B5C4
AE3AE2AE1AD3
E5
AC3AC2AB3AB2AE4AE5AD5AD6AB5AB6
F5
AA5AA6AA2Y3Y2W3V3V1V2U2
G5
Y5Y6W4W5V6U3U5U6H3F1
G6
J3F2E2H2F3G2L5L6K4K5
E7
J6H5H6G4D2D1D3C2B4A4
F7D7
AA3E3
R6
R5
T3T2
N2N1
R3
T5
U4900
10UF20%
805
6.3VCERM2
1 C520110UF
805CERM6.3V20%
2
1 C5200
1UF10%CERM6.3V402
2
1 C5231CERM6.3V20%10UF
805
NOSTUFF
2
1 C52300805
1.8UH21
L5230
SM
21
XW5230
MF-LF1/16W5%10K
4022
1R5200 MF-LF1/16W5%10K
4022
1R5201
1001%1/16WMF-LF4022
1R5220
402CERM10V20%
0.1UF2
1C5221
MF-LF1/16W
471%
4022
1R5222
51.1
MF-LF1/16W1%
4022
1R52230.1UF
CERM10V20%
4022
1C5223
402MF-LF1/16W1%100
2
1R5221
4.7K5%
MF-LF1/16W
402
NOSTUFF
2
1R5226
4.7K5%1/16WMF-LF4022
1R5227
402MF-LF1/16W1%47
2
1R5228
402MF-LF1/16W
5%4.7K
2
1R5224
402MF-LF1/16W
5%4.7K
NOSTUFF
2
1R5225
1UF
402
10%6.3VCERM2
1 C52041UF
402CERM6.3V10%
2
1 C52031UF
402
10%6.3VCERM2
1 C5202
051-677252 102
E
SYNC_MASTER=N/A SYNC_DATE=N/A
GPU FRAME BUFFER
TP_GPU_ROMCS_L
FBBCLK1_LFBBCLK1
FBD<101>
FBD<50>FBD<51>
FBD<54>FBD<48>
FBD<61>FBD<62>
FBD<55>FBD<52>
FBA<2>
FBDQS<7>
FBDQM<4>
FBDQM<6>FBDQM<0>
FBDQS<0>FBDQS<6>
FBDQS<4>FBDQS<5>
FBDQM<2>FBDQM<3>FBDQM<1>
FBAWE_L
FBACLK0_L
FBACLK1
GPU_MVREFDMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM
FBD<18>FBD<20>FBD<16>FBD<17>FBD<28>FBD<30>FBD<31>FBD<29>FBD<27>FBD<25>FBD<26>FBD<24>FBD<10>FBD<13>FBD<14>FBD<15>FBD<12>FBD<11>FBD<8>FBD<9>
FBD<0>FBD<1>
FBD<5>
FBD<7>FBD<4>FBD<6>
FBD<3>FBD<2>
FBD<53>
FBD<49>FBD<63>
FBD<60>FBD<58>FBD<57>FBD<56>FBD<59>FBD<34>FBD<33>FBD<32>FBD<36>FBD<37>
FBD<38>FBD<35>FBD<47>FBD<45>FBD<46>
FBA<7>
PP2V5_GPU
FBD<23>FBD<22>FBD<21>FBD<19>
FBA<10>
FBA<12>FBA<13>
FBA<9>FBA<8>
FBA<11>
FBACAS_L
FBACKE
FBA<3>
FBDQS<2>FBDQS<3>
FBACLK1_L
FBACLK0
TP_FBACS1_L
FBA<1>
=PP1V8_GPU
FBD<39>
FBD<44>FBD<42>
FBD<40>FBD<41>FBD<43>
FBDQM<5>
FBDQM<7>
FBA<6>FBA<5>FBA<4>
FBA<0>
TP_GPU_DIMA_1TP_GPU_DIMA_0
FBBA<12>
FBD<104>
GPU_MEMTESTMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM
GPU_MEMVMODE1
TP_FBBCS1_L
FBBCS0_L
FBBCAS_L
FBD<106>FBD<107>
FBBCLK0_L
FBBCKE
FBBWE_L
FBBRAS_L
FBDQS<10>FBDQS<11>
FBDQS<9>
FBDQS<14>FBDQS<8>
FBDQS<15>FBDQS<12>FBDQS<13>
FBDQM<11>FBDQM<10>
FBDQM<8>FBDQM<9>
FBDQM<14>
FBDQM<12>FBDQM<15>
FBDQM<13>
FBBA<9>FBBA<8>FBBA<7>FBBA<6>
FBBA<2>FBBA<3>
FBBA<1>FBBA<0>
FBD<126>
FBD<123>
FBD<120>
FBD<99>FBD<98>FBD<97>
FBD<114>
FBD<118>FBD<112>
FBD<113>FBD<116>FBD<127>FBD<125>
FBD<124>FBD<122>
FBD<103>
FBD<121>
FBD<100>
FBD<96>FBD<105>FBD<108>FBD<110>FBD<109>FBD<111>
FBD<94>FBD<93>
FBD<95>
FBD<92>FBD<91>
FBD<88>FBD<89>FBD<90>
FBD<86>FBD<87>
FBD<85>FBD<84>FBD<83>
FBD<81>FBD<82>
FBD<80>FBD<79>FBD<78>FBD<77>FBD<76>FBD<74>
FBD<73>FBD<75>
FBD<72>
FBD<69>FBD<71>
FBD<70>FBD<68>
FBD<67>FBD<66>
FBD<64>FBD<117>FBD<115>FBD<119>
FBD<102>
FBD<65>
FBBA<13>
FBBA<11>FBBA<10>
FBBA<4>FBBA<5>
FBBCLK0
GPU_MEMVMODE0
TP_GPU_DIMB_0TP_GPU_DIMB_1
TP_FBBA<14>
TP_FBA<14>
FBARAS_L
FBDQS<1>
FBACS0_L
PP2V5_GPU
=PP1V8_GPU
GND_GPU_MPVSS
MIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM
VOLTAGE=0V
PP1V8_GPU_MPVDD
MIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM
VOLTAGE=1.8V
PP2V5_GPU
GPU_MVREFS
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MM
55
58
55
58
55
54
52
54
52
54
55
55
54
54
54
54
54
54
54
54
54
54
52
54
54
54
54
54
54
54
54
54
54
51
54
54
54
54
54
54
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
52
51
52
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
54
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
7
53
53
53
53
53
53
53
53
53
53
54
54
53
53
53
53
53
53
50
53
53
53
53
53
53
53
53
53
53
53
53
53
53
6
55
55
53
53
53
55
55
55
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
54
53
54
7
50
7
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
NET_SPACING_TYPE
PLACE R’S CLOSE TO MEMORY
FRAME BUFFER B TERMINATION
PLACE CLOCK TERMINATION AFTER MEMORYGPU -> MEMORY -> TERMINATION
DIFFERENTIAL_PAIRNET_PHYSICAL_TYPEELECTRICAL_CONSTRAINT_SET
FRAME BUFFER A TERMINATION
22 63 RP5300
22 63 RP530122 54 RP530122 72 RP530122 81 RP5301
22 81 RP5302
22 54 RP530222 72 RP530222 63 RP5302
GPU128BIT 22 54 RP5303
GPU128BIT 22 63 RP530322GPU128BIT 72 RP5303
GPU128BIT 22 81 RP530322GPU128BIT 63 RP5304
22GPU128BIT 81 RP5305
22GPU128BIT 54 RP530522GPU128BIT 72 RP530522GPU128BIT 63 RP5305
22GPU128BIT 54 RP530422GPU128BIT 72 RP530422GPU128BIT 81 RP530422GPU128BIT 81 RP530622GPU128BIT 72 RP530622GPU128BIT 63 RP5306
GPU128BIT 22 54 RP5307
GPU128BIT 22 63 RP5307
GPU128BIT 22 72 RP5307
GPU128BIT 22 81 RP5307
GPU128BIT 22 54 RP5308
GPU128BIT 22 63 RP5308
GPU128BIT 22 81 RP5308GPU128BIT 22 72 RP5308
GPU128BIT 22 63 RP5309GPU128BIT 22 54 RP5309
GPU128BIT 22 81 RP5309GPU128BIT 22 72 RP5309
GPU128BIT 22 72 RP5310GPU128BIT 22 63 RP5310GPU128BIT 22 54 RP5310
GPU128BIT 22 81 RP5310
22GPU128BIT 81 RP531122GPU128BIT 72 RP531122GPU128BIT 63 RP531122GPU128BIT 54 RP5311
22GPU128BIT 54 RP5306
22GPU128BIT 54 RP5312
22GPU128BIT 81 RP5313
22GPU128BIT 54 RP531322GPU128BIT 63 RP531322GPU128BIT 72 RP5313
22GPU128BIT 81 RP531422GPU128BIT 72 RP5314
22GPU128BIT 63 RP531222GPU128BIT 72 RP531222GPU128BIT 81 RP5312
22GPU128BIT 54 RP5314
22GPU128BIT 63 RP5314
22GPU128BIT 63 RP5315
22GPU128BIT 72 RP5315
22GPU128BIT 81 RP5315
22GPU128BIT 54 RP5315
22 54 RP5316
22 81 RP5316
22 63 RP5316
22 72 RP5316
GPU128BIT 22 81 RP5317
GPU128BIT 22 54 RP5317
GPU128BIT 22 72 RP5317
GPU128BIT 22 63 RP5317
22GPU128BIT 63 RP5318GPU128BIT 22 54 RP5318
22GPU128BIT 81 RP5318
22GPU128BIT 72 RP5318
GPU128BIT 22 63 RP5319GPU128BIT 22 72 RP5319GPU128BIT 22 81 RP5319
22GPU128BIT 54 RP5319
402
56.21%
1/16WMF-LF
2
1R5320
MF-LF1/16W
1%56.2
4022
1R5321
402
0.01UF20%16V
CERM 2
1C5321
402
56.21%
1/16WMF-LF
2
1R5323
MF-LF1/16W
1%56.2
4022
1R5322
402
0.01UF20%16V
CERM 2
1C5323
0.01UF16V
CERM
20%
4022
1C5325
MF-LF1/16W
1%56.2
4022
1R5324
402
56.21%
1/16WMF-LF
2
1R5325
402
56.21%
1/16WMF-LF
2
1R5326
402
0.01UF20%16V
CERM 2
1C5327MF-LF1/16W
1%56.2
4022
1R5327
I421
I423
I425
I426
I427
I428
I429
I430
I431
I432
I433
I434
I435
I436
22 81 RP5320
22 72 RP5320
22 63 RP5320
22 54 RP5320
22 81 RP5321
22 72 RP5321
22 63 RP5321
22 54 RP5321
22 54 RP532222 63 RP532222 72 RP532222 81 RP5322
22 81 RP5323
22 54 RP532322 63 RP532322 72 RP5323
22 54 RP532422 63 RP532422 72 RP532422 81 RP5324
22 81 RP5325
22 54 RP532522 63 RP532522 72 RP5325
22 54 RP532622 63 RP532622 72 RP532622 81 RP5326
22 81 RP5327
22 54 RP532722 63 RP532722 72 RP5327
22 72 RP532822 81 RP532822 54 RP532822 63 RP5328
22 54 RP532922 63 RP532922 81 RP532922 72 RP5329
22 81 RP5330
22 63 RP533022 54 RP533022 72 RP5330
22 72 RP533122 81 RP533122 63 RP533122 54 RP5331
22 54 RP5300
22 81 RP530022 72 RP5300
53 102
E051-6772
SYNC_MASTER=N/A SYNC_DATE=N/A
FB TERMINATION
RFBD<114>
RFBD<93>
GPU_FBCLKFBBCLK1_L FBBCLK1GPU_FBCLK
GPU_FBGPU_FBFBBA<13..0>
FBACLK1_TERMMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MMFBBCLK0_TERM
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MMFBBCLK1_TERM
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MMFBACLK0_TERM
RFBDQS<3>
FBACLK0_L
FBD<63>
FBD<87>
FBD<73>
FBD<68>
FBD<69>
FBD<17>
GPU_FBCLK FBACLK1FBACLK1_L GPU_FBCLKGPU_FBCLK FBACLK1FBACLK1 GPU_FBCLKGPU_FBCLKFBACLK0_L FBACLK0GPU_FBCLKGPU_FBCLK FBACLK0FBACLK0 GPU_FBCLK
GPU_FBGPU_FBFBDQS<15..0>GPU_FB GPU_FBFBDQM<15..0>
GPU_FB GPU_FBRFBD<127..0>
RFBD<95>FBD<95>
RFBD<92>
RFBD<79>
RFBD<94>
FBACLK0
FBACLK1
FBACLK1_L
RFBDQS<0>FBDQS<0>MAKE_BASE=TRUE
RFBDQS<1>FBDQS<1>MAKE_BASE=TRUE
RFBDQS<2>FBDQS<2>MAKE_BASE=TRUE
MAKE_BASE=TRUEFBDQS<3>
RFBDQS<4>FBDQS<4>MAKE_BASE=TRUE
RFBDQS<5>FBDQS<5>MAKE_BASE=TRUE
RFBDQS<6>MAKE_BASE=TRUEFBDQS<6>
RFBDQS<7>FBDQS<7>MAKE_BASE=TRUE
FBD<32> RFBD<32>FBD<33> RFBD<33>FBD<34> RFBD<34>FBD<35> RFBD<35>FBD<36> RFBD<36>
FBD<38> RFBD<38>FBD<37> RFBD<37>
FBD<39> RFBD<39>FBD<40> RFBD<40>FBD<41> RFBD<41>
FBD<44> RFBD<44>
FBD<42> RFBD<42>FBD<43> RFBD<43>
FBD<45> RFBD<45>FBD<46> RFBD<46>
FBD<48> RFBD<48>FBD<49> RFBD<49>
FBD<47> RFBD<47>
FBD<50> RFBD<50>FBD<51> RFBD<51>
FBD<53> RFBD<53>FBD<54> RFBD<54>
FBD<52> RFBD<52>
FBD<56> RFBD<56>FBD<55> RFBD<55>
FBD<29> RFBD<29>FBD<30> RFBD<30>FBD<31> RFBD<31>
FBD<27> RFBD<27>FBD<28> RFBD<28>
FBD<24> RFBD<24>FBD<25> RFBD<25>FBD<26> RFBD<26>
FBD<0> RFBD<0>FBD<1> RFBD<1>
RFBD<17>
FBD<2> RFBD<2>FBD<3> RFBD<3>
FBD<16> RFBD<16>FBD<18> RFBD<18>
FBD<15> RFBD<15>FBD<14> RFBD<14>
FBD<19> RFBD<19>
FBD<13> RFBD<13>RFBD<12>
FBD<11> RFBD<11>FBD<9> RFBD<9>
FBD<10> RFBD<10>
RFBD<5>FBD<8>
FBD<57> RFBD<57>FBD<6> RFBD<6>FBD<58> RFBD<58>FBD<59> RFBD<59>
FBD<61> RFBD<61>FBD<60> RFBD<60>
FBD<62> RFBD<62>RFBD<63>
FBD<4> RFBD<4>FBD<7> RFBD<7>
FBD<21> RFBD<21>FBD<20> RFBD<20>
FBD<22> RFBD<22>FBD<23> RFBD<23>
FBBCLK0
FBBCLK0_L
FBBCLK1
FBBCLK1_L
RFBDQS<8>FBDQS<8>MAKE_BASE=TRUE
RFBDQS<9>FBDQS<9>MAKE_BASE=TRUE
RFBDQS<10>FBDQS<10>MAKE_BASE=TRUE
RFBDQS<11>FBDQS<11>MAKE_BASE=TRUE
RFBDQS<13>FBDQS<13>MAKE_BASE=TRUE
RFBDQS<12>FBDQS<12>MAKE_BASE=TRUE
RFBDQS<15>FBDQS<15>MAKE_BASE=TRUE
RFBDQS<14>FBDQS<14>MAKE_BASE=TRUE
FBD<99> RFBD<99>
FBD<97> RFBD<97>FBD<96> RFBD<96>
FBD<98> RFBD<98>
FBD<102> RFBD<102>
FBD<100> RFBD<100>FBD<101> RFBD<101>
FBD<103> RFBD<103>FBD<104> RFBD<104>FBD<105> RFBD<105>FBD<106> RFBD<106>FBD<107> RFBD<107>
FBD<109> RFBD<109>FBD<108> RFBD<108>
FBD<110> RFBD<110>
FBD<112> RFBD<112>FBD<111> RFBD<111>
FBD<113> RFBD<113>FBD<114>FBD<115> RFBD<115>
FBD<117> RFBD<117>FBD<116> RFBD<116>
FBD<118> RFBD<118>FBD<119> RFBD<119>FBD<120> RFBD<120>FBD<121> RFBD<121>FBD<122> RFBD<122>FBD<123> RFBD<123>FBD<124> RFBD<124>FBD<125> RFBD<125>
FBD<127> RFBD<127>FBD<126> RFBD<126>
FBD<64> RFBD<64>
FBD<66> RFBD<66>FBD<65> RFBD<65>
FBD<67> RFBD<67>
FBD<85> RFBD<85>FBD<84> RFBD<84>
FBD<86> RFBD<86>
RFBD<73>
RFBD<87>FBD<72> RFBD<72>
FBD<75> RFBD<75>FBD<74> RFBD<74>
FBD<70> RFBD<70>RFBD<68>
RFBD<69>FBD<71> RFBD<71>FBD<80> RFBD<80>FBD<81> RFBD<81>FBD<82> RFBD<82>FBD<83> RFBD<83>FBD<76> RFBD<76>FBD<77> RFBD<77>FBD<78> RFBD<78>FBD<79>FBD<91> RFBD<91>FBD<90> RFBD<90>FBD<89> RFBD<89>
FBD<94>
FBD<88> RFBD<88>
FBD<93>
RFBD<8>
FBD<12>
FBD<5>
GPU_FB GPU_FBFBA<13..0>
FBD<127..0> GPU_FBGPU_FB
FBD<92>
GPU_FBCLKFBBCLK1 FBBCLK1GPU_FBCLKGPU_FBCLKFBBCLK0_L FBBCLK0GPU_FBCLKGPU_FBCLKFBBCLK0 FBBCLK0GPU_FBCLK
55
55
54
54
54
54
54
55
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
55
55
55
55
54
55
55
55
55
55
53
55
53
53
53
53
53
53
53
53
53
53
53
53
54
53
55 53
55
55
55
53
53
53
53
53
53
53
53
53
53
53
53 53
53 53
53 54
53 53
53 53
53 53
53 53
53 54
53 53
53 54
53 54
53 53
53 53
53 53
53 53
53 53
53 53
53 53
53 54
53 54
53 54
53 54
53 54
53 54
53 54
53 53
53 53
53 54
53 54
53 53
53 53
53 53
53 53
53 54
53 53
54
53 53
53 53
53 53
53 53
53 54
53 53
53 53
53 53
53
53 53
53 53
53 54
54
53
53 54 53 53
53 54
53 54
53 54
53 54
53 54
54
53 53
53 53
53 53
53 54
53 53
53 53
53
53
53
53
53
53
53
53
53
53
53
53
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
55
55
53 55
53 55
53 55
53 55
55
55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53
53 55
53 55
53 55
53
53 55
53
53
53
53
54
53
53
53
53
53
53
53
52
52
54
52
52
52
52
52
52
52
52
52
52
52
52
52
6
53 52
53
53
53
52
52
52
54 52
54 52
54 52
52
54 52
54 52
54 52
54 52
52 6
52 6
52 53
52 6
52 6
52 6
52 6
52 53
52 6
52 53
52 53
52 6
52 6
52 6
52 6
52 6
52 6
52 6
52 53
52 53
52 53
52 53
52 53
52 53
52 53
52 6
52 6
52 53
52 53
52 6
52 6
52 6
52 6
52 53
52 6
53
52 6
52 6
52 6
52 6
52 53
52 6
52 6
52 6
6
52 6
52 6
52 53
53
52
52 53 52 6
52 53
52 53
52 53
52 53
52 53
53
52 6
52 6
52 6
52 53
52 6
52 6
52
52
52
52
55 52
55 52
55 52
55 52
55 52
55 52
55 52
55 52
52 53
52 53
52 53
52 53
52 53
52 53
52 53
52 53
52 53
52 53
52 53
52 53
52 53
52 53
52 53
52 53
52 53
52 53
52
52 53
52 53
52 53
52 53
52 53
52 53
52 53
52 53
52 53
52 53
52 53
52 53
52 53
52 53
52 53
52 53
52 53
52 53
52 53
52 53
53
53
52 53
52 53
52 53
52 53
53
53
52 53
52 53
52 53
52 53
52 53
52 53
52 53
52 53
52
52 53
52 53
52 53
52
52 53
52
6
52
52
52
52
52
52
52
52
(1 OF 2)
CKCK
CKE
RFU2RFU1
MCL
DQ31
NC
BA1
DQ26DQ27DQ28DQ29DQ30
DQ25DQ24
DQ21DQ22DQ23
DQ19DQ20
DQ14
DQ16DQ17DQ18
DQ15
DQ13DQ12DQ11
DQ9DQ10
DQ8
DQ4
DQ6DQ5
DQ7
DQ3DQ2DQ1DQ0
CSRASCASWE
BA0
DM3
DQS3
DM2DM1DM0
DQS2
DQS0DQS1
A0A1A2A3
A6A5A4
A9A8A7
A10A11
VSSQ
VSS_THERM
VSS
VDDQ
VREF
VDD
(2 OF 2)
(1 OF 2)
CKCK
CKE
RFU2RFU1
MCL
DQ31
NC
BA1
DQ26DQ27DQ28DQ29DQ30
DQ25DQ24
DQ21DQ22DQ23
DQ19DQ20
DQ14
DQ16DQ17DQ18
DQ15
DQ13DQ12DQ11
DQ9DQ10
DQ8
DQ4
DQ6DQ5
DQ7
DQ3DQ2DQ1DQ0
CSRASCASWE
BA0
DM3
DQS3
DM2DM1DM0
DQS2
DQS0DQS1
A0A1A2A3
A6A5A4
A9A8A7
A10A11
VSSQ
VSS_THERM
VSS
VDDQ
VREF
VDD
(2 OF 2)
DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL
TABLE_ALT_ITEM
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD
TABLE_ALT_ITEM
SGRAM0 & SGRAM1 MEMORY SUPPORT
DDR SDRAM A VREF
PLACE NEAR VDD PINS PLACE NEAR VDD PINS
EVENLY PLACE 0.1UF CAP & 0.01UF CAPS
805CERM
20%6.3V
10UF
2
1C5400
6.3VCERM805
20%10UF
2
1
C5401
10VCERM
0.1UF20%
402
2
1 C54020.1UF10V
402
20%
CERM2
1 C54030.1UF20%
402
10VCERM2
1 C54040.1UF20%
CERM402
10V2
1 C5405
CERM402
10V20%0.1UF
2
1 C54060.1UF20%
402CERM10V2
1 C54070.1UF20%10VCERM402
2
1 C5408
10V
402
20%
CERM
0.1UF
2
1 C54090.1UF20%10VCERM402
2
1 C54100.1UF20%10VCERM402
2
1 C5411
20%10VCERM402
0.1UF
2
1 C54120.1UF20%10V
402CERM2
1 C5413
805
20%6.3VCERM
10UF
2
1
C5414
805
20%6.3VCERM
10UF
2
1
C5415
OMIT
BGASDRAM_DDR_4MX32
L3
M10L9
M2
N3M4M3L13L12H11H4C11C4
M13
B13H2H13B2
K12K13E2D2D3C2
B8C9
B5
B9B10C13D12D13E13K3K2J2J3
B6
G2G3F2F3F12F13G12G13J12J13
C6B7
B12H3H12B3
N2N12M12M11
L2
M5N4
M8N11N10N9M9N8N7M6
M7L6
N6N5
U5400
SDRAM_DDR_4MX32BGA
OMIT
H7H6G9G8G7G6F9F8
J9J8J7J6H9H8
F7F6
E9E6D11D10D9D6D5D4
K10K5J10J5H10H5G10G5F10F5
B11B4
L10L5K9K8K7K6E10E8E7E5
N13
F11F4E12E3C12C10C8C7
K11K4J11J4G11G4
C5C3
L11L8L7L4E11E4D8D7
U5400
OMIT
BGASDRAM_DDR_4MX32
L3
M10L9
M2
N3M4M3L13L12H11H4C11C4
M13
B13H2H13B2
K12K13E2D2D3C2
B8C9
B5
B9B10C13D12D13E13K3K2J2J3
B6
G2G3F2F3F12F13G12G13J12J13
C6B7
B12H3H12B3
N2N12M12M11
L2
M5N4
M8N11N10N9M9N8N7M6
M7L6
N6N5
U5401
OMIT
SDRAM_DDR_4MX32BGA
H7H6G9G8G7G6F9F8
J9J8J7J6H9H8
F7F6
E9E6D11D10D9D6D5D4
K10K5J10J5H10H5G10G5F10F5
B11B4
L10L5K9K8K7K6E10E8E7E5
N13
F11F4E12E3C12C10C8C7
K11K4J11J4G11G4
C5C3
L11L8L7L4E11E4D8D7
U5401
402
20%10VCERM
0.1UF
2
1 C5417
MF-LF402
1/16W1%1K
2
1R5400
1%1/16WMF-LF402
1K
2
1R5401
10%0.001UF50VCERM402
2
1 C54180.001UF
CERM50V10%
402
2
1 C54190.001UF10%50VCERM402
2
1 C5420
50VCERM
0.001UF10%
402
2
1 C5421
0.001UF
402
10%50VCERM2
1 C5422
CERM50V10%
402
0.001UF
2
1 C54230.1UF
402CERM
20%10V2
1 C54240.1UF
CERM
20%10V
402
2
1 C54250.1UF
CERM
20%10V
402
2
1 C5426
CERM
20%10V
0.1UF
402
2
1 C54270.1UF
CERM
20%10V
402
2
1 C54280.1UF
CERM
20%10V
402
2
1 C5429
0.001UF
402CERM50V10%
2
1 C5430
CERM50V10%
402
0.001UF
2
1 C5431
CERM
0.001UF10%
402
50V2
1 C54320.001UF10%
402
50VCERM2
1 C5433
0.1UF20%10VCERM402
2
1 C5434 0.1UF20%10VCERM402
2
1 C5435
333S0341 2 U5400,U5401 CRITICALSDRAM,8MX32,DDR,300MHZ HYNIX128
333S0252 U5400,U5401 CRITICALSDRAM,4MX32,DDR,300MHZ2 HYNIX64
333S0251 U5400,U5401,U5500,U5501333S0290 SAMSUNG64 HYN4M G-DIE
333S0251 U5400,U5401 SAMSUNG642 CRITICALSDRAM,4MX32,DDR,300MHZ
54 102
E051-6772
SYNC_MASTER=N/A SYNC_DATE=N/A
GPU DDR SDRAM A
333S0252 U5400,U5401,U5500,U5501 SAM4M B-DIE333S0292 HYNIX64
RFBD<24>RFBD<25>
FBDQM<0>
FBARAS_L
RFBDQS<3>
FBA<1>
PP2V5_GPU
RFBD<6>
SGRAVREFSGRAVREF
FBDQM<3>
FBA<6>
FBA<4>
FBACLK1FBACLK1_L
PP2V5_GPU
FBA<3>
PP2V5_GPUPP2V5_GPU
FBA<9>FBA<8>FBA<7>
FBA<5>
RFBD<17>
RFBD<14>
FBA<11>
RFBDQS<2>
RFBD<41>RFBD<40>
RFBD<44>
RFBD<42>
RFBD<47>RFBD<45>RFBD<46>
RFBD<39>RFBD<38>
RFBD<56>RFBD<57>
RFBD<58>RFBD<59>RFBD<62>
RFBD<61>RFBD<63>
RFBD<60>
RFBD<51>RFBD<53>
RFBD<55>RFBD<54>
RFBD<32>RFBD<33>RFBD<35>
RFBD<37>RFBD<34>
RFBD<36>
RFBD<49>RFBD<50>
RFBD<48>
FBACAS_LFBARAS_L
FBAWE_L
FBACKE
RFBDQS<5>RFBDQS<7>
FBDQM<4>FBDQM<6>
FBDQM<7>FBDQM<5>
FBA<12>FBA<13>
RFBDQS<6>RFBDQS<4>
FBA<6>FBA<5>FBA<4>
FBA<8>FBA<9>
FBA<10>FBA<11>
FBA<0>FBA<1>
FBA<3>FBA<2>
FBA<12>
FBDQM<2>FBDQM<1>
RFBDQS<1>
FBA<0>
RFBD<18>RFBD<16>RFBD<19>
RFBD<22>RFBD<23>
RFBD<28>RFBD<27>
RFBD<29>RFBD<30>
RFBD<0>
RFBD<3>
RFBD<7>RFBD<5>
RFBD<4>
RFBD<9>RFBD<8>RFBD<11>RFBD<10>RFBD<12>
RFBD<15>
RFBD<26>
RFBD<31>
RFBD<1>
RFBD<2>
RFBD<13>
FBAWE_LFBACAS_L
RFBD<21>FBACS0_L
RFBD<43>RFBD<20>
RFBD<52>
FBA<2>
PP2V5_GPU
FBA<10>
RFBDQS<0>
FBACLK0
NO_TESTTP_U5400_RFU2TP_U5400_RFU1 NO_TEST
NO_TESTTP_U5401_RFU2TP_U5401_RFU1 NO_TEST
FBA<7>
PP2V5_GPU
FBA<13>
PP2V5_GPU
FBACS0_LFBACKE
FBACLK0_L
PP2V5_GPU
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MMVOLTAGE=1.25V
SGRAVREF
55
55
55 55 55
55
55
55
54
54
54
54
54
54
54 54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
53
53
53
54
53
52
53
53
53
53
53
53
52
53
52 52
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
54
54
54
54
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
54
54
53 54
53
53
52
53
53
53
52
53
52
54
54
53
52
6
6
52
52
53
52
7
6
54 54
52
52
52
52
52
7
52
7 7
52
52
52
52
53
6
52
53
53
6
53
6
6
6
6
53
6
53
53
53
53
53
53
53
53
53
53
53
53
6
6
6
6
53
6
6
53
6
52
52
52
52
53
53
52
52
52
52
52
52
53
53
52
52
52
52
52
52
52
52
52
52
52
52
52
52
53
52
6
6
6
6
6
6
53
6
6
53
6
6
53
6
6
6
6
53
6
53
6
53
6
6
6
52
52
6 52
6 53
53
52
7
52
53
52
52
7
52
7
52
52
52
7
54
(1 OF 2)
CKCK
CKE
RFU2RFU1
MCL
DQ31
NC
BA1
DQ26DQ27DQ28DQ29DQ30
DQ25DQ24
DQ21DQ22DQ23
DQ19DQ20
DQ14
DQ16DQ17DQ18
DQ15
DQ13DQ12DQ11
DQ9DQ10
DQ8
DQ4
DQ6DQ5
DQ7
DQ3DQ2DQ1DQ0
CSRASCASWE
BA0
DM3
DQS3
DM2DM1DM0
DQS2
DQS0DQS1
A0A1A2A3
A6A5A4
A9A8A7
A10A11
VSSQ
VSS_THERM
VSS
VDDQ
VREF
VDD
(2 OF 2)
(1 OF 2)
CKCK
CKE
RFU2RFU1
MCL
DQ31
NC
BA1
DQ26DQ27DQ28DQ29DQ30
DQ25DQ24
DQ21DQ22DQ23
DQ19DQ20
DQ14
DQ16DQ17DQ18
DQ15
DQ13DQ12DQ11
DQ9DQ10
DQ8
DQ4
DQ6DQ5
DQ7
DQ3DQ2DQ1DQ0
CSRASCASWE
BA0
DM3
DQS3
DM2DM1DM0
DQS2
DQS0DQS1
A0A1A2A3
A6A5A4
A9A8A7
A10A11
VSSQ
VSS_THERM
VSS
VDDQ
VREF
VDD
(2 OF 2)
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL
SGRAM0 & SGRAM1 MEMORY SUPPORT
DDR SDRAM B VREF
PLACE NEAR VDD PINS PLACE NEAR VDD PINS
EVENLY PLACE 0.1UF CAP & 0.01 UF CAPS
805CERM
20%6.3V
10UF
GPU128BIT
2
1C5500
GPU128BIT
6.3VCERM805
20%10UF
2
1
C5501
CERM402
10V20%
GPU128BIT
0.1UF
2
1 C5502GPU128BIT
0.1UF
402
20%
CERM10V2
1 C5503
10VCERM402
20%
GPU128BIT
0.1UF
2
1 C5504
CERM402
10V20%
GPU128BIT
0.1UF
2
1 C5505GPU128BIT
0.1UF
CERM402
10V20%
2
1 C5506
402CERM10V20%
GPU128BIT
0.1UF
2
1 C5507GPU128BIT
20%
402CERM10V
0.1UF
2
1 C5508GPU128BIT
0.1UF10V
402
20%
CERM2
1 C5509
402
10VCERM
20%
GPU128BIT
0.1UF
2
1 C5510
10VCERM402
20%
GPU128BIT
0.1UF
2
1 C55110.1UF20%10VCERM402
GPU128BIT
2
1 C5512GPU128BIT
CERM402
10V
0.1UF20%
2
1 C5513
805
20%6.3VCERM
10UF
GPU128BIT
2
1
C5514GPU128BIT
805
20%6.3VCERM
10UF
2
1
C5515
SDRAM_DDR_4MX32BGA
OMIT
L3
M10L9
M2
N3M4M3L13L12H11H4C11C4
M13
B13H2H13B2
K12K13E2D2D3C2
B8C9
B5
B9B10C13D12D13E13K3K2J2J3
B6
G2G3F2F3F12F13G12G13J12J13
C6B7
B12H3H12B3
N2N12M12M11
L2
M5N4
M8N11N10N9M9N8N7M6
M7L6
N6N5
U5500
BGASDRAM_DDR_4MX32
OMIT
H7H6G9G8G7G6F9F8
J9J8J7J6H9H8
F7F6
E9E6D11D10D9D6D5D4
K10K5J10J5H10H5G10G5F10F5
B11B4
L10L5K9K8K7K6E10E8E7E5
N13
F11F4E12E3C12C10C8C7
K11K4J11J4G11G4
C5C3
L11L8L7L4E11E4D8D7
U5500
BGASDRAM_DDR_4MX32
OMIT
L3
M10L9
M2
N3M4M3L13L12H11H4C11C4
M13
B13H2H13B2
K12K13E2D2D3C2
B8C9
B5
B9B10C13D12D13E13K3K2J2J3
B6
G2G3F2F3F12F13G12G13J12J13
C6B7
B12H3H12B3
N2N12M12M11
L2
M5N4
M8N11N10N9M9N8N7M6
M7L6
N6N5
U5501
SDRAM_DDR_4MX32BGA
OMIT
H7H6G9G8G7G6F9F8
J9J8J7J6H9H8
F7F6
E9E6D11D10D9D6D5D4
K10K5J10J5H10H5G10G5F10F5
B11B4
L10L5K9K8K7K6E10E8E7E5
N13
F11F4E12E3C12C10C8C7
K11K4J11J4G11G4
C5C3
L11L8L7L4E11E4D8D7
U5501
GPU128BIT
10VCERM
0.1UF
402
20%
2
1 C5517
1%
402
1/16WMF-LF
GPU128BIT
1K
2
1R5500
1/16W
GPU128BIT
1K
402MF-LF
1%
2
1R5501
GPU128BIT
0.1UF
402CERM
20%10V2
1 C55180.1UF
CERM10V
GPU128BIT
20%
402
2
1 C5519
CERM
0.1UF
402
10V20%
GPU128BIT
2
1 C5520GPU128BIT
402
10%50VCERM
0.001UF
2
1 C5521GPU128BIT
402CERM
20%0.1UF10V2
1 C5522GPU128BIT
0.1UF
402
10V20%
CERM2
1 C55230.1UF
GPU128BIT
402CERM
20%10V2
1 C5524GPU128BIT
402CERM50V10%0.001UF
2
1 C5525
10%
402
GPU128BIT
CERM50V
0.001UF
2
1 C5526
402
GPU128BIT
CERM50V10%0.001UF
2
1 C5527GPU128BIT
0.001UF
402
10%50VCERM2
1 C5528
402
50V10%0.001UF
CERM
GPU128BIT
2
1 C5529
402
50VCERM
10%
GPU128BIT
0.001UF
2
1 C5530GPU128BIT
402CERM50V10%0.001UF
2
1 C5531GPU128BIT
0.001UF
402
10%50VCERM2
1 C5532
402
50V10%
GPU128BIT
0.001UF
CERM2
1 C5533
402
0.1UF10VCERM
20%
GPU128BIT
2
1 C5534
402
0.1UF10VCERM
20%
GPU128BIT
2
1 C5535
55
051-6772 E
102
SYNC_MASTER=N/A SYNC_DATE=N/A
GPU DDR SDRAM B
333S0341 U5500,U5501SDRAM,8MX32,DDR,300MHZ CRITICAL2 HYNIX128
333S0252 SDRAM,4MX32,DDR,300MHZ CRITICAL2 U5500,U5501 HYNIX64
SDRAM,4MX32,DDR,300MHZ2333S0251 CRITICALU5500,U5501 SAMSUNG64
PP2V5_GPU
MIN_NECK_WIDTH=0.25MM
SGRBVREFVOLTAGE=1.25VMIN_LINE_WIDTH=0.5MM
NO_TESTTP_U5501_RFU1TP_U5501_RFU2 NO_TEST
NO_TESTTP_U5500_RFU1TP_U5500_RFU2 NO_TEST
FBBCLK0_LFBBCLK0
FBDQM<8>
RFBD<82>
FBBA<3>
FBBA<0>
SGRBVREF
PP2V5_GPU
FBBA<7>
FBDQM<10>
RFBD<75>
RFBD<79>RFBD<78>
RFBD<88>RFBD<89>
PP2V5_GPU
PP2V5_GPU
FBBA<12>
FBDQM<9>
RFBDQS<9>
FBBA<6>
RFBD<92>
RFBD<64>
FBBCLK1FBBCLK1_L
FBBA<1>
FBBA<3>FBBA<4>FBBA<5>FBBA<6>
FBBA<8>
FBBA<11>FBBA<11>
FBBA<2>
FBBCAS_L
FBBCS0_LFBBRAS_L
FBBWE_L
FBBCKE
RFBDQS<13>RFBDQS<15>
FBDQM<12>FBDQM<14>
FBDQM<15>FBDQM<13>
FBBA<12>FBBA<13>
FBBA<10>FBBA<9>
FBBA<7>
RFBDQS<14>RFBDQS<12>
FBBA<2>
FBBA<0>
FBBCAS_L
FBBCKEFBBCS0_LFBBRAS_L
FBBWE_L
FBDQM<11>
FBBA<10>FBBA<9>FBBA<8>
FBBA<5>
RFBDQS<8>
FBBA<1>
RFBDQS<11>
PP2V5_GPU PP2V5_GPUPP2V5_GPU
PP2V5_GPU
RFBD<72>
RFBD<112>RFBD<115>
RFBD<120>RFBD<122>
RFBD<104>RFBD<105>
RFBD<107>RFBD<108>
RFBD<106>
RFBD<110>RFBD<109>RFBD<111>
RFBD<103>RFBD<102>
RFBD<121>
RFBD<123>RFBD<126>
RFBD<125>RFBD<127>
RFBD<124>
RFBD<116>RFBD<117>
RFBD<119>RFBD<118>
RFBD<97>RFBD<96>RFBD<99>
RFBD<100>RFBD<98>
RFBD<101>
RFBD<114>RFBD<113>
RFBD<87>RFBD<73>
RFBD<94>RFBD<95>
RFBD<66>
RFBD<65>
RFBD<71>RFBD<69>
RFBD<68>RFBD<70>
RFBD<90>
RFBD<67>
RFBD<93>
RFBD<91>
RFBD<80>
RFBD<81>RFBD<83>
RFBD<77>
RFBD<74>RFBD<76>
FBBA<13>
SGRBVREF
FBBA<4>
RFBDQS<10>
RFBD<86>RFBD<85>RFBD<84>
55
55
55
55
55 55 55
55
54
55
55
54
55
54
54
55
55
55
55
55
55
55
55
55 55
55
55
55
55
55
55
55
55
55
55
55
55
55
54 54 54
54
55
55
52
53
53
53
53
53
52
53
53
52
52
53
53
53
53
53
53
53
53
53
53
53
53 53
53
55
55
55
55
55
53
53
53
53
53
53
53
53
53
53
53
55
55
55
55
55
53
53
53
53
53
53
52 52 52
52
53
53
7
55
52
52
52
53
52
52
55
7
52
52
53
53
53
53
53
7
7
52
52
53
52
53
53
52
52
52
52
52
52
52
52
52 52
52
52
52
52
52
52
53
53
52
52
52
52
52
52
52
52
52
53
53
52
52
52
52
52
52
52
52
52
52
52
52
53
52
53
7 7 7
7
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
52
55
52
53
53
53
53
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
11 - HYNIX 8MX3210 - HYNIX 4MX3201 - UNDEFINED00 - SAMSUNG 4MX32
INPUT: PANEL POWER SEQUENCING
OUTPUT: PANEL POWER SEQUENCING
Q45 D
Q45 C
Q45 B
FOR REFERENCE ONLY, ACTIONS COME FROM BOOTROMOUTPUT: GPU READS PANEL ID AND SETS THIS BIT ACCORDINGLY
0X9C3A
0X9C38
1
TMDS_EN GPIO<14>
GPIO<16>
0X9C3A
TBDTBD
0X9C39
0X9C27SYSTEM PANEL IDQ45 A
1
0
01
01INV_CUR_HI
MULTI-FUNCTION DEVICE SELECT
INV_CUR_HI
0 000 AGP8X 0.8V AD16IDSELSIGNALINGAGPMODEBUSCFG[2:0]AGP8X_DETB
GPU_GPIO<15,10>
ENABLED IN ANY FUNCTION.
00 - SINGLE FUNCTION DEVICE.
11 - TWO FUNCTION DEVICE. AGP IN BOTH FUNCTIONSIF BUSCFG PIN BASED STRAPS ARE SET TO PCI, THEN AGP WILL NOT BE
10 - TWO FUNCTION DEVICE. AGP ONLY IN FUNCTION 0
00
INTERNALPULL-DOWN
000GPIO(6:4)
0 - NORMAL OPERATIONSTRAP
1 - SHUTS THE CHIP DOWN BY NOT RESPONDING TO ANY CONFIG CYCLES
GPIO(8)
IF NO ROM ATTACHED, CONTROLS CHIP IDS. IF ROM- IDENTIFIES TYPE0X0X - NO ROM, CHG_ID=0
X1CLK_SKWE(1:0)
ROMIDCFG(3:0)
INTERNAL PULL-DOWN0
PULL-DOWNINTERNAL
11 - REFCLK 2 TAPS EARLIER THEN FEEDBACK CLOCK (ATI RECOMMENDED)
AGPFBSKEW(1:0) GPIO(1:0)
PIN
00 - 0 TAP DELAY
DESCRIPTION
01 - REFCLK 1 TAP EARLIER THEN FEEDBACK10 - REFCLK 1 TAP LATER THEN FEEDBACK
AGP 1X CLOCK FEEDBACK PHASE ADJUSTMENT WRT REFCLK (CPUCLK)00 - REFCLK SLIGHTLY EARLIER THEN FEEDBACK
CLOCK PHASE ADJUSTMENT BETWEEN X1 CLK AND X2CLK 00
PULL-DOWNINTERNAL00
DEFAULT
LCDDATA(17:16)
GPIO<7>
MEMSTRAP(1:0)
BUSCFG(2:0)
ID_DISABLE
ATI STRAPAPPLE GPIO
GPIO(3:2)
GPIO(9,13:11)
FPD_PWR_ON
Q45 A/B SUPPORT IS FOR DEVELOPMENT
01 - TWO FUNCTION DEVICE. NO AGP IN EITHER FUNCTION
MULTIFUNC(1:0)
402
10K5%1/16WMF-LF
2
1R5600
10K
402
5%1/16WMF-LF
NOSTUFF
2
1R5601
1/16W
10K
MF-LF402
5%
2
1R5602
10VCERM20%
402
0.1UF2
1 C5600
NOSTUFF
402
10K5%1/16WMF-LF
2
1R5603
MF-LF1/16W5%
47
402
21
R5620
1/16W5%
47
402MF-LF
21
R5611
MF-LF1/16W
10K
402
1%
2
1R5610SOT23-5MC74VHC1G08
5
41
2
3
U5600
5%
402
0
MF-LF1/16W
NOSTUFF
21
R5609
40210V20%CERM
0.1UF2
1 C5601
MC74VHC1G08SOT23-5
5
41
2
3
U5601
MF-LF1/16W5%
0
402
NOSTUFF
21
R5621
MF-LF1/16W5%10K
4022
1R56041/16WMF-LF5%10K
4022
1R560510K
402
5%1/16WMF-LF
2
1R5606
MF-LF1/16W5%10K
4022
1R5607
NOSTUFF
402
10K1/16WMF-LF5%
2
1R5614NOSTUFF
5%1/16WMF-LF
10K
4022
1R5612
4021/16WMF-LF
10K5%
2
1R561510K5%MF-LF4021/16W
2
1R5613
HYNIX128&HYNIX64
402
10K5%1/16WMF-LF
2
1R5618HYNIX128
MF-LF1/16W5%10K
4022
1R5616
SAMSUNG64
402
10K5%1/16WMF-LF
2
1R5619SAMSUNG64&HYNIX64
MF-LF1/16W5%10K
4022
1R5617
NOSTUFF
402
1%1/16WMF-LF
10K
2
1R5624
NOSTUFF
MF-LF1/16W
1%10K
4022
1R5623
0
NOSTUFF
MF-LF1/16W
5%
4022
1R5625
402
NOSTUFF
MF-LF5%01/16W
2
1R5626
NOSTUFF
402
10K5%1/16WMF-LF
2
1R5627
402
10K5%1/16WMF-LF
NOSTUFF
2
1R5628402
475%
1/16WMF-LF
21
R5622
402
05%
MF-LF1/16W
NOSTUFF
21
R5629
E051-6772
56 102
SYNC_MASTER=N/A SYNC_DATE=N/A
GPU STRAPS
LCD_PWM
GPU_GPIO<13>
FPD_PWR_ON
INV_CUR_HI
PCI_RESET_L
=PP3V3_AGP
GPU_GPIO<8>
GPU_GPIO<9>
GPU_GPIO<12>GPU_GPIO<11>
FPD_PWR_ON
PCI_SLOTF_GNT_L
GPU_GPIO<10>
GPU_GPIO<14>
GPU_GPIO<15>GPU_LCDDATA<17>GPU_LCDDATA<16>
=PP3V3_AGP
GPU_GPIO<16>TMDS_EN
GPU_GPIO<7>
PCI_RESET_L
=PP3V3_AGP
ATI_PWM
GPU_GPIO<0>GPU_GPIO<1>
PP3V3_GPU
LCD_PWM_U5600
PP3V3_GPUPP3V3_GPU
PP3V3_GPU
59
59
59
59
59 59
59
74
56
56
74
56
58
58 58
58
56
50
50
56
50
56
56 56
56
59
8
48
59
48
8
48
50
50 50
50
59
58
56
59
6
7
58
58
58
58
56
25
58
58
58
58
58
7
58 59
58
6
7
58
58
58
49
49 49
49
DPLUSDMINUS
HPD1
DVOMODE
LCDCNTL
A2VSSQ
A2VSSN
A2VDDQ
AVSSN
A2VDD
AVSSQ
AVDD
VSS2DIVSS1DI
VDD1DIVDD2DI
TPVSS
TPVDD
TXVSSR
TXVDDR
DDC3CLKDDC3DATA
V2SYNC
COMP_B
R2SET
H2SYNC
C_RY_G
AUXWINSTEREOSYNC
RSET
DDC1CLKDDC1DATA
VSYNC
BHSYNC
RG
DDC2CLKDDC2DATA
TX2PTX2M*
TX0M*
TX1M*TX1P
TXCM*TX0P
TXCP
NCNC
VREFG
GPIO
RSTB_MSK
TESTENPLLTESTTEST_YCLKTEST_MCLK
XTALOUTXTALIN
LCDDATA
VDDR4VDDR3
3210
23222120191817161514131211109876543210
4
1615141312111098765
3210
(5 OF 5)
EXTERNAL TMDS
CLK
TEST
NO CONNECTS
DAC2
DAC1
TMDSGND
VDD
D-D+
ALERT*/
PWM
SMBCLKSMBDA
TACH
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
NET_PHYSICAL_TYPE
NCNC
GPU THERMAL SENSOR
ROUTE SIGNALS AT 37.5 OHMS
PLACE R5821-3 & FL5900-2 NEAR MINI-VGA CONNECTOR
NC
ROUTE GND IN BETWEEN RGB SIGNALS WITH A VIA EVERY INCH
DIFFERENTIAL_PAIRNET_SPACING_TYPEELECTRICAL_CONSTRAINT_SET
DIFFERENTIAL IMPEDANCE SHOULD BE 100 OHM
NC
75MA MAX
NC
THE FREQUENCY OF THE 20" PIXEL CLOCK IS 119 MHZ
OMIT
BGARV351
AJ22
AJ29
AH28
AH25AE21AE23
AG4
AG7
AD9
AD10
AC9
AC10
AD7
AD22
AD21
AD19
AC8
AC22
AC21
AC19
AE22
AE24
AK24
AH12
AG14AG13
AF14
AF13 AK13
AH13
AK15AJ15
AH15
AJ14
AH14
AJ13
AJ12
AK12
AH27
E8
B6
AG26
AG29
AH26
AK21
AK27
AE25
AK19AK16
AJ25
AJ18AJ17
AJ16AH30
AH29
AH20
AH19
AH18
AH17
AH16
AG20AG19
AG17AG16
AG12
AF18AF17
AF16
AE18AE12
AJ9AH9
AJ8AH8
AJ7
AK7AH7
AF10AG10
AF9
AE9
AK6
AF8
AG8AE8
AF7
AE7AF6
AG6
AE6AH10
AK9
AJ6AH6
AH11AJ11
AK10
AJ10
AG25
AF12
AJ24
AJ2AH3
AK3AJ3
AF4
AH4AK4
AJ4
AF2
AF3AG2
AG1
AG3AH1
AH2
AH5AJ5
AJ27
AE10AF11AE11
AG24AG23
AE14
AE13
AF25AF24
AK22AJ23
AJ26
AD24
AH23
AH24
AF26
AF23
AJ21AH22
AF22
AH21
AG21
U4900
402
7151%1/16WMF-LF
2
1R5824
402CERM6.3V10%1UF
2
1 C5803
402
1UF10%6.3VCERM2
1 C5802NOSTUFF
CERM6.3V20%10UF
8052
1 C5800
CERM6.3V10%1UF
4022
1 C5801
5%
MF-LF
1M1/16W
4022
1R5814
1/16WMF-LF
249
1%
402
21
R5815SM-3
27.000M
31
Y5800
50V5%
603CERM
22PF2
1 C581550V5%
603CERM
22PF2
1C5814
402
1/16W1%1K
MF-LF2
1R5816
402MF-LF
1%1K
1/16W
2
1R5817
CERM10V20%0.1UF
4022
1 C5817
402
751%1/16WMF-LF
2
1R5821
1%499
402
1/16WMF-LF
2
1R5820
75
402MF-LF1/16W1%
2
1R5822751%1/16WMF-LF4022
1R5823
402
10K
MF-LF1/16W5%
2
1R5818
1/16W5%
MF-LF
0
402
21
R5819
1UF10%
CERM6.3V
4022
1 C5831NOSTUFF
805
20%
CERM
10UF6.3V2
1 C5830
1.8UH
0805
NOSTUFF
21
L5830
SM21
XW5830 1UF
402
6.3VCERM
10%2
1 C583210VCERM
20%0.1UF
4022
1 C5833
CERM10V20%0.1UF
4022
1 C5837
402
6.3VCERM
10%1UF
2
1 C5836
CERM6.3V20%10UF
805
NOSTUFF
2
1 C5835
FERR-220-OHM
0805
21
L5835
SM21
XW5835
402
6.3VCERM
10%1UF
2
1 C5841
CERM6.3V20%10UF
805
NOSTUFF
2
1 C58400805
FERR-220-OHM21
L5840
SM21
XW5840
402
6.3VCERM
10%1UF
2
1 C5846
CERM
20%10UF
805
NOSTUFF
6.3V2
1 C58450805
FERR-220-OHM21
L5845
SM21
XW5845
402
6.3VCERM
10%1UF
2
1 C5856
CERM6.3V20%10UF
805
NOSTUFF
2
1 C5855
SM21
XW5855
0805
FERR-220-OHM21
L5865
402
6.3VCERM
10%1UF
2
1 C5866
CERM6.3V20%10UF
805
NOSTUFF
2
1 C5865
SM21
XW5865
MF-LF1/16W
5%10K
4022
1R5825
SM21
XW5847
I572
I573
I574
I575
I576
I577
I578
I579
1/16W5%4.7K
SM-LF
8
1
RP58104.7K5%1/16WSM-LF
7
2
RP5810
1/16W5%4.7K
SM-LF
6
3
RP58104.7K5%1/16WSM-LF
5
4
RP5810
I589
I590
I591
MF-LF1/16W
DEVELOPMENT
751%
4022
1R5826
SOILM63CIMA
DEVELOPMENT
1
78
4
5
32
6
U5890
CERM50V5%
2200PF
603
DEVELOPMENT
2
1C5892
DEVELOPMENT
0.1UF
CERM10V20%
4022
1 C5890
CERM
DEVELOPMENT
50V5%100PF
4022
1 C5891DEVELOPMENT
402MF-LF1/16W5%10K
2
1R5892DEVELOPMENT
MF-LF1/16W5%10K
4022
1R5891
MF-LF402
1/16W5%100
2
1R5830
58
E051-6772
102
SYNC_MASTER=N/A SYNC_DATE=N/A
GPU DVI & DACS
TP_GPU_LCDDATA<3>TP_GPU_LCDDATA<4>TP_GPU_LCDDATA<5>TP_GPU_LCDDATA<6>
TP_GPU_LCDDATA<9>
PP3V3_GPU
TP_GPU_LCDDATA<8>
PP3V3_GPU
TP_GPU_GPIO<4>
GPU_GPIO<1>GPU_GPIO<0>
PP3V3_GPU
ATI_PWM
TMDS TMDS_D0GPU_TMDSGPU_TMDSTMDS_D0PGPU_TMDS TMDS_CKGPU_TMDSTMDS_CKM
PP1V8_GPU_TXVDDRVOLTAGE=1.8VMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MMVOLTAGE=1.8VPP1V8_GPU_TPVDD
MIN_NECK_WIDTH=0.25MM
GPU_VGA_37P5 GPU_VGA_37P5ANALOG_BLU
TMDS_D0GPU_TMDSGPU_TMDSTMDS_D0M
GPU_VGA_37P5GPU_VGA_37P5ANALOG_GRN
MON_DETECT
GPU_GPIO<8>
GPU_GPIO<10>
GPU_GPIO<12>
GPU_GPIO<7>TP_GPU_GPIO<6>TP_GPU_GPIO<5>
TP_GPU_GPIO<3>
GPU_GPIO<9>
GPU_GPIO<13>
TP_GPU_GPIO<2>
GPU_GPIO<11>
GPU_GPIO<14>GPU_GPIO<15>GPU_GPIO<16>
TMDS_CKP
TMDS_D0PTMDS_CKM
TMDS_D0M
ANALOG_HSYNC
I2C_GPU_MON_SDAI2C_GPU_MON_SCL
GND_GPU_AVSSQ
MON_DETECT_R
GPU_LCDCNTL<0>GPU_LCDCNTL<1>GPU_LCDCNTL<2>GPU_LCDCNTL<3>
VOLTAGE=0VMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM
GND_GPU_A2VSSN
GND_GPU_A2VSSQVOLTAGE=0VMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM
PP2V5_GPU_A2VDD
PP1V8_GPU_AVDDVOLTAGE=1.8VMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM
GND_GPU_VSSDIVOLTAGE=0VMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM
PP1V8_GPU_VDDDI
MIN_NECK_WIDTH=0.25MM
VOLTAGE=1.8VMIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
GPU_R2SETMIN_LINE_WIDTH=0.5MM
TMDS TMDS_D2GPU_TMDSGPU_TMDSTMDS_D2P
ANALOG_BLU
ANALOG_GRN
ANALOG_VSYNC
TMDS_D2GPU_TMDSGPU_TMDSTMDS_D2M
GND_GPU_AVSSQ
ANALOG_RED
TMDS_D2M
TMDS_D1P
GND_GPU_TXVSSR
MIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM
VOLTAGE=0V
PP3V3_PWRON
GPU_DIODE_PLUS
GPU_DIODE_MINUS
U5890_PWM
U5890_ALERT_L
I2C_GPU_DIODE_SCLI2C_GPU_DIODE_SDA
TP_GPU_LCDDATA<2>TP_GPU_LCDDATA<1>TP_GPU_LCDDATA<0>
TP_GPU_LCDDATA<7>
TP_GPU_LCDDATA<22>
TP_GPU_LCDDATA<20>TP_GPU_LCDDATA<21>
TP_GPU_LCDDATA<23>
TP_GPU_LCDDATA<18>TP_GPU_LCDDATA<19>
TP_GPU_LCDDATA<13>
TP_GPU_LCDDATA<10>TP_GPU_LCDDATA<11>TP_GPU_LCDDATA<12>
TP_GPU_LCDDATA<14>TP_GPU_LCDDATA<15>
GPU_LCDDATA<16>GPU_LCDDATA<17>
TMDS_D1GPU_TMDSGPU_TMDSTMDS_D1MTMDS TMDS_D1GPU_TMDSGPU_TMDSTMDS_D1P
GND_GPU_TPVSS
MIN_LINE_WIDTH=0.5MMVOLTAGE=0V
MIN_NECK_WIDTH=0.25MM
GPU_CLK27M_XOUT_R
=PP1V8_GPU
GND_GPU_AVSSNVOLTAGE=0VMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM
PP1V8_GPU_A2VDDQVOLTAGE=1.8VMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM
TMDS_D2PTMDS_D1M
I2C_GPU_TMDS_SCLI2C_GPU_TMDS_SDA
TP_DDC1DATATP_DDC1CLK
TP_HSYNCGPU_STEREOSYNC
GPU_RSET
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MM
GPU_DAC1_VSYNC
GPU_DIODE_MINUS
GPU_VREFGMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM
GPU_DIODE_PLUS
TMDS TMDS_CKGPU_TMDSGPU_TMDSTMDS_CKP
GPU_TESTENGPU_CLK27M_XOUTGPU_CLK27M_XIN
ANALOG_RED GPU_VGA_37P5GPU_VGA_37P5
59
59
59
58
58
58
27
56
56
56
59
59
59
59
59
59
59
18
59
52
59
59
50
50
50
59
58
58
59
58
59
59
59
58
59
51
59
58
58
59
58
59
59
11
58
59
51
59
58
59
58
49
49
56
56
49
56
58
6
51
50
6
58
6
6
56
56
56
56
56
56
56
56
56
56
58
58
6
58
59
59
59
58
50
58
6
6
59
58
58
6
58
58
6
58
58
18
18
56
56
6
58
50
58
6
59
59
58
58
58
6
SYM_VER-1
LCFILTER
LCFILTER
LCFILTER
SYM_VER-1
SYM_VER-1
G
D
S
G
D
S
SYM_VER-1
G
D
S
125
G
S D
G
S D
125
125
125
G
D
S
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD
QTY DESCRIPTIONPART#
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
PLACE R5901-R5904 AS CLOSE TO GPU AS POSSIBLE
20" LCD INVERTER NEED +24V.
LAMP_STS NOT USED ON Q45C
516-0114
INVERTER INTERFACE17" LCD INVERTER NEED +12V.
PIN 3 IS NC
INVERTERON Q45C
Q45A INVERTERSSO WE CAN USEDURING DEVELOPMENTLEAVING CONNECTED
NC
(RED_RTN)
(BLU_RTN)
(GRN_RTN)
(514-0201)
INTERNAL TMDS CONNECTOR
NOTE:REMOVED 2 PINS:LAMP_STATUS &ON/OFF FOR 20" LCD INVETER.
518-0141
(516S0241)
DIFFERENTIAL_PAIRNET_SPACING_TYPENET_PHYSICAL_TYPE
TABLE FOR PANEL POWER SEQUENCING (LOWER LEFT)
376S0082
SILKSCREEN: 3
EXTERNAL VGA CONNECTOR
PLACE R5821-3 & FL5900-2 CLOSE TO J5903 ON BOTTOM SIDE OF BOARD
402MF-LF
5%
33
1/16W
21
R5900
402MF-LF1/16W
5%2.0K
2
1R5905
402
16V10%
CERM
0.01UF
2
1 C5900
CERM
10%0.01UF16V
402
2
1 C590190-OHM
SM
4
32
1L5902
0.01UF
CERM
10%
402
16V2
1 C59030.01UF
402
16V10%
CERM2
1 C5904
10%
402CERM16V
0.01UF
2
1 C5905
5%50VCERM402
47PF2
1 C5978
F-ST-TH
DV01793
CRITICAL
98
76
54
32
18
17
16
15
1413
1211
10
1
J5903
5%
MF-LF402
1/16W
4.7K
2
1R59784.7K
5%
402
1/16WMF-LF
2
1R5977
47PF50V
CERM402
5%2
1C5977
NOSTUFF
SM-220MHZ
43
21
FL5902
NOSTUFF
SM-220MHZ
43
21
FL5901
NOSTUFF
SM-220MHZ
43
21
FL5900
17_INCH_LCD
603
50VCERM
20%0.01UF
2
1 C59100.01UF
603
50V20%
CERM
DEVELOPMENT
2
1 C591117_INCH_LCD
CERM25V5%220PF
603
2
1 C591217_INCH_LCD
CERM
0.01UF20%50V
603
2
1 C5913
90-OHM
SM
4
32
1L5909
90-OHMSM 4
32
1
L5910
17_INCH_LCD
603CERM
0.01UF20%50V
2
1 C5915
5%1/16WMF-LF402
10K
2
1R5914
20%
CERM402
16V
0.022UF
2 1
C5918
402CERM
0.01UF
20%16V
2 1
C5919
SOT23-LF2N7002
2
1
3
Q5901
F-ST-SM53307-3072
CRITICAL
9
87
65
4
30
3
29
2827
2625
2423
2221
20
2
19
1817
1615
1413
1211
10
1
J5902
STDOFF-118OD-181H-TH
1
SDF5900
STDOFF-118OD-181H-TH
1
SDF5901
17_INCH_LCD
SMELEC16V
10UF20%
2
1 C5921DEVELOPMENT
ELECSM
16V20%10UF
2
1 C5922
PP3V3_RUN PP12V_RUN
5%1/4W
1206
0
MF-LF
20_INCH_LCD
2
1R5922
100K
402MF-LF
5%1/16W
21
R5925
OMIT
MF-LF
5%
402
10K
1/16W
2
1 R5913
NOSTUFF021
R5932
NOSTUFF 021
R5933
NOSTUFF 021
R5931
NOSTUFF021
R5930
NOSTUFF021
R5928
NOSTUFF021
R5926
NOSTUFF 021
R5929
NOSTUFF021
R5927
SOT23MMBZ5227B
20_INCH_LCD3
1
DZ5900
NOSTUFF
5%
1206MF-LF
0
1/4W
2
1R5935
PP12V_RUNPP3V3_RUN
1206
5%0
MF-LF1/4W
NOSTUFF
2
1R5934
CERM1210
16V10%10UF
2
1 C5917
NOSTUFF
MF-LF402
100K
1/16W5%
2
1R5915 20_INCH_LCD
CERM
0.01UF20%50V
603
2
1 C5943
CERM
0.01UF20%50V
603
20_INCH_LCD
2
1 C5944
CERM
20_INCH_LCD
25V5%220PF
603
2
1 C5945
CERM
0.01UF20%50V
603
20_INCH_LCD
2
1 C5946
332
MF-LF
1%1/16W
4022
1R5903
1%
402MF-LF1/16W
332
2
1R5902
332
MF-LF
1%1/16W
4022
1R5901
1%332
MF-LF1/16W
4022
1R5904
16V
1210
10UF10%
CERM2
1 C5916
1/10WMF-LF
5%330
6032
1R5912
20_INCH_LCDCRITICAL
53048RT-S-TH
6
5
4
3
2
1
J5901
CERM50V20%1UF
1210
20_INCH_LCD
2
1 C5942NOSTUFF
1210
1UF20%50V
CERM 2
1C5947
Q5902_DRAIN
DEVELOPMENT
2N7002SOT23-LF
2
1
3
Q5902
TSOPSI3433DV
DEVELOPMENT
4
3 6
5
2
1
Q5903
DEVELOPMENT
402
5%1/16WMF-LF
100K
2
1R5916
MF-LF1/16W5%
402
200K
DEVELOPMENT
2
1R5919
1/16W
100K
DEVELOPMENT
5%
402MF-LF
21
R5920
0.1UF
CERM
20%
402
10V
DEVELOPMENT
2
1 C5920
SOT23MMBD914XXG
NOSTUFF3
1
D5901
402
DEVELOPMENT
MF-LF1/16W5%10K
2
1R5921
90-OHMSM4
3 2
1
L5908
GREEN2.0X1.25A
2
1
LED5900
IRF7410
OMIT
SO-8
321
4
8765
Q5900
0
1/4W
1206MF-LF
5%
NOSTUFF
2
1R59500
1206MF-LF1/4W5%
17_INCH_LCD
2
1R5923
402
10K5%
MF-LF1/16W
2
1R5960MMBD914XXG
SOT23
3
1D5914
33
1/16W5%
402MF-LF
21
R5906
402
2.0K5%1/16WMF-LF
2
1R590720%0.1UF
402CERM10V2
1 C5970
NOSTUFF
402
5%
CERM50V
22PF2
1 C5908
5%1/16WMF-LF
33
402
21
R5971
NOSTUFF
CERM402
22PF5%50V 2
1C5907MF-LF
5%1/16W
33
402
21
R597274LCX125
TSSOP
614
47
5
U5970
2N7002DWSOT-363
1
2
6
Q5975
2N7002DWSOT-363
4
5
3
Q5975
5%10K
402
1/16WMF-LF
2
1R5973
MF-LF1/16W5%10K
4022
1R5974
100
5%1/16WMF-LF402
21
R5975
100
402MF-LF
5%1/16W
21
R5976
CRITICAL
TSSOP
74LCX1253
14
17
2
U5970
402
0.01UF16VCERM
10%2
1 C5902
74LCX125
TSSOP
814
107
9
U5970
74LCX125
TSSOP
1114
137
12
U5970
MF-LF1/8W5%
0
805
21
R5980
MF-LF805
0
5%1/8W
21
R5981
MF-LF1/8W5%
0
805
21
R5982
805
0
17_INCH_LCD
21
R5984
17_INCH_LCD
0
805
21
R5985
DEVELOPMENT
805
021
R5986
17_INCH_LCD
0
805
21
R5987
17_INCH_LCD
0
805
21
R5988
805
20_INCH_LCD
021
R5989
0
805
20_INCH_LCD
21
R5990
805
0
20_INCH_LCD
21
R5991
805
0
20_INCH_LCD
21
R5992
I885
I886
I887
I888
I889
I890
I891
I892
I893
I894
I895
0
402
21
R5940
402
021
R5941
0
402
21
R5942
90147-1106F-ST-TH
CRITICAL17_INCH_LCD
65
4
32
1
J5900
NOSTUFF
2N7002SOT23-LF
2
1
3
Q5990
402
021
R5993
NOSTUFF
4.7K5%1/16WMF-LF4022
1R5994
EXT VGA / TMDS AND INVERTERSYNC_DATE=N/ASYNC_MASTER=N/A
051-6772 E
59 102
1 20_INCH_LCD376S0225 XSTR,MOSFET,P-CH,0.02OHM Q5900
1376S0082 Q5900 17_INCH_LCDXSTR,MOSFET,P-CH,0.007OHM
1 R5913 17_INCH_LCDRES,10K OHM,1/16W,5%,0402116S0090
R59131116S0114 20_INCH_LCDRES,100K OHM,1/16W,5%,0402
PPVCC_FPD
VOLTAGE=3.3VMIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
FPD_PWR_SW_G
Q5901_G
FPD_PWR_SW_S
MIN_LINE_WIDTH=0.6MMVOLTAGE=3.3V MIN_NECK_WIDTH=0.3MM
FPD_PWR_ON
PP3V3_ALL
I2C_GPU_MON_SDA
PP3V3_GPU
I2C_GPU_TMDS_SDA
PP3V3_GPU PP3V3_DDC
FILT_ANALOG_BLUFILT_ANALOG_GRNFILT_ANALOG_RED
I2C_MON_SDA_R
SYS_SLEEP
I2C_MON_SCL_R
GND_CHASSIS_VGA
I2C_MON_SCL
GND_CHASSIS_VGA
PPVCC_TMDS
FPD_PWR_ON_D
TMDS_EN
TMDS_EN_R
PP3V3_ALL
GPU_TMDSTD0M TD0GPU_TMDSTD1P GPU_TMDSGPU_TMDS TD1
=PP3V3_AGP
TMDS_D0M
FPD_PWR_ON LED5900_PWR
LED5900_P1
VGA_VSYNC
ANALOG_RED
VGA_HSYNC_R
GPU_VGA_75 GPU_VGAFILT_ANALOG_BLUGPU_VGAGPU_VGA_75FILT_ANALOG_REDGPU_VGAGPU_VGA_75FILT_ANALOG_GRNGPU_TMDSTD2M TD2GPU_TMDSGPU_TMDSTD2P TD2GPU_TMDSGPU_TMDSTD1M TD1GPU_TMDS
TD0P TD0GPU_TMDS GPU_TMDSGPU_TMDS GPU_TMDSTCKM TCKGPU_TMDS GPU_TMDSTCKP TCK
GND_CHASSIS_VGA
=PP12V_AGP
=PP5V_AGP
I2C_MON_SDA
I2C_GPU_MON_SCL
PP5V_VGA
=PP3V3_AGP
PP5V_VGAI2C_MON_SDA_R
INV_20_LCD_PWM_MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=2MMVOLTAGE=0V GND_20_INV
ANALOG_GRN
ANALOG_BLU
VGA_HSYNC
GND_CHASSIS_VGA
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MM
PPVCC_TMDSVOLTAGE=3.3V
I2C_TMDS_SDA
TD2M
INV_20_CUR_HI_F
INV_CUR_HI
LCD_PWM
=PP24V_GRAPHICS
VGA_VSYNC_RVGA_HSYNC_R
VGA_VSYNC_RANALOG_VSYNC
ANALOG_HSYNC
TD0P
GND_CHASSIS_20_INCH_INVERTER
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MM
PP3V3_DDCVOLTAGE=3.3V
GND_CHASSIS_TMDS
TD2PTD1M
TCKPTCKM
I2C_TMDS_SCL
TD1P
TD0MTD0P
I2C_MON_SCL_RMON_DETECT
TMDS_D1P
I2C_GPU_TMDS_SCL I2C_TMDS_SCL
I2C_TMDS_SDA
Q5903_GATE
=PP12V_AGP
Q5902_GATE
LCD_PWM
INV_CUR_HI
GND_CHASSIS_17_INCH_INVERTER
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=2MMPP5V_AGP_P_SEQ
PP5V_USB2
MIN_LINE_WIDTH=0.6MMVOLTAGE=5VPP5V_VGA
MIN_NECK_WIDTH=0.25MM
INV_17_CUR_HI_F
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=2MMVOLTAGE=5V PP5V_AGP_RL
VOLTAGE=12VMIN_LINE_WIDTH=2MMMIN_NECK_WIDTH=0.25MM
PP12V_INV
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=2MMVOLTAGE=0V GND_17_INV
INV_17_LCD_PWM_F
TMDS_D2M
TD0M
TCKP
TMDS_D0P
TMDS_CKM
TMDS_CKP
TCKM
TD1P
TD1M
TD2M
TMDS_D1M
TD2P
TMDS_D2P
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=2MMVOLTAGE=24V PP24V_INV
50
46 22
59
59
11
59
59
58
58
10
56
56
59
56
56
9
59
50
59
50
59
59
11
50
50 59
8
59
59
59
11
59
59
48
59
58
59
59
59
59
59
59
59
59
59
50
50
48
58
58
59
59
59
59
59
59
59 59
59
59
59
7
59
59
59
59
59
59
58
59
59
50
59
59
59
59
58
59
59
58
59
56
7
58
49
58
49 6
59
6
59
7
7
6
56
7
6
6
7
58
56
6
6
6
6
6
6
6
59
6
59
6
7
7
7
58
59
7
59
59
6
6
6
6
7
6
6
6
6
56
56
7
6 6
6 58
58
6
7
6
6
6
59
6
59
6
6
6
6
59
6
58
58 6
6
7
56
56
7
92 59
6
6
6
6
58
6
6
58
6
58
59
6
59
6
6
6
58
6
HT_CTL_TXN0
HT_CTL_TXP0
HT_CTL_RXN0
HT_CTL_RXP0
HT_CLK_RXN0HT_CLK_RXP0
HT_CLK_TXN0HT_CLK_TXP0(SYM 5 OF 7)
INTERFACEHT
HT_LDTREQ*
HT_LDTSTOP*HT_RESET*
HT_PWROK
HT_CAD_RXN7
HT_CAD_RXP7HT_CAD_RXN6
HT_CAD_RXN1
HT_CAD_RXN5HT_CAD_RXP5
HT_CAD_RXP6
HT_CAD_RXN4HT_CAD_RXP4
HT_CAD_RXN3
HT_CAD_RXP3HT_CAD_RXN2
HT_CAD_RXP2
HT_CLK
HT_CAD_RXP0
HT_CAD_RXN0
HT_CAD_RXP1
HT_PVTREF1
HT_PVTREF0
HT_CAD_TXP7
HT_CAD_TXN7
HT_CAD_TXN6
HT_CAD_TXN1
HT_CAD_TXN5
HT_CAD_TXN4
HT_CAD_TXP2
HT_CAD_TXP3
HT_CAD_TXP4
HT_CAD_TXN2
HT_CAD_TXN3
HT_CAD_TXP5
HT_CAD_TXP6
HT_CAD_TXN0
HT_CAD_TXP1
HT_CAD_TXP0
HT_CLK_AVSS
AVDDHT_CLK VDD_HT VDD_HT
2_5 1_2
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
ELECTRICAL_CONSTRAINT_SET NET_PHYSICAL_TYPE NET_SPACING_TYPE
HT_SB_TO_NB
10 MIL SPACING TO ANYTHING ELSE5 MIL SPACING FOR DIFF PAIR
HT_NB_TO_SB
LENGTH TOLERENCE CAN BE LOOSE
8 MIL SPACING TO ANYTHING ELSE
MATCHED GROUP CONSTRAINT IS TIGHT ENOUGH
HT_2V5
4 MIL SPACING IN GROUP
DIFFERENTIAL_PAIR
402
0.1UF20%10VCERM2
1 C6006
CERM10V20%0.1UF
4022
1 C6005
402
0.1UF20%10VCERM2
1 C6004
402
0.1UF20%10VCERM2
1 C6002
CERM10V20%0.1UF
4022
1 C60010.1UF
CERM402
20%10V2
1 C6000
CERM10V20%0.1UF
4022
1 C6007
CERM10V20%0.1UF
4022
1 C6008
0.1UF20%10VCERM402
2
1 C6012
2.2
603MF-LF1/10W5%
21
R6000
402CERM
10%6.3V
1UF2
1 C6013
402
0.1UF20%10VCERM2
1 C601110V20%
402CERM
0.1UF2
1 C6010
402MF-LF1/16W1%200
2
1R6001
402MF-LF1/16W5%1K
2
1R60021K5%1/16WMF-LF4022
1R6003
402MF-LF1/16W5%1K
2
1R6004
402MF-LF1/16W5%1K
2
1R6005
I46
I47
I48
I49
I50
I51
I52
I53
I54
I55
I56
I57
I58
I59
I60
I61
I62
I63
I64
I65
I66
I67
I68
I69
I70
I71
I72
I73
I74
I75
I76
I77
I78
I79
I80
I81
I82
I83
I84
I85
I86
I87
I88
I89
OMIT
U3LITEV1.0-300MM
PBGA
G6
J10
L9
N10
N6N2
R9
T8T4
G9
F9
L8
L7H8
H7
L6
L5
V2
V1
R7
R8
N1
P1
G8
F8
H9
M7
M5
P6
P8
R5
U4
U6
U8
M8
M6
P5
P7
R6
U3
U5
U7
U1
R1
R3
P2
M2
M4
L3
L1
U2
T1
R2
P3
M1
M3
L4
L2
U3
E
60 102
051-6772
SYNC_MASTER=N/A SYNC_DATE=N/A
U3LITE HT
VOLTAGE=1.5VPP1V5_PWRON_HT_NB_AVDD
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
HT_2V5HT_PWROK HT_2V5HT_PWROK
HT_2V5HT_CTL HT_2V5HT_LDTSTOP_L
HT_2V5HT_CTLHT_LDTREQ_L HT_2V5
=PP1V5_PWRON_NB_AVDD
=PP2V5_HT
=PP2V5_HT
HT_NB_TO_SB_CTL_NHT_NB_TO_SB_CTL_P
HT_SB_TO_NB_CTL_NHT_SB_TO_NB_CTL_P
HT_SB_TO_NB_CLK_NHT_SB_TO_NB_CLK_P
HT_NB_TO_SB_CLK_NHT_NB_TO_SB_CLK_P
HT_NB_TO_SB_CAD_P<0>HT_NB_TO_SB_CAD_N<0>HT_NB_TO_SB_CAD_P<1>
HT_NB_TO_SB_CAD_P<3>HT_NB_TO_SB_CAD_N<3>
HT_NB_TO_SB_CAD_N<2>HT_NB_TO_SB_CAD_P<2>HT_NB_TO_SB_CAD_N<1>
HT_NB_TO_SB_CAD_P<4>HT_NB_TO_SB_CAD_N<4>HT_NB_TO_SB_CAD_P<5>HT_NB_TO_SB_CAD_N<5>HT_NB_TO_SB_CAD_P<6>
HT_NB_TO_SB_CAD_P<7>HT_NB_TO_SB_CAD_N<7>
HT_NB_TO_SB_CAD_N<6>
HT_NB_PVTREF0HT_NB_PVTREF1
HT_CLK66M_NB
HT_SB_TO_NB_CAD_P<1>HT_SB_TO_NB_CAD_N<0>HT_SB_TO_NB_CAD_P<0>
HT_SB_TO_NB_CAD_N<3>HT_SB_TO_NB_CAD_P<3>HT_SB_TO_NB_CAD_N<2>HT_SB_TO_NB_CAD_P<2>
HT_SB_TO_NB_CAD_P<6>HT_SB_TO_NB_CAD_N<5>HT_SB_TO_NB_CAD_P<5>HT_SB_TO_NB_CAD_N<4>
HT_SB_TO_NB_CAD_N<6>HT_SB_TO_NB_CAD_P<7>HT_SB_TO_NB_CAD_N<7>
HT_PWROK
HT_LDTSTOP_LHT_RESET_L
HT_LDTREQ_L
=PP2V5_HT
=PP1V2_HT
HT_SB_TO_NB_CAD_P<4>
HT_SB_TO_NB_CAD_N<1>
=PP1V2_HT
HT_CADHT_SB_TO_NB_CAD_P<2> HT_SB_TO_NB_CAD2HT_SB_TO_NB HT_SB_TO_NB
HT_CADHT_SB_TO_NB_CAD_N<6> HT_SB_TO_NB_CAD6HT_SB_TO_NB HT_SB_TO_NB
HT_CAD HT_NB_TO_SB_CTLHT_NB_TO_SB_CTL_N HT_NB_TO_SB HT_NB_TO_SB
HT_CADHT_NB_TO_SB HT_NB_TO_SB_CAD1HT_NB_TO_SB_CAD_P<1> HT_NB_TO_SB
HT_CADHT_NB_TO_SB HT_NB_TO_SB_CAD4HT_NB_TO_SB_CAD_P<4> HT_NB_TO_SB
HT_CADHT_SB_TO_NB HT_SB_TO_NB_CLKHT_SB_TO_NB_CLK_N HT_SB_TO_NB
HT_CAD HT_SB_TO_NB_CAD0HT_SB_TO_NB_CAD_P<0> HT_SB_TO_NB HT_SB_TO_NB
HT_CADHT_SB_TO_NB_CAD_N<3> HT_SB_TO_NB_CAD3HT_SB_TO_NB HT_SB_TO_NB
HT_CADHT_NB_TO_SB HT_NB_TO_SB_CAD0HT_NB_TO_SB_CAD_N<0> HT_NB_TO_SB
HT_CADHT_NB_TO_SB HT_NB_TO_SB_CLKHT_NB_TO_SB_CLK_N HT_NB_TO_SBHT_CAD HT_NB_TO_SB_CTLHT_NB_TO_SB_CTL_P HT_NB_TO_SB HT_NB_TO_SB
HT_CADHT_NB_TO_SB HT_NB_TO_SB_CAD0HT_NB_TO_SB_CAD_P<0> HT_NB_TO_SB
HT_CAD HT_SB_TO_NB_CAD0HT_SB_TO_NB_CAD_N<0> HT_SB_TO_NB HT_SB_TO_NB
HT_CADHT_SB_TO_NB_CTL_N HT_SB_TO_NB_CTLHT_SB_TO_NB HT_SB_TO_NB
HT_CADHT_NB_TO_SB HT_NB_TO_SB_CAD7HT_NB_TO_SB_CAD_N<7> HT_NB_TO_SBHT_CADHT_NB_TO_SB HT_NB_TO_SB_CAD7HT_NB_TO_SB_CAD_P<7> HT_NB_TO_SBHT_CADHT_NB_TO_SB HT_NB_TO_SB_CAD6HT_NB_TO_SB_CAD_N<6> HT_NB_TO_SB
HT_CADHT_SB_TO_NB_CAD_P<6> HT_SB_TO_NB_CAD6HT_SB_TO_NB HT_SB_TO_NB
HT_CADHT_NB_TO_SB HT_NB_TO_SB_CAD5HT_NB_TO_SB_CAD_N<5> HT_NB_TO_SB
HT_CADHT_NB_TO_SB HT_NB_TO_SB_CAD3HT_NB_TO_SB_CAD_P<3> HT_NB_TO_SBHT_CADHT_NB_TO_SB HT_NB_TO_SB_CAD2HT_NB_TO_SB_CAD_N<2> HT_NB_TO_SBHT_CADHT_NB_TO_SB HT_NB_TO_SB_CAD2HT_NB_TO_SB_CAD_P<2> HT_NB_TO_SBHT_CADHT_NB_TO_SB_CAD_N<1> HT_NB_TO_SB HT_NB_TO_SB_CAD1HT_NB_TO_SB
HT_CADHT_NB_TO_SB HT_NB_TO_SB_CAD5HT_NB_TO_SB_CAD_P<5> HT_NB_TO_SB
HT_CADHT_SB_TO_NB HT_SB_TO_NB_CLKHT_SB_TO_NB_CLK_P HT_SB_TO_NB
HT_CADHT_SB_TO_NB_CAD_P<1> HT_SB_TO_NB_CAD1HT_SB_TO_NB HT_SB_TO_NB
HT_CADHT_SB_TO_NB_CAD_P<7> HT_SB_TO_NB_CAD7HT_SB_TO_NB HT_SB_TO_NB
HT_CADHT_SB_TO_NB_CTL_P HT_SB_TO_NB_CTLHT_SB_TO_NB HT_SB_TO_NB
HT_CADHT_NB_TO_SB HT_NB_TO_SB_CAD6HT_NB_TO_SB_CAD_P<6> HT_NB_TO_SB
HT_CADHT_NB_TO_SB HT_NB_TO_SB_CAD3HT_NB_TO_SB_CAD_N<3> HT_NB_TO_SB
HT_CADHT_NB_TO_SB HT_NB_TO_SB_CAD4HT_NB_TO_SB_CAD_N<4> HT_NB_TO_SB
HT_CADHT_SB_TO_NBHT_SB_TO_NB_CAD_N<1> HT_SB_TO_NB_CAD1HT_SB_TO_NB
HT_CADHT_SB_TO_NB_CAD_P<4> HT_SB_TO_NB_CAD4HT_SB_TO_NB HT_SB_TO_NB
HT_CADHT_SB_TO_NBHT_SB_TO_NB_CAD_P<5> HT_SB_TO_NB_CAD5HT_SB_TO_NBHT_CADHT_SB_TO_NB_CAD_N<4> HT_SB_TO_NB_CAD4HT_SB_TO_NB HT_SB_TO_NB
HT_CADHT_SB_TO_NB_CAD_N<5> HT_SB_TO_NB_CAD5HT_SB_TO_NB HT_SB_TO_NB
HT_CADHT_SB_TO_NB_CAD_P<3> HT_SB_TO_NB_CAD3HT_SB_TO_NB HT_SB_TO_NBHT_CADHT_SB_TO_NB_CAD_N<2> HT_SB_TO_NB_CAD2HT_SB_TO_NB HT_SB_TO_NB
HT_CADHT_NB_TO_SB HT_NB_TO_SB_CLKHT_NB_TO_SB_CLK_P HT_NB_TO_SB
HT_2V5HT_CTLHT_RESET_L HT_2V5
HT_CADHT_SB_TO_NB_CAD_N<7> HT_SB_TO_NB_CAD7HT_SB_TO_NB HT_SB_TO_NB
48
64
64
64
37
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
60
64
64
60
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
62
62
62
28
60
60
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
60
24
62
62
24
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
60
60
60
7
7
7
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
27
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
7
7
60
60
7
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
SEL_HT00_H
HT_S100M66M
HT_CTLOUT_NHT_CTLOUT_P
HT_CTLIN_NHT_CTLIN_P
HT_LDTSTOP_LHT_RESET_L
HT_LDTREQ_L
HT_RXVDDHTHT_PLLVDDPDVDDAVDD
HT_CADIN_7_P
HT_CADIN_7_N
HT_PWROK_H
HT_CADIN_6_N
HT_CADIN_3_P
HT_CADIN_3_NHT_CADIN_4_P
HT_CADIN_4_NHT_CADIN_5_P
HT_CADIN_5_N
HT_CADIN_6_P
HT_CADIN_2_NHT_CADIN_2_P
HT_CADIN_1_N
HT_CADIN_1_P
HT_CLKIN_N
HT_CLKIN_P
HT_CADIN_0_P
HT_CADIN_0_N
AGND DGNDHT_PLL
HT_RXGND
HT_CADOUT_7_P
HT_CADOUT_7_N
HT_TXGND
HT_R100N
HT_R100P
HT_CADOUT_6_NHT_CADOUT_6_P
HT_CADOUT_5_N
HT_CADOUT_5_PHT_CADOUT_4_N
HT_CADOUT_4_PHT_CADOUT_3_N
HT_CADOUT_3_P
HT_CADOUT_2_NHT_CADOUT_2_P
HT_CADOUT_1_N
HT_CADOUT_1_PHT_CADOUT_0_N
HT_CADOUT_0_P
HT_CLKOUT_N
HT_CLKOUT_P(3 OF 8)
HT_TXVDD
HT_REFCLK
HYPERTRANSPORT
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
ELECTRICAL_CONSTRAINT_SET
Page Notes- _PP2V5_PWRON_HT
Signal aliases required by this page:
BOM options provided by this page:
DIFFERENTIAL_PAIR
(NONE)
0 = 66MHz
HT RefClk
1 = 100MHz
HT I/F Speed
1 = 100MHz0 = 200MHz
1.0V pk-pk
- _PP1V2_PWRON_HT
AC coupled
NET_SPACING_TYPE
Power aliases required by this page:
- SB_HT_200M Stuffs resistor to select 200MHz HT I/F.
0.1uF
402CERM10V20%
2
1 C623120%10VCERM402
0.1uF2
1 C6230
20%10VCERM402
0.1uF2
1 C6220
1K
402MF-LF1/16W
5%
SB_HT_200M
2
1R6251
OMIT
SHASTABGAV1.0
B19
V6
G11
B9
B12
G10
A9
A12
D8
G13
B17
B15
G12
A17
A15
C18
C8 E10
F10
E16
B6
A6
C7
C6
E17 A19
C13
D13
F13
E13
B10
A10
D15
C15
A13B13
E12F12
C12
D12
A11
B11
D11C11
E11
F11
B8
A8
D10
C10
B14A14
E14F14
D14
C14
B16
A16
D16C16
F15
E15
B18
A18
D17
C17
U2300
20%10VCERM402
0.1uF21
C6255
402
1/16WMF-LF
1%332
2
1R6255
1/8WMF-LF805
3.3
5%
21
R6200
5%1/8WMF-LF805
3.321
R6210
5%1/16WMF-LF
402
10K
2
1R6254
10uF20%
1206CERM6.3V2
1 C62006.3V
402CERM
10%1uF
2
1 C6201
10%
CERM402
1uF6.3V2
1 C621120%6.3VCERM1206
10uF2
1 C6210
5%50V
CERM402
47pF2
1C62505%50VCERM402
47pF2
1 C62511/16WMF-LF402
1%
82.521
R6250
NO STUFF
4.7K
402MF-LF1/16W
5%
2
1R6252
4.7K
402
5%1/16WMF-LF
2
1R6253
20%10VCERM402
0.1uF2
1 C624010V
402
0.1uF20%
CERM2
1 C6241
402CERM10V20%0.1uF
2
1 C6242
20%10VCERM402
0.1uF2
1 C6232
62 102
E051-6772
SYNC_MASTER=N/A SYNC_DATE=N/A
Shasta HyperTransport
HT_CLK66M_SB_C
HT_NB_TO_SB_CAD_P<0>HT_NB_TO_SB_CAD_N<0>
HT_NB_TO_SB_CTL_N
HT_SB_TO_NB_CAD_P<3>
HT_RESET_L
HT_SB_TO_NB_CTL_PHT_NB_TO_SB_CTL_P
HT_SB_TO_NB_CAD_P<6>HT_SB_TO_NB_CAD_N<5>
HT_SB_TO_NB_CAD_P<7>HT_SB_TO_NB_CAD_N<6>HT_NB_TO_SB_CAD_N<6>
HT_NB_TO_SB_CAD_N<7>
HT_NB_TO_SB_CAD_P<6>HT_NB_TO_SB_CAD_N<5>HT_NB_TO_SB_CAD_P<5>HT_NB_TO_SB_CAD_N<4>HT_NB_TO_SB_CAD_P<4>
HT_NB_TO_SB_CAD_P<3>HT_NB_TO_SB_CAD_N<3>
HT_NB_TO_SB_CAD_N<1>
HT_NB_TO_SB_CAD_N<2>HT_NB_TO_SB_CAD_P<2>
HT_NB_TO_SB_CLK_N
HT_NB_TO_SB_CAD_P<1>
HT_NB_TO_SB_CLK_P
HT_SB_TO_NB_CAD_P<5>
HT_SB_TO_NB_CAD_P<4>HT_SB_TO_NB_CAD_N<4>
HT_SB_TO_NB_CAD_N<3>
HT_SB_TO_NB_CAD_N<1>HT_SB_TO_NB_CAD_P<2>HT_SB_TO_NB_CAD_N<2>
HT_SB_TO_NB_CAD_P<1>HT_SB_TO_NB_CAD_N<0>
HT_SB_TO_NB_CLK_N
HT_SB_TO_NB_CAD_P<0>
HT_SB_TO_NB_CLK_P
HT_CLK66M_SBSB_HT_R100_N
=PP1V2_PWRON_HT
HT_LDTREQ_L
HT_SB_TO_NB_CTL_N
HT_SB_TO_NB_CAD_N<7>
HT_LDTSTOP_L
HT_PWROK
SB_SELHT100
=PP1V2_PWRON_HT
SB_HT_S100M66M
HT_NB_TO_SB_CAD_P<7>
SB_HT_R100_P
=PP1V2_PWRON_HT
=PP2V5_PWRON_HT
HT_CLK66M_SB_CP25MM
MIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MMVOLTAGE=1.2V
PP1V2_PWRON_HT_PLLDVDD
VOLTAGE=1.2VMIN_NECK_WIDTH=0.3MM
PP1V2_PWRON_HT_PLLAVDD
MIN_LINE_WIDTH=0.5MM
=PP1V2_PWRON_HT
64
64
64
64
64
64 64
64
64
64
64 64
64
64
64
64
64
64
64
64
64
64
64
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64
64
64
64
64
64
64
64
64
64
64
64
64
64
62
64
64
64
64
64
62
64
62
62
62
60
60
60
60
60
60 60
60
60
60
60 60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
27
7
60
60
60
60
60
7
60
7
7
62
7
GND
GND
GND
GND
GND
GND
CLK+
GND
CLK-
GND
GND
SYM_VER1
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
GND
GND
GND
GND
GND
GND
CLK+
GND
CLK-
GND
GND
SYM_VER1
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
GND
GND
GND
GND
GND
GND
CLK+
GND
CLK-
GND
GND
SYM_VER1
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
SAME CONNECTORS & PINOUT AS
Q37 HYPERTRANSPORT BETWEEN GOLEM AND K2
ST-SM-DFP6860
NOSTUFF
B3
B6
B9
B12A13
A10
A7
A4
A1
B1
B4
B7
B10
A15
A12
A9
A6
A3
B2
B5
B8
B11
A14
A11
A8
A5
A2
J6401
DEVELOPMENT
10K5%1/16WMF-LF4022
1R6401
DEVELOPMENT
5%MF-LF4021/16W
10K
2
1R6402
6031/10W5%
0
NOSTUFF
21
R6403
603
0
5%1/10WMF-LF
NOSTUFF
21
R6404
NOSTUFF
P6860ST-SM-DF
B3
B6
B9
B12A13
A10
A7
A4
A1
B1
B4
B7
B10
A15
A12
A9
A6
A3
B2
B5
B8
B11
A14
A11
A8
A5
A2
J6400
NOSTUFF
0
5%1/10WMF-LF603
21
R6400
NOSTUFF
ST-SM-DFP6860
B3
B6
B9
B12A13
A10
A7
A4
A1
B1
B4
B7
B10
A15
A12
A9
A6
A3
B2
B5
B8
B11
A14
A11
A8
A5
A2
J6402
10264
051-6772 E
SYNC_MASTER=N/A SYNC_DATE=N/A
HT DEBUG CONN
HT_VREF_DEBUGVOLTAGE=1.25VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
TEK_HT_A9
TEK_HT_A10
TEK_HT_A7
TEK_HT_A12
HT_SB_TO_NB_CLK_P
HT_LDTSTOP_L
HT_NB_TO_SB_CTL_P
HT_SB_TO_NB_CAD_N<2>
HT_SB_TO_NB_CAD_P<4>
HT_SB_TO_NB_CAD_P<6>
HT_SB_TO_NB_CTL_P
HT_SB_TO_NB_CAD_P<2>
HT_SB_TO_NB_CAD_N<4>
HT_SB_TO_NB_CAD_N<6>
HT_SB_TO_NB_CTL_N
HT_SB_TO_NB_CAD_N<0>
HT_SB_TO_NB_CAD_P<0>
HT_SB_TO_NB_CAD_P<1>
HT_SB_TO_NB_CAD_P<3>
HT_SB_TO_NB_CAD_N<3>
HT_SB_TO_NB_CAD_N<5>
HT_SB_TO_NB_CAD_P<5>
HT_SB_TO_NB_CAD_N<7>
HT_SB_TO_NB_CAD_P<7>
HT_NB_TO_SB_CAD_P<6>
HT_NB_TO_SB_CAD_N<4>
HT_NB_TO_SB_CAD_N<2>
HT_NB_TO_SB_CAD_N<0>
HT_NB_TO_SB_CAD_N<6>
HT_NB_TO_SB_CAD_P<4>
HT_NB_TO_SB_CAD_P<2>
HT_NB_TO_SB_CAD_P<0>
HT_NB_TO_SB_CLK_P
HT_NB_TO_SB_CLK_N
HT_NB_TO_SB_CAD_N<7>
HT_NB_TO_SB_CAD_P<7>
HT_NB_TO_SB_CAD_N<5>
HT_NB_TO_SB_CAD_P<5>
HT_NB_TO_SB_CAD_P<3>
HT_NB_TO_SB_CAD_N<3>
HT_NB_TO_SB_CAD_P<1>
HT_NB_TO_SB_CAD_N<1>
TEK_HT_B10
TEK_HT_B12
HT_PWROK
HT_SB_TO_NB_CLK_N
HT_RESET_L
HT_LDTREQ_L
HT_NB_TO_SB_CTL_N
HT_SB_TO_NB_CAD_N<1>
=PP2V5_HT
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
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62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
60
6
6
6
6
6
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
6
6
60
60
60
60
60
60
7
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
PLACE CLOSE TO SHASTA
R PAKS ARE PIN SWAPPABLE ACROSS ALL SIGNALS (EXCEPT IDSELS)
ALL RESISTOR PACKS ARE 47 OHM 1/16W 5%
AD<17> IS IDSEL FOR AIRPORTAD<27> IS IDSEL FOR USB
4772RP7303
4754RP7303
4772RP7309
4781RP7300
4754RP73094763RP7300
4754RP7300
4772RP7301
4754RP73014781RP7301
4781RP7309
4763RP7309
4781RP73074763RP7301
4781RP7308
4763RP7306
4781RP7305
4772RP7305
4781RP7302
4763RP7302
4781RP7304
4754RP7306
4763RP7305
4772RP7302
4754RP7304
4754RP7302
4772RP7304
4763RP7303
4772RP7306
4754RP7305
4763RP7304
4781RP7306
4754RP7307
4763RP7307
4763RP7308
4754RP7308
4772RP7308
4772RP7307402
5%1/16W
47
MF-LF
21
R7300
402
47
5%1/16WMF-LF
21
R7301
4772RP7300
4781RP7303
10273
E051-6772
SYNC_MASTER=N/A SYNC_DATE=N/A
PCI SERIES TERMINATION
PCI_SB_AD<17>
PCI_SB_CBE_L<2>
PCI_SB_AD<10>
PCI_SB_AD<14>
PCI_SB_AD<18>
PCI_TRDY_L
PCI_CBE_L<2>
PCI_AD<17>
PCI_SB_AD<27> PCI_AD<27>
PCI_PARPCI_SB_PAR
PCI_IRDY_LPCI_SB_IRDY_L
PCI_DEVSEL_LPCI_SB_DEVSEL_LPCI_FRAME_LPCI_SB_FRAME_L
PCI_STOP_LPCI_SB_STOP_LPCI_SB_TRDY_L
PCI_CBE_L<3>PCI_SB_CBE_L<3>
PCI_CBE_L<0>PCI_SB_CBE_L<0>PCI_CBE_L<1>PCI_SB_CBE_L<1>
PCI_AD<30>PCI_SB_AD<30>PCI_AD<31>PCI_SB_AD<31>
PCI_AD<29>PCI_SB_AD<29>PCI_AD<28>PCI_SB_AD<28>
PCI_AD<26>PCI_SB_AD<26>
PCI_AD<22>PCI_SB_AD<22>PCI_AD<23>PCI_SB_AD<23>PCI_AD<24>PCI_SB_AD<24>PCI_AD<25>PCI_SB_AD<25>
PCI_AD<21>PCI_SB_AD<21>
PCI_AD<19>PCI_SB_AD<19>PCI_AD<20>PCI_SB_AD<20>
PCI_AD<18>
PCI_SB_AD<0> PCI_AD<0>PCI_SB_AD<1> PCI_AD<1>
PCI_SB_AD<3> PCI_AD<3>PCI_SB_AD<2> PCI_AD<2>
PCI_SB_AD<4> PCI_AD<4>PCI_SB_AD<5> PCI_AD<5>PCI_SB_AD<6> PCI_AD<6>PCI_SB_AD<7> PCI_AD<7>PCI_SB_AD<8> PCI_AD<8>PCI_SB_AD<9> PCI_AD<9>
PCI_SB_AD<11> PCI_AD<11>PCI_AD<10>
PCI_SB_AD<12> PCI_AD<12>PCI_SB_AD<13> PCI_AD<13>
PCI_AD<14>PCI_SB_AD<15> PCI_AD<15>PCI_SB_AD<16> PCI_AD<16>
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74
6
6
6
74 6
6 74
6 74
6 74
6 74
6 74
74
6 74
6 74
6 74
6 74
6 74
6 74
6 74
6 74
6 74
6 74
6 74
6 74
6 74
6 74
6 74
6
74 6
74 6
74 6
74 6
74 6
74 6
74 6
74 6
74 6
74 6
74 6
6
74 6
74 6
6
74 6
74 6
PCI
(4 OF 8)
PCI1CLK_H
PCIBR_CLK_H
PCI1PAR_H
PCI1AD_31_HPCI1AD_30_H
PCI1AD_29_H
PCI1AD_28_HPCI1AD_27_H
PCI1AD_26_H
PCI1AD_19_H
PCI1AD_18_H
PCI1AD_16_HPCI1AD_17_H
PCI1AD_24_H
PCI1AD_25_H
PCI1AD_20_H
PCI1AD_21_H
PCI1AD_22_HPCI1AD_23_H
PCI1AD_15_H
PCI1AD_8_HPCI1AD_9_H
PCI1AD_10_H
PCI1AD_11_HPCI1AD_12_H
PCI1AD_13_H
PCI1AD_14_H
PCI1AD_7_H
PCI1AD_6_HPCI1AD_5_H
PCI1AD_4_H
PCI1AD_0_HPCI1AD_1_H
PCI1AD_2_H
PCI1AD_3_H
PCIVDDPVDDOPC
PCI1GNT_0_L
PCI1REQ_0_L
PCI1REQ_1_LPCI1GNT_1_L
PCI1REQ_2_L
PCI1GNT_2_L
ROMCS_L
ROMOE_LROMRW_L PCI1RST_L
PCI1STOP_L
PCI1TRDY_L
PCI1IRDY_LPCI1FRAME_L
PCI1DEVSEL_L
PCI1C_BE_3_LPCI1C_BE_2_L
PCI1C_BE_1_L
PCI1C_BE_0_L
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
(NONE)
(NONE)
- _PP2V5_PWRON_SB
"Slot G" - AD27
"Slot A" - AD17
"Slot D" - AD20
- _PP3V3_SB_PCI (can be _PP3V3_PCI)- _PP3V3_PCI
AD11 - PCI2 (0x106B/0x0055)AD11 - PCI1 (0x106B/0x0054)
BOM options provided by this page:
Signal aliases required by this page:
AD23 - KeyLargo (0x106B/0x004F, PCI1)
AD31 - Ethernet (0x106B/0x0051, PCI0)
AD11 - PCI0 (0x106B/0x0053)PCI Devices implemented on this page:
AD29 - UATA 133 (0x106B/0x0050, PCI0 or 2)
- _PP3V3_PWRON_SB
Shasta drives PCI RESET, but its output
it is ANDed with a reset from the SMU.may not be valid during power-up, so
NET_SPACING_TYPE DIFFERENTIAL_PAIR
Power aliases required by this page:
Page Notes
AD28 - SATA 150 (0x1166/0x0240, PCI0 or 2)
ELECTRICAL_CONSTRAINT_SET
AD30 - FireWire (0x106B/0x0052, PCI0 or 2)
20%10VCERM402
0.1uF2
1 C74090.1uF
402CERM10V20%
2
1 C740820%10VCERM402
0.1uF2
1 C74070.1uF
402CERM10V20%
2
1 C740610V
402
0.1uF20%
CERM2
1 C7405
CERM10V20%0.1uF
4022
1 C74040.1uF
402CERM10V20%
2
1 C740320%10VCERM402
0.1uF2
1 C740220%10VCERM402
0.1uF2
1 C74010.1uF
402CERM10V20%
2
1 C7400
402
20%10V
CERM
0.1uF2
1C742320%10V
CERM402
0.1uF2
1C7422
402CERM10V20%
0.1uF2
1C7421
402
10VCERM
0.1uF20%
2
1C7420
SM-LF
5%1/16W
4.7K63
RP7402
4.7K
1/16W5%
SM-LF
54
RP7402
SM-LF
5%1/16W
4.7K72
RP7402
SM-LF1/16W5%
4.7K81
RP7402
SM-LF1/16W5%
4.7K72
RP7400
SM-LF
5%1/16W
4.7K81
RP7400
SM-LF
5%1/16W
4.7K54
RP7400
SM-LF
5%1/16W
4.7K63
RP7400
SM-LF1/16W5%
4.7K54
RP7401SM-LF1/16W5%
4.7K63
RP7401
SM-LF
5%1/16W
4.7K27
RP7401
BGAV1.0
SHASTAOMIT
V19
U21
R20
N21
M16
J21
H16
E21
B22
AA22
Y10
AA9AB8
U20
N20
J18
B20
AB9
P19
P17
U18
V17
AB20
AB18
N17
R21
V18
AB19
AA18
T21
T22
V20
V22P16
L19
U19
P22M20
N16
M21L20
M18
M22
T17AA21
L22
T16
W20Y21
T18
T19R18
Y22
W21R17
R16
K19
T20
P18
V21P20
R22
P21N19
M19
N18M17
L18
U2300
NO STUFF
6.3V
10uF
CERM
20%
8052
1 C7410
NO STUFF
20%
CERM
10uF
805
6.3V2
1 C7411
SOT23-5MC74VHC1G08
5
4
1
2
3
U7450
0.1uF
CERM10V20%
4022
1 C74505%1/16WMF-LF402
4.7K
2
1R74505%1/16WMF-LF402
4.7K
2
1R7455
051-6772 E
10274
SYNC_MASTER=N/A SYNC_DATE=N/A
Shasta PCI Interface
PCI_AD<31..28>PCIPCI_AD
PCI_AD<22>PCI_AD22 PCI
PCI_AD17 PCI_AD<17>PCI
PCI PCI_PARPCI
PCI_CTL PCI PCI_STOP_L
PCI_AD PCI_AD<16..0>PCI
PCI_CTL PCI_DEVSEL_LPCIPCI_FRAME_LPCI_CTL PCIPCI_IRDY_LPCI_CTL PCI
PCI_CTL PCI_TRDY_LPCI
PCI_CBE_L<3..0>PCI PCI
PCI_AD<19..18>PCI_AD PCIPCI_AD20 PCI_AD<20>PCIPCI_AD21 PCI_AD<21>PCI
PCI_AD23 PCI_AD<23>PCIPCI_AD PCI_AD<26..24>PCI
PCI_AD<27>PCI_AD27 PCI
SYS_WARM_RESET_L
=PP3V3_SB_PCI
PCI_SLOTD_REQ_L
PCI_SLOTD_GNT_L
PCI_SLOTG_REQ_L
PCI_SLOTG_GNT_L
PCI_SLOTA_GNT_L
PCI_SLOTA_REQ_L
PCI_TRDY_L
PCI_FRAME_L
PCI_STOP_L
PCI_IRDY_L
PCI_DEVSEL_L
=PP3V3_PCI
=PP3V3_PCI
PCI_CLK33M_SB_EXT
PCI_CLK66M_SB_INT
PCI_SLOTA_GNT_LPCI_SLOTA_REQ_L
PCI_SLOTG_REQ_LPCI_SLOTG_GNT_L
PCI_SLOTD_REQ_LPCI_SLOTD_GNT_L
ROM_CS_LROM_OE_LROM_WE_L
=PP2V5_PWRON_SB
PCI_SB_TRDY_LPCI_SB_STOP_L
PCI_SB_IRDY_L
PCI_SB_PAR
PCI_SB_FRAME_L
PCI_SB_CBE_L<3>
PCI_SB_AD<31>
PCI_SB_CBE_L<0>
PCI_SB_AD<28>
PCI_SB_CBE_L<2>
PCI_SB_AD<29>
PCI_SB_CBE_L<1>
PCI_SB_DEVSEL_L
PCI_SB_AD<30>
PCI_SB_AD<21>
PCI_SB_AD<19>PCI_SB_AD<18>
PCI_SB_AD<20>
PCI_SB_AD<22>PCI_SB_AD<23>PCI_SB_AD<24>PCI_SB_AD<25>PCI_SB_AD<26>PCI_SB_AD<27>
PCI_SB_AD<10>
PCI_SB_AD<7>
PCI_SB_AD<9>PCI_SB_AD<8>
PCI_SB_AD<11>PCI_SB_AD<12>
PCI_SB_AD<14>
PCI_SB_AD<17>
PCI_SB_AD<15>PCI_SB_AD<16>
PCI_SB_AD<13>
PCI_SB_AD<0>
PCI_SB_AD<6>
PCI_SB_AD<1>PCI_SB_AD<2>
PCI_SB_AD<4>PCI_SB_AD<3>
PCI_SB_AD<5>
=PP3V3_PWRON_SB
PCI_RESET_LSB_PCI_RESET_L
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
76
76
76
77
76
77
76
76
76
76
76
76
77
76
76
77
77
76
76
76
76
76
76
76
75
75
88
75
76
75
76
74
75
74
74
74
74
76
75
75
76
76
75
75
77
76
76
74
74
74
74
74
74
74
76
76
76
76
76
25
25
56
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
25
77
77
74
74
73
73
73
73
73
25
25
27
74
74
77
77
75
75
75
23
23
8
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
8
7
74
74
74
74
6
6
6
6
6
6
6
7
7
8
27
6
6
74
74
74
74
6
6
6
7
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
7
6
DQ1
VCCVPP
DQ7
DQ4DQ3DQ2
DQ5DQ6
DQ0
GNDPWDWPWEOECE
A19A18A17
A20
A16A15A14A13A12A11A10
A7A8A9
A5A4A3A2
A6
A1A0
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
Allows ROM override module
BOM options provided by this page:
symbol to declare U7500 part number. part number. Must use a TABLE_x_ITEM
(NONE)
Signal aliases required by this page:(NONE)
Page NotesPower aliases required by this page:- _PP3V3_PCI
to intercept ROM chip select
NOTE: This page does not specify a BootROM
90.0ns
OMIT
TSOP
129
11 3130
10
24
3923
3534333228272625
22
781415161718
38
19
37134012345636
2021
U7500
402MF-LF1/16W5%
47021
R75025%1/16WMF-LF402
10K
2
1R7501
402MF-LF1/16W
10K5%
2
1R7500
2.2uFCERM10V20%
8052
1C75000.1uF
20%10V
CERM402
2
1C7501
402CERM10V20%
0.1uF2
1C7502
75 102
051-6772 E
SYNC_MASTER=N/A SYNC_DATE=N/A
BootROM
ROM_ONBOARD_CS_LROM_CS_L
=PP3V3_PCI
PCI_AD<31>PCI_AD<30>PCI_AD<29>PCI_AD<28>PCI_AD<27>PCI_AD<26>PCI_AD<25>PCI_AD<24>
PCI_AD<9>PCI_AD<8>PCI_AD<7>PCI_AD<6>PCI_AD<5>PCI_AD<4>PCI_AD<3>
PCI_AD<20>
PCI_AD<2>
PCI_AD<19>PCI_AD<18>
PCI_AD<16>PCI_AD<15>PCI_AD<14>
PCI_AD<12>PCI_AD<11>PCI_AD<10>
PCI_AD<1>PCI_AD<0>
ROM_OE_LROM_WE_L
=PCI_ROM_RESET_LROM_WP_L
=PP3V3_PCI
PCI_AD<13>
PCI_AD<17>
77
77
76
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
76
77
77
75
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
75
76
76
76
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
76
76
74
74
74
76 74
25
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
74
74
25
73
73
6 6
7
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
8
6
7
6
6
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
Signal aliases required by this page:
PCI Devices implemented on this page:
NOTE: This AirPort implementation does
AD17 (Slot "A") - AirPort (0x????/0x????)
- _PCI_CLK33M_AIRPORT (33MHz PCI clock)
516S0285
Q85 WIRELESS CONNECTOR not support PME#.
(NONE)
- _PP3V3_PCI
ELECTRICAL_CONSTRAINT_SET
BOM options provided by this page:
Power aliases required by this page:
Page Notes
NET_SPACING_TYPE DIFFERENTIAL_PAIR
402
1UF10%6.3VCERM2
1 C7652
5%
402MF-LF1/16W
10K
2
1R7650
1UF10%6.3VCERM402
2
1 C765110UF20%6.3VCERM1206
NOSTUFF
2
1 C7650
15K5%
MF-LF1/16W
4022
1R76605%1/16WMF-LF402
15K
2
1R7661
CERM6.3V10%1UF
4022
1C7660
MF-LF1/16W5%
22
402
21
R7651
STDOFF-3MMOD5MMH-TH
1
SDF7600
STDOFF-3MMOD5MMH-TH1
1
SDF7601
20-5602-080-041-829
CRITICAL
F-ST-SM
8079
7877
7675
7473
7271
7069
6867
6665
6463
6261
6059
5857
5655
5453
5251
5049
4847
4645
4443
4241
4039
3837
3635
3433
3231
3029
2827
2625
2423
2221
2019
1817
1615
1413
1211
109
87
65
43
21
J7650
051-6772 E
76 102
SYNC_MASTER=N/A SYNC_DATE=N/A
AIRPORT & BLUETOOTH
USB2_N<4>MAKE_BASE=TRUE
USB_BT_N MAKE_BASE=TRUEUSB_BT_PUSB2_P<4>
PCI_AD<17>
PCI_AD<30>
PCI_AD<27>
PCI_AD<29>
PCI_AD<26>PCI_AD<22>PCI_SLOTA_IDSEL
PCI_AD<19>PCI_AD<21>PCI_IRDY_LPCI_AD<18>PCI_DEVSEL_L
_PCI_CLK33M_AIRPORTPCI_STOP_LPCI_AD<12>PCI_PAR
PCI_AD<8>
PCI_CBE_L<0>
PCI_AD<7>PCI_AD<3>PCI_AD<6>
PCI_AD<1>PCI_AD<5>PCI_AD<0>
PCI_AD<10>
PCI_AD<31>AIRPORT_CLKRUN_L_PDTP_AP_PME_LPCI_SLOTA_GNT_L
PCI_AD<24>PCI_AIRPORT_RESET_LPCI_AD<28>
PCI_AD<23>
PCI_AD<20>PCI_FRAME_LPCI_AD<17>
PCI_TRDY_L
PCI_CBE_L<2>PCI_AD<16>
PCI_AD<14>PCI_AD<13>
PCI_AD<15>AP_ALT_ANTPCI_CBE_L<1>PCI_AD<4>
PCI_AD<11>ROM_WE_LPCI_AD<2>
PCI_SLOTA_INT_LROM_OE_LROM_ONBOARD_CS_LROM_CS_L
USB2_OC<4>
PCI_AD<9>
PCI_CBE_L<3>
PCI_AD<25>PCI_SLOTA_REQ_L
=PP3V3_PCI
_PCI_CLK33M_AIRPORTPCI_CLK_AIRPORT CLOCKS
_PP3V3_PWRON_BT
77
77
76
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
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77
77
77
77
77
77
77
77
77
77
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75
75
75
75
77
75
77
77
75
77
77
75
77
75
77
75
75
75
75
75
75
75
75
75
75
77
75
77
75
77
77
75
75
75
75
77
75
75
75
75
77
75
75
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
75
74
75
75
74
74
74
74
73
73
73
73
73
73
73
73
73
73
73
76
73
73
73
73
73
73
73
73
73
73
73
73
73
74
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
74
73
25
74
75
74
73
73
73
74
25
76
91 6
6 91
6
6
6
6
6
6
6
6
6
6
6
6
8
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
8
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
91
6
6
6
6
7
8
7
AD1
SRMOD
NANDTEST
NTEST1
SRDTASRCLK
TEST
TEBAMC
SMC
LEGC
PME
PCLKINTCINTBINTA
VBBRST
SMI
CRUN
SERR
REQ
STOPTRDYIRDYFRAME
IDSELDEVSEL
GNTPERR
PAR
CBE3CBE2CBE1CBE0
AD31AD30AD29AD28
AD24AD23AD22AD21AD20AD19AD18
AD25AD26AD27
AD14AD13AD12AD11AD10AD9AD8
AD15AD16AD17
AD7AD6
AD0
AD2
AD5AD4
VCCRST
AD3
VDD_PCI
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
facilitate NAND-tree testing
(PCI_AD<27>)
RP7702 & RP7703 required to
OD
OD
ODODODOD
IPD
IPD
IPDIPD
IPD
IPD
(PCI RESET)
(CHIP RESET)
DIFFERENTIAL_PAIRNET_SPACING_TYPE
BOM options provided by this page:
Power aliases required by this page:
PCI Devices implemented on this page:AD27 (Slot "G") - USB2 (0x1033/0x0035)
NOTE: This USB2 implementation supports
- _PCI_CLK33M_USB2 (33MHz PCI clock)
- _PPVIO_PCI (to 3.3V or 5V)
(NONE)
D3cold.
ELECTRICAL_CONSTRAINT_SET
Page NotesSignal aliases required by this page:
20%10V
CERM402
0.1uF2
1C7703
10K1/16WMF-LF
402
5%
2
1R7716
47
SM-LF1/16W5%
72
RP7703
5%1/16WSM-LF
4763
RP7702
47
SM-LF1/16W5%
72
RP7702
1/16WSM-LF
5%
4754
RP7703
47
SM-LF
5%1/16W
63
RP7703
5%1/16WSM-LF
4754
RP7702
5%22
MF-LF402
1/16W
2
1R7714
NEC_UPD720101_USB2
CRITICAL
FBGA
C8
M4
H3
C9
B8
G1
L8
N7
G3
P9
N9
M9
L6
M7
H1
C6
D9
H2
A8
J4
M8
M10
L7
F4
A7
B7
C7
B3
D6
F3
G2
N6
C3
F1
J3
M2
P7
L1
L2
M1
N3
M3
N4
A6
B6
P4
C5
A5
C4
B5
A4
B4
C1
C2
D2
D1
N5
D3
E1
E3
F2
J1
J2
K3
K1
L3
K2
P5
M5
U7700
10K5%
402MF-LF1/16W
2
1R7713
475%
SM-LF1/16W
8
1
RP77035%
1/16WMF-LF
402
4.7K
2
1R7715
051-6772 E
10277
SYNC_MASTER=N/A SYNC_DATE=N/A
USB 2.0 PCI Interface
PCI_CLK_USB2 CLOCKS =PCI_CLK33M_USB2
PCI_AD<15>
PCI_AD<22>
PCI_AD<27>
NEC_PME_L
TP_NEC_SMI_L
NEC_SERR_L_PU
TP_NEC_AMC
PCI_AD<0>
TP_NEC_SMC
TP_NEC_TEB
TP_NEC_SRDATA
PCI_AD<12>
NEC_INTC_L
NEC_INTA_L
NEC_VBBRST_L
NEC_VCCRST_L
=PP3V3_PCI
PCI_SLOTG_IDSEL
PCI_AD<4>PCI_AD<3>
PCI_AD<10>
PCI_AD<13>PCI_AD<14>
PCI_AD<17>PCI_AD<16>
PCI_AD<18>PCI_AD<19>PCI_AD<20>PCI_AD<21>
PCI_AD<23>PCI_AD<24>PCI_AD<25>PCI_AD<26>
PCI_AD<29>PCI_AD<28>
PCI_AD<30>PCI_AD<31>
PCI_CBE_L<3>
PCI_CBE_L<1>PCI_CBE_L<2>
PCI_PARPCI_FRAME_LPCI_IRDY_LPCI_TRDY_LPCI_STOP_L
PCI_DEVSEL_LPCI_SLOTG_REQ_LPCI_SLOTG_GNT_L
=PCI_CLK33M_USB2
NEC_CRUN_L_PD
NEC_LEGC_PD
TP_NEC_NTEST1
TP_NEC_TEST
TP_NEC_SRCLKTP_NEC_NANDTEST
TP_NEC_SRMOD
NEC_INTB_L
SYS_WARM_RESET_L
=PCI_USB2_RESET_L
SYS_PME_L
NEC_PERR_L_PU
PCI_AD<11>
PCI_SLOTG_INT_L
PCI_AD<1>PCI_AD<2>
PCI_AD<9>PCI_AD<8>
PCI_AD<6>PCI_AD<5>
PCI_AD<7>
=PPVIO_PCI_USB2
PCI_CBE_L<0>
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
75
76
75
75
75
75
75
75
75
75
75
75
75
75
75
75
76
76
75
75
75
75
75
75
75
76
76
76
76
76
76
76
76
76
75
75
75
75
75
75
75
75
76
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
77
73
73
73
73
73
25
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
77
25
25
73
73
73
73
73
73
73
73
73
8
6
6
6
6
6
6
6
6
7
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
74
74
8
6
6
6
6
8
8
13
6
25
6
6
6
6
6
6
6
7
6
UATA
UD_IDECHRDY_H
UD_IDEDMARQ_H
UD_IDEINTRQ_H
UD_IDEDA2_H
UD_IDEDA1_H
UD_IDEDA0_H
UD_IDEDD_15_H
UD_IDEDD_14_H
UD_IDEDD_0_H
UD_IDEDD_1_HUD_IDEDD_2_H
UD_IDEDD_3_H
UD_IDEDD_4_HUD_IDEDD_5_H
UD_IDEDD_6_HUD_IDEDD_7_H
UD_IDEDD_8_H
UD_IDEDD_9_HUD_IDEDD_10_H
UD_IDEDD_11_H
UD_IDEDD_12_HUD_IDEDD_13_H
TXDN1
TXDP1
TXDN2TXDP2
RXDN2RXDP2
RXDN1
RXDP1
SATA_GND
SATA_VDD
SATA 0
SATA 1
(5 OF 8)
UD_IDECS1FX_LUD_IDECS3FX_L
UD_IDEDMACK_L
UD_IDERD_L
UD_IDEWR_LUD_IDERST_L
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
Net Spacing Type: SATA
Page NotesSATA_VDD x 5
NET_PHYSICAL_TYPE NET_SPACING_TYPE DIFFERENTIAL_PAIR
Line To Line: 15 mils
UATA TerminationELECTRICAL_CONSTRAINT_SET
Power aliases required by this page:
(NONE)
DSTROBE aka:
HSTROBE aka:DIOR*
STOP aka:DIOW*
Recommend 0.1uF cap placed close to Shasta.AC coupling required for any SATA pair used.
(Caps provided by device page)
(NONE)BOM options provided by this page:
- _PP1V2_PWRON_DISK
NOTE: Target differential impedance for
Length Tolerance: 50 mils
SATA data pairs is 100 ohms.
Primary Max Sep: 9 mils innerPrimary Max Sep: 10 mils outer
Secondary Max Sep: 100 milsSecondary Length: 500 mils
IORDY/HDMARDY*
Signal aliases required by this page:
6.3V10%1UF
CERM402
2
1 C80026.3V10%1UF
402CERM2
1 C80016.3V10%1UF
402CERM2
1 C80006.3V10%1UF
CERM402
2
1 C80046.3V10%1UF
402CERM2
1 C8003
OMIT
BGAV1.0
SHASTA
D3
E7
E4C5
D7 E8
D4
G5
G6E3
C2
C1E2
H6
H7
D5E5
F5
C3F6
G7
J6
D6
C4
E6
B4B3
F9
Y15
AA16
Y14
AB16
Y18
W15
T14
AB17
AB14
W16
T13
AA17
AA14
AB15
Y17
AA15
Y16
U2300
805
0
MF-LF1/8W5%
21
R8010
SM-LF
5%
33
1/16W
54
RP8000
SM-LF
33
1/16W5%
63
RP8000
33
5%1/16WSM-LF
72
RP8000
SM-LF1/16W5%
3354
RP8003
SM-LF
5%1/16W
3381
RP8001
SM-LF
33
1/16W5%
72
RP8001
1/16W
33
5%
SM-LF
63
RP8003
SM-LF
5%1/16W
3381
RP8002
1/16W
33
5%
SM-LF
72
RP8002
1/16W
33
5%
SM-LF
81
RP8000
SM-LF
5%1/16W
3354
RP8002
SM-LF
33
1/16W5%
72
RP8003
5%
33
1/16WSM-LF
63
RP8001
SM-LF
5%1/16W
3381
RP8004
SM-LF
5%1/16W
3381
RP8003
SM-LF1/16W
33
5%
63
RP8002
SM-LF
5%1/16W
3372
RP8004
SM-LF
5%1/16W
3354
RP8004SM-LF
5%
33
1/16W
54
RP8001
SM-LF
33
1/16W5%
63
RP8004
5%1/16WMF-LF
10K
4022
1R8005
33
5%1/16WMF-LF402
21
R8001
22
402MF-LF1/16W5%
21
R8002
5%1/16WMF-LF402
2221
R8003
5%1/16WMF-LF402
2221
R8004
402MF-LF1/16W5%
3321
R8000
Shasta DiskSYNC_DATE=N/ASYNC_MASTER=N/A
10280E051-6772
UATA_STOPUATA_HOST
UATA_DD<7>UATA_DD7UATA_DD UATA_DD<6..0>
UATA_DMACK_LUATA_HOST_R
UATA_CS1_LUATA_HOST
UATA_CS0_LUATA_HOST
SATA_RXD_N2_C SATA_TXD_N2
UATA_CS1_L_R
SATA_RXD_P2_C
SATA_RXD_N1_CSATA_RXD_P1_C
UATA_STOP_R UATA_STOP
UATA_CS1_L_R UATA_CS1_L
UATA_RESET_LUATA_RESET_L_R
UATA_DA<1>
UATA_DD<15>UATA_DD_R<15>
UATA_DD<13>UATA_DD_R<13>
UATA_DD<11>UATA_DD_R<11>
UATA_DD<9>UATA_DD_R<9>
UATA_DD<7>UATA_DD_R<7>
UATA_DD<5>UATA_DD_R<5>
UATA_DD<3>UATA_DD_R<3>
UATA_DD<1>UATA_DD_R<1>
UATA_DMACK_L_R UATA_DMACK_L
UATA_HSTROBE_R UATA_HSTROBE
UATA_CS0_L_R UATA_CS0_L
UATA_DA<2>UATA_DA_R<2>
UATA_DA<0>UATA_DA_R<0>
UATA_DD<14>UATA_DD_R<14>
UATA_DD<12>UATA_DD_R<12>
UATA_DD<10>UATA_DD_R<10>
UATA_DD<8>UATA_DD_R<8>
UATA_DD<6>UATA_DD_R<6>
UATA_DD<4>UATA_DD_R<4>
UATA_DD<2>UATA_DD_R<2>
UATA_DD<0>UATA_DD_R<0>
UATA_RESET_L_RUATA_STOP_RUATA_HSTROBE_RUATA_DMACK_L_R
UATA_CS0_L_R
UATA_DA_R<0>
UATA_DD_R<15>
UATA_DD_R<13>UATA_DD_R<14>
UATA_DD_R<12>UATA_DD_R<11>UATA_DD_R<10>
UATA_DD_R<8>UATA_DD_R<7>
UATA_DD_R<9>
UATA_DD_R<6>UATA_DD_R<5>UATA_DD_R<4>UATA_DD_R<3>UATA_DD_R<2>UATA_DD_R<1>UATA_DD_R<0>
UATA_INTRQ
UATA_DMARQ
UATA_DSTROBE
SATA_TXD_P2
SATA_TXD_P1SATA_TXD_N1
UATA_DA_R<2>UATA_DA_R<1>
UATA_DA_R<1>
SATA_RXD2_C SATA_RXD_P2_CSATA_RXD2 SATASATA
UATA_HSTROBEUATA_HOST
SATA_TXD2SATA_TXD2 SATA_TXD_P2SATASATA
SATA_TXD_N1SATA_TXD1SATA_TXD1 SATASATA
SATA_RXD1 SATA_RXD1_C SATA_RXD_N1_CSATASATA
SATA_TXD1 SATA_TXD1 SATA_TXD_P1SATASATA
SATA_TXD2 SATA_TXD_N2SATA_TXD2 SATASATA
UATA_DD<15..8>UATA_DD
UATA_DA<2..0>UATA_HOST
SATA_RXD2_C SATA_RXD_N2_CSATA_RXD2 SATASATA
SATA_RXD_P1_CSATA_RXD1_CSATA_RXD1 SATASATA
UATA_DSTROBEUATA_DEV_R_CUATA_DMARQUATA_DEV_R
UATA_RESET_LUATA_HOST_R
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM
PP1V2_PWRON_DISK_SB_RVOLTAGE=1.2V=PP1V2_PWRON_DISK_SB
UATA_INTRQUATA_DEV_R
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
80
80
80
80
80
80
83 83
83
83
83
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
83
83
83
83
83
83
83
80
83
83
83
83
83
80
80
83
83
83
83
80
83
6
6
6
6
6
6
80 80
80
80
80
80
80 6
80 6
6 80
6
6 80
6 80
6 80
6 80
6 80
6 80
6 80
6 80
80 6
80 6
80 6
6 80
6 80
6 80
6 80
6 80
6 80
6 80
6 80
6 80
6 80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
6
80
80
80
80
80
6
6
80
80
80
80
6
7
80
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
PATA CONNECTOR
Per ATA Spec
518-0157
518-0144
SATA CONNECTORS
NET_PHYSICAL_TYPE NET_SPACING_TYPEELECTRICAL_CONSTRAINT_SET DIFFERENTIAL_PAIR
ObsoleteNCNCNC
NC
NCNC
ATA-6 spec does not call out R8180 or R8182
Per ATA Spec
Per ATA Spec
Terminate near connector
HD POWER
Sourced by drive
ATA-6 spec does not call out C8177
PER ATA7 SPEC
"UATA ACTIVE"
516S0235
NO STUFF
402
5%1/16WMF-LF
10K
2
1R8311
1/16WMF-LF402
1K5%
2
1R8312
NO STUFF
5%
MF-LF402
10K1/16W
2
1R8313
4.7K5%
MF-LF402
1/16W
2
1R8314
82
402
1/16W5%
MF-LF
21
R8315
5%1/16WMF-LF402
8221
R8316
NO STUFF
10pF
402CERM50V5%
2
1C8301
402
6.2K5%1/16WMF-LF
2
1R83175%1/16WMF-LF402
0
2
1R83181/16WMF-LF
5.6K5%
4022
1R8319
82
5%1/16WMF-LF402
21
R8320
499
402MF-LF1/16W
1%
DEVELOPMENT
2
1R8321
SATA_TXD_P1
CERM
0.1UF
20%10V
402
21
C8304
0.1UF
20%10VCERM402
21
C8305LD18077-S04
M-ST-TH
7
6
5
4
3
2
1
J8300
0.1UF
20%
402
10VCERM
21
C8307
402
10V20%
CERM
0.1UF21
C8308
CRITICAL
M-RT-THS05B-XA
5
4
3
2
1
J8303
2.0X1.25A
DEVELOPMENT
GREEN
21
LED8301
F-ST-SM804RVS-050505R
CRITICAL
9
87
6
50
5
49
4847
4645
4443
4241
40
4
39
3837
3635
3433
3231
30
3
29
2827
2625
2423
2221
20
2
19
1817
1615
1413
1211
10
1
52
51
J8301
83 102
051-6772 E
SYNC_MASTER=N/A SYNC_DATE=N/A
DISK CONNECTORS
UATA_RESET_L
UATA_DMARQ_R
UATA_DMACK_LUATA_IOCS16_PU
UATA_CS1_L
UATA_DD<3>
=PP5V_PATA
UATA_DA<0>UATA_DA<1>
UATA_DA<2>
UATA_DD<0>
UATA_DD7UATA_DD<7>
UATA_DD<7> UATA_DD<9>UATA_DD<10>
UATA_DD<12>UATA_DD<13>UATA_DD<14>UATA_DD<15>
UATA_DASP_L_DS
UATA_DSTROBE_R
UATA_DEV_RUATA_DMARQ
UATA_DEV_RUATA_INTRQ
UATA_DMARQ
UATA_INTRQ
UATA_HOSTUATA_DA<2..0>UATA_DDUATA_DD<6..0>
UATA_DDUATA_DD<15..8>
UATA_DEV_R_CUATA_DSTROBE
UATA_DSTROBE
SATA_RXD_N1_C
SATA_TXD_N1
UATA_INTRQ_R
UATA_CSEL_PD
UATA_HOSTUATA_STOP
UATA_STOP
UATA_HOST_RUATA_RESET_L
UATA_HOSTUATA_HSTROBE
UATA_HOST_RUATA_DMACK_L
UATA_HOSTUATA_CS1_LUATA_HOSTUATA_CS0_L
UATA_CS0_L
=PP5V_PATA
UATA_DASP_L
=PP5V_DISK
=PP12V_DISK
=PP3V3_DISK
SATA_RXD_P1_C
SATA_TXD_P1_C
SATA_RXD_N1
UATA_DD<8>
UATA_DD<11>
UATA_DD<2>
SATA_TXD_N1_C
UATA_HSTROBE
UATA_DD<1>
UATA_DD<4>UATA_DD<5>UATA_DD<6>
=PP3V3_PATA
SATA_RXD_P1
SATA_TXD_P2
SATA_TXD_N2
SATA_RXD_N2_C
SATA_RXD_P2_C
TP_SATA_RXD_N2_CMAKE_BASE=TRUE
TP_SATA_TXD_N2MAKE_BASE=TRUE
TP_SATA_RXD_P2_CMAKE_BASE=TRUE
TP_SATA_TXD_P2MAKE_BASE=TRUE
83
83
83
83
83
83
83
83
83
83 83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
80
80
80
80
83
80
80
80
80
80
80 80
80
80
80
80
80
83
83
83
83
80
80
80
83
83
80
80
80
80
80
80
80
80
83
7
7
80
80
80
80
80
80
80
80
80
6
6
6
6
6
6
7
6
6
6
6
6
6 6
6
6
6
6
6
6
6
80
80
80
80
6
6
6
80
80
80
80
6
6
6
6
6
6
6
6
6
6
7
6
6
6
7
80
6
6
6
6
6
6
6
6
7
80
80
80
80
6
6
6
6
ETHERNET
(6 OF 8)
ETH_GTX_CLK_H
ETH_TX_ER_HETH_TX_EN_H
ETH_TXD_7_H
ETH_TXD_6_H
ETH_TXD_5_HETH_TXD_4_H
ETH_TXD_3_HETH_TXD_2_H
ETH_TXD_1_H
ETH_TXD_0_H
ETH_MDC_H
ETH_MDIO_H
ETH_TX_CLK_HETH_RX_CLK_H
ETH_RXD_0_H
ETH_RXD_1_H
ETH_RXD_2_H
ETH_REFCLK_H
ETH_RXD_3_H
ETH_RXD_4_HETH_RXD_5_H
ETH_RXD_6_H
ETH_RXD_7_H
ETH_RX_DV_HETH_RX_ER_H
ETH_CRS_H
ETH_COL_H
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
NET_PHYSICAL_TYPE DIFFERENTIAL_PAIRNET_SPACING_TYPE
Page Notes
Signal aliases required by this page:
BOM options provided by this page:(NONE)
(NONE)
Power aliases required by this page:(NONE)
ELECTRICAL_CONSTRAINT_SET
SHASTAV1.0BGA
OMIT
F1H3
H5
K6
J4
F2G3
J5
H4E1
G4
G2K4
J3
G1
J2
K3L4
J1
K2L3
K1
M5
M6
M4
K5
L6
L5
U2300SM-LF
5%
0
1/16W
72
RP8400
SM-LF
5%1/16W
054
RP8400
SM-LF1/16W5%
081
RP8400
SM-LF1/16W5%
063
RP8400
SM-LF1/16W5%
072
RP8401
5%1/16WSM-LF
054
RP8401
SM-LF1/16W5%
081
RP8401
0
SM-LF1/16W5%
63
RP8401
5%1/16WMF-LF402
021
R8400
402MF-LF
0
1/16W5%
21
R8401
402MF-LF1/16W5%
021
R8402
051-6772 E
84 102
SYNC_MASTER=N/A SYNC_DATE=N/A
Shasta Ethernet
ENET_TXD_R<6>
ENET_TXD_R<3>
ENET_TXD_R<7>
ENET_TXD_R<4>
ENET_TX_EN_R
ENET_CLK125M_GBE_REF
ENET_TXD_R<5>
ENET_TXD_R<1>ENET_TXD_R<0>
ENET_TXD_R<2>
ENET_COL
ENET_CRS
ENET_RX_ERENET_RX_DV
ENET_RXD<7>ENET_RXD<6>ENET_RXD<5>ENET_RXD<4>ENET_RXD<3>ENET_RXD<2>ENET_RXD<1>ENET_RXD<0>
ENET_MDC
ENET_MDIO
ENET_TXD<7>
ENET_TXD<0>
ENET_TXD<1>
ENET_TXD<2>
ENET_TXD<4>
ENET_TXD<3>
ENET_TXD<6>
ENET_TX_EN
ENET_TXD<5>
ENET_CLK125M_GTX
ENET_TX_ER
ENET_RX_CTL ENET_RX_DVENET_RXD<7..0>ENET_RX
ENET_RX_ERENET_RX_CTL
ENET_TX_CTL ENET_TX_EN
ENET_MDC ENET_MDC
ENET_MDIO ENET_MDIO
ENET_TX_ERENET_TX_CTL
ENET_RX_CTL ENET_CRS
ENET_CLK125M_RXENET_CLK25M_TX
ENET_RX_CTL ENET_COL
ENET_TXD<7..0>ENET_TX
ENET_CLK125M_GTX_RP25MM ENET_CLK125M_GTXENET_TX_CLK
P25MMENET_RX_CLK ENET_CLK125M_RXP25MM ENET_CLK25M_TXENET_RX_CLK
P25MM ENET_CLK125M_GBE_REFENET_GBE_REF
ENET_TX_ER_R
ENET_CLK125M_GTX_R86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
INTR*/ENERGYDET
GTXCLK
XTALGND BIASGND PLLGND1
CLK125
TXD[4]TXD[3]TXD[2]TXD[1]TXD[0]
MDIOMDC
TX_ERTX_EN
TXD[7]TXD[6]TXD[5]
LOWPWR
TXC
RXC
RXD[7]
RX_DVRX_ER
XTALOXTALI
ERHUBMANMSSPD0F1000FDXRGMIIENEN_10B
PHYA[4]PHYA[3]PHYA[2]PHYA[1]PHYA[0]
TVCO
TEST[0]TEST[1]
COLCRS
RBC0
TRD+[0]TRD-[0]
TRD+[1]TRD-[1]
TRD+[2]TRD-[2]
TRD-[3]TRD+[3]
RBC1
RXD[2]RXD[3]RXD[4]RXD[5]RXD[6]
RXD[1]RXD[0]
SLAVE*/AN_EN
ACTLED*XMTLED*FDXLED*LINK2*LINK1*
QUALITY*/TXC_RXC_DELAY
RDAC1
PLLVDD1BIASVDD1XTALVDD1
VESTA ENET
2 OF 3
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
Page NotesPower aliases required by this page:
CRYSTAL LOAD CAPACITANCE IS 20PF
(Internal Pull-up)
MANMS - Manual Master/Slave Configuration Select
NOTE: Target differential impedance for
AN_EN F1000 SPD0 Description
F1000 - Speed Select
Sets manual duplex mode bit
(Internal Pull-down)0 - GMII/TBI Mode
RGMIIEN - RGMII Enable
Vesta Config Straps:
Secondary Length: 500 mils
Length Tolerance: 50 mils
ELECTRICAL_CONSTRAINT_SET SPACING DIFFERENTIAL_PAIRPHYSICALNET_TYPE
(NONE)
(NONE)
Secondary Max Sep: 100 milsPrimary Max Sep: 5 mils
Line To Line: 0.38 mms
BOM options provided by this page:
Signal aliases required by this page:
ENET data pairs is 100 ohms.
Net Spacing Type: ENET
- _PP2V5_ENETFW- _PP3V3_ENET
PLACE RESISTORS CLOSE TO PHY
ESR < 0.5 ohms
Sets Hub/DTE bit and master/slave configuration value bit
(Internal Pull-up)0 - Auto-negotiation disabled1 - Auto-negotiation enabledAN_EN - Auto-Negotiation Select
0 - Rise time approx. 4 ns1 - Rise time approx. 5 nsER - Edge Rate Select
(Internal Pull-down)
FDX - Full-Duplex Select
1 - RGMII/RTBI Mode
(Internal Pull-down)0 - GMII/RGMII Mode
TXC_RXC_DELAY
GTXCLK are delayed by 1.9 ns
(Internal Pull-down)0 - No clock delay
0 1 X Force 1000BASE-T (test use only)
1 1 0 Auto-negotiate advertise 10/100/1000BASE-T1 0 1 Auto-negotiate advertise 10/100BASE-TX1 0 0 Auto-negotiate advertise 10BASE-T
0 0 1 Force 100BASE-TX
SPD0 - Speed Select
(Internal Pull-down)See table below
(Internal Pull-up)
0 0 0 Force 10BASE-T
See table below
- _PP1V2_ENETFW
1 1 1 Auto-negotiate advertise 1000BASE-T
(Internal Pull-down)
1 - TBI/RTBI ModeEN_10B - TBI Interface Select
PHYA<4..0> - PHY Address Select(Internal Pull-downs)
(Internal Pull-down)
HUB - Repeater Select
Sets manual master/slave configuration enable bit
1 - If RGMII Mode enabled, RXC clock and
Put crystal circuit close to PHY
402MF-LF1/16W
1%49.9
2
1R8616
49.91%
MF-LF402
1/16W
2
1R8617
49.91%
1/16WMF-LF
4022
1R8614
49.91%1/16WMF-LF4022
1R8615
MF-LF1/16W5%
402
021
R8602
25.0000M
CRITICAL
8X4.5MM-SM
21
Y8600
1/16W
402MF-LF
1%49.9
2
1R8620
402
49.91%
1/16WMF-LF
2
1R8618
1%49.91/16WMF-LF4022
1R8621
402MF-LF1/16W
49.91%
2
1R8619
402CERM16V
0.01UF20%
2
1 C862020%16VCERM
0.01UF
4022
1 C862220%16VCERM402
0.01UF2
1 C8623
MF-LF1/16W5%
402
021
R86015%
402
1/16WMF-LF
021
R8600
1.24K1%
1/16WMF-LF
402 2
1R8613332
MF-LF1/16W1%
4022
1R8609
402CERM16V20%0.01UF
2
1 C8621
1.5K5%
MF-LF402
1/16W
2
1R8650
402CERM
20%50V
0.001uF2
1C8604
FERR-EMI-600-OHM
SM
21
L8602
6.3V20%
CERM
10uF
1206-12
1C8605
10V
0.1uF20%
402CERM2
1 C8601
FERR-EMI-600-OHM
SM
21
L8600
FERR-EMI-600-OHM
SM
21
L8601
20%0.001uF
CERM50V
4022
1 C8603
X5R6.3V
10UF10%
8052
1 C8602
FBGA-200BCM5462
OMIT
N1
P2
N2
P3
B12
C4
B4
A5
B5C5
E6
D6C7
C6B6
A6
N3
R10R11
R9
R8
R6R7
R5
R4
M5
M4
K5
C10
C2
D2
D3
D4D5
E3
E4E5
F5F4
C1
B8
R1
B3
A3
A8
M1
M2
L1
L2
L3L4
L5
G2
G1
D9
H5
B11
A10
D10
A9
A4
B10
C8
K4
H3
K3
G3
F3
D1
P1
R2
A11
U8600
33pF
402CERM50V5%
2
1C8618
CERM50V5%
402
33pF2
1C8619
86 102051-6772 E
SYNC_MASTER=N/A SYNC_DATE=N/A
Vesta Ethernet PHY
MIN_LINE_WIDTH=0.5 mm
PP2V5_VESTA_BIASVDD1VOLTAGE=2.5VMIN_NECK_WIDTH=0.25 mm
ENET_COLENET_CRS
ENET_MDI_P<0>ENET_MDI_N<0>
ENET_MDI_P<1>ENET_MDI_N<1>
ENET_MDI_P<2>ENET_MDI_N<2>
ENET_MDI_P<3>ENET_MDI_N<3>
TP_VESTA_SPD0TP_VESTA_MANMSTP_VESTA_HUB
TP_VESTA_TVCO
TP_VESTA_ER
=PP2V5_ENETFW
ENET_MDC
TP_VESTA_PHYA<4>
=PP1V2_ENETFW
ENET_CLK25M_TX_R
TP_VESTA_TXC_RXC_DELAYTP_VESTA_AN_EN
ENET_ENERGYDET
ENET_CLK125M_GTX
ENET_TXD<1>ENET_TXD<0>
ENET_TXD<4>
ENET_TXD<2>ENET_TXD<3>
ENET_TXD<5>ENET_TXD<6>ENET_TXD<7>
ENET_TX_ENENET_TX_ER
ENET_CLK125M_RX_R
ENET_RXD<7>
ENET_RX_DVENET_RX_ER
VESTA_CLK25M_XTALO_R
TP_VESTA_PHYA<0>TP_VESTA_PHYA<1>TP_VESTA_PHYA<2>TP_VESTA_PHYA<3>
TP_VESTA_EN_10B
TP_VESTA_FDXTP_VESTA_RGMIIEN
TP_VESTA_F1000
TP_VESTA_TEST<1>TP_VESTA_TEST<0>
TP_VESTA_RBC0
ENET_RXD<0>
ENET_RXD<3>
ENET_RXD<1>
ENET_RXD<4>ENET_RXD<5>ENET_RXD<6>
TP_VESTA_LINK1_L
TP_VESTA_FDXLED_LTP_VESTA_XMTLED_LTP_VESTA_ACTLED_L
VESTA_RDAC1_PD
VESTA_ENET_LOWPWR
ENET_CLK125M_RX
ENET_CLK125M_GBE_REF
ENET_CLK25M_TX
ENET_MDIO
ENET_MDI0 ENET_MDI1 ENET_MDI2 ENET_MDI3
ENET_CLK125M_GBE_REF_R
PP2V5_VESTA_XTALVDD1
MIN_LINE_WIDTH=0.5 mmVOLTAGE=2.5VMIN_NECK_WIDTH=0.25 mm
TP_VESTA_LINK2_L
TP_VESTA_RBC1
ENET_RXD<2>
VESTA_CLK25M_XTALIVESTA_CLK25M_XTAL P25MM
P25MM ENET_CLK125M_RX_R
P25MM ENET_CLK25M_TX_R
ENET_MDI_P<1>ENET ENET ENET_MDI1ENET_MDIENET_MDI_N<1>ENET ENET ENET_MDI1ENET_MDI
ENET_MDI_N<3>ENET ENET ENET_MDI3ENET_MDI
P25MM VESTA_CLK25M_XTALO
P25MM VESTA_CLK25M_XTALO_R
ENET_MDI_N<2>ENET ENET ENET_MDI2ENET_MDI
ENET_MDI_P<0>ENET ENET ENET_MDI0ENET_MDI
P25MM ENET_CLK125M_GBE_REF_R
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mmVOLTAGE=1.2V
PP1V2_VESTA_PLLVDD1
=PP3V3_ENET
VESTA_CLK25M_XTALO
ENET_MDI_P<2>ENET ENET ENET_MDI2ENET_MDI
VESTA_CLK25M_XTALI
ENET_MDI_P<3>ENET ENET ENET_MDI3ENET_MDI
ENET_MDI_N<0>ENET ENET ENET_MDI0ENET_MDI
87
87
87
87
87
87
87
87
89
89
87
87
87
87
87
87
87
87
87
84
84
86
86
86
86
86
86
86
86
12
84
7
86
25
84
84
84
84
84
84
84
84
84
84
84
86
84
84
84
86
84
84
84
84
84
84
87
87
12
84
84
84
84
86
84
86
86
86
86
86
86
86
86
86
86
86
7
86
86
86
86
86
G
D
SG
D
S
G
D
SG
D
S
1CT:1CT
1CT:1CT
MDI_3-
ENET_CTAP
MDI_0+
75 OHM
MDI_0-
MDI_1-
MDI_2+
MDI_2-
75 OHM
75 OHM
1CT:1CT
75 OHM
RJ45CABLE SIDE
SECONDARY
J4
J8
J7
J6J5
J1
J2J3
1CT:1CT
RJ45CHIP SIDE
ENET_CTAP
MDI_1+
MDI_3+
PRIMARY
SHIELD 1000PF, 2000V
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
(514-0222)
PUT DEVELOPMENT LEDS ON TOP SIDE OF BOARDFERR-EMI-600-OHM
SM
21
L8700
20%10VCERM402
0.1UF2
1 C8700
0.1UF20%10VCERM402
2
1 C8701
0.1UF20%10VCERM402
2
1 C8702
603CERM50V20%0.001UF
2
1 C8705
402CERM10V20%0.1UF
2
1 C8703
0.001UF20%50V
CERM603
2
1C8704DEVELOPMENT
330
603MF-LF1/10W5%
2
1R8701
DEVELOPMENT
330
603MF-LF1/10W5%
2
1R8703
MF-LF402
5%1/16W
10K
DEVELOPMENT
2
1R8700
DEVELOPMENT
SOT-3632N7002DW
4
5
3
Q8700DEVELOPMENT
SOT-3632N7002DW
1
2
6
Q8700
DEVELOPMENT
SOT-3632N7002DW
4
5
3
Q8701
402
5%MF-LF1/16W
10K
DEVELOPMENT
2
1R8702
SOT-363
DEVELOPMENT
2N7002DW
1
2
6
Q8701
MJRR0156F-ST-TH
CRITICAL
9
8
7
6
5
4
3
2
10
1
14
13
12
11
J8700DEVELOPMENT
2.0X1.25AGREEN
2
1
LED8700
DEVELOPMENT
2.0X1.25AGREEN
2
1
LED8701
87
E051-6772
102
SYNC_MASTER=N/A SYNC_DATE=N/A
ETHERNET CONNECTOR
MAKE_BASE=TRUEVESTA_XMTLED_LTP_VESTA_XMTLED_L
TP_VESTA_ACTLED_LMAKE_BASE=TRUEVESTA_ACTLED_L
=PP3V3_ENET
=PP3V3_ENET
VESTA_ACTLED
VESTA_XMTLED
=PP2V5_ENET
ENET_MDI_P<0>ENET_MDI_N<0>
ENET_MDI_P<1>ENET_MDI_N<1>
ENET_MDI_N<3>ENET_MDI_P<3>
ENET_MDI_N<2>ENET_MDI_P<2>
GND_CHASSIS_RJ45GBIT_2_5V
LED8700_N
LED8700_P
LED8701_N
LED8701_P
87
87
86
86
86
86
7
7
7
86
86
86
86
86
86
86
86
7
PHY_LINKON_LPHY_PINT_L
FWVDDP
PHY_LREQ_H
PHY_LPS_H
PHY_CTL_1_H
PHY_CTL_0_H
PHY_DATA_7_HPHY_DATA_6_H
PHY_DATA_0_H
PHY_DATA_1_HPHY_DATA_2_H
PHY_DATA_3_H
PHY_DATA_4_HPHY_DATA_5_H
(7 OF 8)
PHY_LCLK_HPHY_SCLK_H
FIREWIRE
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
Power aliases required by this page:
Signal aliases required by this page:
(NONE)
(NONE)
- _PP2V5_PWRON_SB
BOM options provided by this page:
ELECTRICAL_CONSTRAINT_SET
Page Notes
DIFFERENTIAL_PAIRNET_SPACING_TYPENET_PHYSICAL_TYPE
402MF-LF
22
1/16W5%
21
R8800
20%
402CERM10V
0.1uF2
1 C88020.1uF
402CERM10V20%
2
1 C880120%10VCERM402
0.1uF2
1 C8800
SHASTAV1.0BGA
OMIT
P2
P3
P1P6
N7
R1
L2M3
L1
N6M7
N1
P5N4
N3
N2
A4
J7
N5
U2300
10288E051-6772
SYNC_MASTER=N/A SYNC_DATE=N/A
Shasta FireWire
FW_PINTFW_PINT
FW_LREQFW_LREQFW_LPS FW_LPS
FW_DATA<7..0>FW
FW_CLK98M_LCLKFW_LCLK P25MM
FW_CLK98M_LCLK_RP25MM
FW FW_CTL<1..0>
FW_CLK98M_PCLKFW_PCLK P25MM
FW_CLK98M_LCLKFW_CLK98M_PCLK FW_CLK98M_LCLK_R
FW_LREQFW_LPS
FW_CTL<0>FW_CTL<1>
FW_DATA<7>
FW_DATA<5>FW_DATA<4>FW_DATA<3>FW_DATA<2>FW_DATA<1>FW_DATA<0>
=PP2V5_PWRON_SB
FW_PINT FW_LINKON
FW_DATA<6>
74 25
89
89
89
89
89
89
89
89 89
89
89
89
89
89
89
89
89
89
89
89
23
89
89
88
88
88
88
88
88
88
88
88 88 88
88
88
88
88
88
88
88
88
88
88
88
7
88 89
88
FAVDDLFAVDDMFAVDDH
TDBL[1]TDBL[2]
PLI_PCLK
TDBL[0]
TPBIAS[0]TPAP[0]TPAN[0]TPBP[0]TPBN[0]
TPBIAS[1]TPAP[1]TPAN[1]TPBP[1]TPBN[1]
TPAP[2]TPAN[2]TPBP[2]TPBN[2]
TPBIAS[2]
PLI_INTPLI_LINK
SDCSDA
RDAC2
XTALVDD2
BIASVDD2
PLLVDD2
BIASGND PLLGND2
TEST_1394[0]TEST_1394[1]TVCO_24
XTALI_24XTALO_24
CPS
ESDET1ESDET0
ESDET2
PLI_LCLK
PLI_DATA[7]
PLI_DATA[0]PLI_DATA[1]PLI_DATA[2]PLI_DATA[3]PLI_DATA[4]PLI_DATA[5]PLI_DATA[6]
PLI_CTL[0]
PWR_CLASS
PLI_CTL[1]
PLI_LPSPLI_LREQ
LPWR_1394DS_ONLY_EN0
3 OF 3
VESTA FW
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
Put crystal circuit close to PHY
CRYSTAL LOAD CAPACITANCE IS 12PF
0 - Sets Power Class to 0x0
ESR < 0.5 ohms
(PROVIDED BY LINK PAGE)
ELECTRICAL_CONSTRAINT_SET SPACINGNET_TYPE
PHYSICAL DIFFERENTIAL_PAIR
Secondary Length: 500 mils
NOTE: Target differential impedance for FW data pairs is 110 ohms.
If stuffed, adds external pull-down to- VESTA_PWR_CLASS_0
See straps table for more information.
Length Tolerance: 100 milsPrimary Max Sep: 7.5 milsSecondary Max Sep: 100 mils
Line To Line: 0.38 mms
Net Spacing Type: FW
- VESTA_DS_ONLY_EN0
(NONE)
BOM options provided by this page:
counter internal pull-down in Vesta.
Internal Pull-Down
- _PP3V3_FW- _PPFW_PHYPower aliases required by this page:
- _PP2V5_ENETFW- _PP1V2_ENETFW
Page Notes
0 - Port 0 Bilingual mode(Internal Pull-down)
1 - Port 0 Data/Strobe mode onlyDS_ONLY_EN0 - Port 0 Data/Strobe
(Internal Pull-up)
1 - Sets Power Class to 0x4PWR_CLASS - FireWire Power Class
Vesta Config Straps:(I2C_VESTA_SDA)(I2C_VESTA_SCL)
(Int PU)
(Int PU)
Internal Pull-Up
(Int PU)
counter internal pull-up in Vesta.
See straps table for more information.
If stuffed, adds external pull-up to
Signal aliases required by this page:
- _PP3V3_ENETFW
1/16W
22
SM-LF
5%
81
RP8900
1/16W5%
SM-LF
2263
RP8900
22
SM-LF1/16W5%
72
RP8900
5%1/16WSM-LF
2254
RP8901
22
SM-LF1/16W5%
81
RP8901
22
SM-LF1/16W5%
54
RP8900
22
5%1/16WSM-LF
72
RP8901
5%1/16WSM-LF
2263
RP8901
5%1/16WMF-LF402
2221
R8900
22
5%1/16WMF-LF402
21
R8901
1/16W5%
MF-LF402
2221
R8902
2.0K
MF-LF1/16W
1%
402 2
1R8909
1K
402
VESTA_DS_ONLY_EN0
5%1/16WMF-LF
2
1R8911
VESTA_PWR_CLASS_0
1K
402MF-LF1/16W
5%
2
1R8912
0.1uF20%
CERM402
10V2
1 C891320%10VCERM402
0.1uF2
1 C891420%10VCERM
0.1uF
4022
1 C8915
0.1uF
402CERM10V20%
2
1 C891120%10VCERM402
0.1uF2
1 C8909
20%10V
402
0.1uF
CERM2
1 C8908
CERM
20%
402
0.1uF10V2
1 C8907
402CERM10V20%0.1uF
2
1 C8906
402
10V20%
CERM
0.1uF2
1 C8903SM
FERR-EMI-600-OHM21
L8901
402CERM
20%50V
0.001uF2
1 C89016.3V
10uF20%
CERM1206-1
2
1 C8900SM
FERR-EMI-600-OHM21
L8900
20%50V
402
0.001uF
CERM2
1 C8905
805
6.3V
10UF10%
X5R2
1 C8904SM
FERR-EMI-600-OHM21
L8902
332
MF-LF1/16W1%
4022
1R8921
24.576M
8X4.5MM-SM
CRITICAL
21
Y8920 MF-LF402
1K1/16W
1%
2
1R8903
MF-LF
5%
402
1/16W
390K
2
1R8914
BCM5462FBGA-200
OMIT
N15
P13
P14
N13
H15
K15
M15
H14
K14
M14
H13
J13
L13
G15
J15
L15
G14
J14
L14
J4
J5
B14B13
A14
H1
H2
R15
A12
P15
N14
E15
D12
D11
D14
D15D13
G11G12
G13
F13F12
F11
E11E12
E13E14
J3
M12
M11
L12
L11
N12
N11
M10
L10
K13
K12
K11
C13C12
C11
A13
R13
R14
P12
U8600
1/16W5%
MF-LF402
10K
2
1R8915
MF-LF402
1/16W5%10K
2
1R8916
FERR-EMI-600-OHM
SM
21
L8906
FERR-EMI-600-OHM
SM
21
L8909
SM
FERR-EMI-600-OHM21
L8913
805X5R
10UF6.3V10%
2
1 C8917
X5R805
10%10UF6.3V2
1 C8918
X5R
10%10UF
805
6.3V2
1 C8919
50VCERM
5%22pF
4022
1C89205%
402CERM50V
22pF2
1C8921
1%10K1/16WMF-LF4022
1R8904
1K
VESTA_BILINGUAL_EN12
1/16WMF-LF
5%
4022
1R8931
VESTA_PORT1_DISABLE
1K
MF-LF
5%1/16W
402 2
1R89331K
VESTA_PORT2_DISABLE
5%1/16WMF-LF
402 2
1R8935
I402
I403
I404
I405
I406
I407
I408
I409
I410
I411
I412
I413
I414
I415
I416
I417
10289E051-6772
SYNC_MASTER=N/A SYNC_DATE=N/A
Vesta FireWire PHY
FW_CTL<0>
FW_CTL<1>
FW_DATA_R<0>FW_DATA_R<1>
VESTA_DS_ONLY_EN0
FW_DATA_R<6>
FW_CTL_R<0>FW_CTL_R<1>
FW_DATA_R<2>
P38MM VESTA_CLK24M_XTALO_RP38MM VESTA_CLK24M_XTALO
FW FW_TPB_N<2>FW_TPB3 FW FW_TPB2FW FW_TPB_P<2>FW_TPB3 FW FW_TPB2
FW FW_TPB_P<1>FW_TPB2 FW FW_TPB1FW FW_TPA_N<1>FW_TPA2 FW FW_TPA1
CLOCKSP38MM FW_CLK98M_PCLK_R
FW FW FW_TPA_P<0>FW_TPA0FW_TPA1
FW FW_TPA_N<2>FW_TPA3 FW FW_TPA2
P38MM VESTA_CLK24M_XTALIVESTA_CLK24M_XTAL
FW_DATA_R<3>
TP_VESTA_TEST_1394<0>
TP_VESTA_TVCO_24
FW_CPS
VESTA_BILINGUAL_EN12_LVESTA_PORT1_DISABLE_L
I2C_VESTA_SDA
FW_TPB_P<0>
FW_TPB_N<1>
FW_TPA_N<0>
FW_LINKON
FW_CLK98M_PCLK_R
FW_TPB_P<1>
MIN_LINE_WIDTH=0.5 mmVOLTAGE=1.2VMIN_NECK_WIDTH=0.25 mm
PP1V2_VESTA_FAVDDL
FW_TPB_P<2>
TP_VESTA_TDBL<1>
MIN_LINE_WIDTH=0.5 mm
PP2V5_VESTA_XTALVDD2VOLTAGE=2.5VMIN_NECK_WIDTH=0.25 mm
=PP1V2_ENETFW
=PP1V2_ENETFW
VESTA_RDAC2_PD
FW_TPA_N<1>
FW_TPB_N<2>
=PP3V3_ENETFW
TP_VESTA_TDBL<2>
FW_TPB_N<0>
FW_TPA_P<0>
FW_PINT
FW_CLK98M_PCLKFW_DATA<1>
FW_DATA<5>
FW_DATA<7>
FW_DATA<0>
FW_DATA<2>
FW_DATA<4>
FW_DATA<6>
FW_DATA<3>
FW_TPA_P<1>
FW_TPBIAS<0>MIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.25 mm
FW_TPBIAS<1>MIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.25 mm
FW_CLK98M_LCLK
=PP3V3_FW
=PPFW_PHY
VESTA_CLK24M_XTALO_R
FW_LPSFW_LREQ
=PP2V5_ENETFW
FW FW_TPB_P<0>FW_TPB1 FW FW_TPB0FW FW_TPB_N<0>FW_TPB1 FW FW_TPB0
FW FW_TPB_N<1>FW_TPB2 FW FW_TPB1
FW FW_TPA_P<1>FW_TPA2 FW FW_TPA1
FW FW FW_TPA_N<0>FW_TPA1 FW_TPA0
FW_TPBIAS<2>MIN_LINE_WIDTH=0.25 mmMIN_NECK_WIDTH=0.25 mm
FW FW_TPA_P<2>FW_TPA3 FW FW_TPA2
FW_TPA_N<2>
VESTA_PORT2_DISABLE_LVESTA_PORT1_DISABLE_L
VOLTAGE=2.5VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mm
PP2V5_VESTA_BIASVDD2
VOLTAGE=1.2VPP1V2_VESTA_PLLVDD2
MIN_LINE_WIDTH=0.5 mmMIN_NECK_WIDTH=0.25 mm
FW_DATA_R<4>
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mmVOLTAGE=3.3V
PP3V3_VESTA_FAVDDH
VESTA_PORT2_DISABLE_L
VOLTAGE=2.5VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.5 mm
PP2V5_VESTA_FAVDDM
FW_TPA_P<2>
VESTA_BILINGUAL_EN12_L
=PP2V5_ENETFW
TP_VESTA_TEST_1394<1>
VESTA_PWR_CLASS
FW_LOWPWR
I2C_VESTA_SCL
=PP3V3_FW
TP_VESTA_TDBL<0>
FW_DATA_R<5>
FW_DATA_R<7>
VESTA_CLK24M_XTALO
VESTA_CLK24M_XTALI
89
89
90
89 89
90
90
90
90
90
90
90
90
90
90
90
90
86
86
90
90
90
90
90
89
86
90
90
90
90
90
90
90
90
86
89
88
88
89
89
89
89
89
89
89
89
89
89
89
89
89
89
89
88
89
89
89
7
7
89
89
7
89
89
88
88 88
88
88
88
88
88
88
88
89
90
90
88
7
90
89
88
88
12
89
89
89
89
89
90
89
89
89
89
89
89
89
12
25
7
89
89
SYM_VER-1
SYM_VER-1
TPI
VGND
VP
TPI#
TPO#
TPO
TPI
VGND
VP
TPI#
TPO#
TPO
SYM_VER-1
SYM_VER-1
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
"Snapback" & "Late VG" Protection
3rd TPA/TPB pair unused
(TPA+)
(TPA-)
(TPB+)
(TPB-)
SPACINGNET_TYPE
PHYSICAL DIFFERENTIAL_PAIR
ESD Rail
"Snapback" & "Late VG" Protection
8 WATTS MAX
24 VOLTS
1394A
514-0202
514-0202
1394A
(TPA+)
(TPA-)
(TPB+)
(TPB-)
(PPFW_PORT1_VP)
PORT 1
(PPFW_PORT0_VP)
PORT 0Termination
Place close to FireWire PHY
SMC
MURS320XXG
21
D9000
805
50VCERM
0.1UF20%
2
1C9009
1206
FERR-160-OHM
21
L9001
PP24V_RUN
2512FF1W
1.3
20%
21
R9056CRITICAL
1.3
20%1WFF2512
21
R9002
0.01uF
402CERM16V20%
2
1C90260.01uF20%16VCERM402
2
1 C9025
0.001uF
402
50V20%
CERM 2
1C902120%50V
CERM402
0.001uF2
1C9020
0
5%1/8WMF-LF805
21
R9020
BAV99DW-X-FSOT-363
3
5
4
DP9020
SOT-363BAV99DW-X-F
3
5
4
DP9021
20%0.001uF
402CERM50V 2
1C9023
SOT-363BAV99DW-X-F
6
2
1
DP9020
SOT-363BAV99DW-X-F
6
2
1
DP9021
20%
CERM
0.001uF
402
50V 2
1C9022
165-OHMSM
4
32
1
FL9020
SM165-OHM
4
32
1
FL9021
FWS22F-ST-TH
CRITICAL
1
2
5
6
3
4
987 10
J9001
CRITICAL
F-ST-THFWS22
1
2
5
6
3
4
987 10
J9000
20%16V
CERM402
0.01uF2
1C9016
402CERM16V20%0.01uF
2
1 C9015
SM165-OHM
4
32
1
FL9010
165-OHMSM
4
32
1
FL9011
805MF-LF1/8W5%
021
R9010
SOT-363BAV99DW-X-F
3
5
4
DP9010
20%50V
CERM402
0.001uF2
1C9011
BAV99DW-X-FSOT-363
3
5
4
DP9011
0.001uF50V
CERM402
20%2
1C9013
BAV99DW-X-FSOT-363
6
2
1
DP9010
0.001uF
402CERM50V20%
2
1C9010
BAV99DW-X-FSOT-363
6
2
1
DP9011
0.001uF
CERM
20%50V
4022
1C9012
SM
0.5AMP21
F9002
SM
1.5AMP-33V
21
F9000
1uF
CERM402
6.3V10%
2
1 C9060
402
1%56.21/16WMF-LF
2
1R906156.2
1%1/16W
402MF-LF
2
1R9060
6.3VCERM402
1uF10%
2
1 C9050
56.21%1/16WMF-LF4022
1R905156.2
1%
402
1/16WMF-LF
2
1R9050
MF-LF
56.21%1/16W
4022
1R906356.2
1%1/16WMF-LF
4022
1R9062
MF-LF402
1/16W1%4.99K
2
1R9064
402CERM25V5%
270pF2
1C9064
1K5%
MF-LF1/16W
4022
1R9070
56.21%1/16WMF-LF4022
1R905356.2
1%1/16WMF-LF
4022
1R9052
402
4.99K1%1/16WMF-LF
2
1R9054
25V5%
CERM402
270pF2
1C9054
SM-1
400-OHM-EMI21
L9090
1/16W1%
MF-LF
665
402
21
R9090
BZX84C2V7-X-FSOT23
31
D9090
I400
I401
I402
I403
I404
I405
I406
I407
051-6772 E
90 102
SYNC_MASTER=N/A SYNC_DATE=N/A
FIREWIRE CONNECTORS
MAKE_BASE=TRUENC_FW_TPA_P2
NO_TEST=YES
FW_TPB_N<2>
NC_FW_TPA_N2MAKE_BASE=TRUENO_TEST=YES
FW_TPBIAS<2>
FW_PORT0_TPB_P
FW_PORT0_TPA_P_FL
FW_PORT0_TPA_N_FL
FW_PORT0_TPB_P_FL
FW_PORT1_TPA_P_FL
FW_PORT1_TPA_N_FL
FW_PORT1_TPB_P_FL
PPFW_PORT0_VP
MIN_NECK_WIDTH=0.25 mmVOLTAGE=33VMIN_LINE_WIDTH=0.6 mm
GND_FW_PORT0_VGVOLTAGE=0VMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm
GND_CHASSIS_FIREWIRE
FW_PORT0_TPA_P
FW_PORT0_TPB_N
GND_FW_PORT1_VG
MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mmVOLTAGE=0V
GND_CHASSIS_FIREWIRE
FW_PORT1_TPA_P
FW_PORT0_TPA_N
FW_PORT1_TPB_P
PPFW_PORT1_VP
MIN_LINE_WIDTH=0.6 mmVOLTAGE=33VMIN_NECK_WIDTH=0.25 mm
VOLTAGE=24V
FW_VP
MIN_LINE_WIDTH=0.8MMMIN_NECK_WIDTH=0.25MM
PP24V_FW_R
VOLTAGE=24VMIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.8MM
FW_PORT0_TPB_N_FL
FW_PORT1_TPB_N_FL
=PP3V3_FW
FW_TPA_C<0>
VOLTAGE=3.3VPP3V3_FW_ESD
MIN_LINE_WIDTH=0.38 mmMIN_NECK_WIDTH=0.25 mm
VOLTAGE=3.3VMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.38 mm
PP3V3_FW_ESD_F
FW_PORT0_TPA_P_FLFW FW FW_TPA0_FLFW_PORT0_TPA_N_FLFW FW FW_TPA0_FL
FW FW FW_TPA1_FL FW_PORT1_TPA_N_FL
FW_PORT0_TPB_P_FLFW FW FW_TPB0_FLFW_PORT0_TPB_N_FLFW FW FW_TPB0_FL
FW FW FW_TPA1_FL FW_PORT1_TPA_P_FL
FW FW FW_TPB1_FL FW_PORT1_TPB_P_FL
FW FW FW_TPB1_FL FW_PORT1_TPB_N_FL
VOLTAGE=24V
PP24V_FW_DMIN_LINE_WIDTH=0.8MMMIN_NECK_WIDTH=0.25MM
PPFW_PORT1_VP
FW_TPBIAS<0>
MAKE_BASE=TRUENC_FW_TPBIAS2
NO_TEST=YES
FW_TPB2_PDMAKE_BASE=TRUE
NO_TEST=YES FW_PORT1_TPB_N
FW_PORT1_TPA_N
PP3V3_FW_ESD
=PPFW_PHY
MAKE_BASE=TRUE
PP24V_FW
VOLTAGE=24VMIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.8MM
PP3V3_FW_ESD
FW_TPB_P<2>
FW_TPA_N<2>
FW_TPA_P<2>
FW_PORT1_TPB_NMAKE_BASE=TRUE
FW_TPB_N<1>
FW_TPA_C<1>
FW_TPB_P<1>
FW_TPBIAS<1>
FW_PORT1_TPA_NMAKE_BASE=TRUE
FW_TPB_N<0>
MAKE_BASE=TRUEFW_PORT1_TPA_P
FW_PORT0_TPA_PMAKE_BASE=TRUE
FW_TPA_N<1>FW_TPA_P<1>
MAKE_BASE=TRUEFW_PORT0_TPA_NFW_PORT0_TPB_PMAKE_BASE=TRUE
FW_PORT0_TPB_NMAKE_BASE=TRUE
FW_PORT1_TPB_PMAKE_BASE=TRUE
FW_TPB_P<0>FW_TPA_N<0>FW_TPA_P<0>
90
90
89
89
89
90
90
90
90
90
90
90
7
90
90
7
90
90
90
90 6
90
90
7
90
90
90
90
90
90
90
90
90
90
89
90
90
90
89
90
89
89
89
90 89
89
89
90
89
90
90
89
89
90
90
90
90
89
89
89
DM1DP1
DM2DP2
RSDM2
RSDP1
RSDM1
RSDP2
AVDD
DM3DP3
RSDM3
RSDP3
PPON1
OCI2OCI1
OCI3OCI4OCI5
PPON2
PPON5PPON4PPON3
RSDM4DM4DP4
DM5DP5
RSDP4
RSDM5
RSDP5
RREF
AVSS(R)
AVSS
NC1NC2
XT1/SCLKXT2
VDD
VSS
(8 OF 8)NC0
NC1
NC3
NC2
NC4
NC5
NC6NC7
NC8
NC9NC10
NC12
NC11
NC14
NC13
NC15
NC19
NC18NC17
NC16
NC20
NC22
NC23NC24
NC21
NC25
NC29NC28
NC27
NC26
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
(NONE)
Length Tolerance: 50 milsLine To Line: 19.5 mils
Tie to GND at ball N11
Y9145 LOAD CAPACITANCE IS ??PF
USB2 data pairs is 90 ohms.NOTE: Target differential impedance for
Secondary Length: 500 mils
NET_PHYSICAL_TYPE NET_SPACING_TYPE DIFFERENTIAL_PAIR
(USB2_OC<4>)
(USB2_OC<0>)
(USB2_N<4>)(USB2_P<4>)
(USB2_N<3>)(USB2_P<3>)
(USB2_P<2>)(USB2_N<2>)
(USB2_P<1>)(USB2_N<1>)
(USB2_N<0>)(USB2_P<0>)
ELECTRICAL_CONSTRAINT_SET
(USB2_OC<2>)
Secondary Max Sep: 100 milsPrimary Max Sep: 7.5 mils
BOM options provided by this page:
- _PP3V3_PWRON_USBPower aliases required by this page:
(NONE)
Page Notes
Net Spacing Type: USB2
(USB2_OC<1>)
(USB2_OC<3>)
Signal aliases required by this page:
1%1/16WMF-LF402
3621
R9102
1%1/16W
36
402MF-LF
21
R9103
402MF-LF1/16W1%
3621
R9104
1%1/16WMF-LF402
3621
R9105
36
402MF-LF1/16W1%
21
R9106
MF-LF
1%1/16W
402
3621
R9107
1%1/16WMF-LF402
3621
R9108
36
402MF-LF1/16W1%
21
R9109
402
9.09K1%
MF-LF1/16W
2
1R9138
402
10VCERM
0.1uF20%
2
1C9125
402CERM10V20%
0.1uF2
1C9124
20%10V
CERM
0.1uF
4022
1C9130
402
0.1uF
CERM10V20%
2
1C9129
1.5K
402MF-LF1/16W5%
2
1R9141
CRITICAL
FBGANEC_UPD720101_USB2
P8
L9
N2
B2
A2
B14
H14
N14
P10
N1
D8
F11
J11
G4
D12
H12
L12
M11
B13
N13
B1
L13
N8
E2
A3
A12
A13
P12
P3
D7
H4
G12
D13
F13
H13
J13
P2
C14
E14
G14
J12
K13
E13
F12
H11
K14
M14
P11
A9
C10
C11
A11
C12
B9
A10
B10
B11
B12
M6
P6
C13
E12
G13
J14
L14
D14
F14
G11
K12
M13
N11
M12
P13
N12
N10
U7700
MF-LF1/16W5%100
4021
2R9145
22pF5%50VCERM402
2
1 C9146
20%10V
CERM
0.1uF
4022
1C9123
402CERM10V20%
0.1uF2
1C9122
CERM
0.1uF
402
20%10V 2
1C91280.1uF
402CERM10V20%
2
1C9127
20%10V
CERM
0.1uF
4022
1C9121
402
0.1uF
CERM10V20%
2
1C9126
10K5%1/16WSM-LF
5678
4321
RP911010K5%
1/16WMF-LF
402 1
2R9110
NOSTUFF
10uF6.3V
805CERM
20%2
1C9120
MF-LF402
1.5K1/16W
5%
2
1R9140
11.4X4.7X4.2-SM
CRITICAL
30.0000M21
Y9145
22pF5%50V
CERM402
2
1C9145
V1.0BGA
SHASTA
OMIT
T2T1
R8R7
R6
R5R4
Y3Y1
W3
W1V4
V3
V2V1
U6
U5
R3
U4
U3U2
U1
T8T7
T6
T5T4
T3
P8P7
U2300
SM21
XW9100
20%
402
10VCERM
0.1uF2
1C91370.1uF
20%10V
CERM402
2
1C9136NOSTUFF
805CERM6.3V
10uF20%
C9135
FERR-EMI-100-OHM
SM
21
L9135
5%1/10WMF-LF
4.7
603
21
R9135
402MF-LF
36
1%1/16W
21
R9100
402MF-LF
1%1/16W
3621
R9101
10291051-6772 E
SYNC_MASTER=N/A SYNC_DATE=N/A
USB Host Interfaces
USB2 USB2 USB2_1 USB2_P<1>USB2_1USB2 USB2 USB2_N<1>USB2_1 USB2_1
USB2 USB2 USB2_P<2>USB2_2USB2_2
USB2 USB2 USB2_P<3>USB2_3USB2_3
NEC_CLK30M_XT2_RP25MM=PP3V3_PWRON_USB
USB_NEC_P<3>
USB2USB2_4 USB2_N<4>USB2_4USB2
USB2_OC<0>
GND_NEC_AVSS_R
NEC_NC2_PU
USB2_PWREN<0>
USB2_PWREN<2>
TP_SB_NC_R4
USB2_P<3>
USB2_N<1>
USB_NEC_N<0>
USB_NEC_P<0>
USB_NEC_N<1>
USB_NEC_P<1>
USB_NEC_N<2>
USB_NEC_N<3>
USB_NEC_N<4>
USB_NEC_P<4>
USB2_N<0>USB2_P<0>
USB2_P<1>
USB2_P<2>USB2_N<2>
USB2_P<4>
NEC_CLK30M_XT2
=PP3V3_PWRON_USB
USB2_OC<1>
USB2_OC<3>USB2_OC<2>
USB2_OC<4>
=PP3V3_PWRON_USB
NEC_CLK30M_XT1
NEC_RREF_PD
NEC_NC1_PU
NEC_CLK30M_XT2_R
USB2_PWREN<4>USB2_PWREN<3>
USB2_PWREN<1>
TP_SB_NC_Y1TP_SB_NC_Y3
TP_SB_NC_W3TP_SB_NC_W1
TP_SB_NC_V2TP_SB_NC_V3TP_SB_NC_V4
TP_SB_NC_V1TP_SB_NC_U6TP_SB_NC_U5
TP_SB_NC_U3TP_SB_NC_U4
TP_SB_NC_U2
TP_SB_NC_T8TP_SB_NC_U1
TP_SB_NC_T7TP_SB_NC_T6TP_SB_NC_T5
TP_SB_NC_T3TP_SB_NC_T4
TP_SB_NC_T2TP_SB_NC_T1TP_SB_NC_R8
TP_SB_NC_R6TP_SB_NC_R7
TP_SB_NC_R5
TP_SB_NC_R3
TP_SB_NC_P7TP_SB_NC_P8
USB2_N<4>
USB2 USB2 USB2_P<0>USB2_0 USB2_0USB2 USB2 USB2_N<0>USB2_0 USB2_0
USB2 USB2USB2_2 USB2_N<2>USB2_2
USB2USB2_3 USB2_N<3>USB2_3USB2
USB2 USB2USB2_4 USB2_P<4>USB2_4
NEC_CLK30M_XT1USB2_NEC_XTAL P25MMNEC_CLK30M_XT2P25MM VOLTAGE=3.3V
MIN_LINE_WIDTH=0.5MM
PP3V3_PWRON_NEC_AVDD
MIN_NECK_WIDTH=0.25MM
USB_NEC_P<2>
USB2_N<3>
GND_NEC_AVSS_RVOLTAGE=0VMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM
92
92
92
92
91
91
92
92
92
92
92
92
92
91
91
91
91
92
92
92
92
91
92
91
91
91
91
91 7
76
92
91
92
92
6
91
91
91
91
91
91
91
76
91
7
92
92
92
76
7
91
91
92
92
92
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
76
91
91
91
91
76
91
91
91
91
SYM_VER-1
SYM_VER-1
SYM_VER-1
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
PORT 1
ELECTRICAL_CONSTRAINT_SET NET_SPACING_TYPE NET_PHYSICAL_TYPE
Page Notes
USBCONTROLLER
BY
DIFFERENTIAL_PAIR
PROVIDED
UNUSED PORT
provide the appropriate constraints
this page. It is assumed that the
terminate unused signals.
(NONE)
(NONE)
necessary aliases to map the
- _PP5V_PWRON_USB
Signal aliases required by this page:
BOM options provided by this page:
NOTE: USB pairs are NOT constrained on
destinations and/or to properly USB pairs to their appropriate
External USB Ports
514-0199
GNDD+D-VDD
PORT 2
514-0199
VDDD-D+GND
VDD
PORT 3
514-0199
D-D+GND
- _PP3V3_PWRON_BT- _PP3V3_PWRON_UDASH- _PP5V_PWRON_UDASH
Power aliases required by this page:
to apply to entire USB D+/D- XNets.
USB Host Controller page will
control on USB ports 2-4. Rename
single-pin connections. USB controller outputs to indicate
NOTE: This design does not provide power
neoBorg Implementation
NOTE: This page is expected to contain the
402CERM50V
NO STUFF
5%33pF
2
1 C9215NO STUFF
33pF
402
5%50V
CERM 2
1C9214
120-OHM2012
4
32
1
L9212CERM402
16V
0.01uF20%
2
1C92130.01uF
CERM
20%
402
16V 2
1C9212
NOSTUFF
10UF
1210
16V10%
CERM2
1 C9211
6.3V
NOSTUFF
POLY
150uF20%
SMD2
1 C9210
FERR-250-OHM
SM
21
L9211
FERR-250-OHM
SM
21
L9210
MF-LF
15K
402
1/16W5%
2
1R92111/16WMF-LF
5%15K
4022
1R9210
0.01uF
402CERM
20%16V 2
1C9223
NO STUFF
402CERM50V5%33pF
2
1 C9225NO STUFF
33pF
CERM50V5%
4022
1C9224
1210
NOSTUFF
CERM16V10%10UF
2
1 C9221
CERM402
0.01uF20%16V 2
1C9222
6.3VPOLY
20%150uF
SMD
NOSTUFF
2
1 C9220SM
FERR-250-OHM21
L9220
FERR-250-OHM
SM
21
L9221
120-OHM2012
4
32
1
L9222
15K1/16WMF-LF
5%
4022
1R9221
402MF-LF1/16W
5%15K
2
1R9220
F-ST-THUSB-UAS25
CRITICAL
4
3
2
1
7
6
5
J9210
F-ST-THUSB-UAS25
CRITICAL
4
3
2
1
7
6
5
J9220
120-OHM2012
4
32
1
L9232402
CERM
0.01uF20%16V 2
1C9233CRITICAL
USB-UAS25F-ST-TH
4
3
2
1
7
6
5
J9230
5%50VCERM402
33pF
NO STUFF
2
1 C9235
CERM402
0.01uF20%16V 2
1C9232
CERM1210
NOSTUFF
10UF10%16V2
1 C9231
NO STUFF
33pF5%50V
CERM402
2
1C9234
FERR-250-OHM
SM
21
L9230
NOSTUFF
150uF20%6.3V
SMDPOLY2
1 C9230
FERR-250-OHM
SM
21
L9231
15K5%1/16WMF-LF4022
1R923115K
MF-LF402
1/16W5%
2
1R9230
SM-1
2AMP-6V21
F9200
I526
I527
1/10W5%300
603MF-LF
2
1R9201
603
5%1/10WMF-LF
160
2
1R9200
402MF-LF1/16W5%15K
2
1R92515%
1/16W
402
15K
MF-LF2
1R9250
NOSTUFF
402
021
R9212
NOSTUFF
0
402
21
R9213
NOSTUFF
0
402
21
R9222
NOSTUFF
402
021
R9223
NOSTUFF
0
402
21
R9232
NOSTUFF
0
402
21
R9233
10292
051-6772 E
SYNC_MASTER=N/A SYNC_DATE=N/A
USB Device InterfacesUSB2_PORT3_N_F
USB2_PORT1_NMAKE_BASE=TRUE
USB2_PORT1_P_FUSB2_PORT1_N_F
USB2_N<0>
MIN_LINE_WIDTH=0.6MM
PP5V_USB2_PORT2_F
MIN_NECK_WIDTH=0.25MMVOLTAGE=5V
MIN_LINE_WIDTH=0.6MMVOLTAGE=0VMIN_NECK_WIDTH=0.5MM
GND_USB2_PORT2
USB2_PORT2_P_F
USB2 USB2_PORT2_F USB2_PORT2_P_FUSB2
VOLTAGE=5VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
PP5V_USB2
USB2_PORT3_P_FUSB2 USB2_PORT3_F USB2
USB2_PORT1_PMAKE_BASE=TRUE
USB2_P<0>
VOLTAGE=0VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.5MM
GND_USB2_PORT3
TP_USB2_PWREN<2>MAKE_BASE=TRUE
TP_USB2_PWREN<4>MAKE_BASE=TRUE
USB2_PWREN<4>
USB2_PWREN<3> TP_USB2_PWREN<3>MAKE_BASE=TRUE
USB2_PWREN<2>
USB2_PWREN<1> TP_USB2_PWREN<1>MAKE_BASE=TRUE
TP_USB2_PWREN<0>MAKE_BASE=TRUE
USB2_PWREN<0>
USB2_OC<1>
USB2_OC<0>
USB2_PORT3_NMAKE_BASE=TRUE
USB2_N<2>
USB2_P<2> USB2_PORT3_PMAKE_BASE=TRUE
USB2_OC<2>
USB_OCMAKE_BASE=TRUE
USB2_OC<3>
_PP5V_PWRON_USB
USB2_P<1>
USB2_N<1>MAKE_BASE=TRUE
USB2_PORT2_N
USB2_PORT3_P_F
GND_CHASSIS_USB
PP5V_USB2_PORT3_FVOLTAGE=5VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
GND_CHASSIS_USB
GND_CHASSIS_USB
MIN_NECK_WIDTH=0.25MM
VOLTAGE=0MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.5MMMIN_LINE_WIDTH=0.6MMVOLTAGE=0V
GND_USB2_PORT1
VOLTAGE=5VPP5V_USB2_PORT1_F
MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
USB2_N<3>USB2_P<3>
USB2 USB2_PORT3_N_FUSB2 USB2_PORT3_F
USB2 USB2_PORT1_F USB2_PORT1_N_FUSB2USB2 USB2_PORT1_F USB2_PORT1_P_FUSB2
USB2_PORT2_FUSB2 USB2_PORT2_N_FUSB2
USB2_PORT2_PMAKE_BASE=TRUE
USB2_PORT2_N_F
92
92
92
92
92
92
92
92
92
92
92
92
92
92
92
6
6
6
91
6
6
6
59
6
91
6
6 91
91 6
91
91 6
6 91
91
91
91
91
91
91
7
91
91
6
7
6
7
7
6
91
91
6
6
6
6
6
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
Page Notes Spec Load: 0.5 A active, 3 mA auxiliary
Q52 Modem Connector
1 - MONO_OUT/PC_BEEP
From Intel Mobile Audio/Modem
Rev 1.0, February 22, 1999Daughter Card Specification
13 - CD_LEFT
9 - CD_GND
3 - GND
11 - CD_RIGHT
7 - AUXA_LEFT5 - AUXA_RIGHT
27 - GND29 - AC97_MSTRCLK
25 - AC97_RESET#
21 - 3.3Vmain19 - GND17 - 3.3Vaux15 - GND
23 - AC97_SDATA_OUT
28 - GND
16 - PRIMARY_DN
20 - GND
2 - AUDIO_PWRON
10 - 5Vmain
18 - 5Vd
22 - AC97_SYNC24 - AC97_SDATA_INB26 - AC97_SDATA_INA
30 - AC97_BITCLK
6 - RESERVED4 - MONO_PHONE
8 - GND
14 - RESERVED12 - RESERVED
516S0116
NCNC
NC
NC
NCNCNC
NC
NCNC
NCNC
NCNC
NCNC
514-0205
NCNC NC
Power aliases required by this page:- _PP3V3_PWRON_MODEM
Signal aliases required by this page:(NONE)
(NONE)BOM options provided by this page:
RJ11 CONNECTORSTUFFED AT FATP
SYMBOL USED FOR PLACEMENT
F-ST-SMC104A-H9.0
CRITICAL
9
87
65
4
30
3
29
2827
2625
2423
2221
20
2
19
1817
1615
1413
1211
10
1
36
35
3433
3231
J9401
RJ11-HGT27.5ST-TH
OMIT
21
J9402
STDOFF-4MM-9MMH-TH1
SDF9400
STDOFF-4MM-9MMH-TH1
SDF9401
10K
402MF-LF
5%1/16W
2
1R945110UF
CERM6.3V20%
8052
1 C9450
402
0.1UF10VCERM
20%2
1 C9451
051-6772
94 102
E
SYNC_MASTER=N/A SYNC_DATE=N/A
Modem Interface
I2S1_BITCLK
I2S1_SYNC
_PP3V3_PWRON_MODEM
I2S1_DEV_TO_SB_DTI
_PP3V3_PWRON_MODEM
MODEM_FC_RGDT
I2S1_MCLK
I2S1_SB_TO_DEV_DTOI2S1_RESET_L
MODEM_RING2SYS_L
GND_CHASSIS_MODEM
MAKE_BASE=TRUETP_UDASH_SDOWNUDASH_SDOWN
25
25
94
25
94
25
25
25
25
6
6
7
6
7
6
6
6
6
25
DOUTLRCK
VREF2L/M#REFO
VREF1
VDD
BCK
MINPMINM
MBIAS
VCOM
VOUTLVOUTR
VINRVINL
ATESTSCKI
PDWN*
SDA
ADRSCL
I2CEN
DOUTSDIN
DGND AGND
VCC
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
APPLE P/N 353S0933AUDIO CODEC
NC
NC
PLACE AT U95001UF10%10V
805CERM2
1 C9503
10UF
SMELEC
20%16V2
1 C9506
1000-OHM-200MA
0603
21
L9500
1UF10%
805
10VCERM2
1 C95021UF10V
805CERM
10%2
1 C9501
SM
10UF16VELEC
20%2
1 C95125%
MF-LF402
1/16W
3321
R9500
402
1/16W
33
MF-LF
5%
21
R95021/16W
402MF-LF
5%47K
2
1R9501 16V
SMELEC
20%10UF
2
1 C9510
X7R
10%16V
603
0.1UF2
1C9511
603X7R16V10%
0.1UF2
1C9509
20%10UF
CERM6.3V
8052
1C9500
603X7R16V10%0.1UF
2
1 C9504
0.1UF10%16VX7R603
2
1C9505402C0G50V
+/-0.25PF4.7PF
NOSTUFF
2
1C9513
1K1%1/16WMF-LF4022
1R9503
VQFNPCM3052A
54
2425
6
2
16
26
31
23
7
1819
17
32
9
29
2827
10
3
21
1413
12
15
11
1
30
228
20
U9500
SMELEC16V20%10UF
2
1 C9508
0.1UF10%16VX7R603
2
1C9507
SYNC_MASTER=AUDIO
AUDIO: CODECSYNC_DATE=02/16/2005
102
E
95
051-6772
AUD_CODEC_OUT_R
VOLTAGE=3.3VMIN_NECK_WIDTH=0.2MM
PPV_3V3_AUDIO_CODEC PP4V5_AUDIO_ANALOG
AUD_CODEC_IN_R
AUD_PCM_VCOMAUD_PCM_REF1
AUD_CODEC_LI_SHDN_L
GND_AUDIO_CODEC
PP3V3_AUDIO
NET_SPACING_TYPE=AUDIOAUD_SPDIF_OUT
I2S0_DEV_TO_SB_DTI NET_SPACING_TYPE=AUDIO
GND_AUDIO_CODEC
NET_SPACING_TYPE=AUDIOI2S0_BITCLK_DELAYED
AUD_MICIN_P
AUD_PCM_MBIAS
AUD_PSEUDO_VREF
NET_SPACING_TYPE=AUDIOAUD_CODEC_MCLK
I2S0_RESET_L
I2C_AUDIO_SDAI2C_AUDIO_SCL
AUD_PCM_REF2
AUD_CODEC_IN_LI2S0_SYNC
AUDI2S0OUTAUDSPDIFOUT
I2S0_SB_TO_DEV_DTO NET_SPACING_TYPE=AUDIO
AUD_MICIN_N
AUD_CODEC_OUT_L
102
102
102
98
101
98
100
102
96
100
96
100
98
MIN_LINE_WIDTH=0.25MM
96
96
100
96
95
7
101
25
95
102
102
102
96
102
25
18
18
96
25
25
102
98
V-
V+
V-
V+
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
APPLE P/N 353S0642
APPLE P/N 353S0642
LINE IN PSEUDO-DIFFERENTIAL AMPAV= 0.49
CRITICAL
MAX4253EUBUMAX
4
10
5
1
2
3
U96000.47UF
20%10V
603CERM 2
1C9602
SM
16V20%
10UF
ELEC
2 1
C9600
16V20%
SMELEC
10UF2 1
C9601
402MF-LF
1%1/16W
100K
2
1R9603
402
47K5%
1/16WMF-LF
2
1R9602
NOSTUFF
1/16W
0
5%
MF-LF402
21
R9601
1%
20.5K
1/16WMF-LF402
21
R9604
1%
10K
1/16WMF-LF402
21
R9607
1/16W
402
20.5K
1%
MF-LF
21
R9605
1/16W1%
10K
402MF-LF
21
R9606MF-LF1/16W1%165
4022
1R9600
NOSTUFF
5%50VCERM402
47PF21
C9603
BAV99DW-X-FSOT-363
6
2
1
D9600
MF-LF1/16W1%
10K
402
21
R9611
NOSTUFF
5%50VCERM402
47PF21
C9606
1%
10K
1/16WMF-LF402
21
R9612
UMAXMAX4253EUB
CRITICAL
4
10
6
9
8
7
U9600SOT-363
BAV99DW-X-F
3
5
4
D9600402
MF-LF
1%
20.5K
1/16W
21
R9609
1/16W
402
1%
MF-LF
20.5K21
R9610
10UF
SM
20%
ELEC16V
2 1
C9604
ELEC16V20%
10UF
SM
2 1
C9605
100K
402MF-LF
1%1/16W
2
1R9608
AUDIO: LINE INPUT AMPSYNC_DATE=02/16/2005SYNC_MASTER=AUDIO
051-6772 E
96 102
AUD_LI_L AUD_LI_L1
AUD_LI_VREFL
AUD_LI_L2
AUD_CODEC_IN_L
AUD_CODEC_LI_SHDN_L
AUD_CODEC_IN_R
AUD_PSEUDO_VREF
AUD_LI_GNDR1
PP4V5_AUDIO_ANALOG
AUD_LI_GND
AUD_LI_R1
AUD_LI_GNDL1
AUD_LI_VREFR
GND_AUDIO_CODEC
AUD_LI_R
PP4V5_AUDIO_ANALOG
AUD_LI_R2
GND_AUDIO_CODEC
AUD_CODEC_LI_SHDN_L1
AUD_PSEUDO_VREF
AUD_LI_GND
102
102
102
98
102
98
96
96
101
96
96
96
96
101
101
95
95
95
95
95
96
95
101
95
95
95
96
RIN+
SHDN*
VDDR
PVDD
VDDL
C1P
ROUT
PGND
SGND
PVSS
VSS
RIN-
LOUTLIN-LIN+
C1N
NC
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
APPLE P/N 353S0687
LINE OUT AMP
FC = 37 KHZ, HO = -1.4
CANCELLATIONGROUND NOISE
TO SHASTA GPIO
LINE OUT LOW-PASS FILTER
LINE OUT
CERM
1UF10%10V
8052
1 C9808
16V
SM
20%10UF
ELEC
2
1
C9811
CERM10V
805
1UF10%
2
1C9810
CRITICAL
QFNMAX9722AETE
11
9 13
16
6
1087
5
1
3
17
121415
2
4
U9800
402MF-LF1/16W1%10K
2
1R9805
402
1/16W1%
MF-LF
14.0K21
R9806
1%1/16W
402
14.0K
MF-LF
21
R9801
402
1/16W1%
MF-LF
3.92K21
R9802
10UF20%16V
SMELEC2
1 C9806
402
10K
1%1/16WMF-LF
21
R980010UF
20%16VELECSM-1
21
C9800
0603
1.5NF5%25VCERM
CRITICAL
2
1 C9802
CERM0603
25V5%1.5NF
CRITICAL
2
1 C9804
MF-LF402
1/16W
14.0K
1%
21
R9809
3.92K
402MF-LF
1%1/16W
21
R9808
402
10K
MF-LF1/16W1%
21
R9807
SM-1ELEC16V20%
10UF21
C9803
402
4.7K1/16W
5%
MF-LF2
1R9815
1/10W5%
4.7
MF-LF603
21
R9810
270PF
CERM603
5%50V
21
C9801
270PF
CERM50V5%
603
21
C9805
50V
100PF
CERM402
5%2
1C9812
402
100PF5%50V
CERM 2
1C9813402
1K
5%1/16WMF-LF
21
R9816
1K
MF-LF402
1/16W1%
2
1R98171K1%1/16WMF-LF4022
1R9818
805
6.3VCERM
10UF20%
2
1C9807
14
1%1/8WMF-LF805
21
R9811
805MF-LF1/8W1%
1421
R9812
1/16W
10K1%
MF-LF4022
1R9804
MF-LF1/8W
0
805
5%
21
R9813
MF-LF1/8W
0
805
5%
21
R9814
1/16W
402
1%
MF-LF
14.0K21
R9803
1UF
805
10%
CERM10V2
1 C9809
AUDIO: LINE OUT AMPSYNC_DATE=02/16/2005SYNC_MASTER=AUDIO
10298
051-6772 E
AUD_LOAMP_OUT_R
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MM
AUD_LO_GND
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MM
GND_AUD_LOAMP
AUD_LOAMP_IN_L_PAUD_LOAMP_IN_L_M
MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.25MM
AUD_MAX9722_PVSS
AUD_CODEC_OUT_R
GND_AUD_LOAMP_CHGPMP
PP5V_AUDIO_ANALOG
AUD_LOAMP_IN_R_P
GND_AUDIO_CODEC
AUD_MAX9722_C1P
AUDIO_LO_MUTE_L_F
AUD_LOAMP_IN_R_M
AUD_LOAMP_OUT_L
AUD_LOAMP_IN_L_P
AUD_LOAMP_IN_L_M
AUDCODECOUTL1
AUD_LOAMP_IN_R_P
AUDCODECOUTR1
AUDCODECOUTL
AUDCODECOUTR
AUD_CODEC_OUT_L
AUD_LOAMP_OUT_R
AUD_LOAMP_IN_R_M
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MM
AUD_LO_L
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MM
AUD_LO_R
GND_AUD_LOAMP_CHGPMP
AUD_MAX9722_C1N
GND_AUD_LOAMP_CHGPMP
AUDIO_LO_MUTE_L
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MM
AUD_LOAMP_OUT_L
AUD_LO_GND_PRB
GND_AUDIO_CODEC
MIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MMVOLTAGE=5VPP5V_AUDIO_LOAMP
102
102
98
98
100
102
96
100
102
102
96
98
101
102
98
98
95
98
102
98
95
98
98
98
98
98
95
98
98
101
101
98
98
25
98
101
95
SYM_VER-1
SYM_VER-1
PGND
VDD
G1
G2
CHOLD
AGND PADTHM
NC
SHDN*
FS2FS1
INL-
INL+
INR-
REG
INR+
OUTL+
OUTL+
OUTL-OUTL-
C1+
C1-
OUTR+
OUTR+
OUTR-OUTR-
SS
G
D
S G
D
S
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
GAIN AND SWITCHING FREQUENCY STUFF OPTIONS
MODULATION SETTING: LOW EMIGAIN SETTINGS: +19DB
APPLE P/N 353S0680SPEAKER AMP
TIE TO SHASTA GPIO
NC
APPLE P/N 155S0194
MF-LF402
1%1/16W
10K21
RA015
MF-LF1/16W5%
47K
402
21
RA013
402
1/16WMF-LF
1%10K
2
1RA014
NOSTUFF
800-OHMACM4532
4
32
1
LA011
NOSTUFF
ACM4532800-OHM
4
32
1
LA012
MAX9714QFN
22
21
43
33
12
11
14
24
2321
26
28
25
27
30
32
29
31
8
15
16
9
10
1817
20
19
7
5
6
13
U9700
0
5%1/10WMF-LF603
21
RA016
603MF-LF1/10W5%
021
RA017
1.5AMP-33V
SM
21
FA000
180-OHM-1.5A
0603
21
LA003
0.1UF50V10%
X7R603-1
2
1 CA008
180-OHM-1.5A
0603
21
LA004
X7R
0.47UF16V10%
8052
1 CA009
FERR-250-OHM
SM-1
21
LA000
0.47UF
16V
805X7R
10%
21
CA004
0.47UF
16VX7R
10%
805
21
CA005
180-OHM-1.5A
0603
21
LA002
0.47UF
X7R805
10%16V2
1 CA014
10%
X7R805
16V
0.47UF21
CA007
10%
805X7R16V
0.47UF21
CA006
20%
SM-2ELEC
220UF16V 2
1CA000
0603
180-OHM-1.5A21
LA001
402MF-LF1/16W5%0
2
1RA008NOSTUFF
05%1/16WMF-LF4022
1RA0091/16W
402MF-LF
5%0
NOSTUFF
2
1RA010NOSTUFF
05%1/16WMF-LF4022
1RA011
16V20%
SM-2
220UF
ELEC 2
1CA017
CERM16V20%
1206
1UF2
1 CA002
1/16W5%47K
SM-LF
5678
4321
RPA000
5%1/16WMF-LF
4.7K
4022
1RA012
50R28
1
XCA000
0603
1000-OHM-200MA21
LA005
5%
CERM
100PF
402
50V2
1 CA015
402CERM50V5%100PF
2
1 CA016
1000-OHM-200MA
0603
21
LA006
1000-OHM-200MA
0603
21
LA007
1000-OHM-200MA
0603
21
LA008
0.1UF
603
20%
CERM16V2
1 CA019
603
20%16V
CERM
0.1UF2
1CA018
100PF
CERM50V5%
4022
1CA020
CERM50V5%
402
100PF2
1CA021
NOSTUFF
402
100PF5%50V
CERM 2
1CA022
SM OMIT
21
XWA001
SM OMIT
21
XWA000
10UF10%16VCERM1210
2
1 CA00310UF10%16VCERM1210
2
1 CA023
CERM1210
10%10UF
16V 2
1CA001
OMITSM
21
XWA002
OMITSM
21
XWA003
1000PF
CERM25V5%
6032
1 CA010
603
1000PF5%25VCERM2
1 CA011
603
1000PF5%25VCERM2
1 CA012
CERM25V5%1000PF
6032
1 CA0132N7002DWSOT-363
1
2
6
QA000SOT-3632N7002DW
4
5
3
QA000
AUDIO: SPEAKER AMPSYNC_DATE=02/16/2005SYNC_MASTER=AUDIO
051-6772 E
102100
NET_SPACING_TYPE=AUDIOMIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MM
AUDSAMPOUTRN
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MM
AUD_SPKR_OUTR_N
NET_SPACING_TYPE=AUDIO
MIN_LINE_WIDTH=1MMMIN_NECK_WIDTH=0.25MM
PP12V_AUDIO_SPKRAMP
VOLTAGE=12V
MIN_LINE_WIDTH=1MMMIN_NECK_WIDTH=0.25MMVOLTAGE=12V
PP12V_AUDIO_SPKRAMP_F
AUD_SAMP_FS1
AUD_SAMP_SHDN_L
MIN_NECK_WIDTH=0.1MMMIN_LINE_WIDTH=0.1MM
PP3V3_AUDIO_SPKR_EMIPP3V3_AUDIO
AUDSAMPINRP
AUDIO_SPKR_MUTE_L_INV
AUD_CODEC_OUT_L
AUD_SAMP_G1AUD_SAMP_G2
AUD_SAMP_FS2
AUDIO_SPKR_MUTE_L
AUDSAMPINLPAUD_SAMP_INL_N
MIN_NECK_WIDTH=0.15MMMIN_LINE_WIDTH=0.2MM
AUD_MAX9714_VREG
AUD_SAMP_INR_P
AUD_SAMP_INL_P
AUD_SAMP_FS1AUD_SAMP_FS2
AUD_SAMP_G2AUD_SAMP_G1
AUDSAMPINRN
AUD_PCM_VCOM
PP3V3_AUDIO_SPKR
AUDSAMPINLN
DIFFERENTIAL_PAIR=AUD_SPKRAMP_PWRNET_SPACING_TYPE=AUDIO
GND_AUDIO_SPKRAMP
MIN_LINE_WIDTH=1MMMIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.2MMMIN_NECK_WIDTH=0.15MMAUDSAMPCPN
MIN_NECK_WIDTH=0.15MMMIN_LINE_WIDTH=0.2MM
AUDSAMPCSS
AUD_SAMP_INR_N
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MMNET_SPACING_TYPE=AUDIO
AUD_SPKR_OUTL_N
NET_SPACING_TYPE=AUDIOMIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MM
AUD_SPKR_OUTR_P
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MM
AUD_SPKR_OUTL_P
NET_SPACING_TYPE=AUDIO
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MMVOLTAGE=12V
PP12V_AUD_SPKRAMP_PLANE
MIN_NECK_WIDTH=0.15MMMIN_LINE_WIDTH=0.2MM
AUDSAMPCPP
AUDSAMPOUTLN
NET_SPACING_TYPE=AUDIOMIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MM
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.2MM
AUD_MAX9714_CHOLD
NET_SPACING_TYPE=AUDIOMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MMAUDSAMPOUTLP
GND_AUDIO_SPKRAMP_PLANE
AUDIO_SPKR_MUTE_L_F
MIN_NECK_WIDTH=0.25MMAUDSAMPOURTP
NET_SPACING_TYPE=AUDIOMIN_LINE_WIDTH=0.5MM
GND_AUDIO_SPKRAMP_PLANE
MIN_NECK_WIDTH=0.1MMMIN_LINE_WIDTH=0.1MM
PP3V3_AUDIO_SPKR
GND_AUDIO_SPKRAMP_PLANE
MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=1MM
PP3V3_AUDIO_SPKR
AUD_CODEC_OUT_R
PP12V_AUDIO_SPKRAMP_F2
VOLTAGE=12VMIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=1MMNET_SPACING_TYPE=AUDIO
GND_AUDIO_SPKRAMP_PLANE
102 101 95
98
102
102
102
102
98
102
101
7
100
7
95
100
100
100
25
100
100
100
100
95
100
7
101
101
101
100
100
100
100
100
95
100
G
D
S
LED
VINVDD
GND
G
D
S
G
D
S
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
LINE IN JACK
APPLE P/N 514-0204
MMBZ15DLT1
AUDIO_LO_DET_L = HIGH: PLUG NOT INSERTED
LINE OUT PLUG DETECTSAUDIO_LO_DET_L = LOW: PLUG INSERTED
AUDIO_LO_OPTICAL_PLUG_L = LOW: OPTICAL DIGITAL AUDIO PLUG INSERTEDAUDIO_LO_OPTICAL_PLUG_L = HIGH: ANALOG AUDIO PLUG INSERTED
MIC CABLE CONNECTOR
TO SHASTA GPIO
LINE OUT JACK
AUDIO_IN_DET0_L = LOW: PLUG INSERTED
TO SHASTA GPIO
TO SHASTA GPIO
LINE IN PLUG DETECT
PLACE NEARJ9801
PLACE NEARJ700
SPEAKER CABLE CONNECTORAPPLE P/N 518-0138
APPLE P/N 518-0034
TO SHASTA GPIOSPEAKER TYPE DETECT
AUDIO_IN_DET0_L = HIGH: PLUG NOT INSERTED
APPLE P/N 514-0203
5%
402CERM50V
100PF2
1 CA103
5%1/16WMF-LF402
100K
2
1RA100
402
10V20%0.1UF
CERM2
1 CA1085%
402
1/16W
47K
MF-LF
21
RA102
MF-LF
47K1/16W5%
4022
1RA101
5%
47K
402
1/16WMF-LF
21
RA105
MF-LF1/16W5%47K
4022
1RA104
402
5%50VCERM
100PF2
1 CA102
100K5%1/16WMF-LF4022
1RA103
MF-LF1/16W5%47K
4022
1RA107
MF-LF1/16W5%
47K
402
21
RA108
402MF-LF1/16W5%100K
2
1RA106
402MF-LF1/16W
5%0
2
1RA112
5%
MF-LF402
1/16W
47K
2
1RA113
HF28M-ST-TH
3
2
1
JA102
040514V-15A
NOSTUFF
42
31
DZA100100PF
402
50V5%
CERM2
1 CA101
402
10%
X7R25V
1000PF2
1 CA120
402
25V
1000PF
X7R
10%2
1 CA1211000PF25VX7R
10%
4022
1 CA122
50VCERM
5%100PF
4022
1 CA100
5%
402
50VCERM
100PF2
1 CA124
5%
402
50VCERM
100PF2
1 CA123
M-ST-TH10-89-7082
8 7
5
4 3
2 1
JA101
1000-OHM-200MA
0603
21
LA132
2N7002SOT23-LF
2
1
3
QA100
50R28
1
XCA10050R28
1
XCA101
25VCERM
1000PF5%
603
NOSTUFF
2
1 CA10425V
1000PF
NOSTUFF
CERM
5%
6032
1 CA10525VCERM
5%1000PF
603
NOSTUFF
2
1 CA1061000PF5%25VCERM
NOSTUFF
6032
1 CA107
25V5%1000PF
603CERM2
1 CA126
603
25VCERM
1000PF5%
2
1 CA127
603
5%25VCERM
1000PF2
1 CA119
CERM
5%25V
603
1000PF2
1 CA125
0603
180-OHM-1.5A21
LA130
0603
180-OHM-1.5A21
LA131
0603
180-OHM-1.5A21
LA133
0603
180-OHM-1.5A21
LA134
SM
FERR-EMI-100-OHM21
LA100
FERR-EMI-100-OHM
SM
21
LA101
SM
FERR-EMI-100-OHM21
LA102
SM
FERR-EMI-100-OHM21
LA103
FERR-EMI-100-OHM
SM
21
LA104
SM
FERR-EMI-100-OHM21
LA105
FERR-EMI-100-OHM
SM
21
LA106
SM
FERR-EMI-100-OHM21
LA107
SM
FERR-EMI-100-OHM21
LA108
FERR-EMI-100-OHM
SM
21
LA109
SM
FERR-EMI-100-OHM21
LA110
SM
FERR-EMI-100-OHM21
LA111
FERR-EMI-100-OHM
SM
21
LA112
SM
FERR-EMI-100-OHM21
LA113
SM
FERR-EMI-100-OHM21
LA114
FERR-EMI-100-OHM
SM
21
LA115
SM
FERR-EMI-100-OHM21
LA116
SM
FERR-EMI-100-OHM21
LA117
SM
FERR-EMI-100-OHM21
LA118
FERR-EMI-100-OHM
SM
21
LA119
SM
FERR-EMI-100-OHM21
LA120
SM
FERR-EMI-100-OHM21
LA121
FERR-EMI-100-OHM
SM
21
LA122
FERR-EMI-100-OHM
SM
21
LA123
SM
FERR-EMI-100-OHM21
LA124
SM
FERR-EMI-100-OHM21
LA126
FERR-EMI-100-OHM
SM
21
LA125
SM
FERR-EMI-100-OHM21
LA127
SM
FERR-EMI-100-OHM21
LA128
SM
FERR-EMI-100-OHM21
LA129
15VSOT23
3
2 1
DZA101
JFJ8210F-ST-TH
6
7
9
5
4
3
2
12
11
10
1
8
JA103805
1UF10VCERM
10%2
1 CA118
CERM
0.1UF
402
20%10V2
1 CA117
CERM402
16V10%0.01UF
2
1 CA116
5%
402
50VCERM
100PF2
1 CA115
402CERM50V5%100PF
2
1 CA114
100PF5%50VCERM402
2
1 CA113
5%50VCERM402
100PF2
1 CA112
50V5%
402CERM
100PF2
1 CA111
SOT-3632N7002DW
4
5
3 QA101
2N7002DWSOT-363
1
2
6 QA101
AJR23F-ST-TH
4
3
2
1
8
7
6
5
JA100
402MF-LF1/16W5%100K
NOSTUFF
2
1RA109
CERM10V20%0.1UF
4022
1 CA109
CERM10V20%0.1UF
4022
1 CA110
AUDIO: Q45 CONNECTORSSYNC_DATE=02/16/2005SYNC_MASTER=AUDIO
E
102101
051-6772
MIN_NECK_WIDTH=0.15MMAUD_LI_GND_EMI
MIN_LINE_WIDTH=0.2MM
AUD_LI_GND_JACK
MIN_NECK_WIDTH=0.15MMMIN_LINE_WIDTH=0.2MM
AUD_LO_GND_JACKMIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.25MM
AUD_SPDIF_OUT_JACK
PP5V_AUDIO_SPDIF_EMIMIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.25MM
AUD_SPDIF_OUT_EMI
AUD_LO_L_EMI
MIN_LINE_WIDTH=0.25MMMIN_NECK_WIDTH=0.2MM
AUD_LI_L_JACKMIN_NECK_WIDTH=0.15MMMIN_LINE_WIDTH=0.2MM
AUD_LI_DET_JACK
MIN_LINE_WIDTH=0.2MMMIN_NECK_WIDTH=0.15MM
GND_CHASSIS_AUDIO_EXTERNAL
MIN_LINE_WIDTH=0.2MM
AUD_LI_R_EMI
MIN_NECK_WIDTH=0.15MM
AUD_LI_L_EMI
MIN_LINE_WIDTH=0.2MMMIN_NECK_WIDTH=0.15MM
AUD_LO_DET1
PP3V3_AUDIO
AUDIO_LO_OPTICAL_PLUG_L
PP3V3_AUDIO
GND_CHASSIS_AUDIO_INTERNAL
AUDIO_LI_DET_L
AUDLINDETHAUD_LI_DET_H
AUDIO_LO_DET_L
AUD_LO_DET2 AUD_LO_DET2_1
PP3V3_AUDIO
AUD_SPDIF_GND
MIN_LINE_WIDTH=0.25MMMIN_NECK_WIDTH=0.2MM
AUDIO_GPIO_12
PP3V3_AUDIO
AUD_LO_DET1_1
NET_SPACING_TYPE=AUDIO
AUD_SPKR_OUTR_P_CONN
MIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.3MM
NET_SPACING_TYPE=AUDIO
AUD_SPKR_OUTL_P_CONN
MIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.3MM
AUD_SPKR_OUTR_N_CONN
NET_SPACING_TYPE=AUDIOMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.3MM
AUD_SPKR_OUTR_N
AUD_SPKR_OUTL_P
GND_CHASSIS_AUDIO_INTERNAL
AUDIO_GPIO_12_CONN
AUD_SPKR_OUTL_N_CONN
NET_SPACING_TYPE=AUDIOMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.3MM
AUD_SPKR_OUTL_N
AUD_SPKR_OUTR_P
AUD_LI_R_JACK
MIN_LINE_WIDTH=0.2MMMIN_NECK_WIDTH=0.15MM
AUD_LI_L
MIN_LINE_WIDTH=0.2MMMIN_NECK_WIDTH=0.15MM
AUD_LI_GND
MIN_LINE_WIDTH=0.2MMMIN_NECK_WIDTH=0.15MM
AUD_LI_DET_H
MIN_LINE_WIDTH=0.2MMMIN_NECK_WIDTH=0.15MM
AUD_LI_R
MIN_LINE_WIDTH=0.2MMMIN_NECK_WIDTH=0.15MM
GND_AUDIO_MIC
AUD_MIC_IN_N
AUD_MIC_IN_PAUD_MIC_IN_N_CONN
AUD_MIC_IN_N_EMI
AUD_MIC_IN_P_CONN
GND_AUDIO_MIC_EMI
GND_AUDIO_MIC_CONNAUD_MIC_IN_P_EMI
GND_CHASSIS_AUDIO_INTERNAL
AUD_LO_DET1
AUD_SPDIF_OUT
PP5V_AUDIO
AUD_LO_GND
AUD_LO_DET2
AUD_LO_R
AUD_LO_L
AUD_LO_GND_PRB
AUD_LO_R_JACKMIN_LINE_WIDTH=0.25MM MIN_NECK_WIDTH=0.2MMAUD_LO_L_JACKMIN_LINE_WIDTH=0.25MM MIN_NECK_WIDTH=0.2MM
AUD_LO_DET1_EMI
AUD_LO_DET1_JACK
PP5V_AUDIO_SPDIF_JACK
MIN_LINE_WIDTH=0.25MMMIN_NECK_WIDTH=0.2MM
AUD_LO_DET2_JACK
AUD_LO_GND_EMI
MIN_LINE_WIDTH=0.25MMMIN_NECK_WIDTH=0.2MM
AUD_LO_GND_PRB_EMI
AUD_LO_DET2_EMI
GND_CHASSIS_AUDIO_EXTERNAL
AUD_LI_GND_EMI
AUD_LO_R_EMI
MIN_LINE_WIDTH=0.25MMMIN_NECK_WIDTH=0.2MM
GND_CHASSIS_AUDIO_EXTERNAL
AUD_LI_DET_EMI
MIN_LINE_WIDTH=0.2MMMIN_NECK_WIDTH=0.15MM
102
102
102
102
101
101
101
101
102
100
100
100
100
102
102
101
95
95
101
25
95
95
101
101
101
101
101
7
101
7
25
7
7
25
101
6
101
7
25
7
100
100
7
100
100
96
96
101
96
102
102
102
6
6
7
101
95
7
98
101
98
98
98
7
101
7
IN OUT
SHDN*
GND
BP
OUTADJ/GND
IN VOUT
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE
PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD
TABLE_ALT_ITEM
5V POWER SUPPLY FOR THE HEADPHONES/LINE OUT AMP
APPLE P/N 353S0539
FC=7HZ
APPLE P/N 353S07334.5V POWER SUPPLY FOR CODEC AND LINE IN AMP
MICROPHONE IMPEDANCE MATCHING CIRCUIT
PLACE AT J5903
AUDIO GROUND RETURNS
UNUSED GPIO TERMINATIONS
AT RIGHT SIDE OF CA007PLACE ACROSS GROUND SPLIT
AMP GROUND PLANE
AT CODEC U9500
PLACE NEAR ENTRY TO SPEAKER
PLACE ACROSS GROUND SPLIT
NOT USED: C9906
SC70-5
CRITICAL
MAX8510-4.5V
3
51
2
4
VRA201
X7R603
10%16V
0.1UF21
CA213
16V10%
603X7R
0.1UF21
CA214
1K1%
402MF-LF1/16W
2
1RA223
MF-LF1/16W
402
100K1%
2
1RA222
1K1%1/16WMF-LF4022
1RA224
402MF-LF1/16W1%
16521
RA219
1000PF10%
X7R402
25V 2
1CA212
NOSTUFF
1%
402MF-LF1/16W
1K
2
1RA218
165
1%1/16WMF-LF402
21
RA220
1%
402MF-LF1/16W
1K
NOSTUFF
2
1RA221
NOSTUFF
CERM6.3V20%10UF
8052
1 CA210
ELEC16V
SM-1
20%10UF
2
1 CA211
402MF-LF1/16W5%
0
NOSTUFF
21
RA225
0
MF-LF
5%
402
1/16W
21
RA2260
5%1/16WMF-LF402
21
RA227
I116
01/16W5%
MF-LF402
NOSTUFF
2
1RA228
805
0
5%1/8WMF-LF
21
RA229
PP5V_AUDIO_ANALOG
CRITICAL
LM1117MPXSOT223-4
4
2
3
1
VRA200
2512
AUD_12V_CODEC2
1W
10
FF
5%
21
RA200
SM-1
FERR-250-OHM21
LA200
100UF
ELEC16V20%
SM2
1 CA203402
2051%
1/16WMF-LF
2
1RA201
MF-LF1/16W
1%634
4022
1RA202
16V
SM
100UF20%
ELEC 2
1CA202
10UF20%
SM-1
16VELEC2
1 CA2081UF
CERM10V10%
8052
1 CA207
MF-LF
1%100K
402
1/16W
2
1RA203
10%
X7R
0.1UF
603
16V2
1 CA205
OMITSM
21
XWA200
SM OMIT
21
XWA201
SM OMIT
21
XWA202
SM OMIT
21
XWA20350R28
1
XCA201
CERM
20%1UF16V
12062
1 CA200
ELEC16V20%220UF
SM-22
1 CA20116V
SM-2
220UF20%
ELEC2
1 CA209 47K
MF-LF1/16W5%
402
21
RA210
402
47K
5%
MF-LF1/16W
21
RA213
MF-LF1/16W5%
47K
402
21
RA214
MF-LF1/16W5%
47K
402
21
RA215
MF-LF1/16W5%
47K
402
21
RA206
47K
402
5%1/16WMF-LF
21
RA207
402
47K
5%1/16WMF-LF
21
RA208
1/16W
402
5%
MF-LF
47K21
RA209
MF-LF
0
603
5%1/10W
21
RA205 MF-LF1/16W5%
47K
402
21
RA211
MF-LF1/16W5%
47K
402
21
RA212
I88
I89
NOSTUFF
MF-LF1/16W1%
100K
402
21
RA204
CERM6.3V20%10UF
8052
1 CA204
MF-LF1/8W5%
0
805
NOSTUFF
21
RA216
402
10%16VCERM
0.01UF2
1 CA206
NOSTUFF
MF-LF1/8W5%
0
805
21
RA217
E
102102
051-6772
SYNC_MASTER=AUDIO SYNC_DATE=02/16/2005
AUDIO: Q45 POWER SUPPLIES
PCM3052U9500353S0933353S0655
PP5V_AUDIO_ANALOG PP4V5_AUDIO_ANALOG
MIN_LINE_WIDTH=0.6MMVOLTAGE=4.5VMIN_NECK_WIDTH=0.25MM
AUD_4V5_FB
MIN_LINE_WIDTH=0.3MMMIN_NECK_WIDTH=0.2MMPP3V3_AUDIO
AUD_CODEC_MCLKI2S0_MCLK
GND_CHASSIS_AUDIO_EXTERNAL
GND_AUDIO_CODEC
GND_AUDIO_SPKRAMP
GND_AUDIO_SPKRAMP_PLANE GND_AUDIO_CODEC
NET_SPACING_TYPE=AUDIOI2S0_BITCLK_8NS_DELAY
ELECTRICAL_CONSTRAINT_SET=8NS
I2S0_BITCLK_DELAYED
I2S2_MCLKTP_I2S2_MCLK
I2S2_RESET_L
TP_I2S2_SB_TO_DEV_DTO I2S2_SB_TO_DEV_DTO
I2S2_SYNC
AUDIO_SPKR_DET_L
AUDIO_GPIO_11
I2S2_BITCLK
AUDIO_HP_DET_L
AUDIO_LI_OPTICAL_PLUG_L
GND_AUDIO_MIC
VOLTAGE=4.5VMIN_LINE_WIDTH=0.25MMMIN_NECK_WIDTH=0.15MM
GND_AUD_LOAMP_CHGPMP
VOLTAGE=4.5VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
DIFFERENTIAL_PAIR=AUD_CODEC_PWRNET_SPACING_TYPE=AUDIO
GND_AUDIO
MIN_LINE_WIDTH=1.0MMMIN_NECK_WIDTH=0.3MM
GND_AUD_LOAMP
VOLTAGE=4.5VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
NET_SPACING_TYPE=AUDIODIFFERENTIAL_PAIR=AUDIO_MIC_1
AUD_MIC_M1
DIFFERENTIAL_PAIR=AUDIO_MICNET_SPACING_TYPE=AUDIO
AUD_MIC_IN_P
AUD_MIC_IN_N
NET_SPACING_TYPE=AUDIODIFFERENTIAL_PAIR=AUDIO_MIC
GND_AUDIO_MIC
DIFFERENTIAL_PAIR=AUDIO_MIC_2
AUD_MICIN_PNET_SPACING_TYPE=AUDIO
NET_SPACING_TYPE=AUDIOAUD_MICIN_N
DIFFERENTIAL_PAIR=AUDIO_MIC_2
GND_AUDIO_CODEC
AUD_PCM_MBIAS
AUDIO_HP_MUTE_L
AUDIO_EXT_MCLK_SEL
I2S2_DEV_TO_SB_DTI
NET_SPACING_TYPE=AUDIO
AUD_MIC_P1
DIFFERENTIAL_PAIR=AUDIO_MIC_1
GND_AUDIO_CODEC
VOLTAGE=4.5VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM
NET_SPACING_TYPE=AUDIO
I2S0_BITCLK
AUD_4V5_SHDN*
GND_AUDIO_CODEC
PP3V3_AUDIO
MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MMVOLTAGE=5V
AUD_V5_REF
VOLTAGE=12VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.3MM
GND_AUDIO_CODEC
MIN_LINE_WIDTH=1MMMIN_NECK_WIDTH=0.3MMNET_SPACING_TYPE=AUDIODIFFERENTIAL_PAIR=AUD_CODEC_PWR
VOLTAGE=12V
PP12V_AUDIO_CODEC AUD_12V_CODEC
MIN_NECK_WIDTH=0.3MMMIN_LINE_WIDTH=0.6MMVOLTAGE=12V
102
102
101
102
102
102
102
102
101
102
100
98
98
98
98
98
100
98
102
102 96
95
MAKE_BASE=TRUE
101
96
100
96
102
102
96
96
96
95
96
98
98 95
6
7
95 25
7
95
7
100 95
95
25
MAKE_BASE=TRUE
25
MAKE_BASE=TRUE25
25
25
25
25
25
25
101
98
7
98
101
101
101
95
95
95
95
25
25
25
95
25
95
7
95
7