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ED501 1

IntegratedMicrocontroller

DevelopmentSystem

(IMDS-51)

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ED502 2

IntegratedMicrocontroller

DevelopmentSystem

(IMDS-51)

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ED502 3

Consists of..

Single Board Computer (SBC-51)

based on 8-Bit Intel 8051

Microcontroller

Windows based Integrated

Software development

Environment (WISE-51)

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ED502 4

Single Board Computer (SBC-51)

Processor : AT89C51/52

External Bus : 8-bitProgram memory : 32 - 64K

Data Memory : 16 - 32K

Digital I/O : 16

Analog I/P : 8

Analog O/P : 1

Serial Port : 1 RS 232

16-bit Timers : 2-3

Matrix Keyboard : 4 x 4 matrix

LCD support : 16x2

Status Display : Two 7 Seg LEDs

Supply Voltage : +5V, 15V

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ED502 5

Block diagram

Address Decoding Circuit

WR

RD

AD7 AD0

A15 A8

CS

WR

RD

PSEN

P0

P2

ADC SOC and Data Read 7C00H

DAC Data Write 7C80H

PPI 7D80H

LCD 7D00H

7 Segment 7E00H

Memory 8000H - FFFFH

ALE

PROCESSORMEMORY ON-BOARD COMPONENTS

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ED502 6

AT89C52

MEMORY

PAL

ADC

DAC

PPI

7 SEG

LCD

MATRIX KB

ISO I/O

SERIAL

POWER

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ED502 7

Block diagram cntd..

LCD

Isolated I/P

Keyboard OUTPC.0PC.3

PC.4

PC.7

PB

PAA1-A0

D7- D0

PPI_CSKeyboard IN

PPI

PPI 7D80H

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ED501 8

Block diagram cntd..

S12 S16 S20 S24

S11 S15 S19S23

S10 S14 S18 S22

S9 S13 S17S21

PC0

PC1

PC3

PC2

PC4

PC5

PC6PC7

INT1

Matrix Keyboard

U12D

7402

11

1213

IN_KEY1

U22B

74LS32

4

56

IN_KEY2

INT1\

IN_KEY3

IN_KEY4

U22A

74LS32

1

23

Combinational Circuit to generatenegative pulse on pressing a key

7D83 PPI CW

7D82 POTRC

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ED501 9

Key Board Programming

Port C Lower is configured as output

Port C Upper is configured as input

Make Port C lower pins high

Key press detected with INT1

To scan the key pressed use row scanning

Scan row connected with PC3, then PC2,PC1

and PC0 in order by making these pinsindividually in high for each row scan

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ED501 10

Block diagram cntd..Seven segment Displays

74F

373

D7- D0

D7- D4

D3- D0

LED_CS

7447

7447

D7- D4

D3- D0

7 Segment 7E00HMov a,#00hmov dptr,#7e00hMovx @dptr,a

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ED501 11

D3

A1

ANLGIN4ANLGIN3

U12A

7402

2

31

ADC_C

D7

A[0-15]

ADC_R

A2

ANLGIN2

D5

VCC

VCC

D[0-7]

D6

EOC

D4

GND

INT0\

GND

ANLGIN1

ANLGIN6

A0

D2

U11

ADC 0808

10

12

16

6

22

25

24

23

11

13

9

7

171415818192021

2627281234

5

CLK

VREF(+)

VREF(-)

START

ALE

ADD A

ADD B

ADD C

VCC

GND

OE

EOC

DB0DB1DB2DB3DB4DB5DB6DB7

IN0IN1IN2IN3IN4IN5IN6

IN7

D0

D[0-7]

A[0-15]

ANLGIN0

ANLGIN5

D1

ANLGIN7

ADC_CLK

Channel Selection A2 A0

SOC

EOC to INT0 pin

OE

ADC

ADC

ADC SOC and Data Read 7C00H

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ED501 12

Block diagram cntd..

74373

DAC

DB6

ACHIOUT

DB4

-15V

DB5

DB[0-7]

GND

U16

DAC 0808

12

11

10

9

8

7

6

5

1

3

4

14

15

13

2

16

D0

D1

D2

D3

D4

D5

D6

D7

NC/VLC

VEE/V-

Io/IOUT

VREF(+)

VREF(-)

VCC/V+

GND/IOUT

COMPENSATION

R108

DB1

+15V

VLCDB0

C17

DB2

VEE

DB7

DB3 R107

IOUT

+15V

DAC Data Write 7C80H

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ED501 13

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ED502 14

WISE-51 Windows based

Integrated SoftwaredevelopmentEnvironment (WISE-51)

IBM PC with Windows95/98/2000/NT or XP

Features

Development

Environment Debugging

Environment

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ED501 15

Development Environment

File Editor

Project based file management

Provision to integrate Cross Assembler/ Compiler

Debugging Environment

Select Ser. Comm. parameters

PC Target board Data Transfer

(Download / upload)

Debug Application program

WISE-51

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ED501 16

DEBUG FEATURES

Target Processor RESET

View/Modify/Fill Memory View/Modify Register

Single Stepping

Processor Status Display

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ED501 17

Lab exercises are based on

SBC-51 Hardware

using WISE-51 Software

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ED501 18

DEMO PROGRAM

Develop a one second delay counter (displaying 0 to 9) using Timer 0

and display the count value on the 7-Segment Displays.

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ENGINEERING students to visit my blog

for more

abhishek1ek.blogspot.com

awhengineering.blogspot.com

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