Illinois Center forWireless Systems

A Mixed Signal MIMO Beamforming ReceiverRichard Tseng, Ada S. Y. Poon, Yun Chiu

Core DLL

Edge Combiners

False Lock Detector

Resistive Interpolation

12 phasesat 2GHz

4 phases at 6GHz

8 phases at 6GHz

Referenceat 2GHz

• Large number of analog components

• Strong interferers easily saturate the ADCs, rendering any MIMO algorithm useless.

• Most research activities focus on the VLSI implementation of various MIMO algorithms and do not solve the critical problem.

DSPLPF

LPF

LPF

LPF

90°

90°LNA

LNA

Complex Multiplier

Complex Multiplier

Complex Adder

A/D

A/D

A/D

A/D

• Simplify analog circuits, move complexity to the digital domain

• Solve dynamic range problem by performing beamforming and signal combining in the analog domain

• Many MIMO algorithms still applicable in analog domain, greatly relaxes circuit requirements.

DSP

ComplexMultiplier

QuantizationAlgorithm

LPF

LNA

LNA ComplexMultiplier

LPF

I

Q

I

Q

I

QA/D

A/D

Direct Conversion Implementation

Matching Network

LPF

LNA

0˚

45˚

90˚

135˚

b0=±1

b1=±1

b2=±1

b3=±1

b0, b1, b2, b3

LPF

b2=±1

b3=±1

-b0=±1

-b1=±1

SD Algorithm vi

yi

Re{vi*yi}

Im{vi*yi}

DigitalDomain

AnalogDomain

DLLLOref

0˚ 45˚ 90˚135˚

Nonlinear

Expansion

Linear

Reconstruction

Decisions

101

102

10-5

10-4

10-3

10-2

10-1

100

101

MS

E

M

MSE vs Number of Bases

Accuracy:•MSE α 1/M2

Cost:•M LO Phases•M Mixers/Ant.

-1.5 -1 -0.5 0 0.5 1 1.5-1.5

-1

-0.5

0

0.5

1

1.5Phase Shift Constellation for M=8

Three Pronged Approach

Proposed Implementation

S-D in the phase domain

1

0

][2

ˆ

])1[][(][ˆ

])1[][(]1[][][

0]0[ , allfor ][

M

m

M

mj

emyM

v

memyQmy

memyQmemyme

emvmy

SD(Nonlinear)Expansion

v Linear Reconstruction

vhat

Analog DomainDigital Domain

Scalable Architecture Novel circuits

Vbp

Vbn

Vi+ Vi

-

Vo-

Vbleed

LO+LO+LO-

Vo+

BBB

Signal CombinerMixer CoreTransconductance Stage

x

x

x

x IBB

QBBx

x

x

x

Digital algorithm

Current MIMO Implementations

•Quantization algorithm based on frame theory and stochastic approximation.

•Complex multiplier architecture scales up to multiple LO signals and high frequencies

•Core DLL runs at a lower frequency•Edges combined to produce highfrequency LO signals

•Copying of signals allows circuit component reuse

•Algorithm MSE can be reduced toarbitrarily small values

•Accurate complex multiplication•Insensitive to phase and gain mismatch

This work is supported by C2S2/DARPA