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A multi-functional intelligent metasurface:Electromagnetic design accounting for fabrication

aspectsAlexandros Pitilakis, Odysseas Tsilipakos, Senior Member, IEEE, Fu Liu, Member, IEEE, Kypros M. Kossifos,

Anna C. Tasolamprou, Do-Hoon Kwon, Senior Member, IEEE, Mohammad Sajjad Mirmoosa,Dionysios Manessis, Nikolaos V. Kantartzis, Senior Member, IEEE, Christos Liaskos, Member, IEEE,

Marco A. Antoniades, Senior Member, IEEE, Julius Georgiou, Senior Member, IEEE, Costas M. Soukoulis,Maria Kafesaki, and Sergei A. Tretyakov, Fellow, IEEE

Abstract—In this paper we present the theoretical considera-tions and the design evolution of a proof-of-concept intelligentmetasurface, which can be used as a tunable microwave absorber,as well as a wavefront manipulation and polarization conversiondevice in reflection. We outline the design evolution and allconsiderations taken into account, from the selection of patchshape, unit cell size, and substrate, to the topology of thestructure that realizes the desired tunability. The presenteddesign conforms to fabrication restrictions and is co-designedto work with an integrated circuit chip for providing tunablecomplex loads to the metasurface, using a commercially availablesemiconductor process. The proposed structure can performmultiple tunable functionalities by appropriately biasing theintegrated circuit chip: Perfect absorption for a wide range of in-cidence angles of both linear polarization states, accommodatinga spectral range in the vicinity of 5 GHz, as well as wavefrontcontrol demonstrated exemplified via anomalous reflection andpolarization conversion. The end vision is for this unit-cell designto be scalable and deployable as a practical HyperSurface, i.e.,an intelligent multi-functional metasurface capable of concurrentreconfigurable functionalities, such as absorption, beam steering,polarization conversion, wavefront shaping, holography, sensingetc.

Index Terms—Intelligent metasurface, microwaves, tunableabsorption, wavefront manipulation.

I. INTRODUCTION

Manuscript submitted March 2020. This work was supported by theEuropean Union Horizon 2020 Research and Innovation Programme-FutureEmerging Topics (FETOPEN) under Grant 736876 (project VISORSURF).(Corresponding author: Alexandros Pitilakis)

A. Pitilakis and N. V. Kantartzis are with the Department of Electrical andComputer Engineering, Aristotle University of Thessaloniki, 54124 Thessa-loniki, Greece (email: alexpiti@auth.gr).

O. Tsilipakos, A. C. Tasolamprou, C. M. Soukoulis, and M. Kafesaki arewith the Institute of Electronic Structure and Laser, Foundation for Researchand Technology Hellas, 71110, Heraklion, Crete, Greece.

F. Liu, M. S. Mirmoosa, and S. A. Tretyakov are with the Department ofElectronics and Nanoengineering, Aalto University, P.O. Box 15500, FI-00076Aalto, Finland.

C. Liaskos is with the Institute of Computer Science, Foundation forResearch and Technology Hellas, 71110, Heraklion, Crete, Greece.

K. M. Kossifos, M. A. Antoniades, and J. Georgiou are with the Departmentof Electrical and Computer Engineering, University of Cyprus, Cyprus.

D.-H. Kwon is with the Department of Electrical and Computer Engineer-ing, University of Massachusetts Amherst, Amherst, Massachusetts 01003,USA.

D. Manessis is with System Integration and Interconnection Technologies,Fraunhofer IZM, Berlin, Germany.

INTELLIGENT metasurfaces are electromagnetically ultra-thin sheets which are able to provide us with tunable

electromagnetic functions on demand. They consist of sub-wavelength elementary units, the meta-atoms, which withproper engineering can enable particular interactions of themetasurface and the incoming wave [1]–[3]. This meta-atomiclevel manipulation has opened the path to the realizationof a plethora of electromagnetic functions and applicationsinvolving wavefront shaping [4]–[9], polarization control [10]–[12], dispersion engineering [13], [14], perfect, broadbandand asymmetric absorption [15]–[19], holography [20], non-reciprocity [21], extreme energy accumulation [22], wirelesspower transfer [23], harmonic generation [24] and manymore. The key element in a tunable metasurface is to havean inclusion (material or component) whose electromagneticproperties can be modified by an external stimulus. Followingthis rationale, various tunable electromagnetic functions havebeen demonstrated in metasurfaces that comprise stimulus-sensitive materials such as graphene [25], [26] liquid crys-tals [27], photoconductive semiconductors [28] and so forth.

Most of the initial implementations referred to globallytunable metasurfaces, imposing limitations related to the lackof local control over the metasurface impedance. Clearly, fora multi-functional intelligent metasurface, an independentlyvarying element is required in each unit cell to enable localcontrol and reconfigurability. A practical solution to thisproblem, highly suited to microwave realizations, is given byincorporating lumped electronic elements in the meta-atoms.In this way, the local impedance of the metasurface can bemodified by means of applying DC voltage signals (biasing) atthe elements, commonly PIN switch diodes and P-N varactordiodes. Switch diodes have been widely used in global or localbinary-state scenarios for functional metasurfaces [20], [29]–[35]. Binary-state control still restricts the realizable functionsas the impedance configurations along the metasurface arelimited. Varactor diodes, on the other hand, provide continuousbut mainly reactive control and, thus, the ability to tune onlythe imaginary part of the surface impedance.

In Ref. [36], we presented a model metasurface with con-ceptual tunable integrated circuits (IC) incorporated in eachunit cell to allow for full control over the complex surfaceimpedance, i.e., independently and continuously variable re-

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sistance and capacitance. This full impedance control enablesto spatially shape both the phase and amplitude of the localreflection (or transmission) coefficient and allows maximumversatility in the realizible functionalities. More importantly,this concept infuses intelligence in the metasurface which canbe programmatically controlled with a computer. In addition,by interconnecting the ICs with each other into forming anetwork, the vision of an intelligent metasurface fabric canbe realized, where each unit can sense the ambient condi-tions, communicate information within the metasurface andwith the main controller (computer), and perform its ownprogrammable computing and actuation, with vast applicationwithin the emerging “Internet of Things” paradigm [37]–[43].

In this paper, we present the practical considerations and thedesign of a realistic multifunctional metasurface designed foroperation at microwave frequencies (5 GHz). The metasurfaceconsists of square patches placed on a metal-backed dielectriclayer. It includes an envisaged custom IC (or “chip”), strate-gically placed behind the metal back plane. We thoroughlypresent the design process of the intelligent metasurface, fromthe perspective of the electromagnetic considerations and theimplementation restrictions of the envisaged IC. We thenevaluate the performance of the metasurface as a tunableperfect absorber, which is the primarily targeted functionality,and show successful operation at the design frequency for arange of incidence angles of both TE and TM polarization. Inaddition, we demonstrate wavefront manipulation functional-ity, exemplified through anomalous reflection, and polarizationcontrol capabilities, showcasing the multi-functional natureof the proposed system and its control over the amplitude,wavefront, and polarization properties of the output electro-magnetic wave. Control over the frequency content of theimpinging radiation could also be possible with the proposedlinear metasurface, by using fast time modulations of the loadsprovided by the ICs. Additional steps towards the realization ofthis metasurface with a prime focus on the custom ICs (chips)implementation and practical aspects of the PCB design canbe found in [44].

The paper is organized as follows: in Section II, we presentthe evolution of the metasurface unit-cell design from thesimple proof-of-concept version to a practically feasible pro-totype; dedicated subsections address different design aspectspertaining to metasurface topology and operation, basic struc-tural decisions, available range from the IC chip, fabricationand practical restrictions, and, finally, the simulation designstrategy we have followed, relying on S-parameters of bothlumped and Floquet ports. In Section III, we present the finaldesign of the unit-cell of the tunable absorber metasurface,backed by full-wave simulation results for performance eval-uation and parameter sensitivity. In addition, we assess theperformance of indicative beam steering and polarization con-version functionalities. Finally, Section IV provides a summaryand discusses future prospects and open challenges of suchintelligent metasurface applications.

II. CONCEPTUAL DESIGN AND PRACTICALCONSIDERATIONS

Electromagnetic design of a locally tunable multi-functionalmetasurface, that can be readily manufactured with existingfabrication processes and at a reasonable cost, poses practicalchallenges that can only be met with multi-facet considerationsand performance compromises. This section addresses thedesign considerations needed to select and develop the mostappropriate topology, allowing as general reconfigurabity aspossible and leading to a realistic metasurface design. Wetake into account both electromagnetic response and practicalconsiderations, as well as simulated dynamic load tunabilityof the IC, while accommodating for the broadest possiblefunctionality, quantified in terms of realizing the desiredresponse for excitation by obliquely incident waves of differentfrequencies and polarizations.

A. Electromagnetic considerations for the design of versatileand fully reconfigurable metasurfaces

Probably the most natural choice for a topology of a tunablemetasurface for applications in the microwave frequency rangeis the classical high-impedance surface formed by a sub-wavelength array of metal patches over a grounded dielectriclayer, see pioneering papers [45], [46] and recent reviews[3], [47]. The patches can be either connected to the groundby metal vias (the so-called “mushroom” structure [48]) orleft floating (e.g. [49], [50]). The presence of the vias pinsaffects the oblique-incidence performance for TM-polarizedexcitation (e.g. [51], [52]). This structure allows control overboth amplitude and phase of the reflection coefficient bycontrolling the properties of the patch array only, it is verysimple, compact, and can be manufactured using conventionalprinted circuit board (PCB) technology.

1) Uniform distribution of control elements versus cluster-ing: The simplest way to tune the metasurface response isto modify the gap capacitance between the patches, this waytuning the effective sheet capacitance and resistance of thepatch array. This approach has been used in earlier works,using both varactors (e.g. [45], [46], [29], [53], [31], [54]) andMEMS capacitors (e.g. [55]). For plane-wave illumination, theresponse of the metasurface is determined by the parallel-typeresonance of the distributed capacitance of the patch array andthe inductance due to the magnetic flux between the groundplane and the patch array [49]. Thus, it appears reasonableto connect tuning elements (most commonly, varactors) intoevery gap between metal patches, and this topology was indeedused in [45], [46], [55], [29], [53], [31], and other works.

This approach works well for surface-uniform biasing (tun-ing the reflection coefficient for plane-wave illumination) orfor slowly-varying biasing (realizing tunable phase-gradientmetasurfaces). However, there are applications where fast(on the wavelength scale) tunable variations of the surfaceproperties are needed. For example, to realize anomalousreflection from normal incidence to near-grazing direction, socalled metagratings [56] offer arguably the most reasonablesolution. To realize this regime, we need to configure themetasurface as a periodical array of electrically small elements

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with the period of the order of the wavelength. Moreover, toenable anomalous reflection into arbitrary directions, we needto have a possibility to configure the metasurface as a nonlocal,inhomogenizable periodical array (with the period from 1.5λto 3λ) where each super-cell contains several small elements,all of them being different [57]. The conventional topologiesof tuning the surface-averaged sheet reactance of the patcharray are not optimal for realization of these more demandingfunctionalities, because the change of each control elementstrongly affects the collective response of the whole array ofpatches [57].

For this reason, it appears preferable to form the metasurfaceas an array of patch clusters, each of which is separatelycontrolled. The simplest topology is a cluster of four patcheswith control units between them, as illustrated in Fig. 1(a). Inthis topology, the patches of the two neighboring clusters arecoupled only through the gap capacitance, while in the usual,uniform layout, there is also the admittance of the controlunit, which in practice cannot be made negligibly small. Acluster of four patches with controllable loads between themcan be viewed as one patch with tunable anisotropic sheetimpedance. Thus, in contrast to the conventional approach oftuning capacitance of the array of slots, we tune each arrayelement. Setting several clusters in the same or similar states,it is possible to tune the surface-averaged sheet impedanceand realize phase-gradient metasurfaces or tunable absorbers.In the other extreme scenario, it is possible to connect fourpatches of one unit cell to the ground by different impedances,realizing one electrically small unit cell behaving as a tunablebianisotropic scatterer, while other clusters are tuned awayfrom the resonance. This way it is possible to realize tunablediffraction gratings (metagratings [56]). Finally, we note thatthe control elements can be active or time-varying, openingpossibilities to create amplifying, non-Foster, and nonrecipro-cal reconfigurable metasurfaces. In view of our goal to allow asgeneral reconfigurability as possible, we prefer the clusteringlayout. Note that this patch layout is similar to that usedin [54], although in that paper only uniform bias has beenconsidered.

2) Optimal patch shape: Although the choice of the squareshape of metal patches for realization of varactor-tunablemetasurfaces appears to be well understood and well estab-lished, for completeness, we explain the reasons for this shapeselection. In the literature on high-impedance surfaces andartificial magnetic conductors one can find suggestions ofusing patches of many different shapes, from simple Jerusalemcrosses and various spiral shapes to space-filling curves, e.g.[58], [59], [60]. Shapes other than simple squares are usedwhen there is a need to reduce the thickness of the structureand/or the size of the unit cell. In all these solutions, theequivalent circuit of the patch array contains an additionalinductance in series with the effective capacitance of the patcharray. This inductance increases the total inductance of theparallel resonant circuit (the main inductance is due to themagnetic flux between patch array and the ground plane),bringing the resonant frequency down and allowing reductionof the substrate thickness. However, this additional inductancereduces the bandwidth of the resonator, because it is in series

with the capacitive branch, see detailed explanations andnumerical examples in [46], [61]. Thus, if there is no needfor reduction of the substrate thickness, the choice of squarepatches with small gaps between them is clearly preferable. Ifthere is a need of miniaturization, it is preferable to increasethe effective capacitance of the patch array by using doublelayers of patches instead of replacing wide patches by thinnerstrips of any shape.

Another issue related to the choice of the patch shape is theisotropy of the surface. For most applications, it is desirablethat the properties of the metasurface are isotropic in themetasurface plane. Arrays of electrically small square patchesare slightly anisotropic because waves propagating along thediagonal and along the patch edges see a different periodof the array. In this respect, the use of hexagonal patchesis preferable, since the anisotropy of such arrays (assumingthe same patch area) is considerably weaker. However, thisdifference can be usually neglected for small arrays periods,and the square shape is still preferable due to a reduced numberof control elements; in this work we adopt the square topologyfor the structure.

3) Optimal unit-cell size: From the practical point of view,it is desirable to use the smallest possible number of tunableunit cells, to minimize complexity and costs. This means thatwe should select the largest size of the unit cell, still allowingrealizing full control of reflection. If the target functionalityis to control the reflection coefficient for plane-wave illumi-nations (for example, realizing tunable absorbers for varyingfrequency, incidence angle, and polarization), there is no needfor control of the surface properties at the subwavelength scale.A periodical array whose period is smaller or equal to λ/2 willnot create grating lobes, and for the plane-wave illuminationwe can configure all the unit cells identically, realizing aneffectively uniform lossy boundary, matched to free space forthe desired frequency, incidence angle, and polarization. Thus,for this application the optimal unit cell size equals λ/2 at thehighest operational frequency.

Another important functionality is anomalous reflectionwith moderate deflection angles. For instance, for realizingplanar or conformal focusing mirror with the focal distancewhich is large compared with the array size. In this case, thearray should be configured as a phase-gradient metasurface:the parameters of the unit cells slowly vary along the surface.This is actually the case of a conventional phased-array an-tenna (a reflectarray in this case) [62]. As is well-known, alsoin this case the use of λ/2-size array elements is appropriate.However, in this case the array is not uniform, and there issome scattering into parasitic propagating Floquet modes. Re-ducing the unit-cell size makes the effective (surface-averaged)response more uniform and reduces scattering and improvesthe bandwidth [63], [62]. However, improvements are not verydramatic, because for moderate deflection angles (for normalillumination, up to about 30 to 40) the parasitic scattering issmall [57], with only a few percent loss in power efficiency.

More severe limitations on the unit-cell size need to betaken into account, if the goal is to enable arbitrary shapingof reflected waves (in the far zone). As discussed above, ingeneral, two different configurations are needed: diffraction

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grating (metagrating) and nonlocal metasurfaces. In the firstcase, the period is of the order of the wavelength and we needto “activate” only one or two elements (the rest is to be set farfrom the resonance). In the second case, the period is largerthan λ but still comparable to it. As demonstrated in [57], inthis case we need about 8 to 10 unit cells per period, and all thecells are in general configured differently to enable efficientanomalous reflection to large angle. We see that to enable boththese regimes it is appropriate to select the unit-cell size notlarger than about λ/5. In view of the choice of the unit cell asa cluster of four patches with four tuning elements connectedbetween the patches, selection of this size enables the mostgeneral reconfigurability of intelligent reflectors.

4) Choice of the substrate permittivity and thickness: Asis well-known from the theory of high-impedance surfaces,the choice of higher permittivity values improves the stabil-ity of the resonant frequency with respect to the incidenceangle and allows reduction of the substrate thickness, butdecreases the bandwidth, e.g. [61]. For the applications inreconfigurable surfaces, the angular response can be adjustedby tuning the unit cells, while wider frequency bandwidth isdesirable for robust operation. In addition, there is also thepractical consideration of availability of cheap and fabrication-friendly low-loss substrates. In view of these consideration,we select moderate-permittivity low-loss dielectric substrates.The thickness of the substrate mainly determines the effectiveinductance of the equivalent parallel resonant circuit whichmodels the high-impedance circuit [48], [49]. Higher induc-tance means higher frequency bandwidth, meaning that thickersubstrates are preferable. Naturally, the thickness should bestill considerably smaller than the wavelength.

5) Proof-of-concept study: These general design considera-tions have been recently validated for plane-wave illuminationsin two orthogonal planes, parallel to the crystal axes of an arrayof square patches [36]. The unit cell of this metasurface isschematically shown in Fig. 1(a). In these illumination scenar-ios it is enough to consider only pairs of loaded square patches,because there is no current over the other two loads in eachpatch cluster. The load impedance was assumed to be complex,with variable capacitance and resistance. The studied range ofcapacitance variations was 1 pF to 5 pF, corresponding to theparameters of commercially available chip varactors for thetarget frequency range (about 5 GHz) and similar to the rangesof varactors used in recent experimental studies of tunablehigh-impedance surfaces [53], [54]. The tunable resistance wasassumed to be varying from 0 to 5 Ohm, again in harmonywith the parameters of commercial chip varistors, and allowingcomparison with ideal, lossless structures.

The most critical issue was to validate the hypothesis thatit is possible to realize near-perfect anomalous reflectors, notlimited to any angular sectors, by tuning only load reactancesof unit cells, while their sizes and shapes remain fixed and thesame for all cells. The only known earlier realization of thisfunctionality relied on careful optimization of sizes of sub-wavelength patches forming super-cells of a periodical lattice[57]. The results presented in [36] have shown that comparableperformance can be achieved also using the proposed topologyof fixed-size arrays of patch clusters with variable reactive

loads, with practically realistic values of load capacitances.The study of tunable absorber configurations has shown thatthe same metasurface can be indeed configured to the regimeof full absorption of incident plane waves of both TE andTM polarizations, as depicted in Fig. 1(a), in a wide range ofincidence angles.

B. From the proof-of-concept unit cell to fully reconfigurableimplementable unit cell design

Practical implementation of the unit cell design starts fromthe structure we studied in [36]. However, that is only abasic proof-of concept design and there is still a long way to-ward industrial realization. For example, some open questionsinclude: How should the chip be connected to the patchesand how would the connectors affect the performance ofthe metasurface? Is the design compatible with fabricationtechnologies? How can the capacitive and resistive loadsbe optimally realized in practice? In this and the followingsubsections, we discuss all these practical issues and, basedon these considerations, we propose a practically-realizableintelligent metasurface design.

1) One chip instead of four chips per cluster: The clustertopology shown in Fig. 1(a), with four chips connecting thepatches, is not cost effective or practical to populate. In ad-dition, more complex routing lines are required to control thechip when communications between the chips are demandedfor programmability. Moreover, when the unit cell size is inthe 10 mm order (λ/6 at 5 GHz), squeezing four chips insidesuch a small area demands advanced fabrication technologies,something which again raises the cost. A simple and effectiveway to reduce the complexity of the cluster design is to use justone chip inside each unit cell, as shown in Fig. 1(c). To enablethe same functionalities, one chip is now essentially supportingat least four RC pairs, e.g., connecting the four neighbouringpatch pairs. With this simplification and the change of the RCconnection from the middle of the edge of the patches to thecorner of the patches, the metasurface can still support thedesired functionalities. In addition, we note that in this waywe also select the best position for the load connection, i.e., thepatch corner, because that is where the surface charge densitymaximum across the patch is located for illumination in bothprimary incidence planes of the structure shown in Fig. 1(a).

2) Load connection topology inside the chip: Another issueraised in the “one chip per cell” approach we adopt is thechoice of the patch-load-patch connecting topology, as wellas the number of loads the chip must internally implement.For practical reasons related to unavoidable parasitics insidethe chip, as detailed in [44], an X-shaped connection wasfinally adopted with four independent loads connecting thecorner of each patch to the common ground pin in the centerof the chip. This load topology can implement the absorberfunctionality (four loads with identical RC values) by connect-ing pairs of patches, readily extending the proof-of-conceptcell design, while also accommodating other functionalities,e.g., anomalous reflection and polarization conversion (twodifferent RC values for each of the two diagonal connections).Finally, note that this topology still allows us to control the

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t

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CopperPCB substrate

xy

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Fig. 1. (a) Extension of the proof-of-concept 1 × 2-patch unit cell to anisotropic 2 × 2 cell. The new cell comprises four square patches on athin metal-backed dielectric substrate. Its response is controlled by the ICs,modeled as complex lumped loads connecting each pair of patches. Variantsof the isotropic unit cell with (b) two ICs and halved width, as denoted bythe dotted-line rectangle, (c) a single IC incorporating all four connections,in the middle of a full-width cell.

spatial dispersion of the structure, which is important for TM-polarized incidence, by tuning the impedance of the groundconnection.

3) Out of plane chip placement: While placing the chip inthe center of the unit cell in the horizontal plane is intuitivefor the sake of symmetry, a key decision that should bemade is the placement of the chip in the vertical sense.Three options were examined: (a) on the top patch layer, (b)embedded inside the substrate, and (c) below the ground plane,as schematically shown in the respective panels of Fig. 2.Option (a) was abandoned because the the chip would interferewith the incident radiation causing reflections and disruptingthe absorber performance; additionally, a large number ofthrough vias (TVs) would be required to pass communicationand powering lines behind the backplane, and these viaswould complicate the electromagnetic response especially forTM polarization where the electric field possesses a parallelcomponent to them; finally, as TVs cannot be fabricated(drilled) directly below the chip, traces and landing padswould be required to displace them outside the chip footprint,which would also disrupt the metasurface topology. Option(b) was also abandoned because embedding the chips involvescostly non-standard fabrication processes, it excludes probingand servicing malfunctioning chips post-fabrication, and alsorequires a large number of blind vias (which are thicker thanTVs). The optimal option for chip placement is behind thebackplane, with only four TVs penetrating it to connect tothe back-side of each patch, as shown in Fig. 2(c). From thepoint of view of electromagnetic design, the placement belowthe ground plane ensures that the electromagnetic environment‘seen’ by the incident waves is controllable and isolated,because all the auxiliary chip wiring does not affect wavepropagation being shielded behind the backplane.

Finally, a last issue related to the chip placement in thevertical sense is the positioning of the four TVs connectingthe chip RF terminals to the patches. While in mushroomstructures the vias connecting the patches to the ground planeground are located at the center of the patches, here we stressthat the optimal position for connecting the patches and the

Integrated circuit (chip)

Metasurface-side dielectric

Back-side dielectric

Copper (backplane, RF)

Copper (power & comm.)

Copper (grounding)

(a)

(c)

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Fig. 2. Investigating the optimal position of the chip, with respect to thenumber of vias and metallization layers required. Vertical cross-sections ofdesigns where the chip is (a) on the top layer, (b) embedded inside thedielectric, (c) behind the backplane.

(a)

(b)

(c)

Fig. 3. (a) Simplified metasurface loading element circuit, equivalent (b)parallel and (c) series RC circuit representation of the metasurface loadingelement.

chip is at the patch corner which is the closest to the chip.The corner of the patch is where the surface current densityis at its maximum for illumination in both primary incidenceplanes and therefore the impedance introduced by the chip canmore widely control the metasurface response.

C. Integrated circuit design

In this section, the integrated circuit design of the metasur-face loading elements is presented. More detailed informationcan be found in [44]. The integrated circuit aims to satisfymetasurface performance, cost and power constraints. Themetasurface loading element simplified circuit is shown inFig. 3(a). It utilizes MOSFETs to implement both the vari-able capacitance (varactor) and variable resistance (varistor)elements. In the schematic, the varistor M1 is adjusted trougha gate voltage VR biasing voltage and the varactor M2 isadjusted through VC biasing voltage. An RF choke inductor L1

is used to block the RF signal to short on the low impedancenode VC. Similarly, a DC block capacitor C1 is used to ensurethe VC voltage shorting to ground through M1. The circuitforms a parallel connection RC load which, at its steady-state,will draw negligible current due to gate leakage.

The simulated RC range shown in Fig. 4 was obtained byschematic simulations in Cadence Virtuoso. A 180 nm tech-

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Parallel Resistance R (Ω)p

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Fig. 4. Equivalent resistance and capacitance range for (a) parallel and (b)series representation.

nology process design kit was used in S-parameter simulation.The obtained S-parameters were converted into Z-parametersand in turn converted to an equivalent parallel or series RCload, as shown in Fig. 3(b) or (c), respectively. In simulation,the supplied voltages VR and VC are gradually increasedfrom zero to ICs supply voltage. Each combination of VR

and VC voltages corresponds to an implemented RC value.This defines an area with the achievable RC values of themetasurface loading element. The values can be convertedfrom parallel to series connection, and vice versa, using thefollowing formulas

Rs = Rp(1 +Q2)−1, (1)

Cs = Cp(1 +Q−2), (2)

where Q = ωRpCp = 1/ωRsCs is the quality factor of thecircuit. In the remainder of the text, we will use the equivalentseries RC representation, unless otherwise mentioned.

D. Fabrication and practical restrictions related to EM oper-ation

Having outlined the basic considerations that have led usto the approximate dimensioning of the metasurface unit cellin the lateral (cell and patch widths) and vertical (dielectricthickness) directions, and implementation rules for the customIC, additional manufacturing limitations have been taken intoaccount in the design.

An important design aspect is manufacturability of thethrough vias (TV) that will connect the IC RF terminals (onthe back side of the metasurface) to the patches (on the frontside of the metasurface). The available technology for TVsrequires for a maximum 1:8 aspect ratio, i.e., the thicknessof the material stack for the mechanical drilling of TVs mustnot exceed 8 times the diameter of the via, so as to achievesufficient copper via electroplating. In contrast, blind vias (BV)require a 1:1 aspect ratio, leading to relatively thicker cylin-ders. Simulations and fabrication concepts have recommendedan approximate thickness of the dielectric stack penetratedby the TVs to be 2.4 mm, and therefore a TV diameter of0.3 mm was chosen. It is being numerically verified thatincreasing the diameter of the TVs leads to small increase inthe resonance frequency, without degrading its quality factor(the amplitude of the reflection coefficient remains −30 dBor lower). For example, for TV diameter increase from 270to 300 µm, the resonance frequency increases by roughly 70MHz, which can be compensated by slightly increasing thecapacitance introduced at the chip terminals, well within thetuning capabilities of the chip. Finally, it should be noted thatall vias are copper electroplated so that they are essentiallyhollow metallic cylinders, inset of Fig. 5(a); although our EMsimulations were conducted assuming solid-copper vias, forthe sake of simplicity, additional numerical simulations haveconfirmed that the two models are equivalent owing to thesmall skin depth (1 µm at 5 GHz).

The next practical considerations concerned the dielectricmaterial choices to be used above and below the metal back-plane. Initial fabricated prototypes used high-frequency gradedRogers RT/duroid 5880 dielectric (εr = 2.20, tan δ = 0.0009)on the top side, and regular FR4 dielectric (Hitachi MCL-E-679FGB) on the back side, where low loss is not asimportant to minimize cost. Fabrication of the initial 3-layersubstrates, e.g., as in Fig. 2(c), has resulted in significantwarping (bending) of the printed circuit board after laminationof all build-up layers, even for small metasurface substrates,e.g., 10 cm by 10 cm, due to mismatch of the thermal-expansion coefficients of the two dissimilar dielectrics. For thisreason, subsequent designs used the same dielectric substratetype, namely Panasonic Megtron7N dielectric (εr = 3.35,tan δ = 0.0020), with laminates and prepreg layers sym-metrically positioned above and below the backplane, thusminimizing warping. Given the fixed dielectric thicknessesavailable, a stack of Megtron7N laminates and prepregs hasbeen symmetrically laid up to achieve the total thicknessrequired and ensure that warpage has been diminished; indeed,the homogeneous nature of prepregs and laminates used hasyielded minimum warpage. Figure 5 provides a view of the

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(a) (b)

x

y

Fig. 5. Photographs of the fabricated metasurface PCB, with a net area of6.2” × 9.4” corresponding to 24× 16 = 384 unit cells. (a) Perspective viewof the front side/top layer with Ni/Au metallization; inset shows a close-upview of the unit cell where the four electroplated (hollow) through vias canbe seen. (b) Perspective view of the bottom side, where the custom ICs willbe assembled.

δx

δy

Through-via pad

Chip box(border)

RF portpin pad

Patch border

Copper trace

Ltr

θtr

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y

Ground pin pad

Fig. 6. View of the back side of the unit-cell, depicting the lateral offsets ofthe through via (TV) placement imposed by fabrication limitations. Parametersδx and δy denote the minimum lateral distance of the TV pad to the cornerchip-pin pad and to the inner edge of the patch, respectively.

demonstrator metasurface substrate made of Megtron7N PCBmaterials for the above mentioned studies. It has been 2.4 mmthick, 300 mm × 300 mm (6.2 × 9.4) in size and has beenproduced in large industrial panels of 457 mm × 610 mmformat.

As discussed in the previous subsections, the optimal po-sition to connect each pair of patches with lumped loads isat their corners; this can be intuitively understood by theincreased current density at such positions which allows forwider tunability, and by the minimization of the inductanceand resistance associated with short copper paths. However,in a realistic structure, the TVs that connect the patches to theIC (modeled by lumped loads) cannot be placed very closeto the patch corner, for two fabrication-related reasons: firstly,because drilling of the TVs can only take place outside thechip footprint and, secondly, because the landing pads for thevias (drilled from the back to the front) are two times the viadiameter and, thus, cannot be placed too close to the patchedge. The minimum values of these two offsets were chosen asδx = 0.4 mm and δy = 0.2 mm, respectively, and are depictedin Fig. 6. Please note that the resulting unit cell exhibitsstructural anisotropy, enforcing only mirror symmetry and notfour-fold symmetry, meaning that the two normally impingingpolarizations (x- and y-polarized) will behave differently. Thiscompromise arose from limitations stemming from the RCvalues due to the physics of real chips and the size of thepatches, and will be discussed in detail in Section III.

Concluding this part with restrictions related to the chippackaging and assembly, firstly, it was verified that laterallyoffsetting the BV connecting the ground pin of the chip (whichis the one in its middle) to the metasurface ground plane hasno effect on TE polarized absorber performance, our maintarget. Therefore, in the simulations performed in this worka single BV was placed in the center of the chip footprint.However, in the fabricated device [44], a copper trace bringsthis pin outside the chip footprint where the BV will shortit to the metasurface ground plane, so that the chip terminalsand the patches have a common reference ground. The lengthand path of this BV trace is expected to influence obliqueTM performance due to mutual coupling with the RF terminaltraces because of the current flowing through the BV (whichis zero for TE polarization). Finally, and in order to model thedevice as thoroughly as possible, one would need to quantifythe effect of the solder balls used to electrically connectthe RF terminals of the chip to their respective pads on themetallization layer [44].

E. S-parameter modeling and simulation

In order to efficiently model and simulate this multi-parametric EM problem, we rely on S-parameters, enabledby the metallic backplane, which effectively decouples themetasurface- and the chip-side designs. Thus, using the back-plane as a common reference ground, we can model thechip with four lumped ports, Fig. 7(a), and the incidentand scattered plane waves with Floquet ports, Fig. 7(b). Thelumped ports are 50 Ohm-referenced and fed by Touchstonedata (complex spectra) depending on the IC architecture, i.e,ranging from a single generalized four-port network (mostcomplicated case) to four identical decoupled RC loads (sim-plest case). The Floquet ports are defined for a given planewave direction, i.e., a (θ, φ) pair, both polarizations (TE andTM), and are placed at the front and back side of the unit cell,at planes perpendicular to the z-axis; periodic Bloch-Floquetconditions are applied to the remaining four boundaries en-closing the unit cell, emulating infinite periodicity. Pleasenote that in the case of uniformly configured chips we usea total of four Floquet ports: as the unit cell is subwavelengthonly the zero-order (specular) diffraction order is propagatingand we in general need to consider both linear orthogonalpolarizations. In the case of inhomogeneous unit cell settingwhere a supercell with periodicity exceeding the free-spacewavelength is formed, such as the anomalous reflection sce-nario in Section III-B, the number of Floquet ports increasesto accommodate the other propagating diffraction orders.

For the perfect absorber functionality all unit cells of themetasurface must be identically configured; also, for ourmetal-backed isotropic structure, we can safely assume thattransmission and cross-polarized coefficients will be practi-cally zero, since the structural anisotropy is too weak toinduce polarization conversion. For these reasons, we modela single unit cell and we seek the IC configuration that willlead to a minimization of the reflection coefficient for a givenpolarization, i.e., a minimization of the S55 or S66 scatteringparameter, using the port-number convention of Fig. 7. As

8

xy

z

P1P2

P3

P4

P5,6

P7,8

x

y

(a) (b)

Fig. 7. Modeling of the unit cell using combination of lumped and FloquetS-parameter ports: (a) Back side of the unit cell where the four lumpedports, P1,2,3,4, represent the RF ports of the IC. (b) Perspective view of asubwavelength unit cell depicting the four Floquet ports, P5,6 correspondingto TE and TM polarized incidence on the front side, and P7,8 similarly onthe back side. Floquet ports are defined on planes perpendicular to the z-axis,and for a given incident plane wave direction.

stated in Section II-D, we have intentionally designed thechip with its four RF ports decoupled, so that they can bedirectly replaced by lumped loads, with their RC values fallinginside the prescribed IC map, Fig. 4. This allows us to rapidlyfind the chip configuration, in terms of RC pair, that leadsto perfect absorption at a given frequency and polarization:For a given incident plane wave direction, we numericallyevaluate the 8-port S-parameters of the unit cell with full-3DEM simulation; then, we attach a prescribed RC load to allfour lumped ports (passed as 1-port Touchstone data) and,finally, we extract the scattered spectra at the remaining fourFloquet ports, corresponding to the two polarizations (TE andTM) and to the two sides of the unit cell (top/back side, i.e.,reflected/transmitted). Iterating over the RC loads using anoptimizer, we can rapidly identify the optimal configurationfor perfect absorption at a given frequency and polarization.However, note that changing a geometric/EM parameter ofthe structure and/or the incident plane wave direction, e.g.,for oblique incidence absorption, requires for the numericalrecalculation of the 8-port network S-parameters with a newfull-3D EM simulation, which is computationally intensive(time consuming) due to the complex geometrical features.These simulations were conducted in CST Microwave Studio,using the 3D frequency domain solver with broadband sweepand the Design Studio environment for the 8-port S-parametertasks.

III. ELECTROMAGNETIC DESIGN OF THE COMPLETE UNITCELL AND THE MULTI-FUNCTION PERFORMANCE

In this Section we present the metasurface unit cell design,taking into account all the aspects and restrictions discussionin Section II. Prime focus is given on wide-angle tunable ab-sorber functionality by thoroughly analyzing its performance;steering and polarization conversion functionalities are alsoassessed.

A. Perfect Absorption

The main functionality implemented by our metasurfacedevice is tunable perfect absorption (PA) of plane waves,

Filling factorρf

w= 2 p w/ c

Cel

l w

idthwc

(mm

)

0.6 0.65 0.7 0.75 0.8 0.85 0.97

7.5

8

8.5

9

9.5

10

10.5

11

−30

−25

−20

−15

−10

−5

0Reflection amplitude

|r| (dB)

f= 5 GHz,normal),θ= 0 (

-polarization,y

s = 2.1 ,R ΩCs = 3.2 pF.

−10 dB

ρf = 1.54 /11.8–w c

Fig. 8. Design map of the unit cell, depicting the reflection amplitude ofy-polarized normally incident plane wave at 5 GHz, assuming the chip isconfigured to deliver the equivalent lumped Rs = 2.1 Ohm and Cs = 3.2 pFat its ports. This map allows the extraction of the optimal unit-cell and patchwidth, wc and wp = ρfwc/2, respectively, with all the remaining structureparameters defined in Section II-D.

which can impinge from a large cone of incidence directionsand both polarizations. As discussed, for the IC-loaded unitcell to achieve PA at a given frequency, polarization, anddirection of incidence, we must properly tune both the resistiveand reactive (capacitive) part of the equivalent lumped loadsrepresenting the IC. Given the tuning ranges of the varistor andvaractors in the chip design, Section II.C, the optimizationof the free structural parameters of the unit cell design isperformed. The reference optimization case is PA at 5 GHz,normal y-polarized incidence, Rs = 2.1 Ω, and Cs = 3.2 pF;these RC values lie approximately in the middle of the chiprange, thus allowing maximum tunability. The free structuralparameters of the design are essentially the cell and patchwidth, wc and wp, respectively, under the condition that thethrough vias are placed as close as possible to the inner patchcorners, which is limited by the fabrication thresholds δx andδy discussed in Section II.D. In order to unveil the underlyingdesign rules, one can parametrically calculate the reflectionamplitude as a function of wc and the newly defined fillingratio, ρf = 2wp/wc, with the results presented in Fig. 8.Full-wave EM simulations of the unit cell are employed,conducted in CST Microwave Studio, using the frequency-domain solver with tetrahedral mesh. An approximately lineartrendline emerges, showing that smaller cells require forproportionally large patches to resonate for the same externalload values. For our design, PA is achieved at the optimalvalues of wc = 9 mm and ρf = 0.77, i.e., wp = 3.465 mm.For these parameter values, the length and angle of the metaltraces connecting the RF terminals of the chip to the landingpads of the through vias defined in Fig. 6 are Ltr = 0.41 mmand θtr = −11.65, respectively. The resulting unit cell andstructural dimensions are summarized in Fig. 9 in millimeters.

Having completed the selection of all the structural dimen-sions, the performance for PA functionality is assessed. Theamount of control imparted by resistance and capacitance tun-ing is depicted in Fig. 10, where C and R control the resonance

9

w =3.465p

2.14

0.22

wc=9

x

y

x

y

x

z

(a) (c)

(b)

1.6

o11.65

0.41

Fig. 9. Final unit-cell design and dimensions in millimeters. (a) Top view,showing the cell and patch widths. (b) Side view cross-section, showingthe dielectric thickness of the top and bottom dielectrics. (c) Bottom view,showing: the X-connection shape of the four lumped ports to the ground, thelocations of the through-vias connecting the chip RF terminals to the patches,and the respective traces.

4.5 5 5.5−30

−25

−20

−15

−10

−5

0

Frequency (GHz)

|r| (

dB

)

4.5 5 5.5−30

−25

−20

−15

−10

−5

0

Frequency (GHz)

1 Ω

2 Ω

3 Ω

4 Ω

2 pF

3 pF

4 pF

5 pF

(a) (b)

Fig. 10. Indicative spectra of the unit cell reflection amplitude for normaly-polarized incidence. (a) Series capacitance tuning affects the absorptionresonance frequency for fixed Rs = 2 Ω, and (b) series resistance tuningaffects the resonance quality factor, i.e., “depth”, for fixed Cs = 3 pF.

frequency and quality factor (resonance “depth”), respectively;these spectra are for normal y-polarized incidence. The reso-nance bandwidth is over 100 MHz (or 400 MHz) measuredat −10 dB (or −3 dB). The respective tolerance values ofC and R for near-perfect absorption at 5 GHz are quantifiedin terms of the achieved reflection amplitude, |r| < −10 dB,Fig. 11. The attained range falls well within the varistor andvaractor range of the chip thus allowing tuning and possiblefabrication-deviation compensation.

The last step in validating the performance of the absorberis to quantify the coverage range, in terms of oblique incidenceangle and/or frequency detuning, allowed by the available RCmap of the IC. The S-parameter block modeling approachdescribed in Section II.E is employed in order to efficientlycalculate the optimal load impedance values for various combi-nations of incidence direction, polarization, and frequency. Theresults are presented in Fig. 12. Oblique incidence coverageis up to 60 for both TE and TM polarization planes asdefined in Fig. 1(a), i.e., with the electric field always primarilypolarized along the y-axis, where the lateral distance betweenthe through vias is smallest. Frequency tuning is limited to

0 1 2 3 4 52

2.5

3

3.5

4

4.5

5

Series Resistance (Ohm)

Ser

ies

Cap

acit

ance

(p

F)

−30

−20

−10

0Reflection amplitude|r| (dB)

f = 5 GHz, θ = 0, y-pol. −10 dB

Fig. 11. Reflection amplitude for y-polarized normal incidence at 5 GHz, asa function of identical series RC loads attached to all four ports. The dottedarea is the RC values allowed by the IC.

0 1 2 3 4 52

2.5

3

3.5

4

4.5

5

Ser

ies

Cap

acit

ance

(pF

)

3030

45

45

60

60

TE, 5GHzTM, 5GHzFreq., θ=0

+0.1 GHz

–0.1 GHz

oo

o

o

o

o

Optimized for |r| < –50 dB

Fig. 12. Coverage for oblique incidence and frequency detuning for the perfectabsorber functionality of the final unit cell in terms of series RC loads. Obliqueincidence is at 5 GHz with angle steps of 5; frequency detuning is in stepsof 10 MHz. y-polarized incidence is assumed in all cases, i.e., the plane ofincidecne is xz and yz for TE and TM case, respectively.

±50 MHz, owing to the sharp absorption resonance and thelimited capacitance range.

1) Cross-polarized absorption performance: Since the tar-geted metasurface functionality was widely-tunable perfectabsorption for at least one polarization, the unit cell design wasallowed to be anisotropic, i.e., to exhibit mirror symmetry butnot four-fold symmetry, as depicted in Fig. 9(a). In this regard,y-polarization (i.e., Ey in TE and Eyz in TM) will outperformx-polarization, for perfect absorption on the given RC range.We opted for this trade-off, in order to have at least one ofthe polarizations perfectly absorbed and with wide obliqueincidence tunability; trying to accommodate both polarizationsin the limited RC range while enforcing four-fold symmetry(i.e., traces angle θtr = 45 and Lr ≤

√2dx, as defined

in Fig. 6) led to meager simulated performance for bothand/or very limited oblique incidence coverage. Nevertheless,we assessed the cross-polarized absorber performance, withthe results summarized in Fig. 13. As expected, very limitedcoverage is offered, e.g., only highly-oblique x-polarized (TE)incidence can be perfectly absorbed for the given RC coverage,while suboptimal performance, e.g., reflection as high as|r| ≈ −10 dB, can be attained for normal incidence.

10

0 1 2 3 4 52

3

4

5

−30

−20

−10

0

Series Resistance (Ω)

Ser

ies

Cap

acit

ance

(pF

) |r| (dB) for 5 GHz,

normal, x-polarized.

ChipRC

TE

TM

o60

o60–10 dB x

y

TE

TM

Fig. 13. Cross-polarized tunable absorber performance at 5 GHz. Thecolormap corresponds to reflection amplitude of x-polarized normal incidenceas series RC lumped loads are varied. Optimal RC values for oblique incidence(5 steps) in TE and TM planes are superimposed, with blue triangles and redsquares, respectively. The inset depicts how TE and TM planes are definedin the anisotropic unit cell for the cross-polarized case.

4.8 5 5.2Frequency (GHz)

-30

-20

-10

0

|r|(

dB

)

0 0.5 1 1.5

Rs

(Ohm)

2.5

3

3.5

4

Cs

(pF

)

−30

−20

−10

0|r| (dB)

2.6 pF3.5 pF

(a) (b)

–10 dB

Fig. 14. Double absorption resonance arising for very oblique TE incidenceangles. (a) Refection amplitude spectra for θ = 60, y-polarized, Rs =0.35 Ω, and two different values of series capacitance Cs. (b) Reflectionamplitude at 5 GHz, depicting the two optimal series-RC configurationsavailable.

2) Double resonance at highly oblique incidence: It mustbe noted that highly oblique incidence cases give rise to aninteresting phenomenon of dual absorption resonance. Forinstance, in the θ = 60 TE y-polarized case, we canclearly see two minima of reflection spaced by approximately100 MHz, Fig. 14(a). Naturally, the unit cell RC values can betuned to optimize either of the two resonances for absorptionat the desired frequency, as depicted in the tolerance map ofFig. 14(b). The series resistance is approximately the same,0.35 Ohm in this case, while the series capacitance can vary upto 1 pF. This double resonance gradually emerges for θ > 45,being more pronounced for y-polarized waves in the C-band(5 GHz) for our unit cell design.

B. Anomalous Reflection

The independent control over the RC values in each unitcell enables us to perform wavefront manipulation operations,such as anomalous reflection. Although the reflection ampli-tude is not particularly high within the realizable RC rangeby the chip (Fig. 11), the coverage of the reflection phase isquite large, i.e., from -170 degrees to 170 degrees, as shown in

0 1 2 3 4 52

2.5

3

3.5

4

4.5

5

-90

0

90

Series Resistance (Ohm)

Ser

ies

Cap

acit

ance

(pF

)

Reflectionphase (deg)

f = 5 GHz, θ = 0, y-pol.

1

23

4,5,6

7

8

180

-180

81 2

–0.6+0.6

ReE y,scat.

3 4 5 6 7

x

z

Unit cell stacking, x-dim.

(a) (b)

Fig. 15. (a) Reflection phase of one unit cell for 5 GHz, normal, y-polarizedincidence; the white circles depict the series RC settings for the eight unitcells, required for anomalous reflection function. (b) Scattered Ey field patternfor anomalous reflection function.

Fig. 15(a). As a result, anomalous reflection can be achievedif we lower the requirement on the reflection amplitude.Anomalous reflection is obtained by grouping several unit cellsinto a supercell and allowing the reflection toward the desireddirection while forbidding the scattering to other directionsby selectively promoting a single propagating diffraction orderover the others. Utilizing different supercell sizes and relyingon different diffraction orders, the anomalous reflection direc-tion can be tuned with a quasi-continuous angle coverage [36].To demonstrate the anomalous reflection effect, we considera supercell made of N = 8 unit cells, which will supportanomalous reflection from normal incidence toward the 56.4degrees, according to θr = arcsin (λ0/D) [8], [36], whereD is the extent of the supercell and equals Ndx for steeringinside the xz plane for example. In this supercell configuration,which is different from the one in Fig. 7, there are three ports,a, b, and c, corresponding to the three propagating diffractionorders m = 0,+1,−1 (since λ0 < D < 2λ0). Note thattransmission and polarization conversion is negligible and,thus, power collected by the corresponding ports is negligible.Subsequently, we perform an optimization while constrainingthe RC values within the realizable range. Note that in orderto speed up the optimization process one can use as an initialsetting for the RC values those dictated by a linear phaseprofile along the supercell, i.e., φ(x) = φ0 − (2π/D)x [36].

The required RC values for the 8 unit cells after opti-mization are shown as white dots in Fig. 15(a). With thisconfiguration, the normally incident wave with polarizationEy is reflected to 56.4 degrees without prominent scatteringto the specular direction (port a) or the m = −1 diffractionchannel (−56.4 degrees, port c), as the scattered Ey fieldpattern shows in Fig. 15(b). The amplitude of the reflectioncoefficient is |Sba| = 0.38, which means that 14.4% of thepower is reflected toward the desired direction. Meanwhile,the amplitudes of the reflection coefficients to the other twodirections are |Saa| = |Sca| = 0.05. The absorbed power bythe metasurface is given by Abs ≈ 1 −

∑n |Sna|2 = 85.1%,

where n runs through the propagating reflection diffrac-tion orders a, b, c; an anomalous reflection efficiency ofEff = |Sba|2/

∑n |Sna|2 = 96.7% is calculated, meaning that

11

96.7% of the scattered power goes to the desired direction.Finally, we emphasize that through the same principle oflocally modifying the reflection phase, we can achieve morewavefront manipulation operations, such as retro-reflection andfocusing [8], [36].

C. Polarization ConversionNext, we exploit additional advantages of the proposed unit

cell configuration. Organizing patches in groups of four andusing a single chip to control them was judiciously chosento save resources and additionally results in a geometricallyisotropic unit cell design that can have polarization indepen-dent response. On the other hand, however, it offers the distinctcapability of electrically breaking the four-fold symmetryrotational leading to polarization conversion.

Here, as a demonstration of the opportunities for polariza-tion control we demonstrate linear polarization conversion tothe orthogonal state. To this end, we appoint asymmetric loadvalues to the four patches. More specifically, we use the com-plex loads R1, C1 = R3, C3 and R2, C2 = R4, C4to electrically emulate the geometric structure of a 45-degreetilted cut wire, which has been shown in the literature to resultin efficient linear polarization conversion [11]. We find that theoptimal values are R1, C1 = R3, C3 = 0.35 Ω, 2.6 pFand R2, C2 = R4, C4 = 3.4 Ω, 4.8 pF, since theyallow for the maximum disparity regarding the capacitancevalues between on- and off-diagonal elements, while retainingthe total resistance at the lowest possible levels. (Note thatfor the used values of R and C the reactances dominate overthe resistances at the neighborhood of 5 GHz.) We succeedin getting perfect polarization conversion to the orthogonalstate, i.e., Rco = 0 at 5.05 GHz, as depicted in Fig. 16.However, having used resistance values as high as 3.4 Ω forthe off-diagonal elements the absorption is high (A = 0.61 at5.05 GHz), limiting the cross-polarized power coefficient to0.37 [Fig. 16]. The remaining power is found in transmission(not shown), which is in all cases small due to the presenceof the (perforated) backplane. To further quantify the perfor-mance we define the metrics of extinction (Ext = Rcross/Rco)and efficiency (Eff = Rcross/(1 − A)). They describe thecompleteness of the conversion in reflection and the percentageof cross-polarized reflection out the power that does not getabsorbed, respectively. For the case of Fig. 16 their peaksappear at ∼ 5.05 GHz and equal 27 dB and 0.97, respectively.

Increasing the capacitance C1 inside the available range2.6-3.5 pF, while keeping R1 constant, we can shift the peakof cross-polarized reflection to lower frequencies. Specifically,the frequency variation can cover a range of 120 MHz. Alongthis frequency blueshift, we get a decrease in the cross-polarized reflected power, since the reactances of the twobranches become more comparable; however, the efficiencyand extinction remain in all cases very high.

Finally, extending the range of available R and C values bythe chip to cover lower resistances, reducing the absorption, aswell as a wider span of capacitances, to strengthen the reac-tance dissimilarity between the on- and off- diagonal elements,would further enhance the polarization conversion perfor-mance. Alternatively, employing different unit cell topologies,

2 3 4 5 6 7 80

0.2

0.4

0.6

0.8

1

Frequency (GHz)

Pow

er C

oeffi

cien

ts

RcoRcrossA

0 1 2 3 4 52

3

4

5

Series Resistance (Ω)

Ser

ies

Cap

acit

ance

(pF

)

1, 1 = 3, 3R C R C

2, 2 = 4, 4R C R CZ1

Z3

Z2

Z4

Fig. 16. Linear polarization conversion by electrically breaking the four-foldsymmetry using loads R1, C1 = R3, C3 = 0.35 Ω, 2.6 pF andR2, C2 = R4, C4 = 3.4 Ω, 4.8 pF to emulate a 45-degree tilted cutwire. Complete polarization conversion to the orthogonal state is observed.The cross-polarized power coefficient is 0.37 and absorption amounts to 0.61.The remaining power is found in transmission (not shown) which is in allcases small due to the presence of the (perforated) backplane.

the constraints on the IC range could be relaxed so as to be inline with the practical RC values available by affordable chipdesigns.

IV. CONCLUSIONS AND FUTURE PROSPECTS

Based on the introduced design procedure and the im-plementation constraints, we presented a fabrication-readytunable microwave metasurface which offers continuous localcontrol over the complex surface impedance and allows mul-tiple reconfigurable functionalities. The dynamic control hasbeen achieved by assembling a customized integrated-circuitchip in each unit cell and co-designing the electromagneticand electronic components to fulfill the desired functionalities.The structure’s performance as a tunable perfect absorber,tunable anomalous reflector, and polarization convertor hasbeen demonstrated, highlighting the multi-functional characterof the proposed metasurface structure.

HyperSurfaces, combining the EM design aspect–detailedin the preceding Sections–with appropriate hardware and soft-ware, enables themselves to act as hypervisors for metasurfacefunctionalities. In other words, using well-defined applicationprogramming interfaces and communication protocols [64],[65], a computer, a software service, or an individual candeploy and chain together multiple EM functionalities overthe same HyperSurface. For instance, complex alterations overthe phase, amplitude and polarization can be deployed over aHyperSurface at the same time. Recent studies have also mod-eled the wavefront detection as a software service, allowing aHyperSurface to concurrently sense and modify an impingingwave and enabling real-time adaptive operation [66], [67].

The inter-networked deployment of multiple HyperSurfaceunits within a space yields a programmable wireless en-vironment (PWE) as a whole, within which EM propaga-tion becomes software-defined [68]. For instance, applying

12

HyperSurface-coatings over walls, ceilings and other largesurfaces in a floorplan, yields an indoors PWE. A centralserver can orchestrate the EM functionalities deployed toeach HyperSurface unit, matching it to the needs of mobileusers present in the floorplan. In this manner, studies haveshowcased novel potential in PWE-assisted channel equal-ization, multipath fading, Doppler Effect mitigation, long-range wireless power transfer and physical-layer security [69].These capabilities can enable novel, holistic data networkingapproaches, which will adaptively and jointly tune the datacontrol logic and the physical propagation characteristics, tooptimally serve the user needs.

ACKNOWLEDGMENTS

The first three authors, A. P., O. T., and F. L., con-tributed equally to this work. University of Cyprus researchersLoukas Petrou, Giorgos Varnava, and Petros Karousios areacknowledged for fruitful discussions. Odysseas Tsilipakosacknowledges the financial support of the Stavros NiarchosFoundation within the framework of the project ARCHERS(Advancing Young Researchers Human Capital in CuttingEdge Technologies in the Preservation of Cultural Heritageand the Tackling of Societal Challenges).

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