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A new simple method for analysing ofthermal noise in switched-capacitorfiltersMohammad Rashtian a , Ali Mohammad Afshin Hemmatyar b &Omid Hashemipour ca Department of Electrical Engineering, Civil Aviation TechnologyCollege, Mehrabad International Airport, PO Box 13445-418,Tehran, Iranb Department of Computer Engineering, Sharif University ofTechnology, PO Box 11155-9517, Tehran, Iranc Department of Electrical and Computer Engineering, ShahidBeheshti University, G.C., Evin, Tehran, IranVersion of record first published: 01 Jun 2012.

To cite this article: Mohammad Rashtian , Ali Mohammad Afshin Hemmatyar & Omid Hashemipour(2012): A new simple method for analysing of thermal noise in switched-capacitor filters,International Journal of Electronics, 99:12, 1729-1737

To link to this article: http://dx.doi.org/10.1080/00207217.2012.680791

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International Journal of ElectronicsVol. 99, No. 12, December 2012, 1729–1737

A new simple method for analysing of thermal noise in

switched-capacitor filters

Mohammad Rashtiana*, Ali Mohammad Afshin Hemmatyarb

and Omid Hashemipourc

aDepartment of Electrical Engineering, Civil Aviation Technology College, MehrabadInternational Airport, PO Box 13445-418, Tehran, Iran; bDepartment of Computer Engineering,Sharif University of Technology, PO Box 11155-9517, Tehran, Iran; cDepartment of Electrical

and Computer Engineering, Shahid Beheshti University, G.C., Evin, Tehran, Iran

(Received 9 November 2010; final version received 20 February 2012)

Thermal noise is one of the most important challenges in analogue integratedcircuits design. This problem is more crucial in switched-capacitor (SC) filters dueto the aliasing effect of wide-band thermal noise. In this article, a new simplemethod is proposed for estimating the power spectrum density of output thermalnoise in SC filters, which have acceptable accuracy and short running time. In theproposed method, first using HSPICE simulator, accurate value of accumulatedsampled noise on sampler capacitors in each clock state is achieved. Next, usingdifference equations of the SC filter, frequency response of the SC filter is shapedby time domain analysis. Based on the proposed method, a SC low-pass filter anda second-order SC band-pass filter are analysed. The results are validated bycomparing to the previously measured data.

Keywords: thermal noise; switched-capacitor circuit; time domain noise analysis;power spectral density; discrete noise analysis

1. Introduction

Nowadays, decreasing trend in supply voltage has accompanied by decreasing the value ofsignal-to-noise ratio. Thus, estimating the power spectrum density of thermal noise at theoutput of an analogue integrated circuit, is a very important challenge in circuit design. Onthe other hand, thermal noise effect is more critical in switched-capacitor (SC) filters dueto the aliasing effect. Different complicated procedures for estimating of the powerspectral density (PSD) in SC circuits are presented in Toth and Suyama (1996), Vasudevanand Ramakrishna (2004), Denk and Winkler (2007) and Sepke, Holloway, Sodini, and Lee(2009). Most of the methods are operating based on series expansions in the Fourierdomain and the superposition theorem. However, although these techniques are useful inthe circuit simulators, they are too complicated for first hand calculation during circuitdesign procedure. Another method presented in Gobet and Knob (1980) is operatingbased on an approximate analytical analysis of the circuit. Also, other elaboratedapproaches are presented in Gregorian and Temes (1986), Hegazi and Klemmer (2005)and Cheng, Zhang, Zhou, Li, and Zhou (2010) based on expanding of the presentedmethod in Gobet and Knob (1980).

*Corresponding author. Email: rashtian@catc.ac.ir, mohammad.rashtian@gmail.com

ISSN 0020–7217 print/ISSN 1362–3060 online

� 2012 Taylor & Francis

http://dx.doi.org/10.1080/00207217.2012.680791

http://www.tandfonline.com

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A new approach for estimating the PSD of thermal noise in SC circuits is presented by

Rashtian, Hashemipour, and Hemmatyar (2010). In presented approach, the thermal noise

is assumed to be White Gaussian noise, which is ergodic in mean and variance value.

It means the mean and mean square (MS) value of a thermal noise signal (vi(t)) and the

mean and MS value of its sampled signal (vi(n)) are the same.Using HSPICE and analytical analysis, the MS value of the sampled noise voltages is

estimated carefully in each phase and then discrete white noise sources with allocated MS

values are supplemented to the difference equations modelling of the circuit. Using the

difference equations, discrete time domain analysis of the designed circuits is done by

MATLAB. An introduction to the accuracy of the presented method for noise analysis

without noise shaping for a simple stray-insensitive integrator has already been discussed

in Rashtian et al. (2010). In this article, the presented approach is elaborated during noise

analysing of two SC filters. A SC low-pass filter (LPF) and a second-order SC band-pass

filter (BPF) are analysed and correct noise shaping of the filter is clearly shown.Besides, output noise of the first stage operational amplifier (OpAmp), which is a

significant part of the next sampled noise stage, was not considered in the previous work

(Rashtian et al. 2010). Comparison between simulation results and the reported measured

data shows that the proposed method is a simple accurate solution.The article is organised as follows. In Section 2, a brief review of the earlier proposed

method in Rashtian et al. (2010) is outlined. Effects of thermal noise in a first-order LPF

and a BPF are presented and compared to the measured values reported by the previous

works, in Sections 3 and 4, respectively.

2. Brief review of presented approach

A well-designed SC filter is devised with short settling-time circuits to satisfy low harmonic

distortion behaviour; therefore 3 dB cut-off frequency of the sampling circuits is absolutely

greater than the clock frequency (Rashtian et al. 2010). Hence, the PSD of the sampled

noise will be heavily aliased and therefore, the spectrum of the sampled noise signal vi(n) is

nearly white (Schreie, Silva, Steensgaard, and Temes 2005), where vi(n) is the value of the

sampled noise at the end of the interval (nT). The aliasing increases the PSD of the noise,

but the MS value of the sampled signal vi(n) and main signal vi(t) remains almost the same.

Based on the above description, the MS values of the sampled signal vnCi(n) and the main

signal vnCi(t) are nearly the same, where vnCi(n) is the discrete representation of the ith

capacitor’s voltage. Estimation of the MS value of noise voltage on different sampler

capacitors even in not so complicated circuits is a tedious analytical work and usually

accompanied by different approximations (simplifications). To alleviate this problem, the

HSPICE simulator is utilised in order to estimate the MS values in different time intervals

using equivalent ac circuits. In other words, noise analysis of the equivalent circuits is done

by HSPICE in two states of clock separately to find accurate MS values of noise signal

without any serious approximation. Next, appropriate white noise sources with previously

calculated values are added to the difference equations of the SC circuit for time domain

analysis. Doing so, frequency response of the filter is shaped to the equivalent discrete

noise sources. Transient simulation is done by MATLAB to estimate the PSD of the

output using the difference equations. In the presented approach only the accumulated

sampled noise is considered, which is the main part of total output noise.

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The total time interval in transient analysis has an important role for accurate

estimation of PSD. Due to the inherent property of the noise signals and the complexity of

the circuit, the total time of simulation should be long enough for resulting to a stationaryestimation of PSD.

3. Noise effects in a first-order LPF

The first-order SC-LPF which has been considered in Gobet and Knob (1980), is shown in

Figure 1. The clock frequency is 5 kHz, the effective resistance of transistors M1 and M2 intheir ON-state is 14.2 and 18.4 kV, respectively, and the capacitor value of C1 and C2 is 51

and 45 pF, respectively.When transistorM1 is ON (’1¼ ‘1’), and transistorM2 is OFF (’2¼ ‘0’), its noise affect

the voltage of capacitor C1. It was shown in Rashtian et al. (2010), that the noise of aMOSFET transistor in triode region can be represented by a voltage source with one-sided

PSD of 4 k�Ron, where k is the Boltzmann constant, � the absolute temperature of the

device and Ron the equivalent resistance of the transistor in the triode region. Then, the MS

value of the sampled noise voltage on C1 can be calculated by integrating the PSD over all

positive frequencies (Rashtian et al. 2010):

v2nC1ðnÞ � v2C1ðtÞ ¼

Z 10

4k �Ron11

1þ ffSW1

� �2 df ¼ 4k�Ron1 fSW1�

2

� �¼

k�

C1ðV2Þ ð1Þ

In above equation, fsw1 is 3 dB cut-off frequency of the sampling circuit concluded by

‘ON’ resistance of M1 (Ron1) and sampling capacitor C1.When transistor M1 is OFF (’1¼ ‘0’), and transistor M2 is ON (’2¼ ‘1’), the filter can

be simplified as the circuit shown in Figure 2.It should be noted, the PSD of the associated voltage vn2 is 4 k�Ron2. Regarding to the

series connection of the C1 and C2 capacitors, the MS value of the sampled noise voltage of

capacitor C2 is:

v2nC2ðnÞ � v2C2ðtÞ ¼ k�ðC1 þ C2Þ

C1C2

C1

C1 þ C2

� �2

¼ k�C1

C2 ðC1 þ C2ÞðV2Þ ð2Þ

Now the difference equation of the circuit can be formed as presented in Equation (3):

vo n�1

2

� �T ¼

C1

C1 þ C2vo n�

3

2

� �Tþ

C1

C1 þ C2viðn� 1ÞTþ

C1

C1 þ C2vnC1ðnÞ þ vnC2ðnÞ ð3Þ

Figure 1. First-order SC-LPF.

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where vnC1 and vnC2 are the white noise sources with MS values presented in Equations (1)

and (2). Here without lack of generality, we assume vin is equals to zero.Figure 3 shows the simulated PSD of the output voltage for total time of 3.2768 s

equals to 214 sampling periods. Measured data reported in Gobet and Knob (1980) arealso shown in Figure 3. As seen, the simulation results are very close to the measured data.

4. Noise effects in a second-order BPF

The second-order SC-BPF, which has been studied in Toth and Suyama (1996) andVasudevan and Ramakrishna (2004), is shown in Figure 4.

Figure 3. Output noise PSD of SC-LPF (–, simulation; �, measurement).

Figure 2. Equivalent circuit for the first-order SC-LPF when M1 in ON and M2 is OFF.

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In order to compare the simulation results with the reported data in Toth and Suyama

(1996), the parameters of the circuit are set as done in Toth and Suyama (1996). Thus, the

input referred noise source of the amplifiers is assumed to be equal to vnop ¼ 20 nV=ffiffiffiffiffiffiffiHzp

,

which can be replaced by an equivalent resistance (Req) equals to 24.15 kV in simulation

procedure. Sampling frequency is 128 kHz, and Ron of all of the transistors is 80V, and the

unity-gain bandwidth of the OpAmp is set to 10GHz.As explained in Schreie et al. (2005), when ’2 equals to ‘1’, the MS value of the sampled

noise on capacitor C1 due to switches M2 and M4 is (k�/C1). The sampled noise voltage

(vnC1,2(n)) is delivered to capacitor C2 during next ’1¼ ‘1’ phase. Also, the MS value of the

sampled noise on the capacitors C3 and C7 can be calculated by the same equations as

follows:

v2nC1,2ðnÞ �k �

C1¼ 97:6 mVð Þ

2ð4Þ

v2nC3,2ðnÞ �k�

C3¼ 97:6 mVð Þ

2ð5Þ

v2nC7,2ðnÞ �k�

C7¼ 118:44 mVð Þ

2ð6Þ

During the ’1¼ ‘1’ phase, due to very low input impedance of OP1 (a virtual ground node),

it is reasonable to assume that the MS value of noise voltage on C1 (vnC1,1(t)) is

independent of the characteristics of transistors M13 and M15.Figure 5 shows the equivalent noise model for the circuit around C1 including three

uncorrelated noise sources, and the simple one pole equivalent model for OP1 (as

considered in Chandrawat and Mishra 2009). The total MS value of the sampled noise on

C1 can be calculated by summing the effects of all noise sources.

Figure 4. Second-order SC-BPF studied in Toth and Suyama (1996) and Vasudevan andRamakrishna (2004).

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Circuit is shown in Figure 5 is simulated by HSPICE. The accurate MS value of C1

noise voltage, vnC1,1(t) has been obtained using ‘AC Analysis’ simulation, where the input

referred noise vnop is replaced by an equivalent resistor equals to:

Req ¼ 24:15 k� ¼v2nop

4k�ð7Þ

Same procedure has been applied for calculating the MS value of C4 noise signal during

’1¼ ‘1’ phase. The results are as follows:

v2nC1,1ðnÞ � v2nC1,1ðtÞ ¼ 1:068 mVð Þ2 and v2nC4,1ðnÞ � v2nC4,1ðtÞ ¼ 175:62 mVð Þ

2ð8Þ

As shown in the equivalent circuit of Figure 6, during ’2¼ ‘1’ phase, the MS value of the

sampled noise on C4 is related to the switch noise sources and the output continuous noise

of the first OpAmp stage OP1.By the same procedure, the MS value of the vnC4,2(t) can be calculated by HSPICE.

Thus, the MS value of the sampled signal vnC4,2(n) is:

v2nC4,2ðnÞ � 176:13 mVð Þ2

ð9Þ

Figure 5. Equivalent noise model for the circuit around C1 during ’1¼ ‘1’ phase.

Figure 6. Equivalent noise model for circuit around C4 during ’2¼ ‘1’ phase.

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It should be noted that ignoring the continuous part of the OpAmp noise will be resulted

to a noticeable error (14.38 mV2) in the MS value of vnC4,2(n).Regarding very large equivalent impedance between inverting input and output nodes

of OP2, the MS value of the sampled noise on C5 during ’1¼ ‘1’ phase can be expressed

analytically as:

v2nC5,1ðnÞ � v2nC5,1ðtÞ ¼ k�ðC5 þ C7Þ

C7C5

C7

C5 þ C7

� �2

¼ k�C7

C5ðC5 þ C7Þ¼ ð1:73 mVÞ2 ð10Þ

As shown in Figure 7, the MS value of the noise on C3 is affected by the noise of switch

transistors M13 and M15, continuous noise of OP2 and the equivalent input referred noise

of OP1 during ’1¼ ‘1’ phase. Utilising the HSPICE for the equivalent circuit of Figure 7,

the MS value of the sampled noise on C3 is obtained as:

v2nC3,1ðnÞ � v2nC3,1ðtÞ ¼ 2:54mVð Þ2

ð11Þ

Applying the calculated equivalent noise sources to the difference equation of the main

circuit results in:

vAðnTÞ ¼C1

C2vi n�

1

2

� �T�

C3

C2voðnTÞ þ

C1

C2vnC1,1ðnÞ þ vnC1,2ðnÞ� �

þC3

C2vnC3,1ðnÞ þ vnC3,2ðnÞ� �

ð12Þ

voðnTÞ ¼C4

C5 þ C7vAðn� 1ÞTþ vnC4,1ðnÞ þ vnC4,2ðnÞ� �

þC5

C5 þ C7voðn� 1ÞTþ vnC7,2ðnÞ� �

þC6

C5 þ C7viðn� 1ÞT� viðnTÞð Þ þ vnC5,1ðnÞ

ð13Þ

The equivalent noise sources are uncorrelated, so their sign is not important and all of

them supposed to have positive sign in Equations (12) and (13).

Figure 7. Equivalent noise circuit around C3 during ’1¼ ‘1’ phase.

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The PSD of the output noise voltage simulated by the proposed method is compared to

the measured data reported by Toth and Suyama (1996) and shown in Figure 8. The total

time of simulation is 0.064 s equals to 213 sampling periods. As shown, the simulation

results are actually close to the measured data.

5. Conclusion

A new method for estimating the output noise of the SC filters is proposed. As a

reasonable approximation, the MS values of the sampled noise signal and the main noise

signal of the capacitor’s voltage in SC filters are supposed to be the same. The MS value of

the main thermal noise at different points of the circuit is calculated accurately by HSPICE

in switching intervals; and the output noise is calculated by analytic equations introducing

equivalent circuits in the succeeding steps of analysis.Based on the proposed method, two SC filters, one LPF and one BPF, have been

analysed. Simulated PSD of the output noise for both filters is close to the measured data;

which shows the accuracy of the proposed noise shaping procedure. Close agreement

between the estimated output noise and the measured output noise verifies the validity of

the proposed method, which is a much simpler and faster procedure compared to the

previous works.

Figure 8. Output noise PSD of SC-BPF (�, simulation; �, measurement).

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References

Chandrawat, U.B.S., and Mishra, D.K. (2009), ‘Design Procedure for Two-stage CMOS Opampwith Optimum Balancing of Speed, Power and Noise’, International Journal of Electronics, 96,

1145–1159.Cheng, S., Zhang, K., Zhou, X., Li, W., and Zhou, D. (2010), ‘A D-� Fractional-N Frequency

Synthesiser with Quantisation Noise Folding Suppression’, International Journal of Electronics,

97, 773–782.Denk, G., and Winkler, R. (2007), ‘Modelling and Simulation of Transient Noise in Circuit

Simulation’, Mathematical and Computer Modelling of Dynamical Systems, 13, 383–394.Gobet, C., and Knob, A. (1980), ‘Noise Analysis of Switched Capacitor Networks’, IEE Electronics

Letters, 16, 734–735.Gregorian, R., and Temes, G.C. (1986), Analog MOS Integrated Circuits for Signal Processing, New

York: John Wiley and Sons.

Hegazi, E., and Klemmer, N. (2005), ‘Accurate Modelling of Noise in Switched-C D� Analog-to-Digital Converters’, IEEE Transactions on Circuits and Systems I: Regular Papers, 52,2319–2326.

Rashtian, M., Hashemipour, O., and Hemmatyar, A.M.A. (2010), ‘A Simple Time DomainApproach to Noise Analysis of Switched Capacitor Circuits’, IEICE Electronics Express, 7,745–750.

Schreie, R., Silva, J., Steensgaard, J., and Temes, G.C. (2005), ‘Design-oriented Estimation ofThermal Noise in Switched-capacitor Circuits’, IEEE Transactions on Circuit and Systems I:Regular Papers, 52, 2358–2368.

Sepke, T., Holloway, P., Sodini, C.G., and Lee, H.S. (2009), ‘Noise Analysis for Comparator-based

Circuits’, IEEE Transaction on Circuit and Systems, 56, 541–553.Toth, L., and Suyama, K. (1996), ‘Exact Noise Analysis of Ideal SC Networks’, in Proceedings of the

IEEE International Symposium on Circuits and Systems, vol. 3, Atlanta, pp. 1585–1588.

Vasudevan, V., and Ramakrishna, M. (2004), ‘Computation of the Average and Harmonic NoisePower-spectral Density in Switched-capacitor Circuits’, IEEE Transaction on Circuits andSystems, 51, 2165–2174.

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