a novel programmable cmos based function generator circuit...linear v-i converter,"...

4
International Journal of Scientific & Engineering Research, Volume 5, Issue 8, August-2014 ISSN 2229-5518 IJSER © 2014 http://www.ijser.org A Novel Programmable CMOS Based Function Generator Circuit Hamed S. Kia AbstractIn this paper, design and analysis of a programmable CMOS-based function generator circuit is presented. The proposed circuit implements trapezoidal and triangular functions with all parameters (slope, position, width and height) independently and continuously adjustable. The proposed circuit achieves higher speed compared to the available previous work by not using winner takes all or looser takes all circuits which are common in design of function generator circuits. The circuit is designed and simulated in 0.13 um CMOS technology, and is suitable to be used in analog and mixed-mode integrated circuits. Index TermsFunction generator, Programmable, CMOS, Trapezoidal and triangular functions, Current mode. —————————— —————————— 1 INTRODUCTION Function generator circuits are one of the main building blocks of different electronics applications such as analog signal processing, medical devices and communication circuits [1], [2], [3], [4]. In these applications, circuits that per- form basic operations like function generators play a great role. Any improvement in their circuit level realization can have significant effect in improving efficiency of the system [5]. Most of the currently available structures for function gen- erators use two operational transconductance amplifiers (OTA) beside a Min or Max circuit. Although many high speed OTAs have been designed and proposed, but the use of the Min or Max circuit [6], [7], [8] limits the speed considera- bly. This is because the operating speed of the Min or Max becomes dominant and decrease the overall speed of the func- tion generator circuit. This paper presents a cost effective and simple CMOS function generator circuit which is easy to implement and use. The proposed architecture produces trapezoidal and triangular functions with all parameters (slope, position, width and height) independently and continuously adjustable. The main aim of this work is to realize a linear, low-voltage and high speed CMOS based function generator circuit. 2 PROPOSED FUNCTION GENERATOR CIRCUIT The voltage to current (V-I) converter circuit shown in Fig. 1 is the main part of the proposed function generator circuit. It can be inferred from this figure that IM1a=Ib (because the gate of M3a does not take any current) and since Ib is constant, VGSM1a (and similarly VGSM1b) has to remain constant (neglecting body effect). Therefore any variations in Vin at the gate of M1a or M1b will be reflected to the source terminal level-shifted by the constant gate-source voltage (VGSM1a or VGS1b). From Fig 1, we have: where Vth is the threshold voltage of NMOS transistor. Simi- larly: From (1) and (2) we have: Fig. 2 shows Io as a function of vin1. The reason for plotting Io versus vin1 instead of (vin1-vin2) is that in most of applications one of the inputs is connected to a constant voltage and the other one to the input signal. As it will be discussed, we use this constant voltage to control and adjust different parts of the output current. The architecture of the proposed function generator circuit is shown in Fig. 3. This circuit is capable of generating trapezoi- dal and triangular functions. Note that among several classes of parameterized signals, triangles and trapezoids are more commonly used in industrial control applications. In this structure (Fig. 3) I2 is greater than I1. When the input signal is applied, Io and therefore Iout will begin to increase from zero (part I of Fig. 4). At this state (Io>I1, I2): Io1, Io2 = 0 Iout = Io When I1 < Io < I2 (see Fig. 3), the subtraction of Io1 from Io will force Iout to remain constant (part II of Fig. 4): Io1 = Io - I1 Iout = Io - Io1 = I1 When Io > I1, I2, the subtraction of Io1, Io2 from Io will decrease Iout (part III of Fig. 4): Io1 = Io - I1 Io2=Io - I2 Iout = Io - Io1 - Io2 = I1 + I2 - Io F ———————————————— Hamed Sajjadi Kia, is currently a researcher at North Dakota State Univer- sity, Fargo, ND, USA. Email: [email protected] 134 IJSER

Upload: others

Post on 18-Aug-2020

0 views

Category:

Documents


0 download

TRANSCRIPT

Page 1: A Novel Programmable CMOS Based Function Generator Circuit...linear V-I converter," International Symposium on Low Power Elec-tronics and Design, 2003. [4] H.S. Kia, "An analog cell

International Journal of Scientific & Engineering Research, Volume 5, Issue 8, August-2014 ISSN 2229-5518

IJSER © 2014

http://www.ijser.org

A Novel Programmable CMOS Based Function Generator Circuit

Hamed S. Kia

Abstract— In this paper, design and analysis of a programmable CMOS-based function generator circuit is presented. The proposed

circuit implements trapezoidal and triangular functions with all parameters (slope, position, width and height) independently and

continuously adjustable. The proposed circuit achieves higher speed compared to the available previous work by not using winner takes all

or looser takes all circuits which are common in design of function generator circuits. The circuit is designed and simulated in 0.13 um

CMOS technology, and is suitable to be used in analog and mixed-mode integrated circuits.

Index Terms— Function generator, Programmable, CMOS, Trapezoidal and triangular functions, Current mode.

—————————— ——————————

1 INTRODUCTION

Function generator circuits are one of the main building blocks of different electronics applications such as analog signal processing, medical devices and communication

circuits [1], [2], [3], [4]. In these applications, circuits that per-form basic operations like function generators play a great role. Any improvement in their circuit level realization can have significant effect in improving efficiency of the system [5]. Most of the currently available structures for function gen-erators use two operational transconductance amplifiers (OTA) beside a Min or Max circuit. Although many high speed OTAs have been designed and proposed, but the use of the Min or Max circuit [6], [7], [8] limits the speed considera-bly. This is because the operating speed of the Min or Max becomes dominant and decrease the overall speed of the func-tion generator circuit. This paper presents a cost effective and simple CMOS function generator circuit which is easy to implement and use. The proposed architecture produces trapezoidal and triangular functions with all parameters (slope, position, width and height) independently and continuously adjustable. The main aim of this work is to realize a linear, low-voltage and high speed CMOS based function generator circuit.

2 PROPOSED FUNCTION GENERATOR CIRCUIT

The voltage to current (V-I) converter circuit shown in Fig. 1 is the main part of the proposed function generator circuit. It can be inferred from this figure that IM1a=Ib (because the gate of M3a does not take any current) and since Ib is constant, VGSM1a

(and similarly VGSM1b) has to remain constant (neglecting body effect). Therefore any variations in Vin at the gate of M1a or M1b will be reflected to the source terminal level-shifted by the constant gate-source voltage (VGSM1a or VGS1b). From Fig 1, we have:

where Vth is the threshold voltage of NMOS transistor. Simi-larly:

From (1) and (2) we have: Fig. 2 shows Io as a function of vin1. The reason for plotting Io versus vin1 instead of (vin1-vin2) is that in most of applications one of the inputs is connected to a constant voltage and the other one to the input signal. As it will be discussed, we use this constant voltage to control and adjust different parts of the output current. The architecture of the proposed function generator circuit is shown in Fig. 3. This circuit is capable of generating trapezoi-dal and triangular functions. Note that among several classes of parameterized signals, triangles and trapezoids are more commonly used in industrial control applications. In this structure (Fig. 3) I2 is greater than I1. When the input signal is applied, Io and therefore Iout will begin to increase from zero (part I of Fig. 4). At this state (Io>I1, I2): Io1, Io2 = 0 Iout = Io When I1 < Io < I2 (see Fig. 3), the subtraction of Io1 from Io will force Iout to remain constant (part II of Fig. 4): Io1 = Io - I1 Iout = Io - Io1 = I1 When Io > I1, I2, the subtraction of Io1, Io2 from Io will decrease Iout (part III of Fig. 4): Io1 = Io - I1 Io2=Io - I2 Iout = Io - Io1 - Io2 = I1 + I2 - Io

F

————————————————

Hamed Sajjadi Kia, is currently a researcher at North Dakota State Univer-sity, Fargo, ND, USA. Email: [email protected]

134

IJSER

Page 2: A Novel Programmable CMOS Based Function Generator Circuit...linear V-I converter," International Symposium on Low Power Elec-tronics and Design, 2003. [4] H.S. Kia, "An analog cell

International Journal of Scientific & Engineering Research Volume 5, Issue 8, August-2014 ISSN 2229-5518

IJSER © 2014

http://www.ijser.org

3 TUNING AND PROGRAMMING FUNCTION GENERATOR

CIRCUIT The slope of the legs in output current shown in Fig. 4 is de-pendent on Ib. Fig. 5 shows how this feature can be used to tune the slope of the output current. The slope is also depend-ent on (W/L) ratio of transistors, and this feature can also be used to adjust the slope. The LTspice simulation results shown in Fig. 5(a) demonstrates how the slope of the leg can be tuned. The height of the output wave generated by the proposed function generator circuit can also be programmed. This is achieved by changing or choosing different values for I1. Simi-larly the length of the constant section of the output wave de-picted in part II of Fig. 4 can be adjusted by choosing different values for I2. The simulation results that demonstrate these features are depicted in Fig. 5(b) and (c). The start position where the output current starts to increase from zero (part I of fig. 4) can also be adjusted by changing the value of Vin2. The simulation results that demonstrates the function of this feature is depicted in Fig. 5 (d).

4 SPEED CONSIDERATION Transient response of the proposed function generator circuit for 50 MHz is shown in Fig. 6(a), where the input is a ramp signal. Fig. 6(b) and (c) compare the high speed characteristics of the proposed circuit with the one presented in [9]. Fig. 6(b) is the response of our proposed circuit for 200 MHz and the response of the circuit proposed in [9] for less than 1 MHz is shown in Fig. 6(c). The major reason for the improvement in the speed of the proposed circuit, compared to the conven-tional function generator circuits is that the proposed circuit is realized without using Min/Max circuits.

Fig. 1. (a) V-I converter, (b) current subtractor.

Fig. 2. Simulation result of V-I converter.

Fig. 3. Proposed function generator circuit.

Fig. 4. Function generator output.

135

IJSER

Page 3: A Novel Programmable CMOS Based Function Generator Circuit...linear V-I converter," International Symposium on Low Power Elec-tronics and Design, 2003. [4] H.S. Kia, "An analog cell

International Journal of Scientific & Engineering Research Volume 5, Issue 8, August-2014 ISSN 2229-5518

IJSER © 2014

http://www.ijser.org

Fig. 6. (a) Response of the proposed function generator circuit to 50 MHz. (b) Response of the proposed function generator circuit to 200 MHz. (c) Response of the function generator circuit presented in [9] to less than 1 MHz.

Fig. 5. Illustration of how the output current generated by the pro-posed function generator can be tuned.

5 CONCLUSION In this paper a CMOS-based function generator circuit has been designed and analyzed. Our proposed circuit can im-

plement trapezoidal and triangular functions with all parame-ters (slope, position, width and height) continuously tunnable. The proposed circuit achieves higher speed compared to the available works by not using winner takes all or looser takes all circuits which are common in design of function generator circuits.

136

IJSER

Page 4: A Novel Programmable CMOS Based Function Generator Circuit...linear V-I converter," International Symposium on Low Power Elec-tronics and Design, 2003. [4] H.S. Kia, "An analog cell

International Journal of Scientific & Engineering Research Volume 5, Issue 8, August-2014 ISSN 2229-5518

IJSER © 2014

http://www.ijser.org

REFERENCES

[1] K.M. Abdelfattah and A.M. Soliman, "Variable gain amplifier based on a new approximation method to realize the exponential function," IEEE Transaction on Circuits and Systems-I, vol. 49, pp. 1348-1354, 2002.

[2] C.-C. Chang and S.-l. Liu, "Current-mode pseudo-exponential circuit with tunable input range," Electronics Letters, vol. 36, pp. 1335-1336, 2000.

[3] Q.H. Duong, T.K. Nguyen, and S.G. Lee, "Low-voltage low-power high dB-Linear CMOS exponential function generator using highly-linear V-I converter," International Symposium on Low Power Elec-tronics and Design, 2003.

[4] H.S. Kia, "An analog cell and its applications in analog signal pro-cessing," International Journal of Circuit Theory and Applications, vol. 39, no. 2, pp. 195-201, 2011.

[5] Behzad Mesgarzadeh, "A CMOS implementation of current-mode Min-Max circuits and a Sample fuzzy application," IEEE Internation-al Conference on Fuzzy Systems 2004.

[6] S. Sambandan and A. Nathan, "Fuzzy current control using current mode WTA-LTA circuits in flexible organic displays," Midwest Sym-posium on Circuits and Systems, 2005.

[7] K. Wawryn and B. Strzeszewski, "Prototype low power WTA circuits for programmable neural networks," IEEE International Symposium on Circuits and Systems, 2000.

[8] J. Ramírez-Angulo, G. Ducoudray-Acevedo, R. G. Carvajal, and A. López-Martín, "Low-Voltage High-Performance Voltage-Mode and Current-Mode WTA Circuits Based on Flipped Voltage Followers," IEEE Transactions on Circuits and Systems—II: Express Briefs, vol. 52, no. 7, pp. 420-423, 2005.

[9] R. G. Carvajal, A. Torralba, F. Colodro, L.G Franquelo, "CMOS fuzzi-fier using Mixed-signal techniques with emphesis in power con-sumption," IEEE Midwest Symposium on Circuits and Systems, 1999.

137

IJSER