a parallel gen etic algorithm with dispersion …

20
A PARALLEL GENETIC ALGORITHM WITH DISPERSION CORRECTION FOR HW/SW PARCELLING ON MULTI-CENTER CPU AND MANY-CENTER GPU ` 1,2,3 UG Scholar, Department of Computer Science and Engineering, Saveetha School of Engineering, Saveetha Institute of Medical and Technical Sciences, Chennai. 4 Professor, Department of Computer Science & Engineering, Saveetha School of Engineering, Saveetha Institute of Medical and Technical Sciences, Chennai. 1 [email protected] , 2 [email protected] , 3 [email protected] , 4 [email protected] ABSTARCT In equipment/programming co-plan, equipment/programming dividing is a fundamental advance in that it figures out which parts to be executed in equipment and which ones in programming. The vast majority of HW/SW dividing issues are NP hard. For substantial size issues, heuristic techniques must be used. This paper exhibits a parallel hereditary calculation with scattering remedy for HW/SW parcelling on CPU-GPU. Right off the bat, an upgraded hereditary calculation with scattering adjustment is introduced. The under-requirement people are walked to plausible area well ordered. Along these lines, the increase can be upgraded and additionally the limitation issue can be taken care of. Also, the people performing costs calculation and scattering rectification are keep running in parallel. For a given issue measure, the general run-time can be diminished while the assorted variety of hereditary calculation can be kept. Thirdly, particularly when various under-imperative people ought to be redressed in a sporadic way, the calculation procedure is convoluted and the calculation overhead is huge. In this way, we exhibit a novel parallel procedure by utilizing the parallel energy of multi-center CPU and that of many-center GPU. The proposed system registers the expenses of every person in parallel on GPU and rectifies the under-imperative people in parallel on multi-center CPU. Thusly,a profoundly proficient parallelfiguring can be accomplished in which many sporadic adjustment registering steps are mapped to multi-center CPU and a large number of normal cost processing steps are mapped to many-center GPU. Fourthly, at every cycle of the crossover parallel procedure, the arrangement vectors of people are exchanged to GPU and their expenses are exchanged back to CPU. To additionally enhance the productivity of proposed calculation, we propose an offbeat exchange design (stream simultaneousness design) for CPU-GPU, in which the exchange procedure and calculation process are covered and in the end the general run-time can be lessened further. At long last, the trials demonstrate that the arrangement quality acquired by our technique is focused with existing heuristic strategies in sensible time. Moreover, by joining with multi-center CPU and many-center GPU, the running time of proposed technique is effectively decreased. KEYWORDS: Hardware/programming co-outline; Heuristic strategy; Genetic calculation; Multi- center CPU; Many-center GPU. International Journal of Pure and Applied Mathematics Volume 119 No. 16 2018, 2707-2725 ISSN: 1314-3395 (on-line version) url: http://www.acadpubl.eu/hub/ Special Issue http://www.acadpubl.eu/hub/ 2707

Upload: others

Post on 29-May-2022

2 views

Category:

Documents


0 download

TRANSCRIPT

Page 1: A PARALLEL GEN ETIC ALGORITHM WITH DISPERSION …

A PARALLEL GENETIC ALGORITHM WITH DISPERSION

CORRECTION FOR HW/SW PARCELLING ON MULTI-CENTER CPU

AND MANY-CENTER GPU `

1,2,3 UG Scholar, Department of Computer Science and Engineering, Saveetha School of Engineering,

Saveetha Institute of Medical and Technical Sciences, Chennai. 4Professor, Department of Computer Science & Engineering,

Saveetha School of Engineering, Saveetha Institute of Medical and Technical Sciences, Chennai. [email protected],

[email protected],

[email protected],

[email protected]

ABSTARCT

In equipment/programming co-plan, equipment/programming dividing is a fundamental advance

in that it figures out which parts to be executed in equipment and which ones in programming.

The vast majority of HW/SW dividing issues are NP hard. For substantial size issues, heuristic

techniques must be used. This paper exhibits a parallel hereditary calculation with scattering

remedy for HW/SW parcelling on CPU-GPU. Right off the bat, an upgraded hereditary

calculation with scattering adjustment is introduced. The under-requirement people are walked to

plausible area well ordered. Along these lines, the increase can be upgraded and additionally the

limitation issue can be taken care of. Also, the people performing costs calculation and scattering

rectification are keep running in parallel. For a given issue measure, the general run-time can be

diminished while the assorted variety of hereditary calculation can be kept. Thirdly, particularly

when various under-imperative people ought to be redressed in a sporadic way, the calculation

procedure is convoluted and the calculation overhead is huge. In this way, we exhibit a novel

parallel procedure by utilizing the parallel energy of multi-center CPU and that of many-center

GPU. The proposed system registers the expenses of every person in parallel on GPU and

rectifies the under-imperative people in parallel on multi-center CPU.

Thusly,a profoundly proficient parallelfiguring can be accomplished in which many sporadic

adjustment registering steps are mapped to multi-center CPU and a large number of normal cost

processing steps are mapped to many-center GPU. Fourthly, at every cycle of the crossover

parallel procedure, the arrangement vectors of people are exchanged to GPU and their expenses

are exchanged back to CPU. To additionally enhance the productivity of proposed calculation,

we propose an offbeat exchange design (stream simultaneousness design) for CPU-GPU, in

which the exchange procedure and calculation process are covered and in the end the general

run-time can be lessened further. At long last, the trials demonstrate that the

arrangement quality acquired by our technique is focused with existing heuristic strategies in

sensible time. Moreover, by joining with multi-center CPU and many-center GPU, the running

time of proposed technique is effectively decreased.

KEYWORDS: Hardware/programming co-outline; Heuristic strategy; Genetic calculation; Multi-

center CPU; Many-center GPU.

International Journal of Pure and Applied MathematicsVolume 119 No. 16 2018, 2707-2725ISSN: 1314-3395 (on-line version)url: http://www.acadpubl.eu/hub/Special Issue http://www.acadpubl.eu/hub/

2707

Page 2: A PARALLEL GEN ETIC ALGORITHM WITH DISPERSION …

I. INTRODUCTION

In most implanted frameworks, an

equipment stage is comprised of the

prevalent computerized segments which

execute programming application programs.

Due to the undeniably need of raising the

potential quality and shortening the

improvement time of electronic items, in

addition to the development of PC helped

outline (CAD) instruments,

equipment/programming co-plan has turned

into a hotly debated issue since1990s[1-3].

In equipment/programming co-plan,

equipment/programming parcelling

(HW/SW apportioning) is a basic system

since it figures out which parts to be

executed on equipment and which ones on

programming. HW/SW apportioning can

enhance the general execution of current

implanted frameworks. In the course of

recent decades, various works have been

improved the situation HW/SW parcelling

[4, 5].

The objective design of inserted frameworks

for the most part comprises of programming

segment and equipment segment. The

product part as a rule alludes to RISC CPU.

The equipment part alludes to Field

Programmable Gate Array (FPGA) or

Application Specification Integrated Circuit

(ASIC). At the point when the application is

executed on equipment, it is fundamentally

quicker and more power-effective. Be that

as it may, the spending is high. Moderately,

when the application is executed on

programming, it is control expending and

the spending is little, however the speed is

moderate. HW/SW dividing can guarantee

an ideal exchange off between cost,

execution and power.

At the hypothesis and approach level,

HW/SW apportioning was taken a more

hypothetical depiction. The application to be

parcelled is given as an errand chart, or an

arrangement of assignment diagrams. For

instance, the framework to be parcelled was

demonstrated as an undirected

correspondence chart [6]. In light of the

model, Aratoet al arranged two distinct

adaptations of HW/SW parcelling. One can

be illuminated ideally in polygon time

many-sided quality, while the other was NP-

hard in the solid sense [7].

On algorithmic parts of HW/SW parcelling,

two classifications of calculations are used,

to be specific correct strategies and surmised

techniques (broadly executed with heuristic

calculations). The correct calculation is

utilized to get a correct answer for the little

size issue. The ordinary correct techniques

incorporate dynamic programming [8],

straight programming [9] and branch and

bound [10]. At the point when the issue

estimate turns out to be expansive and the

arrangement space of HW/SW dividing

increments exponentially, investigating the

correct arrangement in sensible time is

unreasonable. Heuristic calculations in this

manner wind up noticeably prominent rough

choices because of their better capacity than

acquire great quality arrangements inside the

restricted processing time.

In the beginning time of HW/SW parcelling,

space particular heuristics, including

equipment situated heuristic calculation and

programming focused heuristic calculation,

were proposed [11, 12]. The previous begins

with a total equipment arrangement and

iteratively moves parts of the framework to

the product, while the last begins with a

product program moving pieces to

International Journal of Pure and Applied Mathematics Special Issue

2708

Page 3: A PARALLEL GEN ETIC ALGORITHM WITH DISPERSION …

equipment. The equipment situated

approach is dealt with as an execution

requirements strategy.

The product arranged approach is dealt with

as a period limitation strategy.

After at that point, many general heuristics

or metaheuristics were additionally received,

for example, hereditary calculation [6,7,13],

insect settlement calculation [14,15],

manufactured bees[16], molecule swarm

improvement (PSO) [17,18], reenacted

toughening [19,20], simulated invulnerable

calculation [21], tabu search[8] and the

hybridization of these strategies [22-26].

HW/SW apportioning is an issue of

requirement enhancement. Regardless of

what sort of heuristic is received, dealing

with infeasible arrangements is an essential

issue. For instance, in [7], hereditary

calculation was outflanked by an issue

particular strategy. The principle reason is

the hereditary calculation did not consider

the issue particular issues. Hence, how to

consolidate hereditary calculation with issue

particular abuse is the key.

Not withstanding, a hereditary calculation

with issue particular abuse is tedious. From

one perspective, multi-center CPU and

many-center GPU have turned into the

standard of PC frameworks as shoddy

substitute of elite processing. Then again,

how to use the figuring assets of both multi-

center CPU and many-center GPU for

HW/SW dividing and to lessen the run-time

of hereditary calculation with issue

particular misuse are obscure.

This paper exhibits a novel parallel

hereditary calculation on CPU-GPU with

scattering amendment for HW/SW

apportioning. Right off the bat, a novel

hereditary calculation for imperative

enhancement is displayed. The under-

limitation people are walked into possible

locale well ordered. In this way, the hunt

power can be improved and also the

requirement issue can be taken care of.

Furthermore, in light of the fact that various

infeasible people are should have been

rectified and the calculation overhead is

high, we devise a parallel procedure and

nonconcurrent exchange example to

coordinate well the design of multi-center

CPU and many-center GPU. At last, the

analyses affirm the adequacy of our

technique.

Whatever is left of this article is sorted out

as takes after. In segment 2, we formulize

the issue. In segment 3, we right off the bat

propose our technique for serial execution

for HW/SW parcelling. We also propose the

CPU-GPU parallel system. In segment 4,

computational trials are directed to assess

the adequacy of proposed technique and the

productivity of crossover parallel procedure.

Conclusion and future work are given in the

last segment.

II. RELATED WORK

A. HW/SW PARTITIONING MODEL

Formally, the application to be divided is

spoken to as an undirected chart G (V, E), s,

h: V→R+, and c: E→R+. V= {v1, v2, ...,

vn} shows the undertaking hubs. Every hub

International Journal of Pure and Applied Mathematics Special Issue

2709

Page 4: A PARALLEL GEN ETIC ALGORITHM WITH DISPERSION …

incorporates equipment cost h(vi) and

programming cost s(vi). E shows the

arrangement of edges between the hubs. The

weights c(vi , vj) on the edges show the

correspondence cost when the two nearby

hubs are isolated executed (equipment or

programming). P= {VH, VS} is known as a

HW/SW parcelling, on the off chance that it

full fills VH∩VS = Φ and VH∪VS = V. In

like manner, the edge set of P is defined as

Ep={(vi,vj)|vi ∈VH,vj∈VS or vi∈VS ,

vj∈VH }. Figure 1 gives a case of

assignment diagram for HW/SW dividing.

FIGURE 1. An example of task graph for

HW/SW parcelling. V2 and V5 nodes are

implemented on hardware where the rest

are implemented on software

As in [7] described, a partition is

characterized by three metrics, namely

hardware cost HP, software cost SP, and

communication cost CP, which are

formulated as follows.

H𝑃= ∑ h𝑖 (1) 𝑣𝑖∈𝑉𝐻

S𝑃= ∑ 𝑠𝑖 (2)

C𝑃= ∑ c(𝑣𝑖,𝑣𝑗) (𝑣𝑖,𝑣𝑗)∈𝐸𝑃 (3)

The aggregate cost of parcel P is

characterized as TP=αHP + βSP + γCP. In

TP, α, β, γ are weights, which are non-

negative constants, mirroring the relative

significance of the three expenses.

Subsequently, two forms of apportioning

issue are characterized as.

Issue P0. Given a diagram G with the cost

work s, h, c and the steady α, β, γ ≥0,

finding an equipment/programming

parcelling P with least TP.

Issue P. Given a diagram G with the cost

work s, h, c and R≥0. Finding an

equipment/programming parcelling P with

SP+CP ≤ R that limit HP.

The Problem P0 can be settled in

polynomial-time, and the Problem P is NP-

hard. Along these lines, many testing

strategies for HW/SW apportioning center

around Problem P [7, 27-31].

B. EXISTING METHOS FOR

PROBLEM P

Issue P can be straightforwardly illuminated

or by implication explained with various

calculations.

Among coordinate techniques [4], hereditary

calculation was right off the bat proposed

[7]. Be that as it may, the arrangement

quality and run-time of this strategy isn't

great.

With a specific end goal to address the lacks

of above strategy, an aberrant technique in

view of 2D seek was proposed to look

International Journal of Pure and Applied Mathematics Special Issue

2710

Page 5: A PARALLEL GEN ETIC ALGORITHM WITH DISPERSION …

through the arrangement space of P. The

hunt procedure of P was guided by the

arrangement of Problem P0 [7]. To look

through the 2D space all the more exactly

and effectively, Tahaee et al examined the

inquiry space and enhanced the hunt

procedure [27].

The second aberrant strategies endeavoured

to change Problem P into a variety of

standard 0-1 backpack issue. Uncommonly,

Wu et al proposed three new calculations,

named 1D seek strategy to get better quality

in shorter execution time, by contrasting

against the past 2D look technique [28].

Notwithstanding, on a variety of the

standard 0-1 backpack issue, there was an

imperfection in the hypothetical depiction,

which was checked and consummated by

Quan et al [31].

Rather than a variety of standard 0-1

backpack issue, Wang et al proposed HEUR

strategy [29]. He regarded issue P as a

standard 0-1 rucksack issue without thought

of correspondence cost. The impermanent

arrangement without correspondence cost

was balanced into a doable arrangement by

considering the effect of the correspondence

cost. Analyses demonstrated that Wang's

strategy could deliver preferred arrangement

quality over 1D seek technique [28].

In the wake of presenting the possibility of

PageRank, Chen proposed NodeRank

calculation, an emphasis based HEUR, to

additionally enhance the arrangement

quality now and again [30].

In a short, there was nobody strategy for

total preferred standpoint in both quality and

run-time for issue P. In this way, this

original copy proposes a novel way to deal

with take care of issue P.

- We consolidate the benefits of direct

strategy and circuitous technique. Right off

the bat, we look through the arrangement

space of issue P utilizing hereditary

calculation. Furthermore, we additionally

embrace the redress thought from the second

backhanded techniques for issue particular

imperative issue.

Particularly, our remedy procedure is not the

same as that of existing strategies. In

existing strategies, for example, in [29,30],

just a single infeasible arrangement is

amended. In our strategy, various infeasible

arrangements are revised. Along these lines,

our methodology can upgrade the pursuit

power and inevitably enhance the

arrangement quality and additionally address

the limitation issue.

- Furthermore, a novel parallel example for

our rectification methodologies is proposed

to coordinate well the engineering of

CPU/GPU equipment and in the end to

diminish the run-time of about advances,

else it would be tedious.

The examinations affirm the viability of our

technique.

C. ENGINEERING AND

PROGRAMMING OF MULTI-CORE

CPU AND MANY-CORE GPU

From one viewpoint, there are some

spearheading distributions on parallel

strategy for other HW/SW apportioning. The

known works incorporate parallel hereditary

calculation [32] and PSO calculation [33].

The two works were executed on the bunch

stages.

International Journal of Pure and Applied Mathematics Special Issue

2711

Page 6: A PARALLEL GEN ETIC ALGORITHM WITH DISPERSION …

Then again, multi-center CPU and many-

center GPU has turned into a well known

parallel figuring stage with low power-

devouring and high proportion of execution

to cost. Multi-center CPU and many-center

GPU are accessible on exceptionally broad

PC frameworks. They are assuming a vital

part in science and building areas [34, 35].

In this manner, how to utilize the parallel

energy of multi-center CPU and many-

center GPU on PCs for HW/SW parcelling

is a fascinating theme. The composition

proposes another CPU-GPU parallel

hereditary calculation with scattering redress

for HW/SW parcelling.

The engineering examination amongst CPU

and GPU is appeared in Figure 2. The

design of CPU is inactivity situated. At the

point when there are mind boggling

rationale judgements in application

programs, the engineering of CPU

demonstrates a noteworthy favourable

position over that of GPU. The design of

GPU is throughput-situated [34]. At the

point when there are figuring concentrated

parts in application programs, the

engineering of GPU demonstrates more

favourable circumstances over that of CPU.

The principle reason of the distinction is that

in CPU, rationale control units and store

take up the majority of room, while in a

solitary chip of GPU, number-crunching

units take up a large portion of region.

FIGURE 2. Difference of architecture between CPU

and GPU. Data transfer between CPU and GPU is

through PCI-E

At show, there are different parallel

programming dialects supporting multi-

center CPU and many-center GPU. This

paper concentrate on OpenMP and Compute

Unified Device Architecture (CUDA).

- OpenMP is an industry standard for

parallel programming of shared memory

framework, which utilizes Fork/Join parallel

execution demonstrate. It gives a basic and

simple to-utilize instrument of multi-

threading on multi-center CPU. While

parallelizing a serial program in OpenMP,

there is no compelling reason to roll out a

major improvement to asset code. Including

a straightforward mandate explanation

before the circle body is sufficient to unroll

the circle.

- CUDA is a programming model to give a

programming interface to GPU gadgets. It is

discharged by NVIDIA in the reason for

promoting GPU registering. The capacities

writing in CUDA C and running on GPU are

pieces. Every one of the strings running a

similar bit are composed into a string

network. In a string framework, the majority

of the strings execute a similar portion on

various information, which is known as

Single Program Multi Data (SPMD). The

strings in a network are partitioned into

similarly measured string pieces and

dispatched on the Stream Multi-Processors

(SMs) of the GPU in a cyclic way. Inside a

string hinder, the nonstop 32 strings are

sorted out into a twist and the twists are

dispatched by the twist dispatcher on the

SM. Along these lines conceals the idleness

result from memory getting to in light of the

fact that there are other sit out of gear twists

sitting tight to be executed inside a string

piece.

International Journal of Pure and Applied Mathematics Special Issue

2712

Page 7: A PARALLEL GEN ETIC ALGORITHM WITH DISPERSION …

- In PC stages, GPU is an autonomous

figuring gadget. The information amongst

CPU and GPU is exchanged through PCI-E

transport. Thusly, an effective calculation

ought to limit the exchange overhead

amongst GPU and CPU.

In this original copy, we proposed a novel

GPU-CPU parallel example to help

hereditary calculation with scattering redress

for HW/SW parcelling.

FIGURE 3. Flowchart of proposed method

III. THE PROPOSED METHOD

A. OUTLINE OF PROPOSED

PARALLEL GENETIC ALGORITHM

WITH DISPERSION CORRECTION

As a populace based metaheuristic, standard

hereditary calculation depends on the

guideline of common hereditary qualities

and regular choice. The center components

in the hereditary pursuit incorporate

propagation, hybrid and transformation.

In our strategy, these center components are

adjusted for HW/SW parceling. We stop our

calculation when a given max number of age

is come to. What's more, if the worldwide

equipment cost was not enhanced in a given

number of cycles, we stop the calculation

also. On the off chance that the worldwide

equipment cost is enhanced, we reset the no-

change counter as 0.

In diagram, the proposed hereditary

calculation with scattering rectification for

HW/SW dividing

H(𝒙) =∑ h𝑖(1 − 𝑥𝑖) 𝑖=1

S(𝒙) = ∑ 𝑠𝑖∙𝑥𝑖𝑖=1

𝑛−1 𝑛

C(𝒙)=∑ ∑ 𝑐𝑖𝑗|𝑥𝑖−𝑥𝑗| 𝑖=1 𝑗=𝑖+1

(4) (5) (6)

According to definition, HW/SW

partitioning is formulized as.

𝑃{ min𝐻(𝒙) 𝑆(𝒙) + 𝐶(𝒙) ≤ 𝑅

The inequality in P is extended by the

equation (4) to (6) as.

∑𝑠𝑖∙𝑥𝑖+∑ ∑ 𝑐𝑖𝑗|𝑥𝑖−𝑥𝑗|≤𝑅𝑖=1 𝑖=1 𝑗=𝑖+1

(7)

In summary, the final formulation of

International Journal of Pure and Applied Mathematics Special Issue

2713

Page 8: A PARALLEL GEN ETIC ALGORITHM WITH DISPERSION …

problem P is as follows.

𝑛𝑛−1𝑛

∑𝑠𝑖∙𝑥𝑖+∑ ∑ 𝑐𝑖𝑗|𝑥𝑖−𝑥𝑗|≤𝑅{𝑖=1 𝑖=1 𝑗=𝑖+1

Despite the fact that the expenses of

randomized people are gotten by the above

recipes, it is important to additionally judge

whether every individual fulfills the

limitation. On the off chance that it does, the

individual is a doable HW/SW dividing.

Else, it is an infeasible parceling. The

accompanying segment will depict the

strategy we propose for taking care of with

the infeasible people.

1). DISPERSION CORRECTION

STRATEGY

In developmental calculation, how to take

care of obliged advancement issues is an

imperative research subject. Among various

systems, punishment work based strategy is

exceptionally useful [36]. For HW/SW

parceling, it is additionally a worry to locate

a compelling punishment capacity to deal

with these infeasible people [6], [24]. In any

case, punishment work based technique does

not change the idea of infeasible people. In

our concern, when the quantity of infeasible

people is considerably more than that of

achievable arrangements, regardless of

whether such strategy is as yet compelling is

dicey. Despite the fact that capacity based

strategy can look for the arrangement by

improve the assorted variety of pursuit

process, it neglects to upgrade the

heightening of inquiry process.

In this paper, we propose a scattering

remedy strategy, which includes two

methods. Exceptionally, when some

individual does not fullfill the requirement,

it implies one of the undertakings allocated

to programming part is should have been

changed to actualizing on equipment

segment. In other words, setting xi as 0. The

procedure of revision includes numerous

hubs allotted to programming segment. The

objective of adjustment is to make under-

requirement people plausible. At the point

when hub I is doled out to programming

part, the entirety of correspondence cost of

all its contiguous hubs relegated to

equipment is given as

𝐶𝑜𝑙𝑑= ∑ 𝑐(𝑖, 𝑗) (8) 𝑗∈𝑉𝐻

In the event that hub I is revised, the total of

correspondence cost of its neighbouring

hubs is changed too. After it is changed to

actualizing on equipment segment, there will

be correspondence taken a toll between all

its nearby hubs appointed to programming

segment. The whole of correspondence cost

of vi progresses toward becoming as.

𝐶𝑛𝑒𝑤= ∑ 𝑐(𝑖, 𝑘) (9)

𝑘∈𝑉

Let Δcidenotes the change of

communication cost of node i. It is

obtained by the following formula.

∆𝑐𝑖= 𝐶𝑜𝑙𝑑− 𝐶𝑛𝑒𝑤(10)

Joining Δci with the equipment cost and

programming cost of hub I, we select the

hub doled out to programming part with the

base proportion and set it as 0 (equipment

segment). At each progression, just a single

hub is redressed and the equipment cost

H(x), programming cost S(x) and

correspondence cost C(x)are updated. The

procedure does not stop until the

HW/SW partitioning satisfies the

International Journal of Pure and Applied Mathematics Special Issue

2714

Page 9: A PARALLEL GEN ETIC ALGORITHM WITH DISPERSION …

constraint

After the main rectification, the under-

imperative individual winds up noticeably

attainable. Keeping in mind the end goal to

advance its answer, it is additionally

amended by setting the hubs relegated to

equipment part as the one actualized on

programming segment. The procedure is

called escalation rectification. Similarly, the

procedure includes the difference in

correspondence cost. Like condition (8) to

condition (10), when the hub vi relegated to

equipment part is changed into actualizing

on programming segment, the difference in

correspondence cost of hub vi is given as.

∆𝑐𝑖= ∑ 𝑐(𝑖, 𝑘) − ∑ 𝑐(𝑖, 𝑗)

𝑘∈𝑉𝑗∈𝑉𝑠𝐻(11)

In spite of the fact that the escalation redress

includes choosing hub of least esteem

proportion, it is not the same as the principal

adjustment. After the principal remedy, by

limitation R subtracting the aggregate of

programming expense and correspondence

cost of attainable individual, there exists a

remaining quality. The procedure of

escalation rectification depends on that

leftover esteem. In this manner, the

procedure of strengthening amendment does

not stop until the point that the refresh of

lingering is under 0. Moreover, we select the

hub of most extreme proportion an incentive

to be executed on programming part

In calculation 1, line 3 and line 4 are

actualized in O (n). In line 7, H(x), S(x) can

be actualized in O (1) and C(x) is executed

in O (mi), in which mi signifies the quantity

of edges related with hub I. At the very least

case, m1 equivalents to that of edges in the

errand diagram, in particular m. In this

manner, the time multifaceted nature of

calculation 1 is O (k1 *(n + m)), in which k1

indicates the while circle in line 1. Thus, the

time multifaceted nature of calculation 2 is

O (k2 *(n + m)), in which k2 means the

while circle in line 2. Give k a chance to be

max {k1, k2}, the time multifaceted nature

of scattering remedy technique is O (k *(n +

m)).

2) GENETIC OPERATIONS FOR

HW/SW PARTITIONING

At every age, standard hereditary calculation

chooses two people in the present populace

as guardians. The calculation either passes

these guardians specifically to the new

populace or create two posterity people from

the guardians. Thus, how to choose the two

people from current populace is a critical

issue. Among various determination

systems, roulette wheel choice is a general

alternative. It is a likelihood based approach

in which the people with higher wellness

have greater need. Notwithstanding, roulette

wheel choice can not deal with a

minimization issuestraightforwardly [37].

In our concern, the objective is limiting the

equipment cost. For HW/SW parceling, the

littler the equipment cost, the more the

spared equipment cost. In view of the

reality, we adjust the roulette wheel

determination in light of spared equipment

cost. The person with more spared

equipment cost has higher likelihood to be

chosen. In the mean time, the probabilistic

qualities of roulette wheel determination

influences people with little spared

equipment to cost have an opportunity to be

chosen. In any case, it is feasible for a

similar individual to be chosen again as a

International Journal of Pure and Applied Mathematics Special Issue

2715

Page 10: A PARALLEL GEN ETIC ALGORITHM WITH DISPERSION …

parent individual if straightforwardly

utilizing roulette wheel determination twice.

To beat the weakness, we propose an

irregular inspecting and consolidate it with

roulette wheel choice. Extraordinarily,

regardless we utilize the roulette wheel

determination to choose the primary parent

individual and the main parent person's

position is gotten. Next, we set it as a begin

point and produce an arbitrary

counterbalance to choose the second parent

person. The particular operation keeps the

outcome inside the scope of populace. This

irregular examining guarantees that the two

chose guardians are constantly

extraordinary. The equation of arbitrary

testing is given as takes after.

𝑝𝑜𝑠2 = (𝑝𝑜𝑠1 + 𝑟𝑎𝑛𝑑(1, 𝑝𝑜𝑝_𝑠𝑖𝑧𝑒 −

1))𝑚𝑜𝑑𝑝𝑜𝑝_𝑠𝑖𝑧𝑒(12)

To produce the new people, standard

hereditary calculation creates posterity

people either by hybrid operation to

consolidate the vector passages of a couple

of guardians or by transformation operation

to roll out irregular improvements to a

solitary parent.

In our work, we play out the hybrid

operation as takes after. For every part in the

parent people, each two of them are

swapped. From that point onward, two new

people are produced.

Standard hereditary calculation additionally

builds the assorted variety of populace by

transformation operation. In HW/SW

dividing, we play out the change on some

part of posterity. In the case of playing out

the change or not relies upon a given

likelihood. After transformation operation,

the hubs doled out to equipment segment is

changed into programming part, and tight

clamp versa.

3) UPDATE STRATEGY

After the hereditary operations, another

populace is made. It is significant that

hereditary operation just produce the

arrangement vectors of people. Next, the

equipment cost, programming expense and

correspondence cost of each new individual

are gotten by recipe (4)~(6). In addition, the

procedure of hereditary operations does not

check whether the new people fulfill the

imperative or not, bringing about under-

limitation people in the new populace.

Scattering rectification specified before is

used to make the infeasible arrangements

plausible.

At last, the old populace is supplanted with

the new populace. Then, a person with the

ideal equipment cost is acquired. On the off

chance that its equipment cost is superior to

anything the worldwide equipment cost, at

that point refreshing the worldwide

equipment cost.

4) ALGORITHM COMPLEXITY

At every emphasis, for every person, the

complexities of figuring costs is O(n2),

which implies the most pessimistic scenario

is overwhelmed by registering the

correspondence cost. At the phase of

scattering remedy, the time multifaceted

nature is O (k *(n + m)). The time many-

sided quality of hereditary operation is O

(M*n), in which M means the individual

number. Thusly, the general time

International Journal of Pure and Applied Mathematics Special Issue

2716

Page 11: A PARALLEL GEN ETIC ALGORITHM WITH DISPERSION …

multifaceted nature at every emphasis is O

(M*( n2 + k *(n + m))).

C. CPU-GPU PARALLEL STRATEGY

1) HIGHLY EFFICIENT PARALLEL

APPROACH FOR ENHANCED

GENETIC ALGORITHM

From one perspective, current PC

frameworks comprise of multi-center CPU

and many-center GPU, which shape a

heterogeneous registering stage. Step by step

instructions to consolidate points of interest

of both CPU and GPU to unravel certifiable

applications is testing [38].

Then again, the majority of leaving

strategies for HW/SW apportioning center

around successive executions which don't

use the accessible figuring assets on PC

frameworks. There are rare distributions on

parallel technique for HW/SW dividing. A

couple of works incorporate parallel

hereditary calculation [32] and parallel PSO

calculation for HW/SW parceling [33],

which were actualized on the bunch stage.

In view of above improved hereditary

calculation with scattering revision for

HW/SW dividing, this area devises an

exceptionally productive parallel approach

for the calculation, which tends to a few key

issues. The first is the manner by which to

parallelize the calculation parts. The second

one is the means by which to outline

calculation segments on CPU-GPU. The

mapping should coordinate well the design

of CPU-GPU. The third one is the means by

which to exchange the information amongst

CPU and GPU proficiently.

Consequently, we display a parallel

hereditary calculation with scattering

amendment for HW/SW parceling, in which

the individual preparing are keep running in

parallel on CPU and GPU. Particularly,

various under-limitation people are amended

in a sporadic route, in which the calculation

procedure is confounded and the calculation

overhead is expansive. We show a CPU-

GPU parallel procedure to take the benefit

of the parallel energy of both multi-center

CPU and many-center GPU. The proposed

methodology figures the expenses of every

person in parallel on GPU and revises the

under-requirement people in parallel on

multi-center CPU as takes after.

2) COMPUTING INDIVIDUAL'S

COSTS IN A WAY OF DATA-

PARALLEL ON GPU

In our technique, the GPU will be used to

figure every individual's equipment taken a

toll, programming expense and

correspondence cost. With a specific end

goal to play out the roulette wheel

determination, GPU will likewise be utilized

figure the spared equipment cost of every

person.

In spite of the fact that the string running on

GPU is the fundamental unit and one string

can be mapped to one individual coherently.

In any case, this setup has following

downsides.

- The quantity of individual in hereditary

calculation is by and large not as much as

that of number juggling units on present day

GPU. Thusly, this arrangement does not use

the accessible figuring assets of GPU.

- Furthermore, this design neglects to make

completely utilization of the information

parallel qualities during the time spent

figuring every individual's expenses.

International Journal of Pure and Applied Mathematics Special Issue

2717

Page 12: A PARALLEL GEN ETIC ALGORITHM WITH DISPERSION …

Condition (4) to (6) demonstrate that the

procedure of equipment cost, programming

expense and correspondence cost mostly

includes summation operation in GPU. It is

the main decision to execute the operation

with GPU decrease in information parallel

example. In any case, because of the quirk

of HW/SW parceling issue, this decrease

procedure is unique in relation to standard

lessening.

Along these lines, the calculation technique

for equipment cost is proposed as takes

after.

- According to the dividing of every hub, the

intra-piece strings right off the bat play out

the result of equipment cost of hubs in the

assignment diagram and the

equipment/programming parceling of people

in parallel.

- After the item, each intra-piece string plays

out the halfway summation in parallel. This

is not quite the same as the standard

decrease in which the info information is

specifically used to play out the incomplete

summation.

- Next, the incomplete summations are

transferred in the mutual memory. The at

last summations are done by the intra-piece

strings agreeably. Registering programming

cost and spared equipment cost take after a

similar way.

- After the summation, the equipment cost

and programming costs are built into

worldwide memory. The spared equipment

costs are likewise built into worldwide

memory.

In our technique, a string piece is mapped to

an individual and the intra-square strings are

mapped to the qualities of a person. For

HW/SW apportioning, a quality of

individual speaks to the parcel of a hub in

the assignment diagram. demonstrates the

distinction between the procedure of

standard decrease and that of registering

equipment cost in setting of HW/SW

apportioning.

For processing the product cost and the

spared equipment cost, they take after an

indistinguishable route from the calculation

of the equipment cost.

Be that as it may, figuring correspondence

cost is very not quite the same as above

calculation techniques.

For every person, the productivity of

figuring the correspondence cost relies upon

the portrayal of undertaking diagram on

GPU. It is critical that the weight on each

edge means the correspondence cost

between a couple of hubs in the event that

they are in various setting. In the first

equation (6), the assignment diagram is

spoken to as a neighbouring lattice in which

the multifaceted nature of successive

technique of correspondence cost is O(n2).

In this manner, our technique for figuring

correspondence cost is as per the following.

- When processing correspondence cost of

every person, just the data of edge in the

undertaking diagram is essential. Along

these lines, the many-sided quality of unique

successive technique is lessened to O (m) in

our strategy.

- When porting the procedure of

correspondence cost to GPU, we arrange a

string obstruct as a person. Moreover,

unique in relation to above processing of

International Journal of Pure and Applied Mathematics Special Issue

2718

Page 13: A PARALLEL GEN ETIC ALGORITHM WITH DISPERSION …

equipment cost, a string inside a square is

mapped to an edge of assignment diagram.

- Because two hubs of each edge is gotten to

by their own particular strings, the

information position of arrangement vector

is situated on shared memory. Similarly, the

summation of each edge is done by the intra-

piece helpful strings.

In outline, this area propose an information

parallel technique to ascertain the four kinds

of expenses. When registering the expenses

of every person in parallel on GPU, our

methodology shows three levels of

parallelism. These are the parallelism

between the new people, the parallelism

among the hubs in every person and the

parallelism among the edges in every

person, individually.

In execution, we allocate two bits running

on GPU. The principal bit is to process

every individual's equipment taken a toll,

programming cost and spared equipment

cost. The second bit is to process every

individual's correspondence taken a toll.

3) MULTI-CORE CPU BASED

DISPERSION ADJUSTMENT OF

INFEASIBLE INDIVIDUALS

After each new individual acquires the

equipment cost, programming expense and

correspondence cost, the achievability of

individual will be checked in view of

imperative R. On the off chance that an

individual does not full fill the requirement,

a scattering redress system will be conjured.

In any case, the systems of scattering redress

inside Algorithm1 and Algorithm2 are

amazingly sporadic.

- Firstly, at every cycle, when the two

calculations stop rely upon how far the

under-limitation people is far from the

requirement.

- Secondly, for instance of Algorithm1, line

2 to line 5 are the primary strategies,

however the quantity of circle relies upon

the quantity of hubs doled out to

programming.

- Lastly, so as to accurately understand the

two calculations, two information structures

of dealing with the apportioned hubs are

made and the information structures are

gotten to much of the time in the entire

method. Similar information structures are

likewise utilized as a part of the Algorithm2.

Subsequently, this area proposes a multi-

begin technique of parallel scattering

remedy on multi-center CPU for our

calculation with following reasons.

- The sporadic scattering redress forms

inside every individual is more appropriate

for CPU than for GPU.

- Furthermore, for general people, the

procedures of scattering rectification are free

of each other, implying that they can be

parallelized. Multi-begin of remedying the

under-imperative people can be quickened

by multi-center CPU.

4) AN ASYNCHRONOUS TRANSFER

PATTERN FOR REDUCING THE

TRANSFER OVERHEAD

At every cycle, arrangement vector of every

individual is exchanged from CPU to GPU.

Subsequent to figuring costs, the outcomes

are exchanged back to CPU side.

Subsequently, the exchange overhead is

International Journal of Pure and Applied Mathematics Special Issue

2719

Page 14: A PARALLEL GEN ETIC ALGORITHM WITH DISPERSION …

unavoidable.

So as to additionally enhance the

productivity of proposed calculation, we

proposed an offbeat exchange design for

CPU-GPU calculation in which the

procedures of information exchange and

cost calculation keep running in a method

for pipeline. Along these lines can limit the

exchange overhead. Figure 8 demonstrates a

case in which the quantity of people is 4 and

number of stream is 2 respectively.In

rundown, the proposed flowchart of CPU-

GPU parallel hereditary calculation with

scattering rectification system for HW/SW

dividing.

IV. EXPERIMENT

A. RESULT ANALYSIS

Agreeing the area 2, a persuading test ought

to think about after reasons.

- The proposed approach take care of the

Problem P. The thought about algorihtms

ought to exist techniques which additionally

sovle Problem P.

- The proposed approach join the benefits of

direct techniques and roundabout strategies.

The current backhanded strategies beat

existing direct technique in [6,7]. It is

sensible to contrast and existing roundabout

strategies.

As indicated by the current backhanded

techniques for issue P, we look at the

arrangement nature of our strategy with that

of Alg-new3 in [28], HEUR in [29] and

NODERANK in [30]. For Alg-new3, the

inquiry arrangement space dx was set as 20,

the same as in [28]. For NODERANK, the

cycle number is 4, the same as in [30]. We

tried the proposed strategy in various

estimations of CCR and imperative R.

Our proposed CPU-GPU parallel strategy is

name as HPGA, while our technique for

serial inplementation is name as SGA.

V. CONCLUSION AND FUTURE

WORK

This paper exhibits a CPU-GPU parallel

hereditary calculation with scattering redress

for HW/SW dividing. The commitments of

this work are as per the following. Right off

the bat, an upgraded hereditary calculation

with scattering amendment is introduced.

The under-imperative people are walked to

plausible district with scattering rectification

well ordered. Furthermore, the people

preparing including costs calculation and

scattering rectification are keep running in

parallel. For a given issue measure, the

general running time can be decreased while

keeping the assorted variety of hereditary

calculation. Thirdly, we display a novel

parallel procedure by utilizing the parallel

energy of multi-center CPU and that of

many-center GPU. The proposed system

figures the expenses of every person in

parallel on GPU and amends the under-

imperative people in parallel on multi-center

CPU. Fourthly, to additionally enhance the

proficiency of proposed calculation, we

propose an offbeat exchange design for

CPU-GPU, in which the exchange procedure

and calculation process are covered and in

the long run the general run-time is

decreased further.

The above strategy points of interest and

procedures have two advantages. The

increase of abuse is upgraded while the

assorted variety of investigation is kept up.

A proficient parallel approach is developed

International Journal of Pure and Applied Mathematics Special Issue

2720

Page 15: A PARALLEL GEN ETIC ALGORITHM WITH DISPERSION …

to coordinate well the engineering of

CPU/GPU equipment to enormously

diminish the run-time while considering the

calculation workload for enhancing the

arrangement quality. Various tests show the

viability of the proposed approach.

It is likewise exceptionally intriguing that

the proposed thoughts have a general

centrality to manage how to quicken

different sorts of HW/SW co-plan [40,41],

and additionally different applications in

CAD and illustrations [42-46], Computer-

Supported Cooperation Work [47,48],

picture and video handling [49-54].

REFERENCES

[1]W. H. Wolf, “Hardware-software co-design of

embedded systems,” Proceedings of the IEEE, vol.

82, no.7, pp.967-989, 1994.

[2] A. B. Trindade, and L. C. Cordeiro,

“ApplyingSMT-based verification to

hardware/software partitioning in embedded

systems,” Design Automation for Embedded

Systems, vol.20, no.1, pp.1-19, 2016.

[3]W. H. Wolf, “A decade of hardware/software

co-design,” Computer, vol.36, no.4, pp.38-43,

2003.

[4]J.Teich, “Hardware/software co-design: The

past, the present, and predicting the future,”

Proceedings of the IEEE, vol.100, pp.1411-1430,

2012.

[5] I. Mhadhbi, S. B. Othman, and S. B. Saoud, “A

Comprehensive Survey on Hardware/Software

Partitioning Process in Co-Design,” International

Journal of Computer Science and Information

Security, vol.14, no.3: 263, 2016.

[6] R. Wang, W. N. N. Hung, G. Yang, and X.Y.

Song, “Uncertainty Model for Configurable

Hardware/Software and Resource Partitioning,”

IEEE Trans. on Computers, vol.65, no.10,

pp.3217-3223, 2016.

[7] P. Arato, S. Juhasz, Z.A. Mann, A. Orban, and

D. Papp, “Hardware- software partitioning in

embedded system design,” presented at IEEE

International Symposium on Intelligent Signal

Processing, Budapest, Hungary, 2003, pp.197-202.

[8] P .Arato, Z.A. Mann, and A. Orban,

“Algorithmic aspects of hardware/software

partitioning,” ACM Trans on Design Automation

of Electronic Systems, vol.10, No.1, pp.136-156,

2005.

[9] W. J. Shi, J. G. Wu, S. Lam, and T. Srikanthan,

“Algorithms for bi- objective multiple-choice

hardware/ software partitioning,” Computers &

Electrical Engineering, vol.50, pp.127-142, 2016.

[10] Z.A. Mann, A. Orban, and P .Arato, “Finding

optimal hardware/software partitions,” Formal

Methods in System Design, vol.31, no.3, pp.241-

263, 2007.

[11] R. K. Gupta, and G. De Micheli, “Hardware-

software co-synthesis for digital systems,” IEEE

Design & test of computers, vol.10, no.3, pp.29-

41, 1993.

[12] R. Ernst, J. Henkel, and T. Benner,

“Hardware-software co-synthesis for

microcontrollers,” IEEE Design & Test of

computers, vo.10, no.4, pp.64-75, 1993.

[13] N. Janakiraman, and P . N. Kumar, “Multi-

objective module partitioning design for dynamic

and partial reconfigurable system-on- chip using

genetic algorithm,” Journal of Systems

Architecture, vol.60, no.1, pp.119-139, 2014.

[14] G. Wang, W. Gong, and R. Kastner,

“Application partitioning on programmable

platforms using the ant colony optimization,”

Journal of Embedded Computing, vol.2, no.1,

pp.119-136, 2006.

[15] F. Ferrandi, P. L. Lanzi, C. Pilato, D. Sciuto,

and A. Tumeo, “Ant Colony Optimization for

mapping, scheduling and placing in reconfigurable

systems,” presented at IEEE NASA/ESA

Conference on Adaptive Hardware and Systems,

Torino, Italy, 2013, pp.47-54.

[16] M. Koudil, K. Benatchba, A. Tarabet, and EI

B. Sahraoui, “Using artificial bees to solve

partitioning and scheduling problems in co-

International Journal of Pure and Applied Mathematics Special Issue

2721

Page 16: A PARALLEL GEN ETIC ALGORITHM WITH DISPERSION …

design,” Applied Mathematics and Computation,

vol.186, no.2, pp.1710-1722, 2007.

[17] M. B. Abdelhalim, and S. E. -D. Habib, “An

integrated high-level hardware/software

partitioning methodology,” Design Automation for

Embedded Systems, vol.15, no.1, pp.19-50, 2011.

[18] X. H. Yan, F. Z. He, N. Hou, and H. J. Ai,

“An Efficient Particle Swarm Optimization for

Large-Scale Hardware/Software Co-Design

System,” International Journal of Cooperative

Information Systems, DOI:

10.1142/S0218843017410015.

[19] J. Henkel, and R. Ernst, “An approach to

automated hardware/software partitioning using a

flexible granularity that is driven by high-level

estimation techniques,” IEEE Trans. Very Large

Scale Integration (VLSI) Systems, vol.9, no.2,

pp.273-289, 2001.

[20] K. Garg, Y. L. Aung, S. K. Lam, and T.

Srikanthan, “KnapSim-Run- time efficient

hardware-software partitioning technique for

FPGAs,” presented at 28th IEEE International

Conference on System-on-Chip, Beijing, China,

2015, pp. 64-69.

[21] Y. G. Zhang, W. J. Luo, Z. M. Zhang, B. Li,

and X. F. Wang, “A hardware/software

partitioning algorithm based on artificial immune

principles,” Applied Soft Computing, vol.8, no.1,

pp.383-391, 2008.

[22] Y. Jiang, H. H. Zhang, X. Jiao, X. Y. Song,

W. N. N. Hung, M. Gu, and J. G. Sun, “Uncertain

model and algorithm for hardware/software

partitioning”, presented at IEEE Computer Society

Annual Symposium on VLSI, Amherst, MA, USA

,2012, pp. 243-248.

[23] G. S. Li, J. F. Feng, C. Wang, J. H. Wang,

“Hardware/ software partitioning algorithm based

on the combination of genetic algorithm and tabu

search,” Engineering Review, vol.34, no.2, pp.151-

160, 2014.

[24] G. Lin, W. Zhu, and M. M. Ali, “A Tabu

Search-Based Memetic Algorithm for

Hardware/Software Partitioning,” Mathematical

Problems in Engineering, pp.1-15, 2014.

[25] T. Zhang, X. Zhao, X. Q. An, H. J. Quan, and

Z. C. Lei, “Using Blind Optimization Algorithm

for Hardware/Software Partitioning,” IEEE

Access, vol. 5: pp.1353-1362, 2017.

[26] X. H. Yan, F. Z. He, and Y. L. Chen, “A

novel hardware/software partitioning method

based on position disturbed particle swarm

optimization with invasive weed optimization”,

Journal of Computer Science and Technology,

vol.32, no.2, pp.340-355, 2017.

[27] S. A. Tahaee, A. H. Jahangir, “A polynomial

algorithm for partitioning problems,” ACM

Transactions on Embedded Computing Systems

(TECS), vol.9, no.4, pp.34, 2010.

[28] J. G. Wu, T. Srikanthan, and G. Chen,

“Algorithmic aspects of hardware/ software

partitioning: 1D search algorithms,” IEEE Trans.

Computers, vol.59, no.4, pp.532-544, 2010.

[29] J. G. Wu, P. Wang, S. K. Lam, and T.

Srikanthan, “Efficient heuristic and tabu search for

hardware/software partitioning,” The Journal of

Supercomputing, vol.66, no.1, pp.118-134, 2013.

[30] Z. Chen, J. G. Wu, G. Z. Song, and J. L.

Chen, “NodeRank: An Efficient Algorithm for

Hardware/Software Partitioning,” Chinese Journal

of Computers, vol. 36, no.10, pp.2033-2040, 2013.

[31] H. J. Quan, T. Zhang, Q. Liu, J. C. Guo, X. C.

Wang, and R. M. Hu “Comments on “Algorithmic

Aspects of Hardware/Software Partitioning: 1D

Search Algorithms”,” IEEE Trans. Computers,

vol.4, no.63, pp.1055-1056, 2014.

[32] A. F. Farahani, M. Kamal, and M. Salmani-

Jelodar, “Parallel Genetic Algorithm Based

HW/SW Partitioning,” presented at International

Symposium on Parallel Computing in Electrical

Engineering, Bialystok, Poland, 2006, pp.337-342.

[33] Y. Wu, H. Zhang, and H. Yang, “Research on

parallel HW/SW partitioning based on hybrid PSO

algorithm,” presented at International Conference

on Algorithms and Architectures for Parallel

Processing, 2009, pp. 449-459.

[34]Y. Zhou, F. Z. He, and Y. M. Qiu.

“Optimization of parallel iterated local search

algorithms on graphics processing unit,” The

International Journal of Pure and Applied Mathematics Special Issue

2722

Page 17: A PARALLEL GEN ETIC ALGORITHM WITH DISPERSION …

Journal of Supercomputing. vol.72, no.6, pp.2394-

2416, 2016.

[35]Y. Zhou, F. Z. He, and Y. M. Qiu, “Dynamic

Strategy based Parallel Ant Colony Optimization

on GPUs for TSP ,” Science China: Information

Sciences, vol. 60, no.6, pp.068102, 2017.

[36] G. Jia, Y. Wang, Z. Cai, and Y. Jin, “An

improved (μ+ λ)-constrained differential evolution

for constrained optimization,” Information

Sciences, vol.222, pp.302-322, 2013.

[37] R. A. Rahman, R. Ramli, Z. Jamari, and K. R.

Ku-Mahamud, “Evolutionary Algorithm with

Roulette-Tournament Selection for Solving

Aquaculture Diet Formulation,” Mathematical

Problems in Engineering, pp.1-10, 2016.

[38] M. A. Alsmirat, Y. Jararweh, M. Al-Ayyoub,

M. A. Shehab, and B. B. Gupta, “Accelerating

compute intensive medical imaging segmentation

algorithms using hybrid CPU-GPU

implementations,” Multimedia Tools and

Applications, vol.76, no.3, pp.3537-3555, 2017.

[39] M. R. Guthaus, J. S. Ringenberg, D. Ernst,

T.M. Austin, T. Mudge, and R.B. Brown,

“MiBench: A free, commercially representative

embedded benchmark suite,” presented at IEEE

International Workshop on Workload

Characterization, Austin, TX, USA, 2001, pp. 3-

14.

[40] W. Zuo, L. N. Pouchet, A. Ayupov, T. Kim,

C. W. Lin, S. Shiraishi and D. M. Chen, “Accurate

High-level Modeling and Automated

Hardware/Software Co-design for Effective SoC

Design Space Exploration,” presented at the 54th

Annual Design Automation Conference, Austin,

TX, USA, 2017, pp. 78.

[41] B. H. Hassine S, M. Jemai, and B. Ouni,

“Power and Execution Time Optimization through

Hardware Software Partitioning Algorithm for

Core Based Embedded System,” Journal of

Optimization, 2017.

[42] D. J. Zhang, F. Z. He, S. H. Han, and X. X,

Li, “Quantitative optimization of interoperability

during feature-based data exchange,” Integrated

Computer-Aided Engineering, vol.23, no.1, pp.31-

50, 2016.

[43] J. J. Xue, G. Zhao, W. L. Xiao, “Efficient

GPU out-of-core visualization of large-scale CAD

models with voxel representations,” Advances in

Engineering Software, vol.99: pp.73-80, 2016.

[44]Y. Q. Wu, F. Z. He, D. J. Zhang, and X. X. Li,

“Service-Oriented Feature-Based Data Exchange

for Cloud-Based Design and Manufacturing,”

IEEE Trans. on Services Computing, DOI

10.1109/TSC.2015.2501981.

[45] Y. L. Chen, F. Z. He, Y. Q. Wu, and N. Hou,

“A local start search algorithm to compute exact

Hausdorff Distance for arbitrary point sets,”

Pattern Recognition, vol.67, pp.139-148, 2017.

[46] R. Li, Q. M. Hou, and K. Zhou, “Efficient

GPU path rendering using scanline rasterization,”

ACM Trans on Graphics, vol.35, no.6, pp.228,

2016.

[47] X. Lv, F. Z. He, W. W. Cai, and Y. Cheng, “A

string-wise CRDT algorithm for smart and large-

scale collaborative editing systems,” Advanced

Engineering Informatics, vol.19, pp. 397-409,

2016.

[48] Y. Cheng, F. Z. He, Y. Q. Wu, et al., and D. J.

Zhang, “Meta-operation Conflict Resolution for

Human-Human Interaction in Collaborative

Feature-Based CAD systems,” Cluster Computing,

vol.19, no.1, pp.237-253, 2016.

[49] B. Ni, F. Z. He, Y. T. Pan, and Z. Y. Yuan.,

“Using Shapes Correlation for Active Contour

Segmentation of Uterine Fibroid Ultrasound

Images in Computer-Aided Therapy,” Applied

Mathematics-A Journal of Chinese Universities,

vol.31, no.1, pp.37 – 52, 2016.

[50] K. Li, F. Z. He, H. P. Yu, and Y. T. Pan, “A

Parallel and Robust Object Tracking Approach

Synthesizing Adaptive Bayesian Learning and

Improved Incremental Subspace Learning,”

Frontiers of Computer Science, DOI

10.1007/s11704-018-6442-4.

[51] K. Li, F. Z. He, and X. Chen, “Real-time

object tracking via compressive feature selection,”

Frontiers of Computer Science, vol.10, no.4, pp.

689-701, 2016.

[52] K. Li, F. Z. He, H. P. Yu, and X. Chen, “A

International Journal of Pure and Applied Mathematics Special Issue

2723

Page 18: A PARALLEL GEN ETIC ALGORITHM WITH DISPERSION …

Correlative Classifiers Approach based on Particle

Filter and Sample Set for Tracking Occluded

Target,” Applied Mathematics-A Journal of

Chinese Universities, vol.32, no.3, pp. 294-312,

2017.

[53] G. M. Rao, and C. M. Rao, “GPU Based

Video Tracking System,” presented at IEEE 10th

International Conference on Semantic Computing,

Laguna Hills, CA, USA , 2016, pp.170-171.

[54] J. Sun, F. Z. He, Y. L. Chen, and X. Chen, “A

multiple template approach for robust tracking of

fast motion target,” Applied Mathematics-A

Journal of Chinese Universities, vol.31, no.2,

pp.177- 197, 2016.

International Journal of Pure and Applied Mathematics Special Issue

2724

Page 19: A PARALLEL GEN ETIC ALGORITHM WITH DISPERSION …

2725

Page 20: A PARALLEL GEN ETIC ALGORITHM WITH DISPERSION …

2726