a tutorial approach to analog phase by angsuman roy … · -10 -9 -8 -7 -6 -5 -4 -3 -2 -1 0123...
TRANSCRIPT
![Page 1: A TUTORIAL APPROACH TO ANALOG PHASE By Angsuman Roy … · -10 -9 -8 -7 -6 -5 -4 -3 -2 -1 0123 45678910 Phase in Degrees. VCO DESIGN Many options to choose from Ring oscillators Relaxation](https://reader034.vdocument.in/reader034/viewer/2022042223/5ec996aae42f933a7879ef21/html5/thumbnails/1.jpg)
By Angsuman
A TUTORIAL APPROACH TO ANALOG PHASE y g
RoyTO ANALOG PHASE-LOCKED LOOPS
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PRESENTATION OUTLINE
Introduction and Terminology
PRESENTATION OUTLINE
Introduction and Terminology
Analog PLLs
Phase Detector (Mixer)
C O Voltage-Controlled Oscillator
Low-Pass Filter and Damping
Applications Frequency Synthesis
FM Demodulation
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INTRODUCTIONINTRODUCTION
Phase Detector
Low-Pass Filter VCO
ReferenceSignal Output Signal
Basic Structure of a PLL
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TERMINOLOGYTERMINOLOGY
• Multiplying circuit (mixer) used for phase detector
• Other components are analog
Analog PLL (APLL) Other components are analog( )
• Mixer replaced with XOR gate or Digital PLL Mixer replaced with XOR gate or phase frequency detector (PFD)
• Other components are unchanged
Digital PLL (DPLL)
• XOR Gate or PFD• Other components are digital or
All Digital PLL (ADPLL) Other components are digital or
numerically controlled.PLL (ADPLL)
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WHY ANALOG PLLS?WHY ANALOG PLLS?
Used for RF Wide Tuning Used for RF Circuits
Wide Tuning Range
Many Low Noise
yAdjustable Parameters
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APLL BLOCK DIAGRAMAPLL BLOCK DIAGRAM
Mixer
Low-Pass Filter VCO
ReferenceSignal Output Signal
Basic Structure of a PLL
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WHAT IS A MIXER?WHAT IS A MIXER?
A mixer takes two input frequencies and outputs their sum and difference from the process of multiplication.
Mixer
F1 F1+F2
F1-F2
AF2
F1-F2
A
FF1 F2F1-F2 F1+F2
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MATHMATH
Difference Sum
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CONCEPTUAL DIAGRAMCONCEPTUAL DIAGRAM
+1
F1+F2
-1
(F1)
F1+F2
F1-F2
RF
LO
IF
1
(F2)LO
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MIXER DESIGN:4 QUADRANT MULTIPLIERMIXER DESIGN:4 QUADRANT MULTIPLIER
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4 QUADRANT MULTIPLIER DEVICE SIZES4 QUADRANT MULTIPLIER DEVICE SIZES
1 8u/0 6u1.8u/0.6umin size devices
for speed
6u/0.6u for currenti ki g bilitsinking ability
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4 QUADRANT MULTIPLIER GAIN4 QUADRANT MULTIPLIER GAIN
Output voltage isdeveloped acrossthese resistors
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AC OPERATION OF THE MIXERAC OPERATION OF THE MIXER
Differential sine input with bias voltage represents RF input of 100 MHz
Same, but LO input of 10 MHz
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TIME DOMAIN VIEW OF INPUTS/OUTPUTTIME DOMAIN VIEW OF INPUTS/OUTPUT
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FFT OF IF OUTPUTFFT OF IF OUTPUT
Difference frequency: 90 MHz Sum frequency: 110 MHz
SFDR=70dB
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GAIN AND NOISEGAIN AND NOISE
12 dB Loss
Loss is bad for most
Difference between noise f
Loss is bad for most applications
floors is added noiseor noise figure (NF)= 5 dB
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4 QUADRANT MULTIPLIER GAIN4 QUADRANT MULTIPLIER GAIN
Network to allow for sweeping Network to allow for sweeping differential voltages while keeping a fixed bias.
.dc V_RF -1 1 V_LO -1 1 0.5
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4 QUADRANT MULTIPLIER GAIN4 QUADRANT MULTIPLIER GAIN
Linear only for small signals
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4 QUADRANT MULTIPLIER GAIN4 QUADRANT MULTIPLIER GAIN
Changed sweep and step settings to show linear region betterChanged sweep and step settings to show linear region better
V_Lo=0.2
0.1*Check polarity of sources
and change if needed*
-0.1
0.2
V_RF -0.25V to 0.25V
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LET’S MULTIPLYLET S MULTIPLY
0.1
20mVA
B -50mV
-75mVCB 50mV
-0.2
Point A: K*(0.1V * 0.1V) = 0.02V K=2Point A: K*(0.1V * -0.2V) = -0.05V K=2.5Point C: K*(0.15V * -0.2V) = -0.075V K=2.5
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INCREASING GAININCREASING GAIN
Increasing the value of these resistors increases gain but reduces load driving abilityIncreasing the value of these resistors increases gain but reduces load driving ability.
Increasing the bias voltage increases gain and allows for variable gain.
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REPLACING RESISTORSREPLACING RESISTORS
1.8u/18u
Resistors can be replaced with long L MOSFETs
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MIXER AS PHASE DETECTORMIXER AS PHASE DETECTOR
When both RF and LO frequencies When both RF and LO frequencies are the same, the mixer operates as
a phase detector.
Simulation test set-up
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NO PHASE DIFFERENCENO PHASE DIFFERENCE
IF output is rectified at twice the RF/LO frequency. p / q yAveraging this will result in some DC value.
IF
LO
RFRF
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90 DEGREE PHASE DIFFERENCE90 DEGREE PHASE DIFFERENCE
IF output appears to have zero average value.
IF
p pp g
IF
LO
RF
There is a relationship between average IF voltage and phase between LO and RF.
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FILTERING THE IF OUTPUTFILTERING THE IF OUTPUT
C it t filt IF t tCapacitor to filter IF output
IF output is now a DC value
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IF OUTPUT AS A FUNCTION OF PHASEIF OUTPUT AS A FUNCTION OF PHASE
Output Voltage as a Function of Phase 100 MH RF/LO
100
150
Output Voltage as a Function of Phase 100 MHz RF/LO
50
100
in m
V
-50
0
Out
put V
olta
ge
Phase
-100
-150Phase in Degrees
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ZOOMED INZOOMED IN
114
114.5
Output Voltage as a Function of Phase
112.5
113
113.5
e in
mV
111
111.5
112
Out
put V
olta
ge
Phase
110
110.5
111
109.5-10 -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 8 9 10
Phase in Degrees
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VCO DESIGN
Many options to choose from
VCO DESIGN
Many options to choose from Ring oscillators
Relaxation oscillators
Varactor-tuned LC oscillators Varactor-tuned LC oscillators
Requirements are Relatively linear Relatively linear
Has the tuning range needed for the intended application
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DIFFERENTIAL RING OSCILLATORDIFFERENTIAL RING OSCILLATOR
Same idea as a ring oscillator made from inverters but with differential amplifiers.
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BREAKING IT DOWNBREAKING IT DOWN
C t i l d (3 6 /0 6 )Current mirror loads (3.6u/0.6u)Current sets delay Output
Diff pairsDiff pairs(1.8u/0.6u)
Current mirrors (3.6u/0.6u)White noise source for simulation
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OUTPUTOUTPUT
Problem: Output does not swing
Problem: Odd output waveform
to full logic levelsoutput waveform shape
ting Need to shift
the center of ping Inverter string
is needed to
Solution
Leve
l Shi
f the center of the output to ½ VDD so inverters switch in the
Pul
se S
hap is needed to
provide full logic levels and sharpen the pulses.L
middle of the waveform.
P
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LEVEL-SHIFTINGLEVEL SHIFTING
Level shifter with long L MOSFETs Can also use resistors
1.8u/6u
1.8u/24u1.8u/24u
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INVERTER STRINGINVERTER STRING
Small inverter for Big inverter for low capacitive loading
Big inverter for load driving ability
6/3 6/3 6/3 12/6 24/12 48/24
Inverter sizes arePMOS Width/NMOS Width
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RESULTRESULT
300 MHz300 MHz
Sharp transitions with 50% duty cycle
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FREQUENCY TESTINGFREQUENCY TESTING
400
450
Frequency as a Function of Current
250
300
350
MH
z
150
200
250
Freq
uenc
y in
Frequency
0
50
100
01 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35
Input Current in uA
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VOLTAGE TO CURRENT CONVERTERVOLTAGE TO CURRENT CONVERTER
This MOSFET and resistor serves as a rudimentary voltage to current converter.
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FREQUENCY TESTINGFREQUENCY TESTING
Frequency as a Function of Voltage
350
400
Frequency as a Function of Voltage
250
300
in M
Hz
100
150
200
Freq
uenc
y
Frequency
0
50
100
1 4 1 5 1 6 1 7 1 8 1 9 2 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 2 9 3 3 1 3 2 3 3 3 4 3 5 3 6 3 7 3 8 3 9 4 4 1 4 2 4 3 4 4 4 5 4 6 4 7 4 8 4 9 51.4 1.5 1.6 1.7 1.8 1.9 2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 5
Voltage in V
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INTERFACING MIXER TO VCOINTERFACING MIXER TO VCO
Active load for differential to
Mixer output is differentialwhile VCO input is
Active load for differential to single ended conversion.
while VCO input is single-ended.
Single ended mixer
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CLOSING THE LOOPCLOSING THE LOOP
Loop filter with buffer to isolate effects from Loop filter with buffer to isolate effects from mixer output impedance.
Mixer needs proper biasing and input levels.
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OUTPUTOUTPUT
LO
RF
VinVCO
Isolating start-up transients
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LOCKED OUTPUT AT 300 MHZLOCKED OUTPUT AT 300 MHZ
Edges line up
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USEFUL EQUATIONSUSEFUL EQUATIONS
Loop filter transfer function (simple 1st order lowpass)
System transfer function (2nd order)
Natural frequency
Damping ratio
N is for the divider ratio in N is for the divider ratio in frequency synthesis examples. Ifthere is no divider use N=1.
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OVERDAMPED CASEOVERDAMPED CASE
Overdamped PLL not locking on a single frequency
FFT of output shows two peaks peaks at 300 MHz and a noisy one at 291 MHz.
The difference is the naturalfrequency.
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UNDERDAMPED CASEUNDERDAMPED CASE
VinVCO voltage shows someoscillation and ripple voltage.
FFT of output shows the correct peak at 300 MHz but correct peak at 300 MHz but there is significant phase noise.
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CRITICALLY DAMPED CASECRITICALLY DAMPED CASE
VinVCO voltage settles and looks fairly random.
FFT of output shows the FFT of output shows the correct peak at 300 MHz with less noise.
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APPLICATION: FREQUENCY SYNTHESIS
Stable oscillator topologies don’t scale well to high
APPLICATION: FREQUENCY SYNTHESIS
Stable oscillator topologies don t scale well to high frequencies. Quartz (32 KHz-160 MHz)
Rubidium (typically 10 MHz) Rubidium (typically 10 MHz)
Silicon MEMS (1 MHz-140 MHz)
A PLL locked to a stable reference can generate a stable high frequency oscillatorfrequency oscillator. Quartz (10 PPM)
Silicon MEMS (100 PPM)
Rubidium (0 0001 PPM or 0 1 PPB) Rubidium (0.0001 PPM or 0.1 PPB)
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FREQUENCY DIVIDERFREQUENCY DIVIDER
Each stage divides by 2g y
TSPC D-FF
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FREQUENCY MULTIPLIER SCHEMATICFREQUENCY MULTIPLIER SCHEMATIC
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OUTPUTOUTPUT
256 MHz Outputp
32 MHz Input
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APPLICATIONS: FM DEMODULATIONAPPLICATIONS: FM DEMODULATION
FM Modulator Provides ff
Additional filtering to
differential input at correct amplitude
filtering to filter out VCO ripple
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INPUTS AND OUTPUTSINPUTS AND OUTPUTS
Filtered VCOVCOinput
VCO input
Original signal
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APPLICATIONS: FSK DEMODULATIONAPPLICATIONS: FSK DEMODULATION
Filtered VCOVCOinput
VCO input
Original Input toFSK ModulatorModulator
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REFERENCES
The Art of Electronics by Horowitz and Hill
REFERENCES
The Art of Electronics by Horowitz and Hill
MT-080 Mixers and Modulators by Analog Devices
MT-086 Fundamentals of PLLs by Analog Devices
f Practical Tips for PLL Design by Dennis Fischette
FM & PM Demodulation from The Scot’s Guide to Electronics
Mixer Basics Primer by Christopher Marki