a zvs approach for ac/dc converter with pfc

A ZVS approach for AC/DC converter with A ZVS approach for AC/DC converter with

PFCPFC

The Power Electronics Lab., Hong Kong The Power Electronics Lab., Hong Kong UniversityUniversity

N. K. Poon N. K. Poon C. P. Liu C. P. Liu M. H. PongM. H. Pong

Speaker Speaker

Bryan M. H. PongBryan M. H. Pong

PowereLab HKU

Prepared by Franki Poon Prepared by Franki Poon www.eee.hku.hk/power_electronics_lab/ www.eee.hku.hk/power_electronics_lab/ 11Power Power eeLabLab

HKUHKU

Some basic concepts

Input rectifiers and capacitor produce Pulsating input current

Harmonic currents are generated

Load


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A conventional method

A boost converter and a DC/DC converter

IpfcIdc


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A popular method among researchers

Single stage design which combines the boost and the DCDC converters

Ipfc

Idc


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Is single stage design always better?

Let us take a look


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Why two-stage design?Why two-stage design?

Ipfc Idc

•AdvantageAdvantage

•Losses Losses IIpfcpfc22 + + IIdcdc

22

•Fix DCDC input Fix DCDC input voltagevoltage

•Controllable bulk Controllable bulk voltagevoltage

•DisadvantageDisadvantage

•Need two controllersNeed two controllers

•One more MOSFETOne more MOSFET


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Why single-stage design?Why single-stage design? •AdvantageAdvantage

•One controllerOne controller

•One MOSFET lessOne MOSFET less

•DisadvantageDisadvantage

•Losses Losses ( (IIpfcpfc + + IIdcdc))22

•High High IIdcdc at low lineat low line

•Higher Higher IIpfcpfc

•High current stressHigh current stress

•High voltage stressHigh voltage stress

Ipfc

Idc


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Good reasons for two-Good reasons for two-stagestage

oSingle StageSingle Stage•AdvantagesAdvantages

•One controllerOne controller

•One MOSFET lessOne MOSFET less

•DisadvantagesDisadvantages

•Losses Losses ( (IIpfcpfc + + IIdcdc))22

•High High IIdcdc at low lineat low line

•Higher Higher IpfcIpfc

•High current stressHigh current stress

•High voltage stressHigh voltage stress

oTwo-StageTwo-Stage•AdvantagesAdvantages

•Losses Losses IIpfcpfc22 + + IIdcdc

22

•Fix DCDC input Fix DCDC input voltagevoltage

•Controllable bulk Controllable bulk voltagevoltage

•DisadvantagesDisadvantages

•Need two controllerNeed two controller

•One more MOSFETOne more MOSFET

Prepared by Franki Poon Prepared by Franki Poon www.eee.hku.hk/power_electronics_lab/ www.eee.hku.hk/power_electronics_lab/ 88

Power Power eeLabLab

HKUHKU

Our new idea Our new idea Boost + Asymmetric half-bridge with soft Boost + Asymmetric half-bridge with soft

switchingswitching

DDMpfcMpfc > D > DM2M2

Mpf

c

M2

M1


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Zero voltage state -Zero voltage state - M M22

MM11 turn off then . .turn off then . .


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AfterAfter M M22 turn onturn on

Zero voltage state -Zero voltage state - M Mpfcpfc


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MM22 turn onturn on

MpMpfcfc turn onturn on

Two separate convertersTwo separate converters


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M2 turn off

Mpfc turn on

Zero voltage state –Zero voltage state – M M11


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MM11 turn onturn on

MpMpfcfc turn onturn on

One cycle on asymmetricOne cycle on asymmetric


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MM11 turn onturn on

MpMpfcfc turn offturn off

One cycle on PFCOne cycle on PFC


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It’s great, but . . . It’s great, but . . .

If If DDMpfcMpfc < D < DM2M2

DDMpfc Mpfc == DDM2M2


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For allFor all D DMpfcMpfc and all and all DDM2M2

Mpf

c

M2

M1

Maux

After all – After all – small small MMauxaux added added


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M2 gate drive

M1 gate drive

Maux gate drive

Mpfc gate drive

Final timing arrangement Final timing arrangement

A

B

VVAA = V = VBB

VVMaux_dsMaux_ds = V = VAA-V-VBB =0 =0


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Mpf

c

M2

M1

Maux

Doff

guarantee a path for Laux current when M2 off at any time

Practical consideration Practical consideration


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STPS12NM50

Practical circuit – Practical circuit – O/P O/P

12V@10A12V@10A

250uH

STD5NM50

IRF840A

12uH

STPS12NM50

8uH

Two diodes are used to clamp

ringing


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M2 gate

M1 gate

Maux gate

Mpfc gate

L5991

O/P

Sync

O/P

SyncL4981

Simplified timing circuit Simplified timing circuit


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How does it look? How does it look?

Width = 12.6cmWidth = 12.6cm

Depth = 6.3cmDepth = 6.3cm

Height = 1.9cmHeight = 1.9cm


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ZVS on ZVS on MM22


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ZVS on ZVS on MMpfcpfc


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ZVS on ZVS on MMpfcpfc & & MM22


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Power loss vs. Output power at 115V input

0

2

4

6

8

10

12

14

16

0 24 48 72 96 120

Output power/W

Pow

er lo

ss/W

Efficiency vs. Input voltage at 12V@10A output

80828486889092949698100

90 100 115 150 200 230 240

Input voltage/V

Effic

ienc

y/%

Losses and EfficiencyLosses and Efficiency


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Finally . . . Finally . . . •Simple Boost + Asymmetric Half-bridge configuration – Good Combination.

•All ZVS behaviors – Very little added cost.

•Two separate converter – Easy to control

•Active diode can be incorporated – <1W no load power

•Simple PWM controller – simple ASIC


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a zvs approach for ac/dc converter with pfc

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