a1 - rev. 4.1 (2006-07) by enrico nardelli1 logic circuits and computer architecture appendix a...
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![Page 1: A1 - Rev. 4.1 (2006-07) by Enrico Nardelli1 Logic Circuits and Computer Architecture Appendix A Digital Logic Circuits Part 1:Combinational Circuits and](https://reader036.vdocument.in/reader036/viewer/2022062421/56649d375503460f94a10391/html5/thumbnails/1.jpg)
Rev. 4.1 (2006-07) by Enrico Nardelli 1A1 -
Logic Circuits and Computer Architecture
Appendix ADigital Logic Circuits
Part 1: Combinational Circuitsand Minimization
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Rev. 4.1 (2006-07) by Enrico Nardelli 2A1 -
Structured organization
• Problem-oriented language level• Assembly language level• Operating system machine level• Instruction set architecture level• Microarchitecture level• Digital logic level A
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Rev. 4.1 (2006-07) by Enrico Nardelli 3A1 -
Digital Logic level
• Digital circuits Only two logical levels present (i.e., binary) low/high voltage
• Basic gates AND, OR, NOT
• Basic circuits Combinational (without memory, stateless) Sequential (with memory, state dependent
behaviour)
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Rev. 4.1 (2006-07) by Enrico Nardelli 4A1 -
Boolean Algebra
• Variables: A, B, …• Domain of variables: 2 values
1 or 0; Y or N; true or false; …
• Fundamental Operations AND, OR, NOT
• Intended meaning (for humans - Laws of Thought) AND: both inputs are true OR: at least one input is true NOT: negate the input
• Named from George Boole
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Rev. 4.1 (2006-07) by Enrico Nardelli 5A1 -
George Boole (1815-1864)
An Investigation of the Laws of Thought, on Which are founded the Mathematical Theories of Logic and Probabilities (1854)
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Rev. 4.1 (2006-07) by Enrico Nardelli 6A1 -
Claude Shannon(1916-2001)
A Symbolic Analysis of Relay and Switching Circuits (1938)
ENIAC (Electronic Numerical Integrator And Calculator) (1946)
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Rev. 4.1 (2006-07) by Enrico Nardelli 7A1 -
Formal definition of functions (1)
• By means of “truth tables” Explicit representation of the output for all
possible inputs
A B AND
0 0 0
0 1 0
1 0 0
1 1 1
A B OR
0 0 0
0 1 1
1 0 1
1 1 1
A NOT
0 1
1 0
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Rev. 4.1 (2006-07) by Enrico Nardelli 8A1 -
…truth table for a 3-variable function…
f(A,B,C)= 1 if and only if at least 2 variables are equal to 1
A B C f(A,B,C)
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 1
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Rev. 4.1 (2006-07) by Enrico Nardelli 9A1 -
Formal definition of functions (2)
• By means of “boolean equation”• boolean equation consists of:
variables constants 0 and 1 boolean operations (AND, OR, NOT) parentheses
M = OR( AND(NOT(A),NOT(B)), AND(A,B) )
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Rev. 4.1 (2006-07) by Enrico Nardelli 10A1 -
Boolean functions
• Conventions NOT (negation): NOT(A) = A’ = A AND (conjunction): AND(A,B) = AB = A.B OR (disjunction): OR(A,B) = A+B
M = OR( AND(NOT(A),NOT(B)), AND(A,B) )
M = (((A)’(B)’) + (AB))
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Rev. 4.1 (2006-07) by Enrico Nardelli 11A1 -
Boolean Operator Precedence
• The order of evaluation in boolean expression is:1. Parentheses2. NOT3. AND4. OR
• Consequence: parantheses appear around OR expressions
• Example: F=A(B+C)(C+D’)
M = (((A)’(B)’) + (AB))
M = A’B’ + AB
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Rev. 4.1 (2006-07) by Enrico Nardelli 12A1 -
NOT gate - the simplest one
• NOT gate - inverts the signal If A is 0, X is 1 If A is 1, X is 0
• A NOT gate is also called an inverter
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Rev. 4.1 (2006-07) by Enrico Nardelli 13A1 -
AND gate
• Output is 1 if all inputs are 1 In general, if the AND gate has N inputs, both
input 1 AND input 2 AND … AND input N must be 1 for the output to be 1
• 2-input AND gate
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Rev. 4.1 (2006-07) by Enrico Nardelli 14A1 -
OR gate
• Output is 1 if at least one input is 1 In general, if the OR gate has N inputs, input 1
OR input 2 OR … OR input N must be 1 for the output to be 1
• 2-input OR gate
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Rev. 4.1 (2006-07) by Enrico Nardelli 15A1 -
A more complex example
• 2-input “equivalence” circuit• The output is 1 if the inputs are the same
(i.e., both 0 or both 1)
Truth table• Boolean function:
M = A’B’ + ABA B M
0 0 1
0 1 0
1 0 0
1 1 1
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Rev. 4.1 (2006-07) by Enrico Nardelli 16A1 -
Formal definition of functions (3)
• By means of logic circuits Combination of logic gates joined by wires
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Rev. 4.1 (2006-07) by Enrico Nardelli 17A1 -
Conventions for logic circuits
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Rev. 4.1 (2006-07) by Enrico Nardelli 18A1 -
Exercise (1)
• Write the truth table and the logic circuit for
F = X + Y’Z
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Rev. 4.1 (2006-07) by Enrico Nardelli 19A1 -
Truth table
X Y Z F
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 0
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 1
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Rev. 4.1 (2006-07) by Enrico Nardelli 20A1 -
Logic Circuit
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Rev. 4.1 (2006-07) by Enrico Nardelli 21A1 -
Exercise (2)
• Write the boolean function and its truth table for the following logic circuit
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Rev. 4.1 (2006-07) by Enrico Nardelli 22A1 -
Function and Truth Table
• F = Y’ + X’YZ’ + XY
X Y Z F
0 0 0 1
0 0 1 1
0 1 0 1
0 1 1 0
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 1
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Rev. 4.1 (2006-07) by Enrico Nardelli 23A1 -
Exercise (3)
• Write the boolean function and its truth table for the following logic circuit
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Rev. 4.1 (2006-07) by Enrico Nardelli 24A1 -
Function and Truth Table
• F = X’YZ + X’YZ’ + XZ
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Rev. 4.1 (2006-07) by Enrico Nardelli 25A1 -
Conversion between represent.
• Circuit ->-> Boolean formula (left-to-right inspection)-> Truth table (explicit case-by-case computation)
• Boolean formula ->-> Circuit (bottom-up construction)-> Truth table (explicit case-by-case evaluation)
• Truth table -> -> Circuit (through boolean formula)-> Boolean formula (through canonical form – see
later)
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Rev. 4.1 (2006-07) by Enrico Nardelli 26A1 -
Boolean Identities
1A = A 0+A = A Identity0A = 0 1+A = 1 NullAA = A A+A = A IdempotentAA’ = 0 A+A’ = 1 InverseAB = BA A+B = B+A Commutative(AB)C = A(BC) (A+B)+C = A+(B+C)
AssociativeA+BC = (A+B)(A+C) A(B+C) = AB+AC DistributiveA(A+B) = A A+AB = A Absorption(AB)’ = A’+B’ (A+B)’ = A’B’ De Morgan
duality principle: any algebraic equality remains true when the operators OR and AND, and the elements 0 and 1 are interchanged
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Rev. 4.1 (2006-07) by Enrico Nardelli 27A1 -
Truth tables to verify De Morgan’s theorem
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Rev. 4.1 (2006-07) by Enrico Nardelli 28A1 -
RemarkEach equality remains true if you sobstitute any variable withany expression
Examples
(A+B)(A+CD’) = A + BCD’ (distributive)
((A+BC)(D+A))’ = (A+BC)’ + (D+A)’ (De Morgan) = A’ (BC)’ + D’A’ (De Morgan) = A’(B’+C’) + D’A’
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Rev. 4.1 (2006-07) by Enrico Nardelli 29A1 -
F = X’YZ + X’YZ’ + XZ (distributive) = X’Y(Z + Z’) + XZ (inverse) = X’Y 1 + XZ (identity) = X’Y + XZ
… algebraic manipulation…
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Rev. 4.1 (2006-07) by Enrico Nardelli 30A1 -
Boolean Algebra Vs Switching Algebra (1)
A Boolean Algebra is a structure A = <A, +, · , ’, 0, 1> where
• A is a set• + and · are binary operations• ‘ is a unary operation• 0, 1 A
satisfying the following axioms
(i) + and · are commutative
(ii) 0 and 1 satisfy: a·1=a and a+0=a, a A
(iii) + and · distribute over each other
(iv) for each element a A, there exists an element a’ A such that a + a’= 1 and a·a’=0
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Rev. 4.1 (2006-07) by Enrico Nardelli 31A1 -
Boolean Algebra Vs Switching algebra (2)
Switching Algebra is the following boolean algebra
A = <{0,1}, +, · , ’, 0, 1>
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Rev. 4.1 (2006-07) by Enrico Nardelli 32A1 -
ObservationAxioms (i)-(iv) can be used to prove all the other identities
An example: Idempotent X + X = X
X + X = (X + X)·1 (ii) = (X + X)(X + X’) (iv) = X + (X·X’) (iii) = X + 0 (iv) = X (ii)
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Rev. 4.1 (2006-07) by Enrico Nardelli 33A1 -
De Morgan circuit equivalents
• AND/OR can be interchanged if you invert the inputs and outputs
bubble means inversion
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Rev. 4.1 (2006-07) by Enrico Nardelli 34A1 -
NAND gate - the negation of AND
• The opposite of the AND gate is the NAND gate (output is 0 if all inputs are 1)
Truth table• Logic diagram A B NAN
D
0 0 1
0 1 1
1 0 1
1 1 0
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Rev. 4.1 (2006-07) by Enrico Nardelli 35A1 -
NOR gate - the negation of OR
• The opposite of the OR gate is the NOR gate (output is 0 if any input is 1) Truth table
• Logic diagram A B NOR
0 0 1
0 1 0
1 0 0
1 1 0
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Rev. 4.1 (2006-07) by Enrico Nardelli 36A1 -
Exercise
• Write the truth table for: a 3 input NAND gate a 3 input NOR gate
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Rev. 4.1 (2006-07) by Enrico Nardelli 37A1 -
XOR gate - the exclusive OR
• For a 2-input gate Output is 1 if exactly one of the inputs is 1
Truth table• Logic diagram
• For > 2 inputs: output is 1 if an odd number of inputs is 1
A B XOR
0 0 0
0 1 1
1 0 1
1 1 0
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Rev. 4.1 (2006-07) by Enrico Nardelli 38A1 -
Universal Gates
• How many logical functions there are with n input?
• With n inputs there are 2(2n ) possible logical functionsA B 0 1 2 3 4 5 6 7 8 9 1
011
12
13
14
15
0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
0 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
1 0 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
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Rev. 4.1 (2006-07) by Enrico Nardelli 39A1 -
Universal Gates (2)
• AND, OR, NOT can generate all possible boolean functions (see later)
• Is it possible to use fewer basic operations?
• Universal gate: a gate type that can implement any Boolean function
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Rev. 4.1 (2006-07) by Enrico Nardelli 40A1 -
Universal Gates (3)
• AND, NOT are enough !
• OR, NOT are enough !
• Even NAND alone or NOR alone are enough !
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Rev. 4.1 (2006-07) by Enrico Nardelli 41A1 -
• Simulation of NOT ???
How NAND simulates AND, OR
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Rev. 4.1 (2006-07) by Enrico Nardelli 42A1 -
Alternative NAND representations
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Rev. 4.1 (2006-07) by Enrico Nardelli 43A1 -
• Simulation of NOT ???
How NOR simulates AND, OR
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Rev. 4.1 (2006-07) by Enrico Nardelli 44A1 -
Alternative NOR representations
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Rev. 4.1 (2006-07) by Enrico Nardelli 45A1 -
Gate equivalence
• Any AND, OR, NOT gate can be obtained using just NAND gates or just NOR gates
• Consequence: any circuit can be constructed using just NAND gates or just NOR gates (easier to build)
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Rev. 4.1 (2006-07) by Enrico Nardelli 46A1 -
Equivalence modifications (1)
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Rev. 4.1 (2006-07) by Enrico Nardelli 47A1 -
Equivalence modifications (2)
• Substitute equivalent gates
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Rev. 4.1 (2006-07) by Enrico Nardelli 48A1 -
Transforming OR, AND to NAND
• Transform the following circuit
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Rev. 4.1 (2006-07) by Enrico Nardelli 49A1 -
Solution
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Rev. 4.1 (2006-07) by Enrico Nardelli 50A1 -
Exercise
• Write a NAND only logic circuit for
F = XY’ + X’Y + Z
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Rev. 4.1 (2006-07) by Enrico Nardelli 51A1 -
Solution
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Rev. 4.1 (2006-07) by Enrico Nardelli 52A1 -
Exercise
• Write a NAND only logic circuit for the exclusive OR function (XOR)
XOR(A,B) = A’B + AB’
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Rev. 4.1 (2006-07) by Enrico Nardelli 53A1 -
Solution (1)
• Truth table initial circuit
A B XOR
0 0 0
0 1 1
1 0 1
1 1 0
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Rev. 4.1 (2006-07) by Enrico Nardelli 54A1 -
Solution (2): equivalence transform.
A’BAB’
A’BAB’
A’BAB’
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Rev. 4.1 (2006-07) by Enrico Nardelli 55A1 -
Exercise
• Write a NOR only logic circuit for
F = (A+D)(C+D)E
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Rev. 4.1 (2006-07) by Enrico Nardelli 56A1 -
Solution
• Direct realization
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Rev. 4.1 (2006-07) by Enrico Nardelli 57A1 -
SOP and POS rapresentations
• It is useful to specify boolean function in a particular form
• sum of products (SOP) rapresentation it is an OR of AND combinations of its inputs F1=A’B + BC it is a SOP rapresentation F2= A’B + (BC)’ it is not a SOP rapresentation
• product of sums (POS) rapresentation it is an AND of OR combiations of its inputs F1=A’(B + C’)(B+A) it is a POS rapresentation F2=A’B + BC it is not a POS rapresentation
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Rev. 4.1 (2006-07) by Enrico Nardelli 58A1 -
Exercise
• Express Z=(A(B+C(A’+B’)))’ as sum of products
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Rev. 4.1 (2006-07) by Enrico Nardelli 59A1 -
Solution
Z=(A(B+C(A’+B’)))’= A’ + (B+C(A’+B’))’= A’ + B’(C(A’+B’))’= A’ + B’(C’+(A’+B’)’)= A’ + B’(C’+AB)= A’ + B’C’ + ABB’= A’ + B’C’ + A0= A’ + B’C’ + 0 = A’ + B’C’
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Rev. 4.1 (2006-07) by Enrico Nardelli 60A1 -
Canonical Form for boolean functions
• It is a “standard” way of expressing SOP or POS • It is:
a sum of minterms, for SOP a product of maxterms for POS
• A minterm is a product containing all variables, either in the positive form or in the negative form
• A maxterm is a sum containing all variables, either in the positive or in the negative form.
• Examples:F = (A’+B+C) (B’+C) is not in a POS canonical formM = AB + A’BC is not in a SOP canonical form
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Rev. 4.1 (2006-07) by Enrico Nardelli 61A1 -
Minterms
• Given that each variable may appear normal (e.g. X) or complemented (e.g. X’), there are 2n minterms for n variables
• Example: Two variables (X and Y) produce 4 combinations: XY X’Y XY’ X’Y’
• Thus there are 4 minterms of 2 variables
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Rev. 4.1 (2006-07) by Enrico Nardelli 62A1 -
Maxterms
• Given that each variable may appear normal (e.g. X) or complemented (e.g. X’), there are 2n maxterms for n variables
• Example: Two variables (X and Y) produce 4 combinations: X+Y X+Y’ X’+Y X’+Y’
• Thus there are 4 maxterms of 2 variables
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Rev. 4.1 (2006-07) by Enrico Nardelli 63A1 -
Maxterms and Minterms
• Examples: 2 variable minterms and maxterms
• The index above is important for describing which variables in the terms are true and which are complemented
Index Minterm Maxterm
0 X’Y’ X+Y
1 X’Y X+Y’
2 XY’ X’+Y
3 XY X’+Y’
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Rev. 4.1 (2006-07) by Enrico Nardelli 64A1 -
(Number)r = j = - m
jj
i
i = 0i rArA
(Integer Portion) + (Fraction Portion)
i = n - 1 j = - 1
• Positive radix, positional number systems• A number with radix r is represented by a
string of digits: An - 1An - 2 … A1A0 . A- 1 A- 2 … A- m 1 A- m
in which 0 Ai < r and . is the radix point.
• The string of digits represents the power series:
Number Systems – Representation
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Rev. 4.1 (2006-07) by Enrico Nardelli 65A1 -
General Decimal Binary
Radix (Base)
r 10 2
Digits 0 => r - 1 0 => 9 0 => 1
0123
4 5
-1-2-3-4-5
r0
r1
r2
r3
r4
r5
r -1
r -2
r -3
r -4
r -5
110
1001000
10,000100,000
0.10.01
0.0010.0001
0.00001
1248
16320.5
0.250.1250.0625
0.03125
Number Systems – Examples
powers of
radix
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Rev. 4.1 (2006-07) by Enrico Nardelli 66A1 -
Standard Order
• Minterms and Maxterms are designated with subscript• The subscript is a numer, corresponding to a binary pattern• The bits in the pattern represent the complemented or
normal state of each variable listed in a standard order• All the variables will be present in a minterm or maxterm
and will be listed in the same order (usually alphabetically)• Example: For variables A, B, C:
Maxterms: (A + B + C’), (A + B + C) Terms: (B + A + C), AC’B, and (C + B + A) are NOT in
standard order Minterms: AB’C, ABC, AB’C’ Terms: (A+C), B’C, and (A+B’) do not contain all
variables
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Rev. 4.1 (2006-07) by Enrico Nardelli 67A1 -
Purpose of the Index
• The index for the minterm or maxterm, expressed as a binary number, is used to determine whether the variable is shown in the true form or complemented form.
• For Minterms: “1” means the variable is “Not Complemented” and “0” means the variable is “Complemented”
• For Maxterms: “0” means the variable is “Not Complemented” and “1” means the variable is “Complemented”
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Rev. 4.1 (2006-07) by Enrico Nardelli 68A1 -
X Y Z Minterm
Symbol m0 m1
m2
m3
m4
m5
m6
m7
0 0 0 X’Y’Z’ m0 1 0 0 0 0 0 0 0
0 0 1 X’Y’Z m1 0 1 0 0 0 0 0 0
0 1 0 X’YZ’ m2 0 0 1 0 0 0 0 0
0 1 1 X’YZ m3 0 0 0 1 0 0 0 0
1 0 0 XY’Z’ m4 0 0 0 0 1 0 0 0
1 0 1 XY’Z m5 0 0 0 0 0 1 0 0
1 1 0 XYZ’ m6 0 0 0 0 0 0 1 0
1 1 1 XYZ m7 0 0 0 0 0 0 0 1
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Rev. 4.1 (2006-07) by Enrico Nardelli 69A1 -
X Y Z Maxterm
Symbol M0 M1 M2 M3 M4 M5 M6 M7
0 0 0 X+Y+Z M0 0 1 1 1 1 1 1 1
0 0 1 X+Y+Z’
M1 1 0 1 1 1 1 1 1
0 1 0 X+Y’+Z
M2 1 1 0 1 1 1 1 1
0 1 1 X+Y’+Z’
M3 1 1 1 0 1 1 1 1
1 0 0 X’+Y+Z
M4 1 1 1 1 0 1 1 1
1 0 1 X’+Y+Z’
M5 1 1 1 1 1 0 1 1
1 1 0 X’+Y’+Z
M6 1 1 1 1 1 1 0 1
1 1 1 X’+Y’+Z’
M7 1 1 1 1 1 1 1 0
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Rev. 4.1 (2006-07) by Enrico Nardelli 70A1 -
Minterm and Maxterm Relationship
• DeMorgan's Theorem:
• Two-variable example:
• Thus M2 is the complement of m2 and vice-versa.
• Since DeMorgan's Theorem holds for n variables, the above holds for terms of n variables
• giving:
• Thus Mi is the complement of mi.
yx y· x yxyx
y x M2 yx· m2
i mM i ii Mm
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Rev. 4.1 (2006-07) by Enrico Nardelli 71A1 -
Boolean function implementation
• Any function can be implemented as the OR of the AND combinations of its inputs canonical SOP
• Start from the truth table For each 1 in the output Write its inputs in AND Write these in OR
• M=A’BC+AB’C+ABC’+ABC = m3+m5+m6+m7
A B C M
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 1
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Rev. 4.1 (2006-07) by Enrico Nardelli 72A1 -
Equivalent Logic Circuit
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Rev. 4.1 (2006-07) by Enrico Nardelli 73A1 -
Boolean function implem. (2)
• Any function can be implemented as the AND of the OR combinations of its inputs canonical POS
• Start from the truth table For each 0 in the output Write its inputs in AND Write these negated in AND Obtain F = Z0’ . Z1’ . Z2’ ... Finally, apply De Morgan to F It is an AND combination of maxterms
A B C F
0 0 0 0
0 0 1 0
0 1 0 1
0 1 1 1
1 0 0 0
1 0 1 0
1 1 0 1
1 1 1 0
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Rev. 4.1 (2006-07) by Enrico Nardelli 74A1 -
Boolean function implem. (3)
• De Morgan (general): (ABC)’=A’+B’+C’
• F=(A’B’C’)’.(A’B’C)’.(AB’C’)’.(AB’C)’.(ABC)’=(A’’+B’’+C’’).(A’’+B’’+C’).(A’+B’’+C’’).
.(A’+B’’+C’).(A’+B’+C’)=(A+B+C).(A+B+C’).(A’+B+C).
.(A’+B+C’).(A’+B’+C’) =M0·M1·M4·M5·M7
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Rev. 4.1 (2006-07) by Enrico Nardelli 75A1 -
Boolean function implem. (4)
• Alternative procedure for POS form (use only if you know what you are doing!) Complement the table by substituting
everywhere a 0 with a 1 and a 1 with a 0 Write a SOP form for the complemented table Complement the formula by substituting
everywhere and AND with an OR and an OR with an AND
Why does it work ???
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Rev. 4.1 (2006-07) by Enrico Nardelli 76A1 -
Example: canonical SOP
X Y Z F
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 0
1 1 0 1
1 1 1 1
m1
m3
m6
m7
0 0 0 0
1 0 0 0
0 0 0 0
0 1 0 0
0 0 0 0
0 0 0 0
0 0 1 0
0 0 0 1
F = m1 + m3+ m6 + m7
= X’Y’Z + X’YZ + XYZ’ +XYZ
canonical SOP
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Rev. 4.1 (2006-07) by Enrico Nardelli 77A1 -
Example: canonical POS
X Y Z F
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 0
1 1 0 1
1 1 1 1
M0
M2
M4
M5
0 1 1 1
1 1 1 1
1 0 1 1
1 1 1 1
1 1 0 1
1 1 1 0
1 1 1 1
1 1 1 1
F = M0 · M2 · M4 · M5
= (X+Y+Z) · (X+Y’+Z) (X’+Y+Z) · (X’+Y+Z’)
canonical POS
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Rev. 4.1 (2006-07) by Enrico Nardelli 78A1 -
F = X’YZ + X’YZ’ + XZ = X’Y(Z + Z’) + XZ = X’Y 1 + XZ = X’Y + XZ
… algebraic manipulation…
…a simpler SOP representation leads to a simpler circuit…
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Rev. 4.1 (2006-07) by Enrico Nardelli 79A1 -
Circuit Optimization
• Goal: To obtain the simplest implementation for a given function
• Optimization is a more formal approach to simplification that is performed using a specific procedure or algorithm
• Optimization requires a cost criterion to measure the simplicity of a circuit
• Optimization for two-level (SOP and POS) circuits: minimal SOP
• minimum number of pruduct terms• minimum number of literals for each product term
similarly for POS
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Rev. 4.1 (2006-07) by Enrico Nardelli 80A1 -
Minimization procedures
• Karnaugh’s maps (by hand)• Used to minimize boolean functions of up
to 4 input variables• For more variables use the method of
Quine-McKluskey (programmable)
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Rev. 4.1 (2006-07) by Enrico Nardelli 81A1 -
Karnaugh’s Maps (KM)
• Grid-like representation for boolean functions• Each cell represents a minterm• The K-map can be viewed as a reorganized version
of the truth table• Minterms with just one variable different occupies
adjacent cells• Alternative algebraic expressions for the same
function are derived by recognizing patterns of squares
• Consider only 1s in the representation (focusing on a SOP representation)
• IDEA: if 2 adjacent cells have a 1 the function can be simplified
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Rev. 4.1 (2006-07) by Enrico Nardelli 82A1 -
A KM for 2-variable functions
• The generic KM
• Function F = XY Function F = X + Y
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Rev. 4.1 (2006-07) by Enrico Nardelli 83A1 -
A KM for 3-variable functions
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Rev. 4.1 (2006-07) by Enrico Nardelli 84A1 -
example
X
Y
Z
0
1
00 01 11 10XYZ X Y Z F=
Z
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 0
1 1 1 1
1
1 1
1
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Rev. 4.1 (2006-07) by Enrico Nardelli 85A1 -
X
Y
Z
0
1
00 01 11 10XYZ X Y Z F=
Z’
0 0 0 1
0 0 1 0
0 1 0 1
0 1 1 0
1 0 0 1
1 0 1 0
1 1 0 1
1 1 1 0
1
11
1
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Rev. 4.1 (2006-07) by Enrico Nardelli 86A1 -
X
Y
Z
0
1
00 01 11 10XYZ X Y Z F=Y
Z
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 1
1
1
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Rev. 4.1 (2006-07) by Enrico Nardelli 87A1 -
An example• F = X’YZ + X’YZ’ + XY’Z + XY’Z’
Idea: • we want to cover all 1s by using rectangles of adjacent cells• each rectangle of 2k adjacent cells (for some k) represents a literal product term• bigger rectangles correspond to simpler product terms
X Y Z F
0 0 0 0
0 0 1 0
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 0
1 1 1 0
= X’Y(Z+Z’) + XY’(Z+Z’)= X’Y + XY’
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Rev. 4.1 (2006-07) by Enrico Nardelli 88A1 -
Combining Squares
• By combining squares, we reduce number of literals in a product term
• On a 3-variable K-Map: One square represents a minterm with three
variables Two adjacent squares represent a product
term with two variables Four “adjacent” terms represent a product
term with one variable Eight “adjacent” terms is the function of all
ones (no variables) = 1.
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Rev. 4.1 (2006-07) by Enrico Nardelli 89A1 -
Circular adjacencies for 3 variables
labels are useful to get the expressioncorresponding to a given rectangle
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Rev. 4.1 (2006-07) by Enrico Nardelli 90A1 -
Three-Variable Maps
• Example Shapes of 2-cell Rectangles:y
0 1 3 2
5 64 7x
z
X’Y’
YZ
X’Z’
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Rev. 4.1 (2006-07) by Enrico Nardelli 91A1 -
Three-Variable Maps
• Example Shapes of 4-cell Rectangles:y
0 1 3 2
5 64 7x
z
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Rev. 4.1 (2006-07) by Enrico Nardelli 92A1 -
Four 1 adjacents
F = X’Y’Z’ + XY’Z’ + X’YZ’ + XYZ’ = Y’Z’(X’+X) + YZ’ (X’+X) = Y’Z’ + YZ’ = Z’(Y’+Y) = Z’
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Rev. 4.1 (2006-07) by Enrico Nardelli 93A1 -
Exercise (1)
• Which is the minimal SOP expression for function F1=m3+m4+m6+m7?
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Rev. 4.1 (2006-07) by Enrico Nardelli 94A1 -
Solution
• F1 = YZ + XZ’
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Rev. 4.1 (2006-07) by Enrico Nardelli 95A1 -
Exercise (2)
• Which is the minimal SOP expression for function F2=m0+m2+m4+m5+m6?
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Rev. 4.1 (2006-07) by Enrico Nardelli 96A1 -
Solution
• F2 = Z’ + XY’
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Rev. 4.1 (2006-07) by Enrico Nardelli 97A1 -
k-cube of 1s
• Is a set of 2k adjacent cells• 0-cube, 1 cell, a minterm• 1-cube, 2 adjacent cells• 2-cube, 4 adjacent cells• 3-cube, 8 adjacent cells• ….
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Rev. 4.1 (2006-07) by Enrico Nardelli 98A1 -
Prime implicants
• F = P1 + P2 + P3 + ...
• The term corresponding to a k-cube is called an implicant Infact, it is a term Pn which implies the function F,
i.e. if Pn is true then F is true
• An implicant is said to be a prime implicant for F if it does not imply any other implicant of F
• A prime implicant can be chosen by selecting a maximal k-cube, i.e. a k-cube in the KM which is not contained in any larger h-cube (h>k)
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Rev. 4.1 (2006-07) by Enrico Nardelli 99A1 -
Minimal representation
F = P1 + P2 + P3 + ...
has a minimal SOP representation if:1. Each Pi is a prime implicant
2. There is a minimum number of them
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Rev. 4.1 (2006-07) by Enrico Nardelli 100A1 -
Minimality procedure
1. Find maximal k-cubes (prime implicants)2. If a 1 is covered by only one maximal k-
cube this has to be chosen (essential prime implicants)
3. Select a minimum number of the remaining k-cube so to cover all 1s not covered by essential prime implicants
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Rev. 4.1 (2006-07) by Enrico Nardelli 101A1 -
Exercise (3)
• Find the minimal SOP expression for F=m1+m3+m4+m5+m6
X
Y
Z
0
1
00 01 11 10XYZ
1 1
1 11
F=X’Z+XZ’+XY’
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Rev. 4.1 (2006-07) by Enrico Nardelli 102A1 -
Exercise (3)
• Find the minimal SOP expression for F=m1+m2+m3+m5+m7
X
Y
Z
0
1
00 01 11 10XYZ
1 1
1
1
1
F=Z+X’Y
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Rev. 4.1 (2006-07) by Enrico Nardelli 103A1 -
A KM for 4-variable functions
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Rev. 4.1 (2006-07) by Enrico Nardelli 104A1 -
Circular adjacenciesfor 4 variables
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Rev. 4.1 (2006-07) by Enrico Nardelli 105A1 -
Four Variable Terms
Four variable maps can have rectangles corresponding to:
• A single 1 = 4 variables, (i.e. Minterm)• Two 1s = 3 variables,• Four 1s = 2 variables• Eight 1s = 1 variable,• Sixteen 1s = zero variables (i.e. Constant "1")
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Rev. 4.1 (2006-07) by Enrico Nardelli 106A1 -
Four-Variable Maps
• Example Shapes of Rectangles:
8 9 1011
12 13 1415
0 1 3 2
5 64 7
X
Y
Z
W
XZ
X’Z’YW’
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Rev. 4.1 (2006-07) by Enrico Nardelli 107A1 -
Four-Variable Maps
• Example Shapes of Rectangles:
X
Y
Z
8 9 1011
12 13 1415
0 1 3 2
5 64 7
W
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Rev. 4.1 (2006-07) by Enrico Nardelli 108A1 -
Simplify F(A, B, C, D) given on the K-map. Example:
1
1
1
1 1
1
1
B
D
A
C
1
1
1
1
1
1 1
1
1
B
D
A
C
1
1
Essential
Minterms covered by essential prime implicants
Selected
minimal SOP: A’B+A’CD+AC’D+B’C’D’
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Rev. 4.1 (2006-07) by Enrico Nardelli 109A1 -
One more example
DB
CB
1 1
1 1
1 1
B
D
A
1 1
1 1
1
ESSENTIAL Prime Implicants
C
BD
CD
BD
Minterms covered by single prime implicant
DB
1 1
1 1
1 1
B
C
D
A
1 1
1 1
1
AD
BA
CD
BA
minimal SOP: BD+B’D’+CD+AB’
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Rev. 4.1 (2006-07) by Enrico Nardelli 110A1 -
Five Variable or More K-Maps• For five variable problems, we use two adjacent K-maps. It becomes
harder to visualize adjacent minterms for selecting k-cubes.
• You can extend the problem to six variables by using four K-Maps.
X
Y
Z
W
V = 0
X
Z
W
V = 1Y
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Rev. 4.1 (2006-07) by Enrico Nardelli 111A1 -
The KM method for POS
• Which is the POS expression of function F represented by this KM?
• Use the same method used for build POS canonical form from truth tables Find the minimal SOP for F’ apply DeMorgan
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Rev. 4.1 (2006-07) by Enrico Nardelli 112A1 -
Example
F = (CD+BD’+AB)’ = (CD)’ . (BD’)’ . (AB)’ = (C’+D’) . (B’+D’’) . (A’ + B’) = (C’+D’) . (B’+D) . (A’ + B’)
B
D
A
C
0 0
0
00
0
0
0 0
1 11
1
1 1 1
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Rev. 4.1 (2006-07) by Enrico Nardelli 113A1 -
Don't Cares in K-Maps
• Sometimes a function table or map contains entries for which it is known: the input values for the minterm will never occur, or the output value for the minterm is not used
• In these cases, the output value need not be defined• Instead, the output value is defined as a “don't care”• By placing “don't cares” ( an “x” entry) in the
function table or map, the cost of the logic circuit may be lowered.
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Rev. 4.1 (2006-07) by Enrico Nardelli 114A1 -
Example 1
• A logic function having the binary codes for the BCD digits as its inputs.
• Only the codes for 0 through 9 are used.
• The six codes, 1010 through 1111 never occur, so the output values for these codes are “x” to represent “don’t cares.”
A B C D f(A,B,C,D)
0 0 0 0 f(0,0,0,0)
0 0 0 1 f(0,0,0,1)
0 0 1 0 f(0,0,1,0)
0 0 1 1 f(0,0,1,1)
0 1 0 0 f(0,1,0,0)
0 1 0 1 f(0,1,0,1)
0 1 1 0 f(0,1,1,0)
0 1 1 1 f(0,1,1,1)
1 0 0 0 f(1,0,0,0)
1 0 0 1 f(1,0,0,1)
1 0 1 0 x1 0 1 1 x1 1 0 0 x1 1 0 1 x1 1 1 0 x1 1 1 1 x
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Rev. 4.1 (2006-07) by Enrico Nardelli 115A1 -
Example 2
• Consider the following function f(A,B) f(A,B)=1 if A=B=0 f(A,B)=0 if A B
A B f
0 0 1
0 1 0
1 0 0
1 1 x
A B f
0 0 1
0 1 0
1 0 0
1 1 0
A B f
0 0 1
0 1 0
1 0 0
1 1 1
Truth table on the left may be substitued by anyone on the right
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Rev. 4.1 (2006-07) by Enrico Nardelli 116A1 -
Example 3
• Consider the following function f(A,B) f(A,B)=1 if A=B=0 f(A,B)=0 if A B f(A,B) is used just as input for another function
g(f,A,B)=(A’+B) f(A,B)
A B f
0 0 1
0 1 0
1 0 x
1 1 x
Notice that:for A=1 and B=0g(f,A,B) = (1’+0) f(A,B) = 0
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Rev. 4.1 (2006-07) by Enrico Nardelli 117A1 -
Example
X
Y
Z
W
X
X
X1 1
1
1
1
f(W,X,Y,Z)= YZ + X’W’
Simplify the choice, since each X can be
considered
a 0 or a 1
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Rev. 4.1 (2006-07) by Enrico Nardelli 118A1 -
X
Y
Z
W
X
X
X1 1
1
1
1
f(W,X,Y,Z)= YZ + ZW’
Example
a different choise
is possible