acer extensa 4220 4620 - wistron biwa - rev -2sec

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Title

Size Document Number Rev

Date: Sheet of

Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.

Biwa -2BLOCK DIAGRAM

A3

1 42Thursday, March 01, 2007

55.4H001.S03G

Title


Date: Sheet of



A3


55.4H001.S03G

Title


Date: Sheet of



A3


55.4H001.S03G

31WPC8763LWinbond

INT.KB

Touch Pad32 32

-2-0226

SYSTEM DC/DC

X4 DMI

HOST BUSDDR2

CLK GEN.

[email protected]

400M Byte/s

533/667 MHz

3

4, 5

6,7,8,9,10,11

12,13

16,17,18,19

Crestline

ICH8M

Mobile CPU2.0G : B0, QLYV2.2G : B0, QLFS

Biwa Block Diagram

CodecALC268

Line In

1D8V_S3

Merom 479 2G/2.33G

INPUTS

SYSTEM DC/DCISL6236

5V_S5(5A)

37

OUTPUTS

ICS 9LPR502(RTM875T-605)

G2997F6UDDR_VREF_S0(1.2A)

39

6 PCIe ports

P

A

T

A

USB4 PORTHDD

MINI USBBlue-tooth

2221

CDROM

LPC BUS

3D3V_S5(5A)

DDR2533/667 MHz12,13

533/667MHz

AGTL+ CPU I/F

LVDS, CRT I/FINTEGRATED GRAHPICS

DDR Memory I/F

ETHERNET (10/100/1000MbE)10 USB 2.0/1.1 ports

High Definition Audio

1 PATA 66/100

ACPI 1.1

Matrix Storage Technology(DO)

PCI/PCI BRIDGE

21

C-Link0

DEBUGCONN.LPC

33

1D8V_S3(10A)

38

DCBATOUT 1D05V_S0(13A)INPUTS OUTPUTS

Project code: 91.4H001.001PCB P/N : 55.4H001.XXXREVISION : 06237-2(GCE, Hannstar)

3 SATA

LPC I/F

TOPVCCSS

GNDBOTTOM

PCB STACKUP

MDC Card

APA2031OP AMP

AZALIA

MODEM

G1412

INT.SPKR

RJ11

RGB CRT

22

LVDS

CRT

14

15

14" WXGA LCD

71.0ICH8.A0U, B1, QN23

71.CREST.M02, B0, QN12

MAX8717

S

A

T

A

G79220

533/667MHz

DDR_VREF_S3

G9711D5V_S0(4A)

39

PCI BUS

MS/MS Pro/xD/MMC/SD/SDIO

BCM5787MKMLG 24

27

TI 7412

1394CONN

25,26 26

6 in 1

1394

23

LANGiga LAN 24TXFM RJ45

CardReader

APL5913 39

40

36

CCD

VCC_CORE_S00~1.3V 47A

OUTPUTS

CPU DC/DCINPUTSDCBATOUT

MAXIM CHARGEROUTPUTSINPUTSCHG_PWR

DCBATOUT UP+5V5V 100mA

19V 4.0A

ISL6255

MAX8770

Active Managemnet Technology(DO)

Serial Peripheral I/F

15TVOUT

22

1D8V_S3

G909 343D3V_AUX_S5(100mA)

5V_AUX_S5

INT.MIC

29

14

24

CardBus 27 27TPS2211PCMCIASLOT

SupportTypeII

PCMCIA I/F

PWR SW

30

30

30

30

30

Mic In

Line Out(No-SPDIF)

30

SPI I/FW25X80-VSSI-G

33BIOS

FIR32

SVIDEO/COMP

Finger PT 22

1D8V_S3 1D25V_S0(1.5A)

DCBATOUT

KBC

a/b/g/nMini CardPCIex1

28KedronC Link1

28 28New card PWR SWP2231NFC

5V_AUX_S5

Super I/OWinbondPC87381

33

[email protected] - FOR FREE

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Title


Date: Sheet of


Biwa -2Reference

A3


55.4H001.S03G

Title


Date: Sheet of


Biwa -2Reference

A3


55.4H001.S03G

Title


Date: Sheet of


Biwa -2Reference

A3


55.4H001.S03G

1 = Low Power mode0 = Normal mode

Crestline Strapping Signals andConfiguration page 7

ReservedCFG[8:6]Reserved This signal should not be pulled high.

INTVRMEN

LAN100_SLP

GPIO33/HDA_DOCK_EN#

SATALED#

SPKR

TP3

CFG9

00 = Reserved

(Default)

(Default)

edge of the Crestline GMCH PWORK in signal.

CFG16

10 = All Z mode enabled

0 = No SDVO Card present_DATA

CFG[15:14]

SDVO Present

CFG19

CFG20

straps

CFG[18:17]

11 = Normal Operation

1 = Dynamic ODT Enabled

All strap signals are sampled with respect to the leading

0 = Dynamic ODT Disabled

1= SDVO Card presentSDVOCRTL

SDVO/PCIEConcurrent

XOR/ALL Z test

FSB Dynamic ODTReserved

01 = XOR mode enabled

DMI Lane Reversal

NOTE:

(Default)

PCIE config2 bit0,Rising Edge of PWROK.

GNT2#Sets bit0 of RPC.PC(Config Registers:Offset 224h)

PCI Express GraphicsLane ReversalTop-Block

Swap Override.Rising Edge of PWROK.

GNT0#/SPI_CS1#

0 = Reverse Lanes,15->0,14->1 ect..

Boot BIOS Destination Selection.Rising Edge of PWROK.

ESI compatible mode is for server platforms only.This signal should not be pulled low for desttopand mobile.

HDA_SDOUT

HDA_SYNC

GNT3#

Signal

Sampled low:Top-Block Swap mode(inverts A16 forall cycles targeting FWH BIOS space).Note: Software will not be able to clear the Top-Swap bit until the system is rebooted without GNT3# being pulled down.

This signal has a weak internal pull-up.

XOR Chain Entrance/PCIE Port Config1 bit1,Rising Edge of PWROK

1= Normal operation(Default):Lane Numbered in order

Allows entrance to XOR Chain testing when TP3pulled low.When TP3 not pulled low at rising edgeof PWROK,sets bit1 of RPC.PC(Config Registers:offset 224h)

PCIE config1 bit0,Rising Edge of PWROK.

GPIO20

Usage/When Sampled

ESI Strap (Server Only)Rising Edge of PWROK

Comment

CFG[11:10] Reserved

CFG[13:12]

Reserved

0 = Normal operation (Default):lane Numbered in order

2007/02/161.Page 33: Add SIO 87381 for FIR Issue.2.Page 31, change KBC from 8768L to 8763L.3.Page 33, del U33(LPC golden Finger).4.Page 24/32, change ERC1/ERC2 due to 77.61021.02L is Obsoleted Part !5.Page 37, del TC22/TC19.6.Page 38, del TC1/TC4.===========================================================2007/02/091.Page 14:Modify "Q14" "BTBTN1" "WLBTN1" symbol.2.Page 36, 37, 38: Replace 0ohm with 0ohm pad.===========================================================2007/02/08a1.Page 14:Modify R428 toFRONT_PWRLED#_1and RN58 pin7 toSTBY_LED#_2due to LED brightness issue.2.Page 38:Replace "TC26" with "77.C1561.01L".===========================================================2007/02/081.Page 10:Replace "R244" with "0603-PAD".2.Page 36:Replace open power gap with close power gap.3.Page 38:Add capacitor "TC26" for acoustic noise===========================================================

1 =Reverse Lane,4->0,3->1 ect...0 = Only SDVO or PCIE x1 is operational (Default)1 =SDVO and PCIE x1 are operating simultaneously via the PEG port

ICH8-M EDS 21762 2.0V1

DA[2:0],DIOR#,DIOW#,DD[15:0],

DDACK#, IORDY,DREQ, approximately 33 ohm

DCS3#,DCS1#,

page 17

Integrated VccLAN1_05and VccCL1_05 VRMEnable/Disable.Always sampled.

Enables integrated VccLAN1_05 and VccCL1_05 VRM'swhen sampled high

Signal has weak internal pull-up. Sets bit 27 of MPC.LR(Device 28:Function 0:Offset D8)

CFG[2:0]

CFG[4:3]CFG5

Pin Name

011 = FSB667FSB Frequency Select

0 = DMI x2

others = ReservedReserved

(Default)1 = DMI x4

Strap Description

DMI x2 Select

Low Power PCI Express

Configuration

Sets bit2 of RPC.PC2(Config Registers:Offset 0224h)

This signal has a weak internal pull-down.

GNT1#/GPIO51

History

Integrated VccSus1_05,VccSus1_5 and VccCL1_5VRM Enable/Disable.Always sampled.

Enables integrated VccSus1_05, VccSus1_5 andVccCL1_5 VRM's when sampled high

Flash Descriptor Security Override StrapRising Edge of PWROK

PCI Express Lane Reversal. Rising Edgeof PWROK.No Reboot.Rising Edge of PWROK.

XOR Chain Entrance.Rising Edge of PWROK.

This signal should not be pull low unless using XOR Chain testing.

If sampled high, the system is strapped to the "No Reboot" mode(ICH8 will disable the TCO Timersystem reboot feature). The status is readable via the NO REBOOT bit.

ICH8M Integrated Pull-upand Pull-down Resistors

ICH8M IDE Integrated SeriesTermination Resistors

IDEIRQ

ICH8M Functional Strap Definitions

Controllable via Boot BIOS Destination bit(Config Registers:Offset 3410h:bit 11:10).GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC.

SIGNAL Resistor Type/ValueHDA_BIT_CLKHDA_RST#HDA_SDIN[3:0]HDA_SDOUTHDA_SYNCGNT[3:0]GPIO[20]LDA[3:0]#/FHW[3:0]#

LDRQ[0]

PME#PWRBTN#SATALED#

LAN_RXD[2:0]

LDRQ[1]/GPIO23

TP[3]SPKR

SPI_CLKSPI_CS1#

USB[9:0][P,N]CL_RST#

SPI_MOSISPI_MISOTACH_[3:0]

NONE

PULL-DOWN 20K

PULL-DOWN 15KPULL-UP 13K

PULL-UP 20K

PULL-UP 20KPULL-UP 10KPULL-UP 20KPULL-UP 20KPULL-UP 20KPULL-UP 20KPULL-UP 15KPULL-UP 20KPULL-UP 20KPULL-UP 20KPULL-UP 20KPULL-UP 20K (?)

PULL-UP 20K

PULL-DOWN 20KPULL-DOWN 20KPULL-DOWN 20K

PULL-DOWN 20K

PULL-DOWN 20K (?)

page 16

PCI Routing

This signal has a weak internal pull-up. Sampled low:the Flash Descriptor Security will beoverridden. If high,the security measures will be in effect.This should only be used in manufacturingenvironments.

Reserved

Crestline EDS 20954 1.0

(Default)

LAN BCM5787MBT

USB2

Finger

USB1

NC

Pair

4USB4

USB

USB3

5

0

23

1

Device

MINIC1

6789

CCD

USB Table

0 0AD22TI7412INT REQ

G:CARDBUSB:1394F:Flash MediaG:SD Host

GNTIDSEL

LANE2LANE1

MiniCard WLAN

PCIE Routing

NEW

010 = FSB800001 = FSB533

LANE3 NewCard WLAN

ICH8-M EDS 21762 2.0V1


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3 3

2 2

1 1

CLK_PCIE_ICH_1#CLK_PCIE_ICH_1

CLK_MCH_BCLK_1

CLK_CPU_BCLK_1#

CLK_MCH_BCLK_1#

CLK_CPU_BCLK_1

3D3V_48MPWR_S0

CPU_SEL2_R

CLK_PCIE_SATA_1#

CLK_PCIE_MINI_12CLK_PCIE_MINI_12#

3D3V_CLKGEN_S03D3V_48MPWR_S0

GEN_XTAL_OUT_R

GEN_XTAL_OUT

PCLKCLK1

CLK_PCIE_SATA_1

3D3V_CLKGEN_S0

CPU_SEL2_R

PCLKCLK3

3D3V_CLKPLL_S0

GEN_XTAL_IN

PCLKCLK2

PCLKCLK5

PCLKCLK4

PCLKCLK5

PCLKCLK2

3D3V_CLKPLL_S0

CLK_MCH_3GPLL_1#CLK_MCH_3GPLL_1

CLK_PCIE_LAN#_RCLK_PCIE_LAN_R

DREFSSCLK#_1DREFSSCLK_1

DREFCLK_1DREFCLK#_1

CLK48

PCLKCLK4

PCLKCLK3

CLK48

CLK_PCIE_NEW_1CLK_PCIE_NEW_1#

PCLKCLK0

3D3V_S0

3D3V_S0

3D3V_S0

3D3V_S0

3D3V_S0

CPU_SEL14,7

CPU_SEL24,7

PM_STPCPU# 17

CLK48_ICH17

CLK_CPU_BCLK 4CLK_CPU_BCLK# 4

CLK_MCH_BCLK 6CLK_MCH_BCLK# 6

CLK_PCIE_SATA 16CLK_PCIE_SATA# 16

CLK_PCIE_ICH 17CLK_PCIE_ICH# 17

CLK_PCIE_MINI1 28CLK_PCIE_MINI1# 28

CLK_ICH1417

PM_STPPCI# 17

SMBD_ICH 12,19SMBC_ICH 12,19

CLK_PWRGD 17

PCLK_ICH17

CPU_SEL04,7

PCLK_SIO33

PCLK_KBC31

CLK_MCH_3GPLL 7CLK_MCH_3GPLL# 7

CLK_PCIE_LAN# 23CLK_PCIE_LAN 23

DREFSSCLK# 7DREFSSCLK 7

DREFCLK 7DREFCLK# 7

PCLK_PCM26

CLK48_CARDBUS26

CLK_PCIE_NEW 28CLK_PCIE_NEW# 28

CLK14_SIO33

Title


Date: Sheet of


Clock Generator

3 42Thursday, March 01, 2007Biwa -2

55.4H001.S03G

Title


Date: Sheet of


Clock Generator


55.4H001.S03G

Title


Date: Sheet of


Clock Generator


55.4H001.S03G

SEL1FSB

SEL0FSA

133M100M

166M800M

0 1X0

1 X667M

200M0 1

CPUSEL2FSC FSB

0 10

101

PCI0/CR#_A

PIN NAME DESCRIPTIONByte 5, bit 70 = PCI0 enabled (default)1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pairByte 5, bit 60 = CR#_A controls SRC0 pair (default),1= CR#_A controls SRC2 pairByte 5, bit 50 = PCI1 enabled (default)1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pairByte 5, bit 40 = CR#_B controls SRC1 pair (default)1= CR#_B controls SRC4 pair

PCI1/CR#_B0 = Overclocking of CPU and SRC Allowed1 = Overclocking of CPU and SRC NOT allowedPCI2/TME

0 = Pin17 as SRC-1, Pin18 as SRC-1#, Pin13 as DOT96, Pin14 as DOT96#1 = Pin17 as 27MHz, Pin 18 as 27MHz_SS, Pin13 as SRC-0, Pin14 as SRC-0#PCI4/27M_SEL0 =SRC8/SRC8#1 = ITP/ITP#PCI_F5/ITP_EN

PCI3/SRC-5_EN

CL=20pF0.2pF

PIN NAME DESCRIPTIONByte 5, bit 70 = PCI0 enabled (default)1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pairByte 5, bit 60 = CR#_A controls SRC0 pair (default),1= CR#_A controls SRC2 pairByte 5, bit 50 = PCI1 enabled (default)1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pairByte 5, bit 40 = CR#_B controls SRC1 pair (default)1= CR#_B controls SRC4 pair

PCI1/CR#_B0 = Overclocking of CPU and SRC Allowed1 = Overclocking of CPU and SRC NOT allowedPCI2/TME

0 =SRC8/SRC8#1 = ITP/ITP#PCI_F5/ITP_EN

PCI0/CR#_A

RTM875T-605 setting tableICS9LPR502HGLFT-GP setting table

0 = Pin29 as CPU_STOP# , pin 30 as PCI_STOP#.1 = Pins29,30 as SRC-5 differential pair.

PCI4/SRC5_EN 0 = Pin29 as CPU_STOP# , pin 30 as PCI_STOP#.1 = Pins29,30 as SRC-5 differential pair.

SA SIV Bug

-1 modify

-->-1 modify

-1 modify for ASF

-->-1 modify

-->

-->

-1 modify

-->-1 2/16 modify

1 2R377 Do Not Stuff

DYR377 Do Not Stuff

DY

1 2R345Do Not Stuff

DYR345Do Not Stuff

DY

12 R339Do Not StuffR339Do Not Stuff

TP57Do Not StuffTP57Do Not Stuff

TP69 Do Not StuffTP69 Do Not Stuff

12345 6

78910

RP6

SRN8K2J-2-GP-U

RP6

SRN8K2J-2-GP-U

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78910

RP3

SRN10KJ-L3-GP

RP3

SRN10KJ-L3-GP

1

2

R3303K24R2F-GP

R3303K24R2F-GP


12C519 SCD1U10V2KX-4GPC519 SCD1U10V2KX-4GP

1 2R347Do Not Stuff

DYR347Do Not Stuff

DY

1234 5

678

RN20

SRN8K2J-1-GP

RN20

SRN8K2J-1-GP


1

2

R15710R2J-2-GP

RTM

R15710R2J-2-GP

RTM


12R183 Do Not StuffR183 Do Not Stuff




DYR378 Do Not Stuff

DY


12345 6

78910

RP4

SRN8K2J-2-GP-U

RP4

SRN8K2J-2-GP-U

TP118Do Not Stuff

TP118Do Not Stuff

1

2

3

D28Do Not Stuff

DY

D28Do Not Stuff

DY

1

2

R3813K24R2F-GP

R3813K24R2F-GP



DYR376 Do Not Stuff

DY


1

2

3

D11BAS16-1-GP

D11BAS16-1-GP

12R186Do Not Stuff

DY

R186Do Not Stuff

DY


12

R344100KR2J-1-GPR344100KR2J-1-GP

12345 6

78910

RP5

SRN8K2J-2-GP-U

RP5

SRN8K2J-2-GP-U

1

2

R366100KR2F-L1-GP

R366100KR2F-L1-GP


1 2R184

22D6R2F-L1-GP

R184

22D6R2F-L1-GP

1

2

R3622K2R2J-2-GP

R3622K2R2J-2-GP

SMBCLKAJ26SMBDATAAD19LINKALERT#AG21SMLINK0AC17SMLINK1AE19

RI#AF17

SUS_STAT#/LPCPD#F4SYS_RESET#AD15

BMBUSY#/GPIO0AG12

SMBALERT#/GPIO11AG22

CLKRUN#AH11

WAKE#AE17SERIRQAF12THRM#AC13

VRMPWRGDAJ20

TACH1/GPIO1AJ8TACH2/GPIO6AJ9TACH3/GPIO7AH9

GPIO12AC19

GPIO18AH12GPIO20AE11

GPIO8AE16

TACH0/GPIO17AG8

SCLOCK/GPIO22AG10

TP7AJ22

STP_PCI#AE20STP_CPU#AG18

QRT_STATE0/GPIO27AH25QRT_STATE1/GPIO28AD16SATACLKREQ#/GPIO35AG13SLOAD/GPIO38AF9SDATAOUT0/GPIO39AJ11SDATAOUT1/GPIO48AD10

SPKRAD9

MCH_SYNC#AJ13

TP3AJ21

SATA0GP/GPIO21 AJ12SATA1GP/GPIO19 AJ10SATA2GP/GPIO36 AF11

GPIO37 AG11

CLK14 AG9CLK48 G5

SUSCLK D3

SLP_S3# AG23SLP_S4# AF21SLP_S5# AD18

S4_STATE#/GPIO26 AH27

PWROK AE23

DPRSLPVR/GPIO16 AJ14

BATLOW# AE21

PWRBTN# C2

LAN_RST# AH20

RSMRST# AG27

CK_PWRGD E1

CLPWROK E3

SLP_M# AJ25

CL_CLK0 F23CL_CLK1 AE18

CL_DATA0 F22

CL_VREF1 AH23

CL_DATA1 AF19

CL_VREF0 D24

CL_RST# AJ23

CLGPIO0/GPIO24 AJ27CLGPIO1/GPIO10 AJ24CLGPIO2/GPIO14 AF22CLGPIO3/GPIO9 AG19

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U49D

ICH8-M-1-GP-U 71.0ICH8.A0U

4 OF 6

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U49D

ICH8-M-1-GP-U 71.0ICH8.A0U


PERN1P27PERP1P26PETN1N29PETP1N28

PERN2M27

PERN3K27

PERN4H27

PERN5F27

PERN6/GLAN_RXND27

PERP2M26

PERP3K26

PERP4H26

PERP5F26

PERP6/GLAN_RXPD26

PETN2L29

PETN3J29

PETN4G29

PETN5E29

PETN6/GLAN_TXNC29

PETP2L28

PETP3J28

PETP4G28

PETP5E28

PETP6/GLAN_TXPC28

SPI_CLKC23SPI_CS0#B23SPI_CS1#E22

SPI_MOSID23SPI_MISOF21

OC0#AJ19OC1#/GPIO40AG16OC2#/GPIO41AG15OC3#/GPIO42AE15OC4#/GPIO43AF15OC5#/GPIO29AG17OC6#/GPIO30AD12OC7#/GPIO31AJ18OC8#AD14OC9#AH18

DMI0RXN V27

DMI1RXN Y27

DMI2RXN AB26

DMI3RXN AD27

DMI0RXP V26

DMI1RXP Y26

DMI2RXP AB25

DMI3RXP AD26

DMI0TXN U29

DMI1TXN W29

DMI2TXN AA29

DMI3TXN AC29

DMI0TXP U28

DMI1TXP W28

DMI2TXP AA28

DMI3TXP AC28

DMI_CLKN T26

DMI_IRCOMP Y24

USBP0N G3

USBP1N H5

USBP2N H2

USBP3N J3

USBP4N K5

USBP5N K2

USBP6N L3

USBP7N M5

USBP8N M2

USBP9N N3

USBP0P G2

USBP1P H4

USBP2P H1

USBP3P J2

USBP4P K4

USBP5P K1

USBP6P L2

USBP7P M4

USBP8P M1

USBP9P N2

USBRBIAS# F2USBRBIAS F3

DMI_CLKP T25

DMI_ZCOMP Y23

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U49B

ICH8-M-1-GP-U

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USB

U49B

ICH8-M-1-GP-U

1

2

R380453R2F-1-GPR380453R2F-1-GP


1 2R33410KR2J-3-GP

R33410KR2J-3-GP

1

2

R337453R2F-1-GPR337453R2F-1-GP

12345 6

78910

RP1

SRN10KJ-L3-GP

RP1

SRN10KJ-L3-GP

12345 6

78910

RP2

SRN10KJ-L3-GP

RP2

SRN10KJ-L3-GP

1 2R34810KR2J-3-GP

R34810KR2J-3-GP

1

2

R17524D9R2F-L-GPR17524D9R2F-L-GP

1

2

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5

3

1

S

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-

4

G

P



1

2

R158100KR2J-1-GPR158100KR2J-1-GP

1 2R340 100KR2J-1-GPR340 100KR2J-1-GP

1 2 R19356R2J-4-GP

R19356R2J-4-GP


1 2R331 Do Not StuffDYR331 Do Not StuffDY


1 2R363 0R2J-2-GPR363 0R2J-2-GP

1

2

R422Do Not Stuff

ICS

R422Do Not Stuff

ICS


1 2R42110KR2J-3-GP

R42110KR2J-3-GP

AD0D20AD1E19AD2D19AD3A20AD4D17AD5A21AD6A19AD7C19

PIRQA#F9PIRQB#B5PIRQC#C5PIRQD#A10

REQ0# A4GNT0# D7

REQ1#/GPIO50 E18

REQ2#/GPIO52 B19

REQ3#/GPIO54 A11

GNT1#/GPIO51 C18

GNT2#/GPIO53 F18GNT3#/GPIO55 C10

C/BE0# C17C/BE1# E15C/BE2# F16C/BE3# E17

IRDY# C8PAR D9

PCIRST# G6DEVSEL# D16

PERR# A7

PLOCK# B7SERR# F10STOP# C16TRDY# C9

FRAME# A17

PLTRST# AG24PCICLK B10

PME# G7

PIRQE#/GPIO2 F8PIRQF#/GPIO3 G11PIRQG#/GPIO4 F12PIRQH#/GPIO5 B3

AD10A12AD11E16AD12A14AD13G16AD14A15AD15B6AD16C11AD17A9AD18D11AD19B12AD20C12AD21D10AD22C7AD23F13AD24E11AD25E13AD26E12AD27D8AD28A6AD29E8AD30D6AD31A3

AD8A18AD9B16

3 OF 6

Interrupt I/F

PCIU49C

ICH8-M-1-GP-U

3 OF 6

Interrupt I/F

PCIU49C

ICH8-M-1-GP-U






AA

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

V5REF_S0

V5REF_S5

VccLan1_05[1]

3D3V_S0

VccSus1_05[1]VccSus1_05[2]

VccSus1_05[3]

1D5V_USB_S0

VccLan1_05[2]

1D25V_DMI_ICH_S0

VccSus1_5[3]

3D3V_ICH_CL_S5

VccSus1_5[2]

VccSus1_5[1]

V5REF_S0

V5REF_S5

3D3V_S0

5V_S53D3V_S5

5V_S0

3D3V_S0

3D3V_S0

3D3V_S0

1D05V_S0

3D3V_S5

1D5V_S0

1D5V_S0

RTC_AUX_S5

1D5V_APLL_S01D5V_S0

1D5V_S01D5V_DMIPLL_ICH_S0

1D5V_S0

1D5V_S0

3D3V_S5

1D5V_S0

1D25V_S0

1D05V_S0

3D3V_S0

3D3V_S0

3D3V_S5

3D3V_S5

3D3V_S5

1D5V_S0

Title


Date: Sheet of


ICH8-M (3 of 4)

18 42Thursday, March 01, 2007Biwa SB

Title


Date: Sheet of


ICH8-M (3 of 4)


Title


Date: Sheet of


ICH8-M (3 of 4)


*Within a given well, 5VREF needs to be up before thecorresponding 3.3V rail

Layout Note:Place near ICH8

PCI decouplingLayout Note:

NO_STUFF

Place near ICH8MLayout Note:

NO_STUFF

NO_STUFF

657mA

47mA

SATA+USB=1.56A

USBPLL=10mA

18mA in S0;50mA in S3/S4/S5

23mA

80mA1mA

1.13A

23mA

50mA1mA

VCC3_3=278mA

32mA32mA

177mA

18mA

1mA

1mA

6uA in G3

SB modify

1 2

3

D10BAS16-1-GPD10BAS16-1-GP

1

2

C535SC

D1U

10V2K

X-4G

P

C535SC

D1U

10V2K

X-4G

P

1

2

C287

Do Not Stuff

DYC287

Do Not Stuff

DY

1

2

C296

SCD1U10V2KX-4GP

C296

SCD1U10V2KX-4GP

1

2

C303SCD1U10V2KX-4GP

C303SCD1U10V2KX-4GP


1

2

C257

SCD1U10V2KX-4GP

C257

SCD1U10V2KX-4GP

1

2

C279Do N

ot Stuff

DY

C279Do N

ot Stuff

DY

1

2

C310SCD1U16V2ZY-2GPC310SCD1U16V2ZY-2GP

1

2

C297SC

10U10V

5ZY-1G

P

C297SC

10U10V

5ZY-1G

P


1

2

C293SC

D1U

10V2K

X-4G

P

C293SC

D1U

10V2K

X-4G

P


1

2

C539SC4D7U6D3V3KX-GP

C539SC4D7U6D3V3KX-GP


1

2

C513

SC

D1U

10V2K

X-4G

P

C513

SC

D1U

10V2K

X-4G

P

1

2

C255

SCD1U10V2KX-4GP

C255

SCD1U10V2KX-4GP

1

2

C

5

3

7

D

o

N

o

t

S

t

u

f

f

DY

C

5

3

7

D

o

N

o

t

S

t

u

f

f

DY

1

2

C302SC

D1U

10V2K

X-4G

P

C302SC

D1U

10V2K

X-4G

P

1

2

C282SCD1U10V2KX-4GP

C282SCD1U10V2KX-4GP

1

2

C532

SCD1U10V2KX-4GP

C532

SCD1U10V2KX-4GP

1

2

C277SC

D1U

10V2K

X-4G

P

C277SC

D1U

10V2K

X-4G

P

1

2

C275SC

D1U

10V2K

X-4G

P

C275SC

D1U

10V2K

X-4G

P


1

2

C251

SCD1U10V2KX-4GP

C251

SCD1U10V2KX-4GP

1

2

C248

SCD1U10V2KX-4GP

C248

SCD1U10V2KX-4GP

1 2

3

D30BAS16-1-GPD30BAS16-1-GP

1

2

C256

S

C

2

2

U

6

D

3

V

5

M

X

-

2

G

P

C256

S

C

2

2

U

6

D

3

V

5

M

X

-

2

G

P


1

2

C298SC

D1U

10V2K

X-4G

P

C298SC

D1U

10V2K

X-4G

P

1

2

C267SCD1U10V2KX-4GP

C267SCD1U10V2KX-4GP

1

2

C284SC

10U6D

3V6K

X-4G

P

C284SC

10U6D

3V6K

X-4G

P

1

2

C266

SC

D1U

10V2K

X-4G

P

C266

SC

D1U

10V2K

X-4G

P


1

2

C292SC

D1U

10V2K

X-4G

P

C292SC

D1U

10V2K

X-4G

P

1

2

C290SC

D1U

10V2K

X-4G

P

C290SC

D1U

10V2K

X-4G

P

1

2

C301SC

D1U

10V2K

X-4G

P

C301SC

D1U

10V2K

X-4G

P

1

2

C288

SCD1U10V2KX-4GP

C288

SCD1U10V2KX-4GP

1

2

C286SC

D1U

10V2K

X-4G

P

C286SC

D1U

10V2K

X-4G

P

1

2


1

2

C259

SCD1U10V2KX-4GP

C259

SCD1U10V2KX-4GP

1

2

C309SC

D1U

10V2K

X-4G

P

C309SC

D1U

10V2K

X-4G

P

1

2

C496SC10U6D3V5KX-1GPC496SC10U6D3V5KX-1GP

1

2

C

2

5

4

D

o

N

o

t

S

t

u

f

f

DY C 25

4

D

o

N

o

t

S

t

u

f

f

DY

1

2

C294Do Not Stuff

DY

C294Do Not Stuff

DY

1

2

C534Do N

ot Stuff

DYC534D

o Not S

tuff

DY

1

2

C308SC

D1U

10V2K

X-4G

P

C308SC

D1U

10V2K

X-4G

P


12R185 Do Not StuffR185 Do Not Stuff1

2

C

5

3

6

D

o

N

o

t

S

t

u

f

f

DY

C

5

3

6

D

o

N

o

t

S

t

u

f

f

DY1

2

C

2

5

3

SCD1U10V2KX-4GP

C

2

5

3

SCD1U10V2KX-4GP

1

2

C274

SC

D1U

10V2K

X-4G

P

C274

SC

D1U

10V2K

X-4G

P

12 R1600R3-0-U-GPR1600R3-0-U-GP

1

2

C247

Do Not Stuff

DYC247

Do Not Stuff

DY

1

2

C299SCD1U10V2KX-4GP

C299SCD1U10V2KX-4GP

1

2

C268SCD1U10V2KX-4GP

C268SCD1U10V2KX-4GP

1

2

C291

SC

D1U

10V2K

X-4G

P

C291

SC

D1U

10V2K

X-4G

P


1

2

C280SC

D1U

10V2K

X-4G

P

C280SC

D1U

10V2K

X-4G

P

1

2

C269SCD1U10V2KX-4GP

C269SCD1U10V2KX-4GP


1

2

C500

SCD1U10V2KX-4GP

C500

SCD1U10V2KX-4GP

1

2

C315

SCD1U10V2KX-4GP

C315

SCD1U10V2KX-4GP

1

2

C281

SC

D1U

10V2K

X-4G

P

C281

SC

D1U

10V2K

X-4G

P

1

2

C276SC

D1U

10V2K

X-4G

P

C276SC

D1U

10V2K

X-4G

P

VCCRTCAD25

V5REFT7V5REFA16

V5REF_SUSG4

VCC1_5_BV23

VCC1_5_BU24

VCC1_5_BV24

VCC1_5_BU25

VCC1_5_BV25VCC1_5_BW25VCC1_5_BY25

VCC1_5_BAA25VCC1_5_BAA26VCC1_5_BAA27VCC1_5_BAB27VCC1_5_BAB28VCC1_5_BAB29VCC1_5_BD28VCC1_5_BD29VCC1_5_BE25VCC1_5_BE26VCC1_5_BE27VCC1_5_BF24VCC1_5_BF25VCC1_5_BG24VCC1_5_BH23VCC1_5_BH24VCC1_5_BJ23VCC1_5_BJ24VCC1_5_BK24VCC1_5_BK25VCC1_5_BL23VCC1_5_BL24VCC1_5_BL25VCC1_5_BM24VCC1_5_BM25VCC1_5_BN23VCC1_5_BN24VCC1_5_BN25VCC1_5_BP24VCC1_5_BP25VCC1_5_BR24VCC1_5_BR25VCC1_5_BR26VCC1_5_BR27VCC1_5_BT23VCC1_5_BT24VCC1_5_BT27VCC1_5_BT28VCC1_5_BT29

VCCSATAPLLAJ6

VCC1_05 L11

VCC1_05 M11

VCC1_05 P11

VCC1_05 T11

VCC1_05 U11

VCC1_05 V11

VCC1_05 G14

VCC1_05 L12

VCC1_05 V12

VCC1_05 A13VCC1_05 B13VCC1_05 C13VCC1_05 C14VCC1_05 D14VCC1_05 E14VCC1_05 F14

VCC1_05 L14

VCC1_05 V14

VCC1_05 L16

VCC1_05 V16

VCC1_05 L17

VCC1_05 V17

VCC1_05 L18

VCC1_05 M18

VCC1_05 P18

VCC1_05 T18

VCC1_05 U18

VCC1_05 V18

VCC1_5_AW23

VCC1_5_AAC7

VCC1_5_AAE7VCC1_5_AAF7VCC1_5_AAG7VCC1_5_AAH7VCC1_5_AAJ7

VCC1_5_AAC9VCC1_5_AAC10

VCC1_5_AAA5VCC1_5_AAA6

VCC1_5_AG12VCC1_5_AG17

VCC1_5_AAD7

VCC1_5_AF1VCC1_5_AL6

VCC1_5_AM6VCC1_5_AL7

VCC1_5_AM7

VCC1_5_AAC4VCC1_5_AAC5

VCC1_5_AH7

VCC1_5_AAC1VCC1_5_AAC2VCC1_5_AAC3

VCCUSBPLLD1

VCCLAN1_05F17VCCLAN1_05G18

VCCLAN3_3F19VCCLAN3_3G20

VCCGLANPLLA24

VCCGLAN1_5B28

VCCGLAN1_5A26

VCCGLAN1_5B26VCCGLAN1_5A27

VCCGLAN1_5B27

VCCGLAN3_3B25

VCCDMIPLL R29

VCC_DMI AE28VCC_DMI AE29

V_CPU_IO AC23V_CPU_IO AC24

VCC3_3 W6

VCC3_3 V7

VCC3_3 D5

VCC3_3 AF29

VCC3_3 AD2

VCC3_3 AD8VCC3_3 AE8VCC3_3 AF8

VCC3_3 W1

VCC3_3 AA3

VCC3_3 W7VCC3_3 Y7

VCC3_3 B4

VCC3_3 E7

VCC3_3 A8

VCC3_3 B9

VCC3_3 E10

VCC3_3 F11

VCC3_3 D13

VCC3_3 B15VCC3_3 B18

VCC3_3 AC8

VCC3_3 U7

VCC3_3 C15

VCCHDA AC12

VCCSUSHDA AD11

VCCSUS1_5 AC16

VCCSUS1_5 J7

VCCSUS1_05 J6VCCSUS1_05 AF20

VCCSUS3_3 AC18VCCSUS3_3 AG20VCCSUS3_3 AC21VCCSUS3_3 AC22VCCSUS3_3 AH28

VCCSUS3_3 C1VCCSUS3_3 P1VCCSUS3_3 R1VCCSUS3_3 P2VCCSUS3_3 P3VCCSUS3_3 R3VCCSUS3_3 P4VCCSUS3_3 P5VCCSUS3_3 R5

VCCSUS3_3 P6

VCCSUS3_3 R6

VCCSUS3_3 N7VCCSUS3_3 P7

VCCSUS3_3 C3

VCCCL1_5 A22

VCCCL3_3 F20VCCCL3_3 G21

VCCCL1_05 G22

5 OF 6

C

O

R

E

V

C

C

A

3

G

P

V

C

C

P

C

O

R

E

I

D

E

P

C

I

A

R

X

A

T

X

U

S

B

C

O

R

E

G

L

A

N

P

O

W

E

R

V

C

C

P

U

S

B

V

C

C

P

S

U

S

U49E

ICH8-M-1-GP-U

5 OF 6

C

O

R

E

V

C

C

A

3

G

P

V

C

C

P

C

O

R

E

I

D

E

P

C

I

A

R

X

A

T

X

U

S

B

C

O

R

E

G

L

A

N

P

O

W

E

R

V

C

C

P

U

S

B

V

C

C

P

S

U

S

U49E

ICH8-M-1-GP-U

1

2

C283

SC

D1U

10V2K

X-4G

P

C283

SC

D1U

10V2K

X-4G

P

1

2

C273S

CD

1U10V

2KX

-4GP

C273S

CD

1U10V

2KX

-4GP

1

2

C507

SC

D1U

10V2K

X-4G

P

C507

SC

D1U

10V2K

X-4G

P

1

2

R383100R2J-2-GP

R383100R2J-2-GP

1

2

C511SC10U6D3V6KX-4GPC511SC10U6D3V6KX-4GP

1

2

C540

SCD1U10V2KX-4GP

C540

SCD1U10V2KX-4GP

1

2

C271

SC

D1U

10V2K

X-4G

P

C271

SC

D1U

10V2K

X-4G

P

1

2

C289SC

10U10V

5ZY-1G

P

C289SC

10U10V

5ZY-1G

P


1

2

C272SC

D1U

10V2K

X-4G

P

C272SC

D1U

10V2K

X-4G

P

1

2

C285SC

D1U

10V2K

X-4G

P

C285SC

D1U

10V2K

X-4G

P

1

2

C278SC

D1U

10V2K

X-4G

P

C278SC

D1U

10V2K

X-4G

P

1

2

R379100R2J-2-GP

R379100R2J-2-GP


AA

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

3D3V_S03D3V_S5

5V_S0

SMBC_ICH 3,12

SMBD_ICH 3,12

SMB_CLK17,23,28

SMB_DATA17,23,28

Title


Date: Sheet of


ICH8-M (4 of 4)

19 42Thursday, March 01, 2007Biwa SA

Title


Date: Sheet of


ICH8-M (4 of 4)


Title


Date: Sheet of


ICH8-M (4 of 4)


D55 connect SMLINK and SMBUS in S) for SMBus 2.0 compliance

SMBUS

1 2 3 4

5678

RN49

SRN

4K7J-10-GP

RN49

SRN

4K7J-10-GP

1

2

3 4

5

6

D25

2N7002DW-1-GP

84.27002.D3F

D25

2N7002DW-1-GP

84.27002.D3F

VSS L1

VSS N1VSS M3

VSS L4

VSS N4

VSS L5

VSS N5

VSS N11

VSS M12

VSS N12

VSS L13

VSS M13

VSS N13

VSS M14

VSS N14

VSS L15

VSS M15

VSS N15

VSS M16

VSS N16

VSS M17

VSS N17VSS N18

VSS M23

VSS L26

VSS K7

VSS N26

VSS L27

VSS N27

VSS M28VSS M29

VSS_NCTF A1VSS_NCTF A2

VSS_NCTF AH1

VSS_NCTF B1

VSS_NCTF AJ1VSS_NCTF AJ2

VSS_NCTF A28

VSS_NCTF AJ28VSS_NCTF A29

VSS_NCTF B29

VSS_NCTF AH29

VSS_NCTF AJ29

VSSA23VSSA5VSSAA2VSSAA7VSSA25VSSAB1VSSAB24VSSAC11VSSAC14VSSAC25VSSAC26VSSAC27VSSAD17VSSAD20VSSAD28VSSAD29VSSAD3VSSAD4VSSAD6VSSAE1VSSAE12VSSAE2VSSAE22VSSAD1VSSAE25VSSAE5VSSAE6VSSAE9VSSAF14VSSAF16VSSAF18VSSAF3VSSAF4VSSAG5VSSAG6VSSAH10VSSAH13VSSAH16VSSAH19VSSAH2VSSAF28VSSAH22VSSAH24VSSAH26VSSAH3VSSAH4VSSAH8VSSAJ5VSSB11VSSB14VSSB17VSSB2VSSB20VSSB22VSSB8VSSC24VSSC26VSSC27VSSC6VSSD12VSSD15VSSD18VSSD2VSSD4VSSE21VSSE24VSSE4VSSE9VSSF15VSSE23VSSF28VSSF29VSSF7VSSG1VSSE2VSSG10VSSG13VSSG19VSSG23VSSG25VSSG26VSSG27VSSH25VSSH28VSSH29VSSH3VSSH6VSSJ1VSSJ25VSSJ26VSSJ27VSSJ4VSSJ5VSSK23VSSK28VSSK29VSSK3VSSK6

VSS N6VSS P12VSS P13VSS P14VSS P15VSS P16VSS P17VSS P23VSS P28VSS P29VSS R11VSS R12VSS R13VSS R14VSS R15VSS R16VSS R17VSS R18VSS R28VSS R4VSS T12VSS T13VSS T14VSS T15VSS T16VSS T17VSS T2VSS U12VSS U13VSS U14VSS U15VSS U16VSS U17VSS U23VSS U26VSS U27VSS U3VSS U5VSS V13VSS V15VSS V28VSS V29VSS W2VSS W26VSS W27VSS Y28VSS Y29VSS Y4VSS AB4VSS AB23VSS AB5VSS AB6VSS AD5VSS U4VSS W24

6 OF 6U49F

ICH8-M-1-GP-U

6 OF 6U49F

ICH8-M-1-GP-U


ALERT#

G792_DXN3

G792_RESET#

FAN1_FG1

G792_32KHZ

G792_DXP2

V_DEGREEG792_DXN2

G792_DXP3

5V_G792_S0

32KHZ G792_32KHZ

FAN1_VCC

5V_S0

5V_S05V_S0

3D3V_S0

3D3V_AUX_S5

FAN1_VCC

RUN_POWER_ON

H_THERMDC 4

PWROK7,17

H_THERMDA 4

THRM#17

PURE_HW_SHUTDOWN#31,34

SMBD_G792 31SMBC_G792 31

PM_SUS_CLK17

Title


Date: Sheet of


Biwa SBThermal/Fan Controllor


Title


Date: Sheet of




Title


Date: Sheet of




Digital Output Data BitsTEMP.Sign MSB

+127.875

+25.5

0

+1.75 0

1

111 111011100110100001111

LSB EXT

+126.375

11

111

000

000

111

100

001

000

111

110

0111

0

1

+0.5+0.125-0.125-1.125

-65.000-55.25-25.5

111100110000

11111110100100010000000011111110011010001111

00

0

3.System Sensor, Put between CPU and NB.

V_DEGREE=(((Degree-72)*0.02)+0.34)*VCC

Setting T8 as 90 Degree

*Layout* 30 mil

1.For CPU Sensor

*Layout* 15 mil

*Layout* 15 mil

Place near chip as closeas possible

DXP1:108 Degree (CPU DTS)DXP2:H/W Setting 90(T8)DXP3:105 Degree (System)

T7

System G792

CPU DTS

87113102

CPU G792 Analog

T6

85110100Sencor 0

Sencor 1Sencor 2

Biwa Thermal Table 1106

2.T8 SensorPut back of the CPU socket.

2nd source: 20.F1000.003

SB modify

Sencor 3Sencor 4

T8ADIA status

1

2

R226100R2J-2-GPR226100R2J-2-GP

1

2

R22730K1R3F-GPR22730K1R3F-GP

1

2

C378

SC2200P50V2KX-2GP

C378

SC2200P50V2KX-2GP

1 2

R231

10R3J-3-GP

R231

10R3J-3-GP

1

2

C377

SC2200P50V2KX-2GP

C377

SC2200P50V2KX-2GP

1

2

R22110KR2F-2-GPR22110KR2F-2-GP

1 2

3

D16

BAS16-1-GP

D16

BAS16-1-GP

G

SD

Q9

2N7002-11-GP84.27002.W31

Q9

2N7002-11-GP84.27002.W31

1

2

C375SC2200P50V2KX-2GPC375SC2200P50V2KX-2GP

1

2

R20410KR2J-3-GPR20410KR2J-3-GP

1 2

R22510R2J-2-GPR22510R2J-2-GP

FAN1 1

RESET#2THERM_SET3

FG1 4

DGND 5

VCC6

DXP17

SGND1 8

DXP29

SGND2 10

DXP311

SGND3 12

THERM#13

CLK 14

ALERT#15

SDA 16

DGND 17

SCL 18NC#19 19

DVCC20

U37

G792SFUF-GP 74.00792.A79

U37

G792SFUF-GP 74.00792.A791

2

C368

SCD1U16V2ZY-2GP

C368

SCD1U16V2ZY-2GP

1

2

C396

SC2200P50V2KX-2GP

C396

SC2200P50V2KX-2GP1

2

C363Do Not Stuff

DYC363

Do Not Stuff

DY

1

2

C353SC1KP50V2KX-1GPC353SC1KP50V2KX-1GP

C367SC4D7U10V5ZY-3GP

C367SC4D7U10V5ZY-3GP

1

2

C374SC1U10V3ZY-6GP

C374SC1U10V3ZY-6GP

1

2

R22471K5R2F-1-GPR22471K5R2F-1-GP

1

2

C364

Do Not Stuff

DYC364

Do Not Stuff

DY

C

B

E

Q11MMBT3904-3-GPQ11MMBT3904-3-GP

1

2

R228100KR2J-1-GPR228100KR2J-1-GP

1 2R222Do Not StuffDY

R222Do Not StuffDY

1

2

R22310KR2J-3-GP

R22310KR2J-3-GP

1

23

5

4

FAN1

ACES-CON3-GP20.F0714.003

FAN1

ACES-CON3-GP20.F0714.003

1

2

G63

Do Not Stuff

G63

Do Not Stuff

C

B

E

Q10MMBT3904-3-GPQ10MMBT3904-3-GP

1

2

C362SC4D7U6D3V3KX-GPC362SC4D7U6D3V3KX-GP

1

2

G50

Do Not Stuff

G50

Do Not Stuff

C431SC470P50V3JN-2GPC431SC470P50V3JN-2GP

1 2R2204K7R2J-2-GP

R2204K7R2J-2-GP


CSEL

HDDDRV#_5

CDROM_LED#PDIAG

HDD_V12

CDROM_LED#

HDD_V33

HDDDRV#_5HDDDRV#_1

3D3V_S0

5V_S0

5V_S0

5V_S0

5V_S0

5V_S0

3D3V_S0

IDE_PDCS1#16IDE_PDCS3#16

IDE_PDA116IDE_PDA016

INT_IRQ1416IDE_PDIORDY16

IDE_PDIOW#16

IDE_PDA216

SATA_TXP016SATA_TXN016

SATA_RXP016SATA_RXN016

MEDIA_LED#14

SATA_LED# 16

IDE_PDD9 16IDE_PDD10 16IDE_PDD11 16IDE_PDD12 16IDE_PDD13 16IDE_PDD14 16IDE_PDD15 16

IDE_PDD8 16

IDE_PDD4 16

IDE_PDD7 16

IDE_PDD1 16IDE_PDD2 16

IDE_PDD5 16

IDE_PDD3 16

IDE_PDD6 16

IDE_PDD0 16

IDE_PDDACK#16

IDE_PDIOR#16

IDE_PDDREQ16

PLT_RST1#7,17,23,28,31,33

Title


Date: Sheet of


Biwa SBHDD and CDROM


55.4H001.S03G

Title


Date: Sheet of




55.4H001.S03G

Title


Date: Sheet of




55.4H001.S03G

CSEL=Low for ODD is MasterCSEL=Open for ODD is Slave

ODD Connector

3V to 5V level shift for HDD

PWR TRACE 100mil

SATA Connector

IORDY 4.7k pull-up to Vcc3_3IDEIRQ 8.2k to 10k pull-up to Vcc3_3

CDROM21

5049

Close to Connector

ICH8 internal pull high 15K

2nd source: 62.10065.041

SB modify

SB modify2nd source: 20.80868.050


1

2

R2774K7R2J-2-GP

R2774K7R2J-2-GP


1 2

3

D27

BAS16-1-GP

D27

BAS16-1-GP

1

2

C506SC10U10V5ZY-1GPC506SC10U10V5ZY-1GP

12

3 4

RN34SRN8K2J-3-GP

RN34SRN8K2J-3-GP

1

2

R278Do Not Stuff

DY

R278Do Not Stuff

DY

1

2

C514

S

C

D

1

U

1

6

V

2

Z

Y

-

2

G

P

C514

S

C

D

1

U

1

6

V

2

Z

Y

-

2

G

P

2

1

3D23

BAW56PT-U83.00056.E11

D23

BAW56PT-U83.00056.E11

9 8

1

4

1

0

7

U3CTSAHCT125PW-GP

U3CTSAHCT125PW-GP

AUDIO_L_CH1AUDIO_R_CH2

RESET#5

DMARQ22

DIOR#24DIOW#25

IORDY27

DMACK#28

INTRQ29

IOCS16#30

DA131

PDIAG#32

DA033

DA234

CSIFX#35CS3FX#36

DASP#37

+5V(MOTOR)38+5V(MOTOR)39+5V(MOTOR)40

+5V(LOGIC)41+5V(LOGIC)42

DEVICE_CONFIG(CSEL)47

VENDER_UNIQUE#49 49VENDER_UNIQUE#50 50

GND 51GND 52

AUDIO_GROUND 3GROUND 4GROUND 23GROUND 26GROUND 43GROUND 44GROUND 45GROUND 46GROUND 48

DD0 21DD1 19DD2 17DD3 15DD4 13DD5 11DD6 9DD7 7DD8 6DD9 8

DD10 10DD11 12DD12 14DD13 16DD14 18DD15 20

ODD1

SYN-CONN50-4R10GP-U20.80868.050

ODD1

SYN-CONN50-4R10GP-U20.80868.050

1 2R21910KR2J-3-GP R21910KR2J-3-GP

1

2

C369SCD1U16V2ZY-2GP

C369SCD1U16V2ZY-2GP

1

2

R230Do Not StuffR230Do Not Stuff

1

234567

89

10111213141516171819202122

23

24

NP1

NP2

SATA1

FOX-CON22-3-GP-U62.10065.061

SATA1

FOX-CON22-3-GP-U62.10065.061

C371SC10U10V5ZY-1GP

C371SC10U10V5ZY-1GP

1

2

EC54

D

o

N

o

t

S

t

u

f

f

DYEC54

D

o

N

o

t

S

t

u

f

f

DY

TP59Do Not Stuff

TP59Do Not Stuff


ACZ_SYNCACSDATAIN1_A

ACZ_SDATAOUT

ACZ_RST#

3D3V_BT_S0

3D3V_BT_S0

USB_5-USB_5+ USB_1-

USB_1+

USB_2-USB_2+

USB_0-USB_0+

3D3V_S5

3D3V_BT_S0

5V_USB1_S5

5V_S5

5V_USB2_S5

5V_USB2_S55V_USB1_S5

5V_USB1_S5

5V_USB1_S5

3D3V_S0

3D3V_S0

5V_USB2_S5

5V_S0

ACZ_SDATAIN116

ACZ_SDATAOUT16,29

ACZ_SYNC16,29

ACZ_BTCLK_MDC 16ACZ_RST#16,29

USBPN5 17USBPP5 17

USB_PWR_EN#27,31

USB_OC#0 17

USB_OC#2 17

USBPN017USBPP017

USBPN117USBPP117

BLUETOOTH_EN 31

USBPN717USBPP717

USBPN217USBPP217

FP_DETECT#31

TP_RIGHT32TP_SCROLL_RIGHT32

TP_SCROLL_UP32TP_SCROLL_LEFT32

TP_SCROLL_DOWN32TP_LEFT32

FP_ID17

Title


Date: Sheet of


Biwa -1USB / MDC / BLUETOOTH / FP


55.4H001.S03G

Title


Date: Sheet of




55.4H001.S03G

Title


Date: Sheet of




55.4H001.S03G

MDC 1.5 CONN

BLUETOOTH MODULE

EC21 put nearBLUE1 / allUSB put onechoke nearconnector byEMI request

100 mil

100 mil

Finger Print

2nd source: 20.D0174.104

2nd source: 20.F0604.012

2nd source: 20.K0185.015

2nd source: 22.10245.H11

2nd source: 22.10245.H11

2nd source: 74.05240.A7F

H: AuthenSB modify

SB modify

-1 modify for EMC

1

2

EC46SCD1U16V2ZY-2GPEC46SCD1U16V2ZY-2GP

12 3

4

RN50

SRN0J-6-GP

RN50

SRN0J-6-GP

5

1

234

6USB1

SKT-USB-97-UGP22.10218.H01

USB1

SKT-USB-97-UGP22.10218.H01

1

2


123

4

RN14

SRN0J-6-GP

RN14

SRN0J-6-GP

VOUT1GND2NC#33 EN/EN# 4

VIN 5

U47

RT9711-APBG-GP74.09711.A7F

U47

RT9711-APBG-GP74.09711.A7F

1

2


1

2


1

2


1

2

C359Do Not Stuff

DYC359Do Not Stuff

DY

432

1

5

6

BLUE1

ACES-CON4-1-GP20.D0197.104

BLUE1

ACES-CON4-1-GP20.D0197.104

1

2

EC56Do Not Stuff

DYEC56Do Not Stuff

DY

681

23475

USB3

SKT-USB-168-GP22.10218.S61

USB3

SKT-USB-168-GP22.10218.S61

1

2

R43510KR2J-3-GP

R43510KR2J-3-GP

5

1

234

6USB2

SKT-USB-97-UGP22.10218.H01

USB2

SKT-USB-97-UGP22.10218.H01

1

2

EC52

SCD1U16V2ZY-2GP

EC52

SCD1U16V2ZY-2GP

1

2

EC53Do Not Stuff

DYEC53Do Not Stuff

DY

16

1

23456789

101112131415

17

FP1

ACES-CON15-GP20.K0228.015

FP1

ACES-CON15-GP20.K0228.015

1

2

C470

S

C

4

D

7

U

6

D

3

V

3

K

X

-

G

P

C470

S

C

4

D

7

U

6

D

3

V

3

K

X

-

G

P

1

2

EC49

Do Not StuffDYEC49

Do Not StuffDY

123

4

RN54

SRN0J-6-GP

RN54

SRN0J-6-GP

1

2

R15

1

0

0

K

R

2

J

-

1

-

G

P

R15

1

0

0

K

R

2

J

-

1

-

G

P

1

2

C39

S

C

4

D

7

U

1

0

V

5

Z

Y

-

3

G

P

C39

S

C

4

D

7

U

1

0

V

5

Z

Y

-

3

G

P

1

2

TC24SE100U10VM-4-GP

79.10111.40L

TC24SE100U10VM-4-GP

79.10111.40L

1 2

3 45 67 89 10

11 12

131415

161718

NP1

NP2

MDC1

TYCO-CONN12A-2-GP20.F0917.012

MDC1

TYCO-CONN12A-2-GP20.F0917.012

1

2


1

2

C22Do Not StuffC22Do Not Stuff

GND1IN2EN1/EN1#3EN2/EN2#4 OC2# 5

OUT2 6OUT1 7OC1# 8

G

N

D

9

U45

G546B2RD1UF-GP74.00546.A73

U45

G546B2RD1UF-GP74.00546.A73

1 2R207 39R2J-L-GPR207 39R2J-L-GP

1

2

TC17SE150U10VM-2GP

79.15711.30L

TC17SE150U10VM-2GP

79.15711.30L

123

4

RN46

SRN0J-6-GP

RN46

SRN0J-6-GP


55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

LAN_X1_R

LAN_X0LAN_X1

LAN_SMB_CLKLAN_SMB_DATA

RDAC

VAUX_PRESENT

BIASVDD_G

V

C

C

P

PCIE_PLLVDD

AVDDL_G

PCIE_SDSVDD

SISOSCLK

CS#

UART_MODEGPIO1GPIO0

GPIO2

LAN_RSTSCLK

SOCS#

PCIE_RXDNPCIE_RXDP

REGCTL12

REGCTL25

GPHY_PLLVDD

LAN_AVDD

XTALVDD_G

SI

SPI_RST

VMAINPRSNT_R VMAINPRSNT

3D3V_LAN_S5

2D5V_LAN_S5

3D3V_S53D3V_LAN_S5

2D5V_LAN_S5

1D2V_LAN_S5

1D2V_LAN_S5

3D3V_LAN_S5

3D3V_LAN_S5

3D3V_LAN_S5

3D3V_S0

2D5V_LAN_S5

3D3V_LAN_S5

3D3V_LAN_S5

1D2V_LAN_S5

3D3V_AUX_S5

SMB_DATA17,19,28SMB_CLK17,19,28

CLK_PCIE_LAN3CLK_PCIE_LAN#3

PCIE_WAKE#17,28

MDI1- 24

MDI0- 24MDI0+ 24

MDI1+ 24

MDI3- 24

MDI2- 24MDI2+ 24

MDI3+ 24

LAN_ACT_LED# 24

PLT_RST1#7,17,21,28,31,33

10M/100M/1G_LED# 24

PCIE_RXN117PCIE_RXP117

PCIE_TXN117PCIE_TXP117

LOW_PWR31

ENERGY_DET 31

Title


Date: Sheet of


Biwa -1BCM5787MKMLG

A3


55.4H001.S03G

Title


Date: Sheet of


Biwa -1BCM5787MKMLG

A3


55.4H001.S03G

Title


Date: Sheet of


Biwa -1BCM5787MKMLG

A3


55.4H001.S03G

Place PLLVDD/AVDDLCKT as close to chip aspossible

CL=20PF 30PPM

SB modify

SB modify

590mA

235mA

7mA

SB modify

SB modify

-1 modify

1 2R690R2J-2-GP

R690R2J-2-GP

1

2

R440Do Not Stuff

DYR440Do Not Stuff

DY

1

2

C384SCD1U10V2KX-4GPC384SCD1U10V2KX-4GP

12 R239

1K24R2F-GP

R239

1K24R2F-GP

12R257

FCM1608KF-2-GP-U68.00217.171

R257

FCM1608KF-2-GP-U68.00217.171

1

2

C82SC1U10V3KX-3GP

C82SC1U10V3KX-3GP

1

2

C68

S

C

D

1

U

1

0

V

2

K

X

-

4

G

P

C68

S

C

D

1

U

1

0

V

2

K

X

-

4

G

P

1

2

C399SC1U10V3KX-3GP

C399SC1U10V3KX-3GP

1

2

C73

S

C

1

0

U

1

0

V

5

Z

Y

-

1

G

P

C73

S

C

1

0

U

1

0

V

5

Z

Y

-

1

G

P

1

2

C405Do Not Stuff

DYC405Do Not Stuff

DY

1

2

C76

S

C

4

D

7

U

1

0

V

5

Z

Y

-

3

G

P

C76

S

C

4

D

7

U

1

0

V

5

Z

Y

-

3

G

P

1

2

R574K7R2J-2-GP

R574K7R2J-2-GP

1

2

C81

S

C

D

1

U

1

0

V

2

K

X

-

4

G

P

C81

S

C

D

1

U

1

0

V

2

K

X

-

4

G

P

1

2

C391

SCD1U10V2KX-4GP

C391

SCD1U10V2KX-4GP

12R247 200R2J-L1-GPR247 200R2J-L1-GP

E

BC

C

Q3

2SB772ZPT-GP-U1

C

Q3

2SB772ZPT-GP-U1


1

2

C387SC1U10V3KX-3GP

C387SC1U10V3KX-3GP

1

2

C74

S

C

4

D

7

U

1

0

V

5

Z

Y

-

3

G

P

C74

S

C

4

D

7

U

1

0

V

5

Z

Y

-

3

G

P

SI1SCK2RESET#3CS#4

SO 8GND 7VCC 6WP# 5

U13

AT45DB011B-SU1-GP72.45011.A01

U13

AT45DB011B-SU1-GP72.45011.A01

1

2

C389SCD1U10V2KX-4GPC389

SCD1U10V2KX-4GP

1 2R2380R3-0-U-GP

R2380R3-0-U-GP

1

2

C388

S

C

D

1

U

1

0

V

2

K

X

-

4

G

P

C388

S

C

D

1

U

1

0

V

2

K

X

-

4

G

P

1

2

R6710KR2F-2-GPR6710KR2F-2-GP

1

2

R58

0

R

2

J

-

2

-

G

P

R58

0

R

2

J

-

2

-

G

P


1

2

C66

D

o

N

o

t

S

t

u

f

f

DYC66

D

o

N

o

t

S

t

u

f

f

DY

1

2

C80Do Not Stuff

DYC80Do Not Stuff

DY1 2

G66

Do Not Stuff

G66

Do Not Stuff

12R62 1KR2J-1-GPR62 1KR2J-1-GP

1

2

C392

SCD1U10V2KX-4GP

C392

SCD1U10V2KX-4GP

1

2

C75

S

C

1

0

U

1

0

V

5

Z

Y

-

1

G

P

C75

S

C

1

0

U

1

0

V

5

Z

Y

-

1

G

P

12 C91SCD1U10V2KX-4GP C91SCD1U10V2KX-4GP

VDDC5VDDC13VDDC20VDDC34VDDC55VDDC60

AVDDL39AVDDL44AVDDL46AVDDL51

V

D

D

I

O

6

V

D

D

I

O

1

5

V

D

D

I

O

1

9

V

D

D

I

O

5

6

V

D

D

I

O

6

1

V

D

D

P

1

7

V

D

D

P

6

8

GPHY_PLLVDD35

PCIE_PLLVDD30

PCIE_VDD27PCIE_VDD33

PCIE_GND24

WAKE#12

PCIE_TXDP26PCIE_TXDN25PCIE_RXDP31PCIE_RXDN32

PERST#10REFCLK+29REFCLK-28

VAUXPRSNT54VMAINPRSNT53LOW_PWR3

SMB_CLK58SMB_DATA57

XTALO22XTALI21

RDAC37

NC#11(CLK_REQ#)11

NC#59/(ENERGY_DET) 59

REGCTL25 18

REGCTL12 14

REG_GND 16

SCLK 65SI 63

SO 64CS# 62

UART_MODE 9GPIO1_SERIALDI 7

GPIO0_SERIALDO 4

LINKLED# 2SPD100LED# 1

SPD1000LED# 67TRAFFICLED# 66

GPIO2 8

TRD0+ 40

TRD1- 42

TRD2+ 47

TRD3- 49

TRD0- 41

TRD1+ 43

TRD2- 48

TRD3+ 50

BIASVDD 36

XTALVDD 23

AVDD 38

AVDD 45

AVDD 52

G

N

D

6

9

U14

BCM5787MKMLG-1-GP71.05787.M02

U14

BCM5787MKMLG-1-GP71.05787.M02

1

2

C383

S

C

D

1

U

1

0

V

2

K

X

-

4

G

P

C383

S

C

D

1

U

1

0

V

2

K

X

-

4

G

P


1

2

C70

SCD1U10V2KX-4GP

C70

SCD1U10V2KX-4GP

1

2

C84SCD1U10V2KX-4GP

C84SCD1U10V2KX-4GP

1 2R680R3-0-U-GP

R680R3-0-U-GP

12 R2450R3-0-U-GPR2450R3-0-U-GP

1

2

R439Do Not Stuff

DYR439Do Not Stuff

DY1 2R600R2J-2-GP R600R2J-2-GP

1 2X4

XTAL-25MHZ-91GP82.30020.761

X4

XTAL-25MHZ-91GP82.30020.761

1

2

C395Do Not Stuff

DYC395Do Not Stuff

DY

1

2

C69

S

C

D

1

U

1

0

V

2

K

X

-

4

G

P

C69

S

C

D

1

U

1

0

V

2

K

X

-

4

G

P

12R66

FCM1608KF-2-GP-U68.00217.171

R66

FCM1608KF-2-GP-U68.00217.171

1 2R2420R3-0-U-GP

R2420R3-0-U-GP

1

2

C64D

o

N

o

t

S

t

u

f

f

DYC64

D

o

N

o

t

S

t

u

f

f

DY

12R241

FCM1608KF-2-GP-U68.00217.171

R241

FCM1608KF-2-GP-U68.00217.171

1

2

C61

SCD1U10V2KX-4GP

C61

SCD1U10V2KX-4GP 1 2R610R2J-2-GP R610R2J-2-GP

1

2

C71

SC

D1U

10V2K

X-4G

P

C71

SC

D1U

10V2K

X-4G

P

1

2

C93SC1U10V3KX-3GP

C93SC1U10V3KX-3GP

1

2

C397

S

C

2

7

P

5

0

V

2

J

N

-

2

-

G

P

C397

S

C

2

7

P

5

0

V

2

J

N

-

2

-

G

P

1

2

C67

S

C

D

1

U

1

0

V

2

K

X

-

4

G

P

C67

S

C

D

1

U

1

0

V

2

K

X

-

4

G

P

1

2

C398

S

C

2

7

P

5

0

V

2

J

N

-

2

-

G

P

C398

S

C

2

7

P

5

0

V

2

J

N

-

2

-

G

P

1

2

C72

D

o

N

o

t

S

t

u

f

f

DY C72

D

o

N

o

t

S

t

u

f

f

DY

12R59 1KR2J-1-GPR59 1KR2J-1-GP

1

2

C386

S

C

D

1

U

1

0

V

2

K

X

-

4

G

P

C386

S

C

D

1

U

1

0

V

2

K

X

-

4

G

P

1 2G49

Do Not Stuff

G49

Do Not Stuff

1

2

C83

Do Not Stuff DYC83

Do Not Stuff DY

2

1

3Q4

BCP69T1-1-GP84.00069.A1B

Q4

BCP69T1-1-GP84.00069.A1B

12 C90SCD1U10V2KX-4GP C90SCD1U10V2KX-4GP


1

2

C394

S

C

1

U

6

D

3

V

2

Z

Y

-

G

P

C394

S

C

1

U

6

D

3

V

2

Z

Y

-

G

P

1

2

C78

S

C

D

1

U

1

0

V

2

K

X

-

4

G

P

C78

S

C

D

1

U

1

0

V

2

K

X

-

4

G

P

1 2R65Do Not StuffDYR65 Do Not StuffDY

1

2

C385

S

C

D

1

U

1

0

V

2

K

X

-

4

G

P

C385

S

C

D

1

U

1

0

V

2

K

X

-

4

G

P

1

2

C65Do Not Stuff

DYC65Do Not Stuff

DY

1

2

C62

S

C

4

D

7

U

1

0

V

5

Z

Y

-

3

G

P

C62

S

C

4

D

7

U

1

0

V

5

Z

Y

-

3

G

P


AA

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

RJ45_8_1

RJ45_6_1

RJ45_3_1RJ45_2_1

LAN_TERMINAL

RJ45_7_1

RJ45_5_1

RJ45_1_1

RJ45_4_1MCT1MCT2

CONN_PWR_1

CONN_PWR_2

MCT3MCT4

10M/100M/1G_LED#

CONN_PWR_1

LAN_ACT_LED#

RJ45_1

RJ45_3

RJ45_6

RJ45_4

MCT1

TCT1

MCT2

MCT3

MCT4

RJ45_5_1RJ45_4_1RJ45_8_1RJ45_7_1

RJ45_2_1RJ45_1_1RJ45_6_1RJ45_3_1

CONN_PWR_2

RJ45_7

RJ45_5

RJ45_2

RJ45_8

3D3V_LAN_S5

2D5V_LAN_S5

LAN_ACT_LED#23

10M/100M/1G_LED#23

MDI2-23

MDI2+23

MDI3-23

MDI3+23

MDI1-23

MDI1+23

MDI0+23

MDI0-23

Title


Date: Sheet of


Biwa -1LAN Connector

A3


55.4H001.S03G

Title


Date: Sheet of



A3


55.4H001.S03G

Title


Date: Sheet of



A3


55.4H001.S03G

RD- --> RX-RD+ --> RX+

TD+ --> TX+

10/100 LAN Transformer RJ45 PIN

RJ45-2

RJ45-3RJ45-6

TD- --> TX-RJ45-1

1.route on bottom as differential pairs.2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.3.No vias, No 90 degree bends.4.pairs must be equal lengths.5.6mil trace width,12mil separation.6.36mil between pairs and any other trace.7.Must not cross ground moat,exceptRJ-45 moat.

RJ11 signal must leave the other signalor power plane 100mil.

DOC_TIP,DOC_RING,TIP,RING:W/S : 10/100 @ Surface layers 10/20 @ Inner layers

LAN Connector

LAN Data: Yellow(B2), when LAN is transfering data.

Green(A3), behavior is the same for 10/100/1000 bits

LAN Link:

5789

VDDC3D3V_LAN_S5

3D3V_LAN_S5

4401E

VDDIO

VDDIO_PCI

Voltage Rail

3D3V_S01D2V_LAN_S5

VESD3D3V_LAN_S5

3D3V_S0

1D8V_LAN_S5

VDDP3D3V_2D5V_S51D8V_1D2V_S5

3D3V_LAN_S5

3D3V_S51D8V_LAN_S5

Don't Care 2D5V_S52D5V_S51D2V_S5

A2(+) A1(-)::GREENA2(+) A3(-):ORANGE

B1(+) B2(-):YELLOW

LED COLOR

5787

Don't Care

Don't Care

-1 modify for EMI-1 modify for EMI

1

2

3

4

5

6

7

8

ERC2Do Not StuffDY

ERC2Do Not StuffDY

1234 5

678

RN60

SRN0J-5-GP

RN60

SRN0J-5-GP

1

2

C92

SC

D1U

10V2K

X-4G

P

C92

SC

D1U

10V2K

X-4G

P

1

2

C63SC

D1U

10V2K

X-4G

P

C63SC

D1U

10V2K

X-4G

P

1

2

3 10

9

11

7

8

6

12

4

5

XF2

XFORM-271-GP68.HD081.301

XF2

XFORM-271-GP68.HD081.301

1

2

3 10

9

11

7

8

6

12

4

5

XF1

XFORM-271-GP68.HD081.301

XF1

XFORM-271-GP68.HD081.301

1 2R63 100R2J-2-GPR63 100R2J-2-GP

1 2R64 100R2J-2-GPR64 100R2J-2-GP

1

2

R70Do Not StuffR70Do Not Stuff

1234 5

678

RN59

SRN0J-5-GP

RN59

SRN0J-5-GP

1 2EC15

SC1KP2KV8KX-GPEC15

SC1KP2KV8KX-GP

A1A2A3

1

2345678

B1

B2

9

10

RJ1

RJ45-125-GP-U122.10277.021

RJ1

RJ45-125-GP-U122.10277.021

1 2 3 4

5678

RN6SRN75J-1-GPRN6SRN75J-1-GP

1

2

C89

SC

D1U

10V2K

X-4G

P

C89

SC

D1U

10V2K

X-4G

P

1

2

C77SC

D1U

10V2K

X-4G

P

C77SC

D1U

10V2K

X-4G

P


AA

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

SM_R#SD_CLK

SD_D1

V

R

_

P

O

R

T

1

SD_CMD

SD_D3

V

R

_

P

O

R

T

2

MC_PWR_CTRL1_0CBB_D[15..0]

CBB_A[25..0]

SD_WP

V

D

D

P

L

L

_

1

5

SD_D2

PCI_AD0PCI_AD1PCI_AD2PCI_AD3PCI_AD4PCI_AD5

SD_D[3..0]

PCI_AD6PCI_AD7PCI_AD8PCI_AD9

PCI_AD11PCI_AD10


PCI_AD17PCI_AD16

PCI_AD19

PCI_AD23PCI_AD22PCI_AD21

PCI_AD18

PCI_AD20


PCI_AD29PCI_AD28

PCI_AD31PCI_AD30

PCI_AD[31..0]

SD_D0SD_CD#

3D3V_PLL_S03D3V_S0

3D3V_S0

1394_AGND

3D3V_S0

3D3V_PLL_S0

3D3V_S0

VCC_ASKT_S0

1394_AGND

PCI_AD[31..0]17,26

CBB_A1 27CBB_A0 27

CBB_A7 27

CBB_A6 27CBB_A5 27CBB_A4 27CBB_A3 27CBB_A2 27

CBB_A11 27

CBB_A10 27

CBB_A9 27

CBB_A17 27

CBB_D1 27

CBB_D0 27

CBB_A25 27

CBB_A24 27

CBB_D6 27

CBB_D5 27

CBB_D4 27CBB_D3 27

CBB_D12 27

CBB_D11 27

CBB_D10 27CBB_D9 27

CBB_D8 27

CBB_D7 27CBB_D15 27

CBB_D13 27

CBB_A[25..0] 26,27

CBB_D[15..0] 26,27

CBB_OE# 27

CBB_IOWR# 27

CBB_IORD# 27

CBB_CE2# 27

CBB_A13 27PCI_PAR17

MC_PWR_CTRL 27

CBB_A12 27CBB_A8 27CBB_CE1# 27

CBB_REG# 27

SD_D[3..0] 27

PCI_C/BE#317PCI_C/BE#217PCI_C/BE#117PCI_C/BE#017

SD_WP27

SM_R#27

SD_CD# 27

SD_CLK27SD_CMD27

Title


Date: Sheet of


TI PCI7412 (1 of 2)


55.4H001.S03G

Title


Date: Sheet of


TI PCI7412 (1 of 2)


55.4H001.S03G

Title


Date: Sheet of


TI PCI7412 (1 of 2)


55.4H001.S03G

Bypass/Decupoling CapacitorsShould be places as close to PCI7412 as possible

TI PCI7412

C782 should close Pin-P15and Pin-R17.

* All 1394 signals must be routed on top side only* Differential pairs of each ports should have equal trace length* Stubs must be keep as short as possible

1

2

C340

S

C

D

1

U

1

0

V

2

K

X

-

4

G

P

C340

S

C

D

1

U

1

0

V

2

K

X

-

4

G

P

1 2

C338

SCD1U16V2ZY-2GP

C338

SCD1U16V2ZY-2GP

C

B

E

Q5MMBT2222A-3-GP

84.02222.V11

CardReaderQ5MMBT2222A-3-GP

84.02222.V11

CardReader

1

2

C

3

3

5

S

C

D

1

U

1

0

V

2

K

X

-

4

G

P

C

3

3

5

S

C

D

1

U

1

0

V

2

K

X

-

4

G

P

AD0R11AD1P11AD2U11AD3V11AD4W11AD5R10AD6U10AD7V10AD8R9AD9U9AD10V9AD11W9AD12V8AD13U8AD14R8AD15W7AD16W4AD17T2AD18T1AD19R3AD20P5AD21R2AD22R1AD23P3AD24N3AD25N2AD26N1AD27M5AD28M6AD29M3AD30M2AD31M1

A

G

N

D

R

1

4

A

G

N

D

U

1

3

A

G

N

D

U

1

4

G

N

D

F

7

G

N

D

F

1

0

G

N

D

F

1

3

G

N

D

G

1

4

G

N

D

H

6

G

N

D

K

6

G

N

D

K

1

4

G

N

D

M

1

4

G

N

D

N

6

G

N

D

P

7

G

N

D

P

9

V

C

C

F

6

V

C

C

F

9

V

C

C

F

1

2

V

C

C

F

1

4

V

C

C

J

6

V

C

C

J

1

4

V

C

C

L

6

V

C

C

L

1

4

V

C

C

P

6

V

C

C

P

8

V

C

C

P

1

0

V

C

C

C

B

A

1

5

A

V

D

D

_

3

3

P

1

3

A

V

D

D

_

3

3

P

1

4

A

V

D

D

_

3

3

U

1

5

V

C

C

C

B

J

1

9

V

C

C

P

P

1

V

C

C

P

W

8

V

D

D

P

L

L

_

1

5

P

1

5

V

D

D

P

L

L

_

3

3

U

1

9

V

R

_

E

N

#

K

2

V

R

_

P

O

R

T

K

1

V

R

_

P

O

R

T

K

1

9

V

S

S

P

L

L

R

1

7

CAD27/D0 C11CAD28/D8 E11CAD29/D1 F11

CAD3/D5 M15

CAD30/D9 A10CAD31/D10 C10

CAD4/D12 N19CAD5/D6 M18

CAD6/D13 M17CAD7/D7 L19

CAD8/D15 L18CAD9/A10 L15

CAD0/D3 P19CAD1/D4 N18

CAD10/CE2# K18CAD11/OE# K17CAD12/A11 K15

CAD13/IORD# J18CAD14/A9 J15

CAD15/IOWR# J17CAD16/A17 H19CAD17/A24 F15CAD18/A7 E17

CAD19/A25 D19

CAD2/D11 N17

CAD20/A6 A16CAD21/A5 E14CAD22/A4 B15CAD23/A3 B14CAD24/A2 A14CAD25/A1 C13CAD26/A0 B13

PARU7

C

C

/

B

E

3

#

/

R

E

G

#

E

1

3

C

C

/

B

E

0

#

/

C

E

1

#

L

1

7

C

C

/

B

E

2

#

/

A

1

2

E

1

8

C

C

/

B

E

1

#

/

A

8

H

1

8

CPAR/A13 H14

M

C

_

P

W

R

_

C

T

R

L

_

0

C

8

M

C

_

P

W

R

_

C

T

R

L

_

1

/

S

M

_

R

/

B

#

F

8

S

D

_

C

D

#

E

9

S

D

_

C

L

K

/

S

M

_

R

E

#

A

4

S

D

_

C

M

D

/

S

M

_

A

L

E

C

5

S

D

_

D

A

T

0

/

S

M

_

D

4

C

6

S

D

_

D

A

T

1

/

S

M

_

D

5

A

5

S

D

_

D

A

T

2

/

S

M

_

D

6

B

5

S

D

_

D

A

T

3

/

S

M

_

D

7

E

6

S

D

_

W

P

/

S

M

_

C

E

#

E

7

C

/

B

E

0

#

W

1

0

C

/

B

E

1

#

V

7

C

/

B

E

2

#

U

5

C

/

B

E

3

#

P

21 OF 2U34A

PCI7412ZHK-GP71.07412.B0U

1 OF 2U34A

PCI7412ZHK-GP71.07412.B0U

1 2R200 Do Not StuffR200 Do Not Stuff

1

2C341

SCD1U25V3ZY-1GP

C341

SCD1U25V3ZY-1GP

1

2

C

3

3

7

S

C

D

1

U

1

0

V

2

K

X

-

4

G

P

C

3

3

7

S

C

D

1

U

1

0

V

2

K

X

-

4

G

P

1

2

C329

S

C

D

1

U

1

0

V

2

K

X

-

4

G

P

C329

S

C

D

1

U

1

0

V

2

K

X

-

4

G

P

1

2

C330

S

C

D

1

U

1

0

V

2

K

X

-

4

G

P

C330

S

C

D

1

U

1

0

V

2

K

X

-

4

G

P

1

2

C332

S

C

D

1

U

1

6

V

2

Z

Y

-

2

G

P

C332

S

C

D

1

U

1

6

V

2

Z

Y

-

2

G

P

1

2

C325

S

C

D

1

U

1

0

V

2

K

X

-

4

G

P

C325

S

C

D

1

U

1

0

V

2

K

X

-

4

G

P

1

2

C336

SC1U10V2ZY

C336

SC1U10V2ZY

1

2

C339

SC1U10V2ZY

C339

SC1U10V2ZY

1

2

C331SC

D

1

U

1

6

V

2

Z

Y

-

2

G

P

C331SC

D

1

U

1

6

V

2

Z

Y

-

2

G

P

1 2

34

RN28SRN10KJ-5-GP

CardReaderRN28SRN10KJ-5-GP

CardReader


AA

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

SM_CD#

MS_D[3..1]

1394_TPB0N

1394_TPA0P

1394_TPB0P

1394_TPA0N

PHY_TEST_MA1394_TPBIAS0

MFUNC5

P

C

1

1394_R11394_R0

1394_TPBIAS1

P

C

2

CBB_A16_R

7

4

1

2

_

E

5

1394_XO1394_XI

MS_D3MS_D2MS_D1

MC_PWR_CTRL-1

SUSPEND#

7412_IDSEL

P

C

0

MFUNC4

1394_TPA0N1394_TPA0N

1394_TPB0

1394_TPB0P

1394_TPBIAS0

1394_TPB0N1394_TPA0P

1394_AGND

1394_AGND

3D3V_S0

3D3V_S0

3D3V_PLL_S0

3D3V_S0

PCI_TRDY#17PCI_STOP#17PCI_SERR#17PCI_REQ#017PCI_PERR#17PCI_IRDY#17

PCI_AD2217,25PCI_GNT#017

PCI_FRAME#17PCI_DEVSEL#17

MSCSDIO27

MS_CD#27MS_CLK27

MSCBS27

PM_CLKRUN# 17,31,33

INT_PIRQG# 17INT_PIRQB# 17INT_PIRQF# 17INT_SERIRQ 17,31,33

XD_CD# 27SM_CLE 27

CBB_D227

PCLK_PCM 3PCIRST1# 17

CBB_CD2# 27CBB_CD1# 27CBB_VS2# 27CBB_VS1# 27

CBB_A22 27CBB_BVD1# 27

CBB_A20 27CBB_WAIT# 27CBB_INPACK# 27

CBB_A14 27CBB_A15 27

CBB_RDY 27

CBB_BVD2#27CBB_A2127CBB_A2327CBB_WE#27

CBB_A19 27

CBB_D1427CBB_A1827

CBB_WP 27CBB_RESET 27

CBB_A16 27

PCI_SPKR 29

CLK48_CARDBUS 3

MS_D[3..1]27

VCCD1#27

VPPD027VCCD0#27VPPD127

1394_TPA0N271394_TPA0P27

1394_TPBIAS027

1394_TPB0N271394_TPB0P27

1394_TPBIAS027

Title


Date: Sheet of


TI PCI7412 (2 of 2)


55.4H001.S03G

Title


Date: Sheet of


TI PCI7412 (2 of 2)


55.4H001.S03G

Title


Date: Sheet of


TI PCI7412 (2 of 2)


55.4H001.S03G

TI PCI7412

IDSEL:AD22INTA-->:INT_PIRQG#INTB-->:INT_PIRQB#INTC-->:INT_PIRQF#INTD-->:INT_PIRQG#GNT:PCI_GNT#0REQ:PCI_REQ#0

INTA#INTB#INTC#

INTD#

INTA# CARBUS 1 (INT_PIRQG#)INTB# 1394 (INT_PIRQB#)INTC# Flash Media (INT_PIRQF#)INTD# SD Host (INT_PIRQG#) share

MFUNC4: use bit 19-16 Register define.

CLOSE TO CHIP

SB modify

SB modify 12/29

1

2

R43156R2J-4-GP

1394R43156R2J-4-GP

1394

1 2R19610KR2J-3-GP

R19610KR2J-3-GP

1

TP115Do Not Stuff

TP115Do Not Stuff

1



1

2

R4325K1R2-GP

1394R4325K1R2-GP

1394

1

2

X3X-24D576MHZ-52GP82.30023.441

1394 X3X-24D576MHZ-52GP82.30023.441

1394

1


1 2R19533R2J-2-GPR19533R2J-2-GP

1 2R197100R2F-L1-GP-UR197100R2F-L1-GP-U

C454

SC220P50V3JN-GP

1394C454

SC220P50V3JN-GP

1394

123

4

RN29

SRN4K7J-8-GP

RN29

SRN4K7J-8-GP

1 2R38910KR2J-3-GP

R38910KR2J-3-GP

12C334 SC12P50V2JN-3GP

1394

C334 SC12P50V2JN-3GP

1394

1

2

R43356R2J-4-GP1394

R43356R2J-4-GP1394

1 2R1994K7R2J-2-GP

R1994K7R2J-2-GP

1


N

C

#

E

5

E

5

L

A

T

C

H

/

V

D

3

/

V

P

P

D

0

C

9

C

L

O

C

K

/

V

D

1

/

V

C

C

D

0

#

A

9

D

A

T

A

/

V

D

2

/

V

P

P

D

1

B

9

G

R

S

T

#

K

5

P

C

L

K

L

1

P

R

S

T

#

K

3

DEVSEL#U6FRAME#R6GNT#L2IDSEL N5IRDY#V5PERR#R7REQ#L3SERR#W6STOP#V6TRDY#W5

R

S

V

D

#

B

1

0

/

D

2

B

1

0

R

S

V

D

#

C

4

/

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D

0

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V

C

C

D

1

#

C

4

R

S

V

D

#

D

1

D

1

R

S

V

D

#

E

1

E

1

R

S

V

D

#

E

2

E

2

R

S

V

D

#

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3

E

3

R

S

V

D

#

F

2

F

2

R

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V

D

#

F

3

F

3

R

S

V

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#

F

5

F

5

R

S

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D

#

G

6

G

6

R

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D

#

H

1

7

/

A

1

8

H

1

7

R

S

V

D

#

M

1

9

/

D

1

4

M

1

9

A_USB_EN# E10CLK_48 F1

MFUNC0 G1MFUNC1 H5MFUNC2 H2MFUNC3 H1MFUNC4 J1MFUNC5 J2MFUNC6 J3

PHY_TEST_MA P17RI_OUT#/PME# L5

SCL G2SDA G3

SPKROUT H3SUSPEND# J5

P

C

2

W

1

2

P

C

1

V

1

2

P

C

0

U

1

2

CRST#/RESET C15CCLKRUN#/WP/IOIS16# A11

CCLK/A16 F18

C

A

U

D

I

O

/

B

V

D

2

/

S

P

K

R

#

B

1

2

C

C

D

1

#

/

C

D

1

#

N

1

5

C

C

D

2

#

/

C

D

2

#

B

1

1

C

D

E

V

S

E

L

#

/

A

2

1

F

1

9

C

F

R

A

M

E

#

/

A

2

3

E

1

9

C

G

N

T

#

/

W

E

#

G

1

7

C

I

N

T

#

/

R

E

A

D

Y

/

I

R

E

Q

#

E

1

2

C

I

R

D

Y

#

/

A

1

5

F

1

7

C

P

E

R

R

#

/

A

1

4

G

1

9

C

R

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Q

#

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I

N

P

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K

#

C

1

4

C

S

E

R

R

#

/

W

A

I

T

#

C

1

2

C

S

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P

#

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2

0

G

1

8

C

S

T

S

C

H

G

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V

D

1

/

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T

S

C

H

G

#

/

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I

#

A

1

2

C

T

R

D

Y

#

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2

2

G

1

5

C

V

S

1

/

V

S

1

#

A

1

3

C

V

S

2

/

V

S

2

#

B

1

6

TPA0NW14TPA0PV14TPA1NW16TPA1PV16TPB0NW13TPB0PV13TPB1NW15TPB1PV15TPBIAS0R13TPBIAS1W17

MS_CD#A8MS_CLK/SD_CLK/SM_EL_WP#A7MS_SDIO/DATA0/SD_DAT0/SM_D0B7MS_DATA1/SD_DAT1/SM_D1C7MS_DATA2/SD_DAT2/SM_D2A6MS_DATA3/SD_DAT3/SM_D3B6

CPSR12R0T18R1T19

MS_BS/SD_CMD/SM_WE#E8

XIR19XOR18

SM_CD# B8SM_CLE B4

XD_CD#/SM_PHYS

acer extensa 4220 4620 - wistron biwa - rev -2sec

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