acer travelmate 4150 dunlin la-2601 schematics
TRANSCRIPT
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Title
Size Document Number R ev
Date: Sheet o f
401336 C
SCHEMATIC, M/B LA-2601
1 51P , 17, 2005
Compal Electronics, Inc.
Dunlin LA-2601 Schematics DocumentIntel Dothan / Alviso GM(PM) / DDR-2 / ICH6-M
2005 / 03 / 14
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Rev:1.0
(NV43/44M)
P01-Cover PageP02-Block DiagramP03-Notes ListP04-Dothan(1/2)P05-Dothan(2/2)P06-Alviso HOST(1/5)P07-Alviso DDR(2/5)
Page Index===============
P08-Alviso PCI-E(3/5)P09-Alviso POWER(4/5)P10-Alviso POWER(5/5)P11-DDRI-SODIMM0P12-DDRI-SODIMM1P13-DDR DecouplingP14-Clock GeneratorP15-CRT Conn.P16-VGA / LCD Conn.P17-ICH6(1/4)_HUB,PCI,HOSTP18-ICH6(2/4)_CPU,AC97,IDE,LPCP19-ICH6(3/4)_USB,PM,LAN,GPIOP20-ICH6(4/4)_POWER&GNDP21-HDD/CDROMP22-DVI / TV_Out ConnP23-PCMCIA ENE CB1410 & CB714P24-PCMCIA SOCKETP25-TI 1394A TSB43AB21AP26-LAN BCM5788MP27-LAN Magnetic & RJ45/RJ11P28-Mimi-PCI SlotP29-AC97 Codec_ALC250DP30-Audio Line in SwitchP31-AMP & Audio JackP32-Super IO SMC217P33-ENE-KB910P34-MDC / BT / KBD / TP Conn.P35-BIOS & I/O Port & SATA HDDP36-RJ11/LID Switch / Fan / FIRP37-USB2.0 ConnP38-Docking Conn.P39-PWR_OK / RTCP40-DC INTERFACEP41-ScrewsP42-PWR-DCIN / PrechargeP43-PWR-ChargerP44-PWR-Battery SelectP45-PWR-3V/5V/12VP46-PWR-GMCH_CORE/1.8V/0.9VP47-PWR-1.5V/2.5VP48-PWR-CPU_COREP49-PWR-OTPP50-PWR-PIR
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Title
Size Document Number R ev
Date: Sheet o f
401336 C
SCHEMATIC, M/B LA-2601
2 51P , 17, 2005
Compal Electronics, Inc.
Power On/Off CKT.
File Name : LA-2601
LPC BUS
page 29
Compal confidential
PCBGA 1257
page 21
H_A#(3..31)
ENE Controller
H_D#(0..63)
CB714
page 31
page 37
BANK 0, 1, 2, 3
USB conn x 4
400 / 533 Mhz
DMI
page 23,24
DC/DC Interface CKT.
page 39
FSB
Clock GeneratorICS954226AGT
Power Circuit DC/DC
PATA HDD
PCI BUS
Intel Dothan CPU
page 39
DDR-SO-DIMM X2
page 40
Intel Alviso GM(PM)
page 4page 4,5
RTC CKT.
page 14
DDR-2
mBGA-609
page 39
AC-LINK
page 6,7,8,9,10
Intel ICH6-M
Thermal SensorADM1032ARM
page 11,12,13
page 17,18,19,20
Docking CONN.*RJ-11 / 45(LED*2)*COMPOSITE Video Out*TVOUT*LINE IN / OUT*PS/2*Print port*1394*USB*DC JACK
AMP & Audio Jack
Power OK CKT.
page 39
page 34
Slot 0page 24
BT Conn
PATA
page 15
CRT/TV-OUT
5in1 CardReaderSlot
LCD CONNpage 16
page 24
page 42~49
page 28
Mini PCIsocket
page 27RJ45 CONN
MODULEConnector
Touch Pad CONN.
ENE KB910/910Lpage 33
page 34
Int. KBDpage 34
BIOSpage 35
page 36RJ11 CONN
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
USB 2.0
USB 2.0
SATA
MV43 / MV44VGA Board
conn
page 16
Two Channel DDR-2Signal Channel DDR-1
page 21
SATA HDD
ALC250-DAudio CKT
PCI-E BUS
page 32SMsC LPC47N217
Parellel Portpage 38
Serial Portpage 38
page 25Conn.1394
page 25
1394 ControllerTSB43AB21
page 26
BROADCOMBCM5788MBCM4401
DOCKING CONNDOCKING CONN
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Title
Size Document Number R ev
Date: Sheet o f401336 C
SCHEMATIC, M/B LA-2601
3 51P , 17, 2005
Compal Electronics, Inc.
Voltage Rails
VINB++CPU_CORE+1.05VS
Adapter power supply (19V)AC or battery power rail for power circuit.Core voltage for CPU1.05V switched power rail
External PCI DevicesDevice IDSEL# REQ#/GNT# InterruptsCardB us
Mini-PCI
AD20
AD18
EC SM Bus1 addressDevice
ADM1032
2'nd Battery
S1 S3 S5
ON OFFON OFF
N/A N/A N/AN/AN/AN/A
Power Plane Description
OFFOFF
ONOFF
OFF
OFF
OFFON
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
ON
OFFON
ON
ON
ONON
OFF
ON*OFF
OFFON
EC SM Bus2 addressDevice
Smart Battery
2
1
PIRQA/PIRQB
PIRQG/PIRQH
ON
EEPROM(24C16/02) 1001 011X b
1001 110X b0001 011X b
1010 000X b
ON OFF OFF
(24C04) 1011 000Xb
ICH6M SM Bus addressDevice
Clock Generator( ICS 952623)
Address
Address Address
1101 001Xb
ON ON*
ON OFF OFF
13 94 AD16 0 PIRQE
STATESIGNAL
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
ON
ON
ON
ON
ON
ON
ON ON
ON
ON
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
LOW
LOW LOW LOW LOW
LOWLOWLOW
LOW
LOW
LOW
HIGH HIGH HIGH HIGH
HIGHHIGHHIGH
HIGH
HIGH
HIGH
Board ID / SKU ID Table for AD channelON OFF OFF
DDR DIMM0 1010 000XbDDR DIMM2 1010 010Xb
Vcc 3.3V +/- 5%100K +/- 5%Ra / Rc
Board ID Rb / Rd V min0123
08.2K +/- 5%
0 V0.216 V 0.250 V 0.289 V0.436 V0.712 V
0.503 V0.819 V
0.538 V0.875 V
AD_BID V typAD_BID VAD_BID max
18K +/- 5%33K +/- 5%56K +/- 5%100K +/- 5%200K +/- 5%
3.300 V
0 V 0 V
4567 NC
1.036 V1.453 V 1.650 V 1.759 V1.935 V2.500 V
2.200 V3.300 V
2.341 V
1.185 V 1.264 V
Board ID01234567
PCB Revision0.1
ON
S D AD20
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
PIRQA/PIRQB2
+DDRVTT 1.25V switched power rail for DDR terminator
+RTCVCC RTC power
+1.5VS+1.8VS 1.8V switched power rail
+2.5VS
+5VS
+3V+3VS+5VALW
+DDRVCC2.5V switched power rail
+3VALW
2.5V power rail for DDR
3.3V always on power rail3.3V power rail
5V always on power rail3.3V switched power rail
5V switched power rail
+1.5VALW 1.5V always on power rail
+12VALW 12V always on power rail+5VMOD 5V switched power rail for Module Bay
ONON ON*ON ONON
OFF OFFON
ON*ON1.5V switched power rail
BOARD ID Table
LAN AD17 3 PIRQF
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4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_A#15
H_D#19
H_D#43
H_A#4
H_A#23
H_A#28
H_D#15H_D#16
H_D#63
H_REQ#1
H_A#8
H_A#17
H_A#27
H_D#41
H_D#56
H_D#59
H_D#62
H_A#3
H_A#7
H_A#10
H_D#29
H_D#37
H_A#14
H_A#20
H_D#23
H_D#26
H_D#32
H_D#39
H_D#49
H_RS#0
H_D#2
H_D#4
H_D#8
H_D#28
H_D#45
H_D#51
H_A#18H_A#19
H_D#30
H_D#60
H_REQ#2
H_CPURST#
H_D#27
H_D#55
H_A#6
H_D#1
H_D#7
H_D#10
H_D#17H_D#18
H_REQ#0
H_A#24
H_D#3
H_D#44
H_D#52
H_A#12
H_D#0
H_D#12
H_D#14
H_D#38
H_D#40
H_D#46
H_D#50
H_D#61
H_REQ#4
H_A#29H_A#30
H_D#21
H_D#48
H_D#58
H_IERR#
H_A#26
H_A#31
H_D#11
H_D#24
H_D#36
H_D#53H_D#54
H_A#5
H_D#9
H_D#20
H_D#22
H_A#9
H_A#25
H_D#5
H_D#13
H_D#33
H_D#57
H_RS#2
H_A#11
H_A#16
H_A#22
H_D#31
H_D#34H_D#35
H_RS#1
H_A#13
H_A#21
H_D#6
H_D#25
H_D#42
H_D#47
H_REQ#3
THERMDATHERMDC
H_A#[3..31]
H_REQ#[0..4]
H_D#[0..63]
PRO_CHOT#
H_PWRGOOD
ITP_DBRRESET#
ITP_TMS
ITP_TDO
ITP_TCK
THERMDA
THERMDC
PRO_CHOT#
ITP_TCK
ITP_TRST#
TEST1ITP_TDOITP_TDI
ITP_TMSTEST2
H_CPUSLP#
H_PWRGOOD
H_IERR#
ITP_DBRRESET#
TEST1
TEST2
H_CPURST#
H_RS#[0..2]
ITP_TDI
ITP_TRST#
H_DINV#1
H_DINV#3
H_DSTBN#1
H_DSTBN#3
H_D#[0..63]
H_A#[3..31]
H_REQ#[0..4]
H_DSTBP#1
H_DSTBP#3
H_DINV#2
H_DINV#0
H_DSTBP#0
H_DSTBP#2
H_DSTBN#0
H_DSTBN#2
H_A20M#
H_INIT#
H_STPCLK# H_SMI#
H_IGNNE#
H_THERMTRIP#
H_CPURST#
H_NMI H_INTR
H_DPSLP#
H_CPUSLP#H_PWRGOOD
CLK_CPU_BCLKCLK_CPU_BCLK#
H_ADS#
H_ADSTB#0H_ADSTB#1
H_BNR#H_BPRI#
H_BR0#
H_DBSY#
H_DEFER#
H_DPWR#
H_DRDY#
H_FERR#
H_HIT#H_HITM#
H_LOCK#
H_TRDY#
H_DPRSTP#
EC_SMB_CK2
EC_SMB_DA2
H_RS#[0..2]
+3VS
+1.05VS
+3VS
Title
Size Document Number R ev
Date: Sheet o f
401336 C
SCHEMATIC, M/B LA-2601
4 51P , 17, 2005
Compal Electronics, Inc.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THERMDA & THERMDC Trace / Space = 10 / 10 mil
U3
ADM1032ARM_RM8
VDD1 1
ALERT# 6
THERM# 4
GND 5
D+2
D-3
SCLK8
SDATA7
R28 54.9_0402_1%@12
R508 150_0402_5%
12
C120.1U_0402_16V4Z
1
2C17
2200P_0402_50V7K
1
2
R25 1K_0402_5%@ 12
R26 150_0402_5%12
R27 40.2_0402_1%12
R46 1K_0402_5%@ 12
R24 200_0402_5%12
R29 54.9_0402_1%@12
R30 27.4_0402_1%12
R31 56_0402_5%12
R23 56_0402_5%12
R2010K_0402_5%@
1
2
ADDR GROUP
CONTROL GROUP
HOST CLK
MISC
DATA GROUP
THERMALDIODE
LEGACY CPU
DothanJP7A
TYCO_1612365-1_Dothan
A3#P4A4#U4A5#V3A6#R3A7#V2A8#W1A9#T4A10#W2A11#Y4A12#Y1A13#U1A14#AA3A15#Y3A16#AA2A17#AF4A18#AC4A19#AC7A20#AC3A21#AD3A22#AE4A23#AD2A24#AB4A25#AC6A26#AD5A27#AE2A28#AD6A29#AF3A30#AE1A31#AF1
REQ0#R2REQ1#P3REQ2#T2REQ3#P1REQ4#T1
ADSTB0#U3ADSTB1#AE5
BCLK0B15BCLK1B14
ITP_CLK0A16ITP_CLK1A15
ADS#N2BNR#L1BPRI#J3BR0#N4DEFER#L4DRDY#H2HIT#K3HITM#K4IERR#A4LOCK#J2RESET#B11
RS0#H1RS1#K1RS2#L2TRDY#M3
BPM0#C8BPM1#B8BPM2#A9BPM3#C9
DBR#A7DBSY#M2DPSLP#B7
DPWR#C19PRDY#A10PREQ#B10PROCHOT#B17
PWRGOODE4SLP#A6TCKA13TDIC12TDOA12TEST1C5TEST2F23TMSC11TRST#B13
THERMDAB18THERMDCA18THERMTRIP#C17
D0# A19D1# A25D2# A22D3# B21D4# A24D5# B26D6# A21D7# B20D8# C20D9# B24
D10# D24D11# E24D12# C26D13# B23D14# E23D15# C25D16# H23D17# G25D18# L23D19# M26D20# H24D21# F25D22# G24D23# J23D24# M23D25# J25D26# L26D27# N24D28# M25D29# H26D30# N25D31# K25D32# Y26D33# AA24D34# T25D35# U23D36# V23D37# R24D38# R26D39# R23D40# AA23D41# U26D42# V24D43# U25D44# V26D45# Y23D46# AA26D47# Y25D48# AB25D49# AC23D50# AB24D51# AC20D52# AC22D53# AC25D54# AD23D55# AE22D56# AF23D57# AD24D58# AF20D59# AE21D60# AD21D61# AF25D62# AF22D63# AF26
DINV0# D25DINV1# J26DINV2# T24DINV3# AD20
DSTBN0# C23DSTBN1# K24DSTBN2# W25DSTBN3# AE24DSTBP0# C22DSTBP1# L24DSTBP2# W24DSTBP3# AE25
A20M# C2FERR# D3
IGNNE# A3INIT# B5LINT0 D1LINT1 D4
STPCLK# C6SMI# B4
DPRSTP#G1
R509 680_0402_5%
12
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
COMP3
GTL_REF0
COMP2COMP1
VCCSENSEVSSSENSE
COMP0
COMP3
COMP2
COMP1
COMP0
CPU_VID0CPU_VID1CPU_VID2CPU_VID3CPU_VID4CPU_VID5
PSI#
CPU_BSEL0CPU_BSEL1
+CPU_CORE
+1.05VS
+1.05VS
+1.05VS
+CPU_CORE
+1.8VS
+VCCA
+1.5VS
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
Title
Size Document Number R ev
Date: Sheet o f
401336 C
SCHEMATIC, M/B LA-2601
5 51P , 17, 2005
Compal Electronics, Inc.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
3X330uF 9m ohm/3 3.5nH/4
Vcc-coreDecoupling
35X10uF 5m ohm/35 0.6nH/35
C,uF ESR, mohm ESL,nH
SPCAP,PolymerMLCC 0805 X5R
1.8V FOR DOTHAN-A
1.5V FOR DOTHAN-B
TRACE CLOSELY CPU < 0.5'COMP0, COMP2 layout : Width 18mils and Space 25mils COMP1, COMP3 layout : Space 25mils
C47
10U_0805_10V4Z
1
2
R84 54.9_0402_1%@1 2 + C460
220U_D2_4VM_R121
2
C512
10U_0805_10V4Z1
2
C510
10U_0805_10V4Z1
2
C453
0.1U_0402_16V4Z
1
2
C31
10U_0805_10V4Z1
2
C39
10U_0805_10V4Z
1
2
R85 54.9_0402_1%@1 2
C48
10U_0805_10V4Z1
2
R751K_0402_1%
1
2
Dothan
POWER, GROUND
JP7C
TYCO_1612365-1_Dothan
VCCF20VCCF22VCCG5VCCG21VCCH6VCCH22VCCJ5VCCJ21VCCK22VCCU5VCCV6VCCV22VCCW5VCCW21VCCY6VCCY22VCCAA5VCCAA7VCCAA9VCCAA11VCCAA13VCCAA15VCCAA17VCCAA19VCCAA21VCCAB6VCCAB8VCCAB10VCCAB12VCCAB14VCCAB16VCCAB18VCCAB20VCCAB22VCCAC9VCCAC11VCCAC13VCCAC15VCCAC17VCCAC19VCCAD8VCCAD10VCCAD12VCCAD14VCCAD16VCCAD18VCCAE9VCCAE11VCCAE13VCCAE15VCCAE17VCCAE19VCCAF8VCCAF10VCCAF12VCCAF14VCCAF16VCCAF18
VSSM4VSSM5VSSM21VSSM24VSSN3VSSN6VSSN22VSSN23VSSN26VSSP2VSSP5VSSP21VSSP24VSSR1VSSR4VSSR6VSSR22VSSR25VSST3VSST5VSST21VSST23
VSS T26VSS U2VSS U6VSS U22VSS U24VSS V1VSS V4VSS V5VSS V21VSS V25VSS W3VSS W6VSS W22VSS W23VSS W26VSS Y2VSS Y5VSS Y21VSS Y24VSS AA1VSS AA4VSS AA6VSS AA8VSS AA10VSS AA12VSS AA14VSS AA16VSS AA18VSS AA20VSS AA22VSS AA25VSS AB3VSS AB5VSS AB7VSS AB9VSS AB11VSS AB13VSS AB15VSS AB17VSS AB19VSS AB21VSS AB23VSS AB26VSS AC2VSS AC5VSS AC8VSS AC10VSS AC12VSS AC14VSS AC16VSS AC18VSS AC21VSS AC24VSS AD1VSS AD4VSS AD7VSS AD9VSS AD11VSS AD13VSS AD15VSS AD17VSS AD19VSS AD22VSS AD25VSS AE3VSS AE6VSS AE8VSS AE10VSS AE12VSS AE14VSS AE16VSS AE18VSS AE20VSS AE23VSS AE26VSS AF2VSS AF5VSS AF9VSS AF11VSS AF13VSS AF15VSS AF17VSS AF19VSS AF21VSS AF24
R82 54.9_0402_1%1 2
R83 27.4_0402_1%1 2
R78 2K_0402_1%1 2
Dothan
P
O
W
E
R
,
G
R
O
U
N
G
,
R
E
S
E
R
V
E
D
S
I
G
N
A
L
S
A
N
D
N
C
JP7B
TYCO_1612365-1_Dothan
PSI#E1
GTLREFAD26
VCCQ0P23VCCQ1W4
VCCSENSEAE7VSSSENSEAF6
BSEL0C16BSEL1C14
VCCA0F26VCCA1B1VCCA2N1VCCA3AC26
VCCPD10VCCPD12VCCPD14VCCPD16VCCPE11VCCPE13VCCPE15VCCPF10VCCPF12VCCPF14VCCPF16VCCPK6VCCPL5VCCPL21VCCPM6VCCPM22VCCPN5VCCPN21VCCPP6VCCPP22VCCPR5VCCPR21VCCPT6VCCPT22VCCPU21
VCCD6VCCD8VCCD18VCCD20VCCD22VCCE5VCCE7VCCE9VCCE17VCCE19VCCE21VCCF6VCCF8VCCF18
VID0E2VID1F2VID2F3VID3G3VID4G4VID5H4
COMP0P25COMP1P26COMP2AB2COMP3AB1
RSVDAF7
RSVDB2RSVDC3RSVDE26
VSS A2VSS A5VSS A8VSS A11VSS A14VSS A17VSS A20VSS A23VSS A26VSS B3VSS B6VSS B9VSS B12VSS B16VSS B19VSS B22VSS B25VSS C1VSS C4VSS C7VSS C10VSS C13VSS C15VSS C18VSS C21VSS C24VSS D2VSS D5VSS D7VSS D9VSS D11VSS D13VSS D15VSS D17VSS D19VSS D21VSS D23VSS D26VSS E3VSS E6VSS E8VSS E10VSS E12VSS E14VSS E16VSS E18VSS E20VSS E22VSS E25VSS F1VSS F4VSS F5VSS F7VSS F9VSS F11VSS F13VSS F15VSS F17VSS F19VSS F21VSS F24VSS G2VSS G6VSS G22VSS G23VSS G26VSS H3VSS H5VSS H21VSS H25VSS J1VSS J4VSS J6VSS J22VSS J24VSS K2VSS K5VSS K21VSS K23VSS K26VSS L3VSS L6VSS L22VSS L25VSS M1
RSVDAC1
C461
0.1U_0402_16V4Z
1
2
+C435
150U_D2_6.3VM
1
2
C458
0.1U_0402_16V4Z
1
2
C40
10U_0805_10V4Z
1
2
C454
10U_0805_10V4Z
1
2
R56 0_1206_5%1 2
C42
10U_0805_10V4Z1
2
C69
10U_0805_10V4Z
1
2
C30
10U_0805_10V4Z
1
2
C66
10U_0805_10V4Z
1
2
C14
0.1U_0402_16V4Z
1
2
C15
0.1U_0402_16V4Z
1
2
C68
10U_0805_10V4Z
1
2
C26
10U_0805_10V4Z
1
2
R63 0_1206_5%@1 2
C16
0.1U_0402_16V4Z
1
2
C430
10U_0805_10V4Z
1
2
+
C441
220U_D2_4VM_R12
1
2
C516
10U_0805_10V4Z
1
2
R70 54.9_0402_1%1 2
C64
10U_0805_10V4Z
1
2
C41
10U_0805_10V4Z1
2
C45
10U_0805_10V4Z
1
2
C445
0.1U_0402_16V4Z
1
2
C67
10U_0805_10V4Z1
2
C443
10U_0805_10V4Z
1
2
C25
0.01U_0402_16V7K
1
2
C13
0.1U_0402_16V4Z
1
2
C429
10U_0805_10V4Z
1
2
+ C472
220U_D2_4VM_R121
2
C471
10U_0805_10V4Z1
2
C65
10U_0805_10V4Z1
2
C509
10U_0805_10V4Z
1
2
C33
10U_0805_10V4Z
1
2
C455
10U_0805_10V4Z1
2
C442
0.1U_0402_16V4Z
1
2
C470
10U_0805_10V4Z1
2
+
C427
220U_D2_4VM_R12
1
2
C513
10U_0805_10V4Z
1
2
C70
10U_0805_10V4Z1
2
C46
10U_0805_10V4Z1
2
C515
10U_0805_10V4Z
1
2
C444
10U_0805_10V4Z1
2
C32
10U_0805_10V4Z
1
2
R69 27.4_0402_1%1 2
C448
0.1U_0402_16V4Z
1
2
C511
10U_0805_10V4Z
1
2
C514
10U_0805_10V4Z1
2
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_D#[0..63]H_REQ#[0..4]
H_A#[3..31]
H_RS#0H_RS#1H_RS#2
H_REQ#1H_REQ#0
H_REQ#2
H_REQ#4H_REQ#3
H_A#28
H_A#6
H_A#14
H_A#4
H_A#22
H_A#31
H_A#19H_A#18
H_A#8
H_A#24
H_A#27
H_A#16
H_A#9
H_A#21
H_A#25
H_A#7
H_A#15
H_A#17
H_A#10
H_A#30
H_A#26
H_A#5
H_A#3
H_A#23
H_A#20
H_A#11
H_A#29
H_A#13H_A#12
H_D#21
H_D#23
H_D#46
H_D#11
H_D#2
H_D#31
H_D#50
H_D#37
H_D#58
H_D#35
H_D#8
H_D#5
H_D#39
H_D#30
H_D#27
H_D#52
H_D#10
H_D#51
H_D#44
H_D#60
H_D#18
H_D#59
H_D#4
H_D#56
H_D#14
H_D#43
H_D#3
H_D#62
H_D#48
H_D#28
H_D#63
H_D#34
H_D#24
H_D#55
H_D#13
H_D#36
H_D#57
H_D#29
H_D#20
H_D#16
H_D#22
H_D#9
H_D#17
H_D#45
H_D#0
H_D#53
H_D#26
H_D#1
H_D#41
H_D#47
H_D#7
H_D#33
H_D#40
H_D#15
H_D#61
H_D#38
H_D#25
H_D#54
H_D#42
H_D#6
H_D#49
H_D#19
H_D#12
H_D#32
CPU_SLP#
CPU_SLP#
H_VREF H_XSWING H _YSW ING
H_VREF
H_XSWINGH _YSW ING
H_XRCOMPH_XSCOMPH_YRCOMPH_YSCOMP
DMI_ITX_MRX_N2
CFG13
M_OCDCOMP1
DMI_MTX_IRX_N2
DMI_ITX_MRX_N3
DMI_ITX_MRX_P0
M_YSLEW
CFG18
DMI_MTX_IRX_P2CFG18
CFG19
DMI_ITX_MRX_P2
CFG5
CFG16 CFG6
DDR_CS0_DIMMA#
SMVREF
CFG6
M_XSLEW
CFG7
DDR_CKE2_DIMMB
DMI_ITX_MRX_P3
M_RCOMPP
DMI_MTX_IRX_N0
CFG12
DMI_MTX_IRX_N1
DDR_CKE0_DIMMA
CFG0
CFG13
DDR_CS3_DIMMB#
DDR_CKE3_DIMMB
DMI_ITX_MRX_N0DMI_ITX_MRX_N1
CFG9
CFG12
CFG16
M_RCOMPN
SMVREF
DMI_MTX_IRX_N3
DDR_CS2_DIMMB#
DDR_CKE1_DIMMA
DMI_ITX_MRX_P1
M_OCDCOMP0
DMI_MTX_IRX_P3
CFG9
CFG5
DDR_CS1_DIMMA#
CFG19
CFG7
EXT_TS#0EXT_TS#1H_THERMTRIP#
CLK_DREF_96M#CLK_DREF_96MCLK_DREF_SSCCLK_DREF_SSC#
MCH_CLKSEL1MCH_CLKSEL0
CFG0
H_RS#[0..2]
DMI_MTX_IRX_P1DMI_MTX_IRX_P0
EXT_TS#0
EXT_TS#1
CLK_DREF_SSC
CLK_DREF_SSC#
M_ODT0M_ODT1M_ODT2M_ODT3
H_D#[0..63]
H_BPRI#
H_HIT#
H_DEFER#
H_TRDY#
H_ADSTB#0H_ADSTB#1
H_DSTBP#0
H_DSTBN#0
H_DSTBP#1
H_DSTBN#1
H_DSTBP#2
H_DSTBN#2
H_DSTBP#3
H_DSTBN#3
H_A#[3..31]
H_REQ#[0..4]
H_DINV#0H_DINV#1H_DINV#2H_DINV#3
H_HITM#
H_ADS#
H_CPURST#
H_BNR#
H_LOCK#H_BR0#
H_DRDY#
H_DBSY#
H_CPUSLP#
M_CLK_DDR#4
DDR_CKE3_DIMMB
DMI_MTX_IRX_P3
M_CLK_DDR3
DDR_CS1_DIMMA#
M_CLK_DDR#0
DMI_MTX_IRX_P2
M_CLK_DDR#3
DMI_MTX_IRX_P0
DMI_MTX_IRX_N2DMI_MTX_IRX_N3
DMI_MTX_IRX_P1
DMI_MTX_IRX_N0DMI_MTX_IRX_N1
DMI_ITX_MRX_P1DMI_ITX_MRX_P2
DMI_ITX_MRX_P0
M_CLK_DDR#1
DDR_CS0_DIMMA#
DDR_CKE1_DIMMA
DMI_ITX_MRX_P3
M_CLK_DDR1
DMI_ITX_MRX_N2DMI_ITX_MRX_N3
DMI_ITX_MRX_N0DMI_ITX_MRX_N1
M_CLK_DDR4
DDR_CKE2_DIMMB
DDR_CKE0_DIMMA
M_CLK_DDR0
PM_BMBUSY#
H_THERMTRIP#
CLK_DREF_96M# CLK_DREF_96M
CLK_DREF_SSC# CLK_DREF_SSC
PLT_RST#
MCH_CLKSEL1 MCH_CLKSEL0
VGATE
H_RS#[0..2]
H_DPWR#
CLK_MCH_BCLKCLK_MCH_BCLK#
DDR_CS3_DIMMB#DDR_CS2_DIMMB#
M_ODT0M_ODT1M_ODT2M_ODT3
+1.05VS +1.05VS+1.05VS
+1.05VS
+DDRVCC
+DDRVCC
+2.5VS
+2.5VS
+1.5VS
+1.05VS
Title
Size Document Number R ev
Date: Sheet o f
401336 C
SCHEMATIC, M/B LA-2601
6 51P , 17, 2005
Compal Electronics, Inc.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
CFG[19:18]: internal pull-down
CFG[17:3]: internal pull-up
CFG[2:0]Refer to sheet 6 for FSBfrequency select
CFG19 (VTT Select)
**
CFG18 (VCC Select)
Low = DMI x 2
CFG7
High = DMI x 4CFG5
Low = DT/Transportable CPUHigh = Mobile CPU
CFG6 High = DDR-ILow = DDR-II
CFG[13:12]
CFG16(FSB DynamicODT)
Low = 1.05V (Default)
00 = Reserved01 = XOR Mode Enabled10 = All Z Mode Enabled11 = Normal Operation (Default)
High = 1.2V
Low = 1.05V (Default)High = 1.5V
High = EnabledLow = Disabled
Low = Reverse LaneCFG9High = Normal Operation
**
*
*
*
*(5mil:15mil) (12mil:10mil)
(12mil:10mil)
(10mil:20mil)
Un-pop for Dothan-A
H_XRCOMP & H_YRCOMP Trace / Space = 10 / 20 mil
H
O
S
T
AlvisoU5A
ALVISO_BGA1257
HD0# E4HD1# E1HD2# F4HD3# H7HD4# E2HD5# F1HD6# E3HD7# D3HD8# K7HD9# F2
HD10# J7HD11# J8HD12# H6HD13# F3HD14# K8HD15# H5HD16# H1HD17# H2HD18# K5HD19# K6HD20# J4HD21# G3HD22# H3HD23# J1HD24# L5HD25# K4HD26# J5HD27# P7HD28# L7HD29# J3HD30# P5HD31# L3HD32# U7HD33# V6HD34# R6HD35# R5HD36# P3HD37# T8HD38# R7HD39# R8HD40# U8HD41# R4HD42# T4HD43# T5HD44# R1HD45# T3HD46# V8HD47# U6HD48# W6HD49# U3HD50# V5HD51# W8HD52# W7HD53# U2HD54# U1HD55# Y5HD56# Y2HD57# V4HD58# Y7HD59# W1HD60# W3HD61# Y3HD62# Y6HD63# W2
HA3#G9HA4#C9HA5#E9HA6#B7HA7#A10HA8#F9HA9#D8HA10#B10HA11#E10HA12#G10HA13#D9HA14#E11HA15#F10HA16#G11HA17#G13HA18#C10HA19#C11HA20#D11HA21#C12HA22#B13HA23#A12HA24#F12HA25#G12HA26#E12HA27#C13HA28#B11HA29#D13HA30#A13HA31#F13
HREQ#0A7HREQ#1D7HREQ#2B8HREQ#3C7HREQ#4A8HADSTB#0B9HADSTB#1E13
HPCREQ#A11
HCLKNAB1HCLKPAB2
HVREF J11HXRCOMP C1HXSCOMP C2HYRCOMP T1HYSCOMP L1
HYSWING P1HXSWING D1
HDSTBN#0G4HDSTBN#1K1HDSTBN#2R3HDSTBN#3V3HDSTBP#0G5HDSTBP#1K2HDSTBP#2R2HDSTBP#3W4HDINV#0H8HDINV#1K3HDINV#2T7HDINV#3U5
HCPURST#H10
HADS#F8HTRDY#B5HDPWR#G6HDRDY#F7HDEFER#E6HEDRDY#F6HHITM#D6HHIT#D4HLOCK#B3HBREQ0#E7HBNR#A5HBPRI#D5HDBSY#C6HCPUSLP#G8HRS0#A4HRS1#C5HRS2#B4
R419100_0603_1%
1
2
C4890.1U_0402_16V4Z
1
2
C488
0.1U_0402_16V4Z
1
2
R426 40.2_0402_1%1 2
R40 10K_0402_5%1 2
D
M
I
D
D
R
M
U
X
I
N
G
C
F
G
/
R
S
V
D
P
M
C
L
K
N
C
U5B
ALVISO_BGA1257
DMIRXN0AA31DMIRXN1AB35
DMIRXP0Y31DMIRXP1AA35
DMITXN0AA33DMITXN1AB37
DMITXP0Y33DMITXP1AA37
SM_CK0AM33SM_CK1AL1SM_CK2AE11SM_CK3AJ34SM_CK4AF6SM_CK5AC10
SM_CK0#AN33SM_CK1#AK1SM_CK2#AE10SM_CK3#AJ33SM_CK4#AF5SM_CK5#AD10
SM_CKE0AP21SM_CKE1AM21SM_CKE2AH21SM_CKE3AK21
SM_CS0#AN16SM_CS1#AM14SM_CS2#AH15SM_CS3#AG16
SM_OCDCOMP0AF22SM_OCDCOMP1AF16SM_ODT0AP14SM_ODT1AL15SM_ODT2AM11SM_ODT3AN10
SMRCOMPNAK10SMRCOMPPAK11SMVREF0AF37SMVREF1AD1SMXSLEWINAE27SMXSLEWOUTAE28SMYSLEWINAF9SMYSLEWOUTAF10
CFG0 G16CFG1 H13CFG2 G14CFG3 F16CFG4 F15CFG5 G15CFG6 E16CFG7 D17CFG8 J16CFG9 D15
CFG10 E15CFG11 D14CFG12 E14CFG13 H12CFG14 C14CFG15 H15CFG16 J15CFG17 H14CFG18 G22CFG19 G23CFG20 D23
RSVD21 G25RSVD22 G24RSVD23 J17RSVD24 A31RSVD25 A30RSVD26 D26RSVD27 D25
BM_BUSY# J23EXT_TS0# J21EXT_TS1# H22
THRMTRIP# F5PWROK AD30RSTIN# AE29
DREF_CLKN A24DREF_CLKP A23
DREF_SSCLKN C37DREF_SSCLKP D37
NC1 AP37NC2 AN37NC3 AP36NC4 AP2NC5 AP1NC6 AN1NC7 B1NC8 A2NC9 B37
NC10 A36NC11 A37
DMITXN2AC33DMITXN3AD37
DMIRXN3AD35DMIRXN2AC31
DMITXP2AB33DMITXP3AC37
DMIRXP2AB31DMIRXP3AC35
R430 80.6_0402_1%1 2
R407 1K_0402_5%1 2
R429 80.6_0402_1%1 2
R42 1K_0402_5%@1 2
C436
0.1U_0402_16V4Z
1
2
R406221_0603_1%
1
2
R412 1K_0402_5%@1 2
R68 54.9_0402_1%1 2
R421
1K_0402_1%
1
2
R417 1K_0402_5%@1 2
R423
1K_0402_1%
1
2
R51 0_0402_5%PM@1 2
R411 10K_0402_5%1 2
C423
0.1U_0402_16V4Z
1
2
R388100_0603_1%
1
2
R72 24.9_0402_1%12
R408 1K_0402_5%@1 2
R420221_0603_1%
1
2
R413 1K_0402_5%@1 2
R416 10K_0402_5%1 2
R52 0_0402_5%PM@1 2
R54 0_0402_5%1 2
R427 40.2_0402_1%1 2
R41 1K_0402_5%@ 1 2
R47 54.9_0402_1%1 2
R405
100_0603_1%
1
2
R50 24.9_0402_1%12
R409 1K_0402_5%@1 2
C459
0.1U_0402_16V4Z
1
2
R387
200_0603_1%
1
2
R404 1K_0402_5%@1 2
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_DM0DDR_A_DM1
DDR_A_DM3DDR_A_DM4
DDR_A_DM6DDR_A_DM5
DDR_A_DM2
DDR_A_DM7
DDR_A_DQS#1DDR_A_DQS#2DDR_A_DQS#3DDR_A_DQS#4DDR_A_DQS#5DDR_A_DQS#6DDR_A_DQS#7
DDR_A_DQS0DDR_A_DQS1DDR_A_DQS2DDR_A_DQS3DDR_A_DQS4DDR_A_DQS5DDR_A_DQS6DDR_A_DQS7
DDR_A_MA0DDR_A_MA1DDR_A_MA2DDR_A_MA3DDR_A_MA4DDR_A_MA5DDR_A_MA6DDR_A_MA7DDR_A_MA8DDR_A_MA9DDR_A_MA10DDR_A_MA11DDR_A_MA12DDR_A_MA13
DDR_A_DQS#0
DDR_B_DQS#4DDR_B_DQS#5
DDR_B_DQS0
DDR_B_DM6
DDR_B_DM3
DDR_B_DM0DDR_B_DM1
DDR_B_DM7
DDR_B_DM2
DDR_B_DM4DDR_B_DM5
DDR_B_DQS#6DDR_B_DQS#7
DDR_B_DQS1DDR_B_DQS2DDR_B_DQS3DDR_B_DQS4DDR_B_DQS5DDR_B_DQS6DDR_B_DQS7
DDR_B_DQS#0
DDR_B_MA0
DDR_B_MA5
DDR_B_MA3DDR_B_MA2
DDR_B_MA7
DDR_B_MA1
DDR_B_MA6
DDR_B_MA4
DDR_B_MA12
DDR_B_MA9DDR_B_MA8
DDR_B_MA10DDR_B_MA11
DDR_B_MA13
DDR_B_DQS#1DDR_B_DQS#2DDR_B_DQS#3
DDR_B_D0DDR_B_D1
DDR_B_D3DDR_B_D2
DDR_B_D7DDR_B_D6DDR_B_D5DDR_B_D4
DDR_B_D11
DDR_B_D15
DDR_B_D8DDR_B_D9
DDR_B_D12
DDR_B_D14DDR_B_D13
DDR_B_D10
DDR_B_D23
DDR_B_D19DDR_B_D18
DDR_B_D22
DDR_B_D17DDR_B_D16
DDR_B_D21
DDR_B_D30
DDR_B_D27
DDR_B_D25
DDR_B_D28
DDR_B_D31
DDR_B_D20
DDR_B_D29
DDR_B_D26
DDR_B_D24
DDR_B_D35
DDR_B_D39DDR_B_D38
DDR_B_D32DDR_B_D33DDR_B_D34
DDR_B_D46
DDR_B_D44
DDR_B_D37
DDR_B_D47
DDR_B_D36
DDR_B_D45
DDR_B_D42DDR_B_D43
DDR_B_D40
DDR_B_D49DDR_B_D50DDR_B_D51
DDR_B_D54
DDR_B_D41
DDR_B_D55
DDR_B_D53
DDR_B_D57
DDR_B_D48
DDR_B_D62
DDR_B_D60DDR_B_D61
DDR_B_D58
DDR_B_D63
DDR_B_D59
DDR_B_D52
DDR_B_D56
DDR_A_D5
DDR_A_D0
DDR_A_D3
DDR_A_D10
DDR_A_D4
DDR_A_D1
DDR_A_D11
DDR_A_D2
DDR_A_D8
DDR_A_D6
DDR_A_D9
DDR_A_D7
DDR_A_D17
DDR_A_D12DDR_A_D13
DDR_A_D16
DDR_A_D22
DDR_A_D15
DDR_A_D23
DDR_A_D20
DDR_A_D14
DDR_A_D21
DDR_A_D18DDR_A_D19
DDR_A_D29
DDR_A_D24DDR_A_D25
DDR_A_D28
DDR_A_D34
DDR_A_D27
DDR_A_D35
DDR_A_D32
DDR_A_D26
DDR_A_D33
DDR_A_D30DDR_A_D31
DDR_A_D44
DDR_A_D47
DDR_A_D39
DDR_A_D46
DDR_A_D40
DDR_A_D37DDR_A_D36
DDR_A_D41
DDR_A_D43DDR_A_D42
DDR_A_D45
DDR_A_D38
DDR_A_D53
DDR_A_D48DDR_A_D49
DDR_A_D52
DDR_A_D58
DDR_A_D51
DDR_A_D59
DDR_A_D56
DDR_A_D50
DDR_A_D57
DDR_A_D54DDR_A_D55
DDR_A_D63
DDR_A_D61DDR_A_D60
DDR_A_D62
DDR_A_CAS#DDR_A_RAS#
DDR_A_BS#0DDR_A_BS#1
DDR_A_WE# DDR_B_WE#
DDR_B_BS#0DDR_B_BS#1
DDR_B_CAS#DDR_B_RAS#
DDR_A_DM[0..7]DDR_A_BS#2
DDR_A_DQS[0..7]
DDR_A_DQS#[0..7]
DDR_A_MA[0..13]
DDR_B_BS#2DDR_B_DM[0..7]
DDR_B_DQS[0..7]
DDR_B_DQS#[0..7]
DDR_B_MA[0..13]
DDR_B_D[0..63] DDR_A_D[0..63]
Title
Size Document Number R ev
Date: Sheet o f
401336 C
SCHEMATIC, M/B LA-2601
7 51P , 17, 2005
Compal Electronics, Inc.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
D
D
R
S
Y
S
T
E
M
M
E
M
O
R
Y
B
U5D
ALVISO_BGA1257
SBDQ0 AE31SBDQ1 AE32SBDQ2 AG32SBDQ3 AG36SBDQ4 AE34SBDQ5 AE33SBDQ6 AF31SBDQ7 AF30SBDQ8 AH33SBDQ9 AH32
SBDQ10 AK31SBDQ11 AG30SBDQ12 AG34SBDQ13 AG33SBDQ14 AH31SBDQ15 AJ31SBDQ16 AK30SBDQ17 AJ30SBDQ18 AH29SBDQ19 AH28SBDQ20 AK29SBDQ21 AH30SBDQ22 AH27SBDQ23 AG28SBDQ24 AF24SBDQ25 AG23SBDQ26 AJ22SBDQ27 AK22SBDQ28 AH24SBDQ29 AH23SBDQ30 AG22SBDQ31 AJ21SBDQ32 AG10SBDQ33 AG9SBDQ34 AG8SBDQ35 AH8SBDQ36 AH11SBDQ37 AH10SBDQ38 AJ9SBDQ39 AK9SBDQ40 AJ7SBDQ41 AK6SBDQ42 AJ4SBDQ43 AH5SBDQ44 AK8SBDQ45 AJ8SBDQ46 AJ5
SB_BS0#AJ15SB_BS1#AG17SB_BS2#AG21
SBDQ47 AK4SBDQ48 AG5SBDQ49 AG4SBDQ50 AD8SBDQ51 AD9SBDQ52 AH4SBDQ53 AG6SBDQ54 AE8SBDQ55 AD7SBDQ56 AC5SBDQ57 AB8SBDQ58 AB6SBDQ59 AA8SBDQ60 AC8SBDQ61 AC7SBDQ62 AA4SBDQ63 AA5
SB_CAS#AH14SB_RAS#AK14SB_RCVENIN#AF15SB_RCVENOUT#AF14SB_WE#AH16
SB_MA0AH17SB_MA1AK17SB_MA2AH18SB_MA3AJ18SB_MA4AK18SB_MA5AJ19SB_MA6AK19SB_MA7AH19SB_MA8AJ20SB_MA9AH20SB_MA10AJ16SB_MA11AG18SB_MA12AG20SB_MA13AG15
SB_DQS0#AF35SB_DQS1#AK33SB_DQS2#AK28SB_DQS3#AJ23SB_DQS4#AL10SB_DQS5#AH7SB_DQS6#AF7SB_DQS7#AB5
SB_DQS0AF34SB_DQS1AK32SB_DQS2AJ28SB_DQS3AK23SB_DQS4AM10SB_DQS5AH6SB_DQS6AF8SB_DQS7AB4
SB_DM0AF32SB_DM1AK34SB_DM2AK27SB_DM3AK24SB_DM4AJ10SB_DM5AK5SB_DM6AE7SB_DM7AB7
D
D
R
M
E
M
O
R
Y
S
Y
S
T
E
M
A
U5C
ALVISO_BGA1257
SADQ0 AG35SADQ1 AH35SADQ2 AL35SADQ3 AL37SADQ4 AH36SADQ5 AJ35SADQ6 AK37SADQ7 AL34SADQ8 AM36SADQ9 AN35
SADQ10 AP32SADQ11 AM31SADQ12 AM34SADQ13 AM35SADQ14 AL32SADQ15 AM32SADQ16 AN31SADQ17 AP31SADQ18 AN28SADQ19 AP28SADQ20 AL30SADQ21 AM30SADQ22 AM28SADQ23 AL28SADQ24 AP27SADQ25 AM27SADQ26 AM23SADQ27 AM22SADQ28 AL23SADQ29 AM24SADQ30 AN22SADQ31 AP22SADQ32 AM9SADQ33 AL9SADQ34 AL6SADQ35 AP7SADQ36 AP11SADQ37 AP10SADQ38 AL7SADQ39 AM7SADQ40 AN5SADQ41 AN6SADQ42 AN3SADQ43 AP3SADQ44 AP6SADQ45 AM6SADQ46 AL4SADQ47 AM3SADQ48 AK2SADQ49 AK3SADQ50 AG2SADQ51 AG1SADQ52 AL3SADQ53 AM2SADQ54 AH3SADQ55 AG3SADQ56 AF3SADQ57 AE3SADQ58 AD6SADQ59 AC4SADQ60 AF2SADQ61 AF1SADQ62 AD4SADQ63 AD5
SA_BS0#AK15SA_BS1#AK16SA_BS2#AL21
SA_DM0AJ37SA_DM1AP35SA_DM2AL29SA_DM3AP24SA_DM4AP9SA_DM5AP4SA_DM6AJ2SA_DM7AD3
SA_DQS0AK36SA_DQS1AP33SA_DQS2AN29SA_DQS3AP23SA_DQS4AM8SA_DQS5AM4SA_DQS6AJ1SA_DQS7AE5
SA_DQS0#AK35SA_DQS1#AP34SA_DQS2#AN30SA_DQS3#AN23SA_DQS4#AN8SA_DQS5#AM5SA_DQS6#AH1SA_DQS7#AE4
SA_MA0AL17SA_MA1AP17SA_MA2AP18SA_MA3AM17SA_MA4AN18SA_MA5AM18SA_MA6AL19SA_MA7AP20SA_MA8AM19SA_MA9AL20SA_MA10AM16SA_MA11AN20SA_MA12AM20SA_MA13AM15
SA_CAS#AN15SA_RAS#AP16SA_RCVENIN#AF29SA_RCVENOUT#AF28SA_WE#AP15
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCIE_MTX_C_GRX_P[0..15]
PCIE_MTX_C_GRX_N[0..15]
PCEI_GTX_C_MRX_N[0..15]
PCEI_GTX_C_MRX_P[0..15]
PCIE_MTX_GRX_N2PCIE_MTX_GRX_N1
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_N8PCIE_MTX_GRX_N9PCIE_MTX_GRX_N10
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_N11PCIE_MTX_GRX_N12
PCIE_MTX_GRX_N15PCIE_MTX_GRX_N14
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_P2PCIE_MTX_GRX_P3
PCIE_MTX_GRX_P0
PCIE_MTX_GRX_P4PCIE_MTX_GRX_P5
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_P11PCIE_MTX_GRX_P10PCIE_MTX_GRX_P9
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_P15PCIE_MTX_GRX_P14PCIE_MTX_GRX_P13PCIE_MTX_GRX_P12
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_P1PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_P5PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_P10PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_P12PCIE_MTX_C_GRX_P13PCIE_MTX_C_GRX_P14
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_N0
GMCH_TZOUT1-
GMCH_TXOUT1-
GMCH_TXCLK-
GMCH_TZOUT2-
GMCH_TXCLK+
GMCH_TXOUT2-
GMCH_TZOUT1+
GMCH_TXOUT0+
GMCH_TZOUT2+
GMCH_TXOUT2+
GMCH_TXOUT0-
GMCH_TXOUT1+
GMCH_TZOUT0+
GMCH_TZOUT0-
GMCH_TZCLK-GMCH_TZCLK+
LCTLB_DATALCTLA_CLK
GMCH_ENVDDLIBG
LBKLT_EN
REFSET
GMCH_TV_LUMAGMCH_TV_CRMA
TV_REFSET
GMCH_CRT_DATA
PEG_COMP
PCIE_MTX_C_GRX_N13PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_N15
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_N5
PCEI_GTX_C_MRX_P7
PCEI_GTX_C_MRX_P11
PCEI_GTX_C_MRX_N5
PCEI_GTX_C_MRX_N11
PCEI_GTX_C_MRX_N14
PCEI_GTX_C_MRX_P0
PCEI_GTX_C_MRX_P9
PCEI_GTX_C_MRX_N2
PCEI_GTX_C_MRX_P12
PCEI_GTX_C_MRX_N12
PCEI_GTX_C_MRX_P4
PCEI_GTX_C_MRX_N8
PCEI_GTX_C_MRX_N10
PCEI_GTX_C_MRX_P2
PCEI_GTX_C_MRX_N4
PCEI_GTX_C_MRX_P14
PCEI_GTX_C_MRX_N13
PCEI_GTX_C_MRX_N9
PCEI_GTX_C_MRX_P6
PCEI_GTX_C_MRX_N15
PCEI_GTX_C_MRX_N1
PCEI_GTX_C_MRX_P15
PCEI_GTX_C_MRX_N6
PCEI_GTX_C_MRX_P13
PCEI_GTX_C_MRX_P8
PCEI_GTX_C_MRX_N3
PCEI_GTX_C_MRX_P5
PCEI_GTX_C_MRX_P3
PCEI_GTX_C_MRX_P1
PCEI_GTX_C_MRX_P10
PCEI_GTX_C_MRX_N7
PCEI_GTX_C_MRX_N0
GMCH_CRT_CLK
GMCH_TV_COMPS
LBKLT_EN
GMCH_CRT_CLKGMCH_CRT_DATA
LDDC_CLKLDDC_DATA
LIBG
LBKLT_EN
GMCH_LCD_CLK
LCTLB_DATA
LCTLA_CLK
PCIE_MTX_C_GRX_N1PCIE_MTX_C_GRX_N2
PCIE_MTX_GRX_N4 PCIE_MTX_C_GRX_N4PCIE_MTX_C_GRX_N3
GMCH_TV_COMPS
LDDC_CLK
GMCH_LCD_DATA
GMCH_TV_LUMA
GMCH_TV_CRMA
LDDC_DATA
SDVO_SDATSDVO_SCLK
PCEI_GTX_C_MRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15]
PCIE_MTX_C_GRX_N[0..15]
PCEI_GTX_C_MRX_P[0..15]
GMCH_TXOUT1-
GMCH_TXOUT1+
GMCH_TXOUT2-
GMCH_TXOUT2+
GMCH_TXCLK+GMCH_TXCLK-
GMCH_TZOUT1-
GMCH_TZOUT1+
GMCH_TZOUT2-
GMCH_TZOUT2+
GMCH_TXOUT0-
GMCH_TXOUT0+
GMCH_TZOUT0+
GMCH_TZOUT0-
GMCH_TZCLK+GMCH_TZCLK-
GMCH_ENVDD
GMCH_CRT_R
GMCH_CRT_B
GMCH_CRT_HSYNCGMCH_CRT_VSYNC
GMCH_TV_CRMA
CLK_MCH_3GPLLCLK_MCH_3GPLL#
GMCH_CRT_G
GMCH_TV_LUMA
GMCH_ENBKL
GMCH_CRT_DATAGMCH_CRT_CLK
GMCH_LCD_CLK
GMCH_LCD_DATA
GMCH_TV_COMPS
SDVO_SCLKSDVO_SDAT
+2.5VS
+1.5VS
+3VS +2.5VS
+2.5VS
+2.5VS
+3VS
+3VS
Title
Size Document Number R ev
Date: Sheet o f
401336 C
SCHEMATIC, M/B LA-2601
8 51P , 17, 2005 MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Compal Electronics, Inc.
C71 0.1U_0402_16V4ZDVI@1 2
C83 0.1U_0402_16V4ZDVI@1 2
R39 2.2K_0402_5%1 2
R44 150_0402_5%1 2
R515 150_0402_5%1 2
C115 0.1U_0402_16V4ZDVI@1 2
C101 0.1U_0402_16V4ZDVI@1 2
C110 0.1U_0402_16V4ZDVI@1 2
C73 0.1U_0402_16V4ZDVI@1 2
R399 0_0402_5%12
C91 0.1U_0402_16V4ZDVI@1 2
C116 0.1U_0402_16V4ZDVI@1 2
C105 0.1U_0402_16V4ZDVI@1 2
R418 4.99K_0603_1%
12
R400 2.2K_0402_5%1 2
C74 0.1U_0402_16V4ZDVI@1 2
C80 0.1U_0402_16V4ZDVI@1 2
R384 150_0402_5%12
C100 0.1U_0402_16V4ZDVI@1 2
C63 0.1U_0402_16V4ZDVI@1 2
C114 0.1U_0402_16V4ZDVI@1 2
R386 150_0402_5%12
R382 4.7K_0402_5%1 2
C87 0.1U_0402_16V4ZDVI@1 2
R403 1.5K_0402_1%1 2
R381 4.7K_0402_5%1 2
C79 0.1U_0402_16V4ZDVI@1 2
C60 0.1U_0402_16V4ZDVI@1 2
R516 150_0402_5%1 2
R3974.7K_0402_5%
1
2
C59 0.1U_0402_16V4ZDVI@1 2
C97 0.1U_0402_16V4ZDVI@1 2
R398 100K_0402_5%1 2
R48 24.9_0402_1%1 2
C109 0.1U_0402_16V4ZDVI@1 2
C76 0.1U_0402_16V4ZDVI@1 2
C98 0.1U_0402_16V4ZDVI@1 2
R385 150_0402_5%12
C62 0.1U_0402_16V4ZDVI@1 2
R494.7K_0402_5%GM@
1
2
C104 0.1U_0402_16V4ZDVI@1 2
R4022.2K_0402_5%GM@
1
2
C92 0.1U_0402_16V4ZDVI@1 2
R454.7K_0402_5%
1
2
C56 0.1U_0402_16V4ZDVI@1 2
C57 0.1U_0402_16V4ZDVI@1 2
R4014.7K_0402_5%GM@
1
2
C75 0.1U_0402_16V4ZDVI@1 2
G
D S
Q44BSS138_SOT23GM@
2
1 3
R414 255_0402_1%1 2
C58 0.1U_0402_16V4ZDVI@1 2
G
DS
Q62N7002_SOT23GM@
2
13
C77 0.1U_0402_16V4ZDVI@1 2
C89 0.1U_0402_16V4ZDVI@1 2
C78 0.1U_0402_16V4ZDVI@1 2
G
DS
Q432N7002_SOT23GM@
2
13
M
I
S
C
T
V
V
G
A
L
V
D
S
P
C
I
-
E
X
P
R
E
S
S
G
R
A
P
H
I
C
S
U5G
ALVISO_BGA1257
SDVOCTRL_DATAH24SDVOCTRL_CLKH25GCLKNAB29GCLKPAC29
TVDAC_AA15TVDAC_BC16TVDAC_CA17TV_REFSETJ18TV_IRTNAB15TV_IRTNBB16TV_IRTNCB17
GREEN#B20
HSYNCG21
DDCCLKE24DDCDATAE23BLUEE21BLUE#D21GREENC20
REDA19RED#B19VSYNCH21
REFSETJ20
LDDC_CLKF23
LBKLT_CTLE25LBKLT_ENF25LCTLA_CLKC23LCTLB_DATAC22
LDDC_DATAF22LVDD_ENF26LIBGC33LVBGC31LVREFHF28LVREFLF27
LACLKNB30LACLKPB29LBCLKNC25LBCLKPC24
LADATAN0B34LADATAN1B33LADATAN2B32
LADATAP0A34LADATAP1A33LADATAP2B31
LBDATAN0C29LBDATAN1D28LBDATAN2C27
LBDATAP2C26
EXP_COMPI D36EXP_ICOMPO D34
EXP_RXN0/SDVO_TVCLKIN# E30EXP_RXN1/SDVO_INT# F34
EXP_RXN2/SDVO_FLDSTALL# G30EXP_RXN3 H34EXP_RXN4 J30EXP_RXN5 K34EXP_RXN6 L30EXP_RXN7 M34EXP_RXN8 N30EXP_RXN9 P34
EXP_RXN10 R30EXP_RXN11 T34EXP_RXN12 U30EXP_RXN13 V34EXP_RXN14 W30EXP_RXN15 Y34
EXP_RXP0/SDVO_TVCLKIN D30EXP_RXP1/SDVO_INT E34
EXP_RXP2/SDVO_FLDSTALL F30EXP_RXP3 G34EXP_RXP4 H30EXP_RXP5 J34EXP_RXP6 K30EXP_RXP7 L34EXP_RXP8 M30EXP_RXP9 N34
EXP_RXP10 P30EXP_RXP11 R34EXP_RXP12 T30EXP_RXP13 U34EXP_RXP14 V30EXP_RXP15 W34
EXP_TXN0/SDVOB_RED# E32EXP_TXN1/SDVOB_GREEN# F36
EXP_TXN2/SDVOB_BLUE# G32EXP_TXN3/SDVOB_CLKN H36EXP_TXN4/SDVOC_RED# J32
EXP_TXN5/SDVOC_GREEN# K36EXP_TXN6/SDVOC_BLUE# L32EXP_TXN7/SDVOC_CLKN M36
EXP_TXN8 N32EXP_TXN9 P36
EXP_TXN10 R32EXP_TXN11 T36EXP_TXN12 U32EXP_TXN13 V36EXP_TXN14 W32EXP_TXN15 Y36
EXP_TXP0/SDVOB_RED D32EXP_TXP1/SDVOB_GREEN E36
EXP_TXP2/SDVOB_BLUE F32EXP_TXP3/SDVOB_CLKP G36EXP_TXP4/SDVOC_RED H32
EXP_TXP5/SDVOC_GREEN J36EXP_TXP6/SDVOC_BLUE K32EXP_TXP7/SDVOC_CLKP L36
EXP_TXP8 M32EXP_TXP9 N36
EXP_TXP10 P32EXP_TXP11 R36EXP_TXP12 T32EXP_TXP13 U36EXP_TXP14 V32EXP_TXP15 W36LBDATAP0C28
LBDATAP1D27
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.5VS_DPLLA+1.5VS_DPLLB+1.5VS_HPLL+1.5VS_MPLL
V1.8_DDR_CAP1V1.8_DDR_CAP2V1.8_DDR_CAP5
V1.8_DDR_CAP6V1.8_DDR_CAP4V1.8_DDR_CAP3
+3GPLL
+1.05VS
+1.5VS
+1.05VS
+1.5VS_DPLLA+1.5VS_DPLLB+1.5VS_HPLL+1.5VS_MPLL
+3VS_TVDAC
+1.5VS
+2.5VS
+1.5VS_DDRDLL
+1.5VS_PEG
+1.5VS_3GPLL
+2.5VS_3GBG
+1.5VS
+1.5VS
+1.5VS_HPLL
+1.5VS_DPLLA
+DDRVCC
+1.5VS
+1.5VS_3GPLL
+1.5VS_PEG
+1.5VS+1.5VS_DDRDLL
+1.5VS
+2.5VS_3GBG
+2.5VS
+2.5VS
+3VS
+1.05VS
+1.5VS
+DDRVCC
+1.05VS
+2.5VS
+2.5VS
+1.5VS_MPLL
+1.5VS
+1.5VS
+1.5VS_DPLLB
+3VS_TVDAC
Title
Size Document Number R ev
Date: Sheet o f
401336 C
SCHEMATIC, M/B LA-2601
9 51P , 17, 2005 MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Compal Electronics, Inc.
VCCA_TVDAC VCCA_TVBG (Ball H18)
VCCD_TVDAC (Ball D19)
VCCDQ_TVDAC (Ball H17)VCCD_LVDS(Ball A25,B25,B26)
VCCA_LVDS (Ball A35)
VCCHV(Ball A21,B21,B22)
VCCTX_LVDS(Ball A27,A28,B28)
VCC_SYNC(Ball H20)
VCCA_CRTDAC(Ball F19,E19)
60mA
60mA
0.15mA
950mA
4000mA
120mA
120mA
24mA
60mA
10mA2mA
60mA
1500mA
2200mA
60mA
60mA
70mA
C451
0.1U_0402_16V4Z
1
2
C230.47U_0603_16V4Z
1
2
C439
4.7U_0805_10V4Z
1
2
C440
0.1U_0402_16V4Z
1
2
C424
0.1U_0402_16V4Z
1
2
L7CHB1608U301_06031 2
C447
0.1U_0402_16V4Z
1
2
C426
22U_1206_16V4Z_V1
1
2
C469
2.2U_0603_6.3V6K
1
2
C432
0.1U_0402_16V4Z
1
2
C486
0.1U_0402_16V4Z
1
2
C412
22U_1206_16V4Z_V1
1
2
C417
0.1U_0402_16V4Z
1
2
C340.22U_0402_10V4Z
1
2
L49CHB1608U301_06031 2
C422
0.022U_0402_16V7K
1
2
C483
0.1U_0402_16V4Z
1
2
C81
0.1U_0402_16V4Z
1
2
C413
4.7U_0805_10V4Z
1
2
C416
0.1U_0402_16V4Z
1
2
C5200.1U_0402_16V4Z
12
C84
22U_1206_16V4Z_V1
1
2
+C872
150U_D2_6.3VM
1
2
C240.47U_0603_16V4Z
1
2
C21
4.7U_0805_10V4Z
1
2
C446
22U_1206_16V4Z_V1
1
2
+ C53
470U_D2_2.5VM
1
2
R790.5_0603_1%1 2
C482
0.1U_0402_16V4Z
1
2
C20
4.7U_0805_10V4Z
1
2
C449
4.7U_0805_10V4Z
1
2
+
C88330U_D2E_2.5VM
1
2
C5050.1U_0402_16V4Z
12
C425
0.022U_0402_16V7K
1
2
L8CHB1608U301_06031 2
R410 0_0603_5%1 2
C820.1U_0402_16V4Z
12
C22
4.7U_0805_10V4Z
1
2
C474
2.2U_0603_6.3V6K
1
2
+C871
150U_D2_6.3VMTV@
1
2
C456
2.2U_0603_6.3V6K
1
2
C55
10U_1206_16V4Z
1
2
C437
0.022U_0402_16V7K
1
2
C52
22U_1206_16V4Z_V1
1
2
POWER
U5E
ALVISO_BGA1257
VCC0T29VCC1R29VCC2N29VCC3M29VCC4K29VCC5J29VCC6V28VCC7U28VCC8T28VCC9R28VCC10P28VCC11N28VCC12M28VCC13L28VCC14K28VCC15J28VCC16H28VCC17G28VCC18V27VCC19U27VCC20T27VCC21R27VCC22P27VCC23N27VCC24M27VCC25L27VCC26K27VCC27J27VCC28H27VCC29K26VCC30H26VCC31K25VCC32J25VCC33K24VCC34K23VCC35K22VCC36K21VCC37W20VCC38U20VCC39T20VCC40K20VCC41V19VCC42U19VCC43K19VCC44W18VCC45V18VCC46T18VCC47K18VCC48K17
VCCD_HMPLL1AC1VCCD_HMPLL2AC2VCCA_DPLLAB23VCCA_DPLLBC35VCCA_HPLLAA1VCCA_MPLLAA2
VCCA_TVDACA0 F17VCCA_TVDACA1 E17VCCA_TVDACB0 D18VCCA_TVDACB1 C18VCCA_TVDACC0 F18VCCA_TVDACC1 E18
VCCA_TVBG H18VSSA_TVBG G18
VCCD_TVDAC D19VCCDQ_TVDAC H17
VCCD_LVDS0 B26VCCD_LVDS1 B25VCCD_LVDS2 A25
VCCA_LVDS A35
VCCHV0 B22VCCHV1 B21VCCHV2 A21
VCCTX_LVDS0 B28VCCTX_LVDS1 A28VCCTX_LVDS2 A27
VCCA_SM0 AF20VCCA_SM1 AP19VCCA_SM2 AF19VCCA_SM3 AF18
VCC3G0 AE37VCC3G1 W37VCC3G2 U37VCC3G3 R37VCC3G4 N37VCC3G5 L37VCC3G6 J37
VCCA_3GPLL0 Y29VCCA_3GPLL1 Y28VCCA_3GPLL2 Y27
VCCA_3GBG F37VSSA_3GBG G37
VCC_SYNC H20
VCCA_CRTDAC0 F19VCCA_CRTDAC1 E19
VSSA_CRTDAC G19
C5170.1U_0402_16V4Z
12
C487
0.1U_0402_16V4Z
1
2
C86
0.1U_0402_16V4Z
1
2
C431
0.022U_0402_16V7K
1
2
C421
0.1U_0402_16V4Z
1
2
L25CHB1608U301_06031 2
C433
0.1U_0402_16V4Z
1
2
C452
0.1U_0402_16V4Z
1
2
R415
0_0805_5%
1 2
C419
0.01U_0402_16V7K
1
2
C478
0.1U_0402_16V4Z
1
2
C494
0.1U_0402_16V4Z
1
2
C450
22U_1206_16V4Z_V1
1
2
C418
0.1U_0402_16V4Z
1
2
L9CHB1608U301_06031 2
C415
0.1U_0402_16V4Z
1
2
L6CHB1608U301_06031 2
C4900.1U_0402_16V4Z
12
C490.22U_0402_10V4Z
1
2
C481
0.1U_0402_16V4Z
1
2C498
0.1U_0402_16V4Z
1
2
C4280.1U_0402_16V4Z
1
2
C496
0.1U_0402_16V4Z
1
2
C475
0.1U_0402_16V4Z
1
2
C438
0.022U_0402_16V7K
1
2
C5190.1U_0402_16V4Z
12
C420
0.1U_0402_16V4Z
1
2
C50
22U_1206_16V4Z_V1
1
2
C463
2.2U_0603_6.3V6K
1
2
C414
0.1U_0402_16V4Z
1
2
R860_0603_5%1 2
C457
2.2U_0603_6.3V6K
1
2
C434
0.1U_0402_16V4Z
1
2
POWER
U5F
ALVISO_BGA1257
VTT0K13VTT1J13VTT2K12VTT3W11VTT4V11VTT5U11VTT6T11VTT7R11VTT8P11VTT9N11VTT10M11VTT11L11VTT12K11VTT13W10VTT14V10VTT15U10VTT16T10VTT17R10VTT18P10VTT19N10VTT20M10VTT21K10VTT22J10VTT23Y9VTT24W9VTT25U9VTT26R9VTT27P9VTT28N9VTT29M9VTT30L9VTT31J9VTT32N8VTT33M8VTT34N7VTT35M7VTT36N6VTT37M6VTT38A6VTT39N5VTT40M5VTT41N4VTT42M4VTT43N3VTT44M3VTT45N2VTT46M2VTT47B2VTT48V1VTT49N1VTT50M1VTT51G1
VCCSM0 AM37VCCSM1 AH37VCCSM2 AP29VCCSM3 AD28VCCSM4 AD27VCCSM5 AC27VCCSM6 AP26VCCSM7 AN26VCCSM8 AM26VCCSM9 AL26
VCCSM10 AK26VCCSM11 AJ26VCCSM12 AH26VCCSM13 AG26VCCSM14 AF26VCCSM15 AE26VCCSM16 AP25VCCSM17 AN25VCCSM18 AM25VCCSM19 AL25VCCSM20 AK25VCCSM21 AJ25VCCSM22 AH25VCCSM23 AG25VCCSM24 AF25VCCSM25 AE25VCCSM26 AE24VCCSM27 AE23VCCSM28 AE22VCCSM29 AE21VCCSM30 AE20VCCSM31 AE19VCCSM32 AE18VCCSM33 AE17VCCSM34 AE16VCCSM35 AE15VCCSM36 AE14VCCSM37 AP13VCCSM38 AN13VCCSM39 AM13VCCSM40 AL13VCCSM41 AK13VCCSM42 AJ13VCCSM43 AH13VCCSM44 AG13VCCSM45 AF13VCCSM46 AE13VCCSM47 AP12VCCSM48 AN12VCCSM49 AM12VCCSM50 AL12VCCSM51 AK12VCCSM52 AJ12VCCSM53 AH12VCCSM54 AG12VCCSM55 AF12VCCSM56 AE12VCCSM57 AD11VCCSM58 AC11VCCSM59 AB11VCCSM60 AB10VCCSM61 AB9VCCSM62 AP8VCCSM63 AM1VCCSM64 AE1
C462
2.2U_0603_6.3V6K
1
2
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.05VS
+1.05VS
+DDRVCC
+1.05VS
Title
Size Document Number R ev
Date: Sheet o f
401336 C
SCHEMATIC, M/B LA-2601
10 51P , 17, 2005 MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Compal Electronics, Inc.
VSS
U5I
ALVISO_BGA1257
VSS271Y1VSS270D2VSS269G2VSS268J2VSS260L2VSS259P2VSS258T2VSS257V2VSS256AD2VSS255AE2VSS254AH2VSS253AL2VSS252AN2VSS251A3VSS250C3VSS249AA3VSS248AB3VSS247AC3VSS246AJ3VSS245C4VSS244H4VSS243L4VSS242P4VSS241U4VSS240Y4VSS239AF4VSS238AN4VSS237E5VSS236W5VSS235AL5VSS234AP5VSS233B6VSS232J6VSS231L6VSS230P6VSS229T6VSS228AA6VSS227AC6VSS226AE6VSS225AJ6VSS224G7VSS223V7VSS222AA7VSS221AG7VSS220AK7VSS219AN7VSS218C8VSS217E8VSS216L8VSS215P8VSS214Y8VSS213AL8VSS212A9VSS211H9VSS210K9VSS209T9VSS208V9VSS207AA9VSS206AC9VSS205AE9VSS204AH9VSS203AN9VSS202D10VSS201L10VSS200Y10
VSSALVDS B36
VSS199AA10VSS198F11VSS197H11VSS196Y11
VSS195 AA11VSS194 AF11VSS193 AG11VSS192 AJ11VSS191 AL11VSS190 AN11VSS189 B12VSS188 D12VSS187 J12VSS186 A14VSS185 B14VSS184 F14VSS183 J14VSS182 K14VSS181 AG14VSS180 AJ14VSS179 AL14VSS178 AN14VSS177 C15VSS176 K15VSS175 A16VSS174 D16VSS173 H16VSS172 K16VSS171 AL16VSS170 C17VSS169 G17VSS168 AF17VSS167 AJ17VSS166 AN17VSS165 A18VSS164 B18VSS163 U18VSS162 AL18VSS161 C19VSS160 H19VSS159 J19VSS158 T19VSS157 W19VSS156 AG19VSS155 AN19VSS154 A20VSS153 D20VSS152 E20VSS151 F20VSS150 G20VSS149 V20VSS148 AK20VSS147 C21VSS146 F21VSS145 AF21VSS144 AN21VSS143 A22VSS142 D22VSS141 E22VSS140 J22VSS139 AH22VSS138 AL22VSS137 H23VSS136 AF23VSS135 B24VSS134 D24VSS133 F24VSS132 J24VSS131 AG24VSS130 AJ24
N
C
T
F
U5H
ALVISO_BGA1257
VCCSM_NCTF31 AB12VCCSM_NCTF30 AC12VCCSM_NCTF29 AD12VCCSM_NCTF28 AB13VCCSM_NCTF27 AC13VCCSM_NCTF26 AD13VCCSM_NCTF25 AC14VCCSM_NCTF24 AD14VCCSM_NCTF23 AC15VCCSM_NCTF22 AD15VCCSM_NCTF21 AC16VCCSM_NCTF20 AD16VCCSM_NCTF19 AC17VCCSM_NCTF18 AD17VCCSM_NCTF17 AC18VCCSM_NCTF16 AD18VCCSM_NCTF15 AC19VCCSM_NCTF14 AD19VCCSM_NCTF13 AC20VCCSM_NCTF12 AD20VCCSM_NCTF11 AC21VCCSM_NCTF10 AD21VCCSM_NCTF9 AC22VCCSM_NCTF8 AD22VCCSM_NCTF7 AC23VCCSM_NCTF6 AD23VCCSM_NCTF5 AC24VCCSM_NCTF4 AD24VCCSM_NCTF3 AC25VCCSM_NCTF2 AD25VCCSM_NCTF1 AC26
VCC_NCTF78 L17VCC_NCTF77 M17VCC_NCTF76 N17VCC_NCTF75 P17VCC_NCTF74 T17VCC_NCTF73 U17VCC_NCTF72 V17VCC_NCTF71 W17VCC_NCTF70 L18VCC_NCTF69 M18VCC_NCTF68 N18VCC_NCTF67 P18VCC_NCTF66 R18VCC_NCTF65 Y18VCC_NCTF64 L19VCC_NCTF63 M19VCC_NCTF62 N19VCC_NCTF61 P19VCC_NCTF60 R19VCC_NCTF59 Y19VCC_NCTF58 L20VCC_NCTF57 M20VCC_NCTF56 N20VCC_NCTF55 P20VCC_NCTF54 R20VCC_NCTF53 Y20VCC_NCTF52 L21VCC_NCTF51 M21VCC_NCTF50 N21VCC_NCTF49 P21VCC_NCTF48 T21VCC_NCTF47 U21VCC_NCTF46 V21VCC_NCTF45 W21VCC_NCTF44 L22VCC_NCTF43 M22VCC_NCTF42 N22VCC_NCTF41 P22VCC_NCTF40 R22VCC_NCTF39 T22VCC_NCTF38 U22VCC_NCTF37 V22VCC_NCTF36 W22VCC_NCTF35 L23VCC_NCTF34 M23VCC_NCTF33 N23VCC_NCTF32 P23VCC_NCTF31 R23VCC_NCTF30 T23VCC_NCTF29 U23VCC_NCTF28 V23VCC_NCTF27 W23VCC_NCTF26 L24VCC_NCTF25 M24VCC_NCTF24 N24VCC_NCTF23 P24VCC_NCTF22 R24VCC_NCTF21 T24VCC_NCTF20 U24VCC_NCTF19 V24VCC_NCTF18 W24VCC_NCTF17 L25VCC_NCTF16 M25VCC_NCTF15 N25VCC_NCTF14 P25VCC_NCTF13 R25VCC_NCTF12 T25VCC_NCTF11 U25
VCCSM_NCTF0 AD26
VTT_NCTF17L12VTT_NCTF16M12VTT_NCTF15N12VTT_NCTF14P12VTT_NCTF13R12VTT_NCTF12T12VTT_NCTF11U12VTT_NCTF10V12VTT_NCTF9W12VTT_NCTF8L13VTT_NCTF7M13VTT_NCTF6N13VTT_NCTF5P13VTT_NCTF4R13VTT_NCTF3T13VTT_NCTF2U13VTT_NCTF1V13VTT_NCTF0W13
VSS_NCTF68Y12VSS_NCTF67AA12VSS_NCTF66Y13VSS_NCTF65AA13VSS_NCTF64L14VSS_NCTF63M14VSS_NCTF62N14VSS_NCTF61P14VSS_NCTF60R14VSS_NCTF59T14VSS_NCTF58U14VSS_NCTF57V14VSS_NCTF56W14VSS_NCTF55Y14VSS_NCTF54AA14VSS_NCTF53AB14VSS_NCTF52L15VSS_NCTF51M15VSS_NCTF50N15VSS_NCTF49P15VSS_NCTF48R15VSS_NCTF47T15VSS_NCTF46U15VSS_NCTF45V15VSS_NCTF44W15VSS_NCTF43Y15VSS_NCTF42AA15VSS_NCTF41AB15VSS_NCTF40L16VSS_NCTF39M16VSS_NCTF38N16VSS_NCTF37P16VSS_NCTF36R16VSS_NCTF35T16VSS_NCTF34U16VSS_NCTF33V16VSS_NCTF32W16VSS_NCTF31Y16VSS_NCTF30AA16VSS_NCTF29AB16VSS_NCTF28R17VSS_NCTF27Y17VSS_NCTF26AA17VSS_NCTF25AB17VSS_NCTF24AA18VSS_NCTF23AB18VSS_NCTF22AA19VSS_NCTF21AB19VSS_NCTF20AA20VSS_NCTF19AB20VSS_NCTF18R21VSS_NCTF17Y21VSS_NCTF16AA21VSS_NCTF15AB21VSS_NCTF14Y22VSS_NCTF13AA22VSS_NCTF12AB22VSS_NCTF11Y23VSS_NCTF10AA23VSS_NCTF9AB23VSS_NCTF8Y24VSS_NCTF7AA24VSS_NCTF6AB24VSS_NCTF5Y25VSS_NCTF4AA25VSS_NCTF3AB25VSS_NCTF2Y26VSS_NCTF1AA26VSS_NCTF0AB26
VCC_NCTF10V25VCC_NCTF9W25VCC_NCTF8L26VCC_NCTF7M26VCC_NCTF6N26VCC_NCTF5P26VCC_NCTF4R26VCC_NCTF3T26VCC_NCTF2U26VCC_NCTF1V26VCC_NCTF0W26
VSS
U5J
ALVISO_BGA1257
VSS267AL24VSS266AN24VSS265A26VSS264E26VSS263G26VSS262J26VSS261B27VSS129E27VSS128G27VSS127W27VSS126AA27VSS125AB27VSS124AF27VSS123AG27VSS122AJ27VSS121AL27VSS120AN27VSS119E28VSS118W28VSS117AA28VSS116AB28VSS115AC28VSS114A29VSS113D29VSS112E29VSS111F29VSS110G29VSS109H29VSS108L29VSS107P29VSS106U29VSS105V29VSS104W29VSS103AA29VSS102AD29VSS101AG29VSS100AJ29VSS99AM29VSS98C30VSS97Y30VSS96AA30VSS95AB30VSS94AC30VSS93AE30VSS92AP30VSS91D31VSS90E31VSS89F31VSS88G31VSS87H31VSS86J31VSS85K31VSS84L31VSS83M31VSS82N31VSS81P31VSS80R31VSS79T31VSS78U31VSS77V31VSS76W31VSS75AD31VSS74AG31VSS73AL31VSS72A32VSS71C32VSS70Y32VSS69AA32VSS68AB32
VSS67 AC32VSS66 AD32VSS65 AJ32VSS64 AN32VSS63 D33VSS62 E33VSS61 F33VSS60 G33VSS59 H33VSS58 J33VSS57 K33VSS56 L33VSS55 M33VSS54 N33VSS53 P33VSS52 R33VSS51 T33VSS50 U33VSS49 V33VSS48 W33VSS47 AD33VSS46 AF33VSS45 AL33VSS44 C34VSS43 AA34VSS42 AB34VSS41 AC34VSS40 AD34VSS39 AH34VSS38 AN34VSS37 B35VSS36 D35VSS35 E35VSS34 F35VSS33 G35VSS32 H35VSS31 J35VSS30 K35VSS29 L35VSS28 M35VSS27 N35VSS26 P35VSS25 R35VSS24 T35VSS23 U35VSS22 V35VSS21 W35VSS20 Y35VSS19 AE35VSS18 C36VSS17 AA36VSS16 AB36VSS15 AC36VSS14 AD36VSS13 AE36VSS12 AF36VSS11 AJ36VSS10 AL36VSS9 AN36VSS8 E37VSS7 H37VSS6 K37VSS5 M37VSS4 P37VSS3 T37VSS2 V37VSS1 Y37VSS0 AG37
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D[0..63]
DDR_A_MA[0..13]
DDR_A_DM[0..7]
DDR_A_DQS[0..7]
DDR_CS1_DIMMA#
DDR_A_MA11
DDR_A_MA2DDR_A_MA0
DDR_A_MA4
DDR_A_MA6
DDR_A_CAS#
DDR_A_BS#1DDR_A_RAS#
DDR_A_D6
DDR_A_D4
DDR_A_D7
DDR_A_D5
DDR_A_D15
DDR_A_D20
DDR_A_D14
DDR_A_D21
DDR_A_D22
DDR_A_D12DDR_A_D13
DDR_A_D29
DDR_A_D30DDR_A_D31
DDR_A_D37DDR_A_D36
DDR_A_D23
DDR_A_D38
DDR_A_D28
DDR_A_D39
DDR_A_D46
DDR_A_D44
DDR_A_D54
DDR_A_D53
DDR_A_D47
DDR_A_D52
DDR_A_D45
DDR_A_D60
DDR_A_D63
DDR_A_D61
DDR_A_D62
DDR_A_D55
DDR_A_DM6
DDR_A_DM4
DDR_A_DM5
DDR_A_DM7
DDR_A_DQS#0
DDR_A_BS#2
DDR_A_DQS#1 M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR#0
M_CLK_DDR#1
M_ODT0
M_ODT1
DDR_A_DQS#2
DDR_A_DQS3DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
DDR_CKE1_DIMMA
DDR_CS0_DIMMA#
D_CK_SCLK
DDR_A_MA1
DDR_A_MA10
DDR_A_MA3
DDR_A_MA9 DDR_A_MA7DDR_A_MA12
DDR_A_MA5
DDR_A_WE#
DDR_A_D8
DDR_A_D3
DDR_A_D9
DDR_A_D1DDR_A_D0
DDR_A_D2
DDR_A_D10
DDR_A_D25
DDR_A_D17
DDR_A_D19
DDR_A_D16
DDR_A_D18
DDR_A_D11
DDR_A_D24
DDR_A_D40
DDR_A_D27
DDR_A_D35
DDR_A_D33
DDR_A_D34
DDR_A_D26
DDR_A_D32
DDR_A_D56
DDR_A_D43DDR_A_D42
DDR_A_D50
DDR_A_D49
DDR_A_D51
DDR_A_D48
DDR_A_D41
DDR_A_D59DDR_A_D58
DDR_A_D57
DDR_A_DQS1
DDR_A_DQS0
DDR_A_DQS2
DDR_A_DM3
DDR_A_DM1
DDR_A_DM2
DDR_A_DQS4
DDR_A_DQS6
DDR_A_DM0
DDR_A_DQS7
D_CK_SDATA
DDR_A_MA13
DDR_A_DQS5
DDR_CKE0_DIMMA
DDR_A_MA8
DDR_A_BS#0
DDR_A_DQS#[0..7]
DDR_A_RAS#
DDR_CKE1_DIMMA
DDR_CS0_DIMMA#
DDR_A_MA11M_ODT1DDR_CS1_DIMMA#
DDR_A_CAS#DDR_A_WE#
DDR_A_BS#0DDR_A_MA10
DDR_A_MA3DDR_A_MA1
DDR_A_MA5DDR_A_MA8
DDR_A_MA9DDR_A_MA12
M_ODT0
DDR_A_MA7
DDR_A_MA0
DDR_A_MA4
DDR_A_BS#1
DDR_A_MA6
DDR_A_MA2
DDR_A_BS#2DDR_CKE0_DIMMA
DDR_A_MA13
DDR_A_MA[0..13]
DDR_A_D[0..63]
DDR_A_DQS[0..7]
DDR_A_DM[0..7]
DDR_CKE0_DIMMA
DDR_A_BS#2
DDR_A_BS#0DDR_A_WE#
DDR_A_CAS#DDR_CS1_DIMMA#
M_ODT1
D_CK_SDATAD_CK_SCLK
M_CLK_DDR1 M_CLK_DDR#1
M_ODT0
DDR_CS0_DIMMA# DDR_A_RAS# DDR_A_BS#1
DDR_CKE1_DIMMA
M_CLK_DDR0 M_CLK_DDR#0
DDR_A_DQS#[0..7]
+DDRVCC +DDRVCC
+3VS
+DDRVCC+DIMM_VREF
+0.9V_DDR_VTT
+0.9V_DDR_VTT
+DDRVCC
Title
Size Document Number R ev
Date: Sheet o f
401336 C
SCHEMATIC, M/B LA-2601
11 51P , 17, 2005
Compal Electronics, Inc.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Layout Note:Place these resistorclosely DIMM0,alltrace lengthMax=1.3"
Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9V_DDR_VTT
Layout Note:Place these resistorclosely DIMM0,alltrace length
-
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
M_ODT2
M_ODT3
DDR_B_CAS#
DDR_B_DM5
DDR_B_DM7
DDR_B_DQS#1
DDR_B_BS#2
DDR_B_DQS#2
DDR_B_DQS#0
DDR_B_MA9
DDR_B_MA1
DDR_B_DQS#4
DDR_B_MA3
DDR_B_MA10
DDR_B_DQS#6
DDR_B_D8
DDR_B_WE#
DDR_B_MA5
DDR_B_MA12
DDR_B_D3DDR_B_D2
DDR_B_D0DDR_B_D1
DDR_B_D9
DDR_B_D25
DDR_B_D16
DDR_B_D19
DDR_B_D17
DDR_B_D10
DDR_B_D27
DDR_B_D24
DDR_B_D11
DDR_B_D26
DDR_B_D18
DDR_B_D40
DDR_B_D33
DDR_B_D35
DDR_B_D56
DDR_B_D34
DDR_B_D32
DDR_B_D50
DDR_B_D42DDR_B_D43
DDR_B_D51
DDR_B_D49
DDR_B_D59
DDR_B_D48
DDR_B_D41
DDR_B_DQS1
DDR_B_DQS0
DDR_B_D58
DDR_B_DQS6
DDR_B_D57
DDR_B_DQS4
DDR_B_DQS2
DDR_B_DM3
DDR_B_BS#0
DDR_B_MA8
DDR_B_MA11
DDR_B_MA4
DDR_B_MA0DDR_B_MA2
DDR_B_D6
DDR_B_MA6
DDR_B_BS#1DDR_B_RAS#
DDR_B_D5
DDR_B_D7
DDR_B_D4
DDR_B_D20
DDR_B_D14
DDR_B_D13DDR_B_D12
DDR_B_D15
DDR_B_D23
DDR_B_D21
DDR_B_D29
DDR_B_D22
DDR_B_D31DDR_B_D30
DDR_B_D38
DDR_B_D28
DDR_B_D39
DDR_B_D36DDR_B_D37
DDR_B_D52
DDR_B_D46
DDR_B_D44DDR_B_D45
DDR_B_D47
DDR_B_D62
DDR_B_D60DDR_B_D61
DDR_B_D54
DDR_B_D63
DDR_B_D53
DDR_B_DQS#3
DDR_B_DM4
DDR_B_DQS3
DDR_B_DM6
DDR_B_D55
DDR_B_DQS#5
DDR_B_DM1
DDR_B_DM0
DDR_B_MA7
DDR_B_DQS#7
DDR_B_DM2
DDR_B_DQS5
DDR_B_MA13
DDR_B_DQS7
DDR_CS3_DIMMB#
M_CLK_DDR4
M_CLK_DDR3
M_CLK_DDR#4
M_CLK_DDR#3
DDR_CKE3_DIMMB
D_CK_SCLK
DDR_CS2_DIMMB#
D_CK_SDATA
DDR_CKE2_DIMMB
DDR_B_D[0..63]
DDR_B_MA[0..13]
DDR_B_DM[0..7]
DDR_B_DQS[0..7]
DDR_B_DQS#[0..7]
M_ODT2DDR_B_MA13
DDR_B_MA5DDR_B_MA8
DDR_B_MA9DDR_B_MA12
DDR_B_BS#2DDR_CKE2_DIMMB
DDR_CKE3_DIMMB
DDR_B_MA4
DDR_B_MA7
DDR_B_MA2
DDR_B_MA11
DDR_B_MA6
M_ODT3DDR_CS3_DIMMB#
DDR_B_WE#DDR_B_CAS#
DDR_B_BS#0DDR_B_MA10
DDR_B_MA1DDR_B_MA3
DDR_B_MA0
DDR_B_RAS#DDR_CS2_DIMMB#
DDR_B_BS#1
DDR_CKE2_DIMMB
DDR_B_BS#2
DDR_B_BS#0DDR_B_WE#
DDR_B_CAS#DDR_CS3_DIMMB#
M_ODT3
D_CK_SDATAD_CK_SCLK
M_ODT2
DDR_CS2_DIMMB# DDR_B_RAS# DDR_B_BS#1
DDR_CKE3_DIMMB
M_CLK_DDR3 M_CLK_DDR#3
M_CLK_DDR4 M_CLK_DDR#4
DDR_B_MA[0..13]
DDR_B_D[0..63]
DDR_B_DQS[0..7]
DDR_B_DM[0..7]
DDR_B_DQS#[0..7]
+DDRVCC
+3VS
+DDRVCC
+3VS
+DIMM_VREF
+0.9V_DDR_VTT
+0.9V_DDR_VTT
+DDRVCC
Title
Size Document Number R ev
Date: Sheet o f
401336 C
SCHEMATIC, M/B LA-2601
12 51P , 17, 2005
Compal Electronics, Inc.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Layout Note:Place these resistorclosely DIMM0,alltrace length
-
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+DDRVCC
+DDRVCC+DDRVCC
Title
Size Document Number R ev
Date: Sheet o f
401336 C
SCHEMATIC, M/B LA-2601
13 51P , 17, 2005
Compal Electronics, Inc.
Layout note :Distribute as close as possible to DDR-SODIMM.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C990.1U_0402_16V4Z
1
2
C1230.1U_0402_16V4Z
1
2
C1030.1U_0402_16V4Z
1
2
C1380.1U_0402_16V4Z
1
2
C1180.1U_0402_16V4Z
1
2
+C85150U_D2_6.3VM
1
2
C1220.1U_0402_16V4Z
1
2
C1190.1U_0402_16V4Z
1
2
C1360.1U_0402_16V4Z
1
2
C1240.1U_0402_16V4Z
1
2
C1020.1U_0402_16V4Z
1
2
C1350.1U_0402_16V4Z
1
2
C1170.1U_0402_16V4Z
1
2
C1370.1U_0402_16V4Z
1
2
+C139150U_D2_6.3VM
1
2
-
AA
B
B
C
C
D
D
E
E
F
F
G
G
H
H
1 1
2 2
3 3
4 4
CLK_DREF_SSC
CLK_DREF_SSC#
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_MCH_BCLK
CLK_MCH_BCLK#
CLK_DREF_96MCLK_DREF_96M#
CLK_PCIE_SATA#
CLK_PCIE_SATA
CLK_PCIE_ICH#
CLK_PCIE_ICH
CLK_CPU1
CLK_CPU1#
CLK_CPU0
CLK_CPU0#
CLK_SRC4
CLK_SRC4#
CLK_SRC1
CLK_SRC1#
CLK_DOTCLK_DOT#
CLK_SRC0
CLK_SRC0#
XTALOUT
XTALIN
+CLK_VDD48
+CLK_VDDREF
+CLK_VCCA
+CLK_VDD48 +CLK_VDDREF
CLK_PCIE_SATA#
CLK_PCIE_SATA
CLK_MCH_BCLK
CLK_MCH_BCLK#
CLK_DREF_96M
CLK_DREF_96M#
CLK_PCIE_ICH#
CLK_PCIE_ICH
CLK_DREF_SSC
CLK_DREF_SSC#
CLK_PCIE_VGA#
CLK_PCIE_VGA
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_MCH_3GPLL#
CLK_MCH_3GPLL
CLK_PCI3CLK_PCI_SIO
CLK_PCI_MINI CLK_PCI4
CLK_ICH_14M
CLK_REF CLK_14M_SIO
CLKSEL2CLK_SD_48M
CLK_ICH_48M
CLK_PCI0
CLK_PCI1CLK_PCI_LPC
CLKIREF
D_CK_SCLK
VTT_POWERGD#
D_CK_SDATA
CLK_PCI_ICH
STP_CPU#
STP_PCI#
D_CK_SDATA
D_CK_SCLK
CLK_PCI1
CLK_PCI2
CLKSEL2
CLKSEL0 CLKSEL1
CLK_14M_CODEC CLKSEL0
CLKSEL1
CLK_PCI2CLK_PCI_1394
CLK_PCI5CLK_PCI_LAN
CLK_EZ_CLK2#
CLK_EZ_CLK2
CLK_EZ_CLK1
CLK_EZ_CLK1#
CLK_PCI0
CLK_PCIE_VGA#
CLK_PCIE_VGACLK_SRC2
CLK_SRC2#
CLK_EZ_CLK1
CLK_EZ_CLK1#
CLK_SRC7
CLK_SRC7#
CLK_SRC3
CLK_SRC3# CLK_MCH_3GPLL#
CLK_MCH_3GPLL
CLK_EZ_CLK2
CLK_EZ_CLK2#
CLK_SRC6
CLK_SRC6#
PEREQ1#
PEREQ2# PE_REQ2#
PE_REQ1#
CLK_DREF_SSC#
CLK_DREF_SSC
CLK_CPU_BCLK#
CLK_CPU_BCLK
CLK_MCH_BCLK#
CLK_MCH_BCLK
CLK_DREF_96M# CLK_DREF_96M
CLK_PCIE_SATA#
CLK_PCIE_SATA
CLK_PCIE_ICH#
CLK_PCIE_ICH
CLK_PCI_MINI
CLK_ICH_14M
CLK_14M_SIO
CLK_SD_48M
CLK_ICH_48M
CLK_PCI_LPC
CK_SDATA
CK_SCLK
CLK_PCI_ICH
VGATE
PM_STP_PCI#
PM_STP_CPU#
MCH_CLKSEL1
D_CK_SDATA
D_CK_SCLK
MCH_CLKSEL0
CPU_BSEL1 CPU_BSEL0
CLK_14M_CODEC
CLK_PCI_LAN
CLK_PCI_SIO
CLK_PCI_PCM
CLK_PCI_1394
CLK_PCIE_VGA#
CLK_PCIE_VGA
CLK_EZ_CLK1#
CLK_EZ_CLK1
CLK_MCH_3GPLL#
CLK_MCH_3GPLL
CLK_EZ_CLK2#
CLK_EZ_CLK2
PE_REQ2#
PE_REQ1#
+CLK_VDD1 +CLK_VDD1
+CLK_VDD2+3VS
+CLK_VDD2
+3VS
+3VS
+3VS
+CLK_VDD1
+1.05VS +1.05VS
+3VS
+3VS
+3VS
+3VS
+CLK_VDD1
Title
Size Document Number R ev
Date: Sheet o f
401336 C
SCHEMATIC, M/B LA-2601
14 51P , 17, 2005
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Clock Generator
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
*CLKSEL0 CLKSEL1 CLKSEL2
33.3
33.3
33.3
100
100
100
166
0
0
00
0
1
1
1
Table : ICS 954206B
FSC FSB FSA CPUMHz
SRCMHz
PCIMHz
100
133
200
100 33.3
1
11
040mil
40mil
40mil
15mil
15mil
15mil
CLK_PCI2 = 1, Pin 32,33are PEREQ# pin
CLK_PCI0 = 0, Pin 35,36are PCIe CLK pair
CLK_PCI1 = 0, Pin 17,18are 96Mhz
R137 49.9_0402_1%1 2
R148 12_0402_5%1 2
R106 33_0402_5%1 2
C1560.047U_0402_16V7K
1
2
R115 49.9_0402_1%1 2
R77 12_0402_5%1 2
C1470.047U_0402_16V7K
1
2
R147 12_0402_5%1 2
R97 49.9_0402_1%1 2
R4541K_0402_5%@
1
2
R101 49.9_0402_1%1 2
R124 33_0402_5%1 2
R122 49.9_0402_1%1 2
R118 49.9_0402_1%1 2
C5532.2U_0603_6.3V6K
1
2
R684 0_0402_5%1 2
R96 33_0402_5%1 2
R135 1_0402_5%1 2
R4480_0402_5%
12
R4534.7K_0402_5%1 2
R133 49.9_0402_1%1 2
R102 33_0402_5%1 2
R119 49.9_0402_1%1 2
R138 10K_0402_5%1 2
R120 33_0402_5%1 2
C1500.047U_0402_16V7K
1
2
L10KC FBM-L11-201209-221LMAT_08051 2
R4590_0402_5%
12
R107 49.9_0402_1%1 2
G
D S
Q142N7002_SOT23
2
1 3
R4510_0402_5%@
1 2
R123 49.9_0402_1%1 2
R149 33_0402_5%1 2
R151 12_0402_5%12
R128 33_0402_5%1 2
R132 49.9_0402_1%1 2
R681 49.9_0402_1%1 2
R130 49.9_0402_1%1 2
R127 49.9_0402_1%1 2
R685 0_0402_5%1 2
R103 49.9_0402_1%1 2
Y114.318MHZ_16PF_DSX840GA
1
2
R114 33_0402_5%1 2
R150 33_0402_5%1 2
R679 33_0402_5%1 2
R125 33_0402_5%1 2
G
D S
Q172N7002_SOT23
2
1 3
R4604.7K_0402_5%1 2
R4492.2_0402_5%
1 2
R139 10K_0402_5%1 2
R680 49.9_0402_1%1 2
R4500_0402_5%1 2
C1630.047U_0402_16V7K
1
2
R4624.7K_0402_5%1 2
C1442.2U_0603_6.3V6K
1
2
G
D S
Q162N7002_SOT23
2
1 3
R110 33_0402_5%1 2
R678 33_0402_5%1 2
R145 10K_0402_5%1 2
R455 2.2_0402_5%1 2
R112 49.9_0402_1%1 2
R111 49.9_0402_1%1 2
R71 12_0402_5%1 2
C555
2.2U_0603_6.3V6K
1
2
R146 33_0402_5%1 2 R100 33_0402_5%1 2
R143 12_0402_5%1 2
R126 49.9_0402_1%1 2
C1652.2U_0603_6.3V6K
1
2
R136 33_0402_5%1 2
R4561K_0402_5%@
1
2
R4614.7K_0402_5%1 2
R4570_0402_5%1 2
R153 10K_0402_5%1 2
R144 12_0402_5%1 2
C1590.047U_0402_16V7K
1
2
R452 475_0402_1%1 2
C1450.047U_0402_16V7K
1
2
R134 33_0402_5%1 2
R108 49.9_0402_1%1 2
R121 33_0402_5%1 2
U8
ICS954226AGT_TSSOP56
VDDPCIEX_021VDDPCIEX_128VDDPCIEX_234
VDDPCI_01VDDPCI_17
VDD4811
VDDCPU42VDDREF48
FS_A/USB_48MHz12
GND_22
FSLB/TEST_MODE16
X249
X150
GND_129
GND_013
GND_345
PCICLK2/REQ_SEL56
REF1/FSLC/TEST_SEL53
SDATA47
SCLK46
ITP_EN/PCICLK_F08
SELPCIEX_LCDCLK#/PCICLK_F19
IREF39
PCIEXT4 31
CPU_STOP# 54
CPUCLKT1 41
CPUCLKC1 40
CPUCLKT2_ITP/PCIEXT6 36
PCIEXC4 30
PCICLK33
PCICLK44
PCICLK55
CPUCLKC0 43
CPUCLKT0 44
PEREQ1#/PCIEXT5 33
PEREQ2#/PCIEXC5 32
PCI/SRC_STOP# 55
GNDA 38
VDDA 37
REF0 52
GND_56
GND_451
CPUCLKC2_ITP/PCIEXC6 35
SATACLKT 26
SATACLKC 27
PCIEXT3 24
PCIEXC3 25
PCIEXT2 22
PCIEXC2 23
PCIEXT1 19
PCIEXC1 20
LCDCLK_SS/PCIEX0T 17
LCDCLK_SS/PCIEX0C 18
DOTT_96MHz 14DOTC_96MHz 15
VTT_PWRGD#/PD 10
R131 33_0402_5%1 2
R109 33_0402_5%1 2
C1490.047U_0402_16V7K
1
2
C16133P_0402_50V8J
1 2
C16233P_0402_50V8J
1 2
R141 10K_0402_5%1 2
C157
0.047U_0402_16V7K
1
2
R117 33_0402_5%1 2
C1520.047U_0402_16V7K
1
2
R142 33_0402_5%1 2
R4580_0402_5%@
1 2
R113 33_0402_5%1 2
R154 33_0402_5%1 2
L11KC FBM-L11-201209-221LMAT_08051 2
R129 33_0402_5%1 2
-
AA
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
HS YNC_L
VSYNC_L
C RT_HSYNC D_CRT_HSYNC
CRT_G
CRT_VSYNC D_CRT_VSYNC
VGA_DDC_CLK
VGA_DDC_DATADSUB_12
DSUB_15
CRT_R CRT_R_L
CRT_B_L
CRT_G_L
DSUB_12
DSUB_15
D_CRT_RD_CRT_GD_CRT_B
CRT_R_1CRT_G_1CRT_B_1
DOCKIN#
CRT_B
CRT_G
CRT_R
CRT_B
CRT_R_1
CRT_G_1
CRT_B_1
VGA_CRT_R
VGA_CRT_G
VGA_CRT_B
GMCH_CRT_R
GMCH_CRT_G
GMCH_CRT_B
VGA_CRT_HSYNC
VGA_CRT_VSYNC
GMCH_CRT_HSYNC
GMCH_CRT_VSYNC
D_CRT_HSYNC
D_CRT_VSYNC
VGA_DDC_DATA
VGA_DDC_CLK
GMCH_CRT_DATA
GMCH_CRT_CLK
DOCKIN#
D_CRT_B
D_CRT_R D_CRT_G
D_DDC_CLK
D_DDC_DATA
+CRT_VCC+R_CRT_VCC+5VS
+CRT_VCC
+CRT_VCC
+3VS
+2.5VS
+CRT_VCC
+3VS
+5VS
Title
Size Document Number R ev
Date: Sheet o f401336 C
SCHEMATIC, M/B LA-2601
15 51P , 17, 2005
Compal Electronics, Inc.
W=40milsCRT Connector
DDC_MD2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
10P for GMCH
33P for GMCH
W=40mils
(CL55)
R713 0_0402_5%2@1 2
D23DAN217_SC59@
2 3
1
D21DAN217_SC59@
2 3
1
JP1CRT-15P
61117
1228
1339
144
10155
C10 0.1U_0402_16V4Z1 2
R19 0_0402_5%PM@ 1 2
C18P_0402_50V8K
1
2
L1 FCM1608C-121T_06031 2
R714 0_0402_5%2@1 2
D22DAN217_SC59@
2 3
1
R44.7K_0402_5%
1
2
R18 0_0402_5%GM@1 2
C8
8P_0402_50V8K
1
2
L3FCM2012C-800_0805
1 2
C180.1U_0402_16V4Z1 2
U35SN74AHCT1G125GW_SOT353-5
A2 Y 4OE
#
1
G
3
P
5
C40768P_0402_50V8K
1
2
C9
8P_0402_50V8K
1
2
R11 0_0402_5%GM@12
R9 0_0402_5%PM@ 1 2
R34 0_0402_5%PM@1 2
R377 0_0402_5%PM@ 1 2
L4FCM2012C-800_0805
1 2
C6
10P_0402_50V8J
1
2
C510P_0402_50V8J
1
2
D1
RB411D_SOT23
2 1
R21 0_0402_5%GM@1 2
L2 FCM1608C-121T_06031 2
L5FCM2012C-800_0805
1 2
G
D S
Q1BSS138_SOT23
2
1 3
R712 0_0402_5%2@1 2
C410 0.1U_0402_16V4Z1 2
R8 0_0402_5%PM@1 2
C40968P_0402_50V8K
1
2
R10 0_0402_5%GM@ 1 2
C408
100P_0402_25V8K
C38P_0402_50V8K
1
2
R120_0402_5%GM@
12
U1SN74AHCT1G125GW_SOT353-5
A2 Y 4OE
#
1
G
3
P
5
C40.1U_0402_16V4Z
1
2
R3
150_0402_5%
1
2
R32 0_0402_5%PM@ 1 2
R1
150_0402_5%
1
2
R6 10K_0402_5%12
U4
FSAV330MTC_TSSOP16
SEL1
1A42A7
GND8
3A94A12
OE#15
VCC 16
1B1 22B1 53B1 114B1 14
1B2 32B2 63B2 104B2 13
F1
POLYSWITCH_1A
R2
150_0402_5%
1
2
R5
4.7K_0402_5%
1
2
R7 39_0402_5%GM@1 2
R33 0_0402_5%GM@1 2
R378 39_0402_5%GM@1 2
G
D S
Q2BSS138_SOT23
2
1 3
C7
8P_0402_50V8K
1
2
C2
8P_0402_50V8K
1
2
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BKOFF# DISPOFF#
PCEI_GTX_C_MRX_P[0..15]
PCEI_GTX_C_MRX_N[0..15]
PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15]
GMCH_LCD_CLKGMCH_LCD_DATA
DAC_BRIGINVT_PWMDISPOFF#
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_N15
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_P14
PCEI_GTX_C_MRX_P11
PCEI_GTX_C_MRX_P9
PCEI_GTX_C_MRX_P8
PCEI_GTX_C_MRX_P3
PCEI_GTX_C_MRX_P1
PCEI_GTX_C_MRX_P10
PCEI_GTX_C_MRX_P7
PCEI_GTX_C_MRX_P12
PCEI_GTX_C_MRX_P14
PCEI_GTX_C_MRX_P6
PCEI_GTX_C_MRX_P15
PCEI_GTX_C_MRX_P13
PCEI_GTX_C_MRX_P5
PCEI_GTX_C_MRX_P2
PCEI_GTX_C_MRX_N11
PCEI_GTX_C_MRX_N8
PCEI_GTX_C_MRX_N10
PCEI_GTX_C_MRX_N9
PCEI_GTX_C_MRX_N5
PCEI_GTX_C_MRX_N14
PCEI_GTX_C_MRX_N12
PCEI_GTX_C_MRX_N13
PCEI_GTX_C_MRX_N15
PCEI_GTX_C_MRX_N1
PCEI_GTX_C_MRX_N3
PCEI_GTX_C_MRX_N7
PCEI_GTX_C_MRX_N2
PCEI_GTX_C_MRX_N4
PCEI_GTX_C_MRX_N6
PCEI_GTX_C_MRX_N0
PCEI_GTX_C_MRX_P4
DAC_BRIG
VGA_CRT_R
PCIE_MTX_C_GRX_N1
VGA_DDC_DATAVGA_DDC_CLK
DISPOFF#INVT_PWM
VGA_CRT_B VGA_CRT_HSYNC
VGA_CRT_G
VGA_TV_LUMA
VGA_TV_CRMA
SUSP#
GMCH_TZCLK+GMCH_TZCLK-
GMCH_TZOUT2+GMCH_TZOUT2-
GMCH_TZOUT1+GMCH_TZOUT1-
GMCH_TXCLK+GMCH_TXCLK-
GMCH_TXOUT2+GMCH_TXOUT2-
GMCH_TXOUT1-GMCH_TXOUT1+
GMCH_TXOUT0-GMCH_TXOUT0+GMCH_TZOUT0+
GMCH_TZOUT0-
GMCH_ENBKL
VGA_CRT_VSYNC
VGA_TV_COMPS
SDVO_SCLKSDVO_SDAT
PCEI_GTX_C_MRX_P0
GMCH_ENVDD
BKOFF#
PCIE_MTX_C_GRX_N[0..15]
PCEI_GTX_C_MRX_P[0..15]
PCEI_GTX_C_MRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15]
INVT_PWM DAC_BRIG
GMCH_LCD_DATAGMCH_LCD_CLK
CLK_PCIE_VGA CLK_PCIE_VGA#
VGA_DDC_DATA VGA_DDC_CLK
VGA_CRT_B VGA_CRT_HSYNC
VGA_CRT_VSYNC
VGA_CRT_G
VGA_TV_LUMA
VGA_TV_CRMA
SUSP#
DVI_TXD1+DVI_TXD1-
DVI_TXD0+DVI_TXD0-
DVI_TXC+DVI_TXC-
DVI_TXD2+DVI_TXD2-
VGA_CRT_R
DVI_SCLK DVI_SDATA
DVI_DET
GMCH_TZCLK-GMCH_TZCLK+
GMCH_TZOUT2+GMCH_TZOUT2-
GMCH_TZOUT1+GMCH_TZOUT1-
GMCH_TXCLK+ GMCH_TXCLK-
GMCH_TXOUT2+ GMCH_TXOUT2-
GMCH_TXOUT1- GMCH_TXOUT1+
GMCH_TXOUT0+ GMCH_TXOUT0-
GMCH_TZOUT0+GMCH_TZOUT0-
GMCH_ENBKL
VGA_TV_COMPS
SDVO_SCLK SDVO_SDAT
GMCH_ENVDD
PLTRST_VGA#
+3VS
+LCDVDD
+3VS
+3VS
B+
+LCDVDD
B+B+
+LCDVDD
+3VS
+1.5VS
+3VALW
+2.5VS
+3VS
+5VALW
+3VALW
+5VS
B+
Title
Size Document Number R ev
Date: Sheet o f
401336 C
SCHEMATIC, M/B LA-2601
16 51P , 17, 2005
Compal Electronics, Inc.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LCD POWER CIRCUIT
LCD/PANEL BD. Conn.
VGA BOARD Conn.Bypass CAP under B+ trace(+25V)
C866
0.1U_0402_25V4K@
1
2
R477
4.7K_0402_5%
1
2
R53
301_0402_1%GM@
1
2
C867
0.1U_0402_25V4K@
1
2
R62
100_0402_5%GM@
1
2
C868
0.1U_0402_25V4K@
1
2
R55
100K_0402_5%GM@
1
2
C870
0.1U_0402_25V4K@
1
2
C869
0.1U_0402_25V4K@
1
2
R510 0_0402_5%DVI@1 2
C860
0.01U_0402_16V7KGM@
1
2
U33SN74AHCT1G125GW_SOT353-5GM@
A2 Y 4OE
#
1
G
3
P
5
C28
4.7U_0805_10V4ZGM@
1
2
C190.1U_0402_16V4Z@
1
2
C29
0.1U_0402_16V4ZGM@
1
2
Q9SI2301DS_SOT23GM@
2
1
3
C27
0.047U_0402_16V7KGM@
1
2
D32RB751V_SOD32321
G
D
S
Q82N7002_SOT23GM@
2
1
3
JP11
ACES_88081-1600DVI@
1 23 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 4445 4647 4849 5051 5253 5455 5657 5859 6061 6263 6465 6667 6869 7071 7273 7475 7677 7879 8081 8283 8485 8687 8889 9091 9293 9495 9697 9899 100101 102103 104105 106107 108109 110111 112113 114115 116117 118119 120121 122123 124125 126127 128129 130131 132133 134135 136137 138139 140141 142143 144145 146147 148149 150151 152153 154155 156157 158159 160
JP6
ACES_87216-4012GM@
1133557799111113131515171719192121232325252727292931313333353537373939
2 24 46 68 8
10 1012 1214 1416 1618 1820 2022 2224 2426 2628 2830 3032 3234 3436 3638 3840 40
-
55
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_PCI_ICH
PCI_SERR#
PCI_DEVSEL#PCI_RST#
PCI_CBE#0
PCI_REQ#4
PCI_PERR#
PCI_PIRQG#PCI_PIRQB#
PCI_STOP#
PCI_CBE#1
PCI_CBE#3
PCI_PIRQF#
PCI_REQ#2
PCI_PIRQE#
PCI_FRAME#
PCI_REQ#3
PCI_PLOCK#
PCI_IRDY#
PCI_CBE#2
PCI_REQ#1
PCI_PIRQA#
PCI_PAR
PCI_TRDY#
PCI_PIRQH#
CLK_ICH_PCI
PCI_AD0PCI_AD1PCI_AD2PCI_AD3PCI_AD4PCI_AD5
PCI_AD7PCI_AD6
PCI_AD8PCI_AD9
PCI_AD11PCI_AD10
PCI_AD14PCI_AD15
PCI_AD13PCI_AD12
PCI_AD16PCI_AD17
PCI_AD19PCI_AD18
PCI_AD22PCI_AD23
PCI_AD21PCI_AD20
PCI_AD25PCI_AD24
PCI_AD28PCI_AD29
PCI_AD31PCI_AD30
PCI_AD26PCI_AD27D_USB_SMI#2
PCI_REQ#1
PCI_GNT#2
PCI_PIRQD#PCI_PIRQC#
PCI_GNT#0PCI_REQ#0
PCI_PIRQF#PCI_PIRQE#
D_USB_SMI#1
D_USB_SMI#2
PCI_GNT#1
PCI_GNT#3
PCI_REQ#3
PCI_PIRQG#
PCI_REQ#2PCI_PIRQH#
PCI_REQ#0
PCI_REQ#4D_USB_SMI#1
PCI_PERR#PCI_DEVSEL#
PCI_IRDY#PCI_PLOCK#
PCI_GNT#5
PLT_RST#
PCI_GNT#5
PCI_STOP#
PCI_SERR#
PCI_FRAME#PCI_TRDY#
PCI_PIRQD#PCI_PIRQB#
PCI_PIRQA#PCI_PIRQC#
PCI_AD[0..31]
PCI_FRAME#
PCI_REQ#2 PCI_GNT#2
PCI_IRDY# PCI_PAR
PCI_PERR#
PCI_STOP# PCI_SERR#
PCI_DEVSEL#
PCI_TRDY#
CLK_PCI_ICH
PCI_C/BE#0 PCI_C/BE#1 PCI_C/BE#2 PCI_C/BE#3
PCI_PIRQA#PCI_PIRQB#
PLT_RST#
PCI_REQ#1 PCI_GNT#1
PCI_PIRQH# PCI_PIRQG#
PCI_RST#
PCI_REQ#3 PCI_GNT#3
PCI_PIRQF#
PCI_REQ#0 PCI_GNT#0
PCI_PIRQE#
D_USB_SMI#2
D_USB_SMI#1
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
Title
Size Document Number R ev
Date: Sheet o f
401336 C17 51P , 17, 2005
Compal Electronics, Inc.SCHEMATIC, M/B LA-2601
Internal Pull-up.Sample high destination is LPC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
RP91
8.2K_0804_8P4R_5%
1 82 73 64 5
RP92
8.2K_0804_8P4R_5%
1 82 73 64 5
RP88
8.2K_0804_8P4R_5%
1 82 73 64 5
RP87
8.2K_0804_8P4R_5%
1 82 73 64 5
RP90
8.2K_0804_8P4R_5%
1 82 73 64 5
R17710_0402_5%@
1
2
RP89
8.2K_0804_8P4R_5%
1 82 73 64 5
R2310_0402_5%@
1
2
C19210P_0402_50V8J@
1
2
Interrupt I/F
PCI
RESERVED
U17B
ICH6_BGA609
AD[0]E2AD[1]E5AD[2]C2AD[3]F5AD[4]F3AD[5]E9AD[6]F2AD[7]D6AD[8]E6AD[9]D3AD[10]A2AD[11]D2AD[12]D5AD[13]H3AD[14]B4AD[15]J5AD[16]K2AD[17]K5AD[18]D4AD[19]L6AD[20]G3AD[21]H4AD[22]H2AD[23]H5AD[24]B3AD[25]M6AD[26]B2AD[27]K6AD[28]K3AD[29]A5AD[30]L1AD[31]K4
FRAME#J3
REQ[0]# L5GNT[0]# C1REQ[1]# B5GNT[1]# B6REQ[2]# M5GNT[2]# F1REQ[3]# B8GNT[3]# C8
REQ[4]#/GPI[40] F7GNT[4]#/GPO[48] E7
REQ[5]#/GPI[1] E8GNT[5]#/GPO[17] F6
REQ[6]#/GPI[0] B7
TRDY# J2STOP# J1
PLTRST# R5PCICLK G6
PME# P6
PIRQ[E]#/GPI[2] D9PIRQ[F]#/GPI[3] C7PIRQ[G]#GPI[4] C6PIRQ[H]#/GPI[5] M3
GNT[6]#/GPO[16] D8
C/BE[0]# J6C/BE[1]# H6C/BE[2]# G4C/BE[3]# G2
IRDY# A3PAR E1
PCIRST# R2DEVSEL# C3
PERR# E3PLOCK# C5
SERR# G5
PIRQ[C]#M1
SATA[1]TXP/RSVD[4]AG4
PIRQ[A]#N2
SATA[3]RXN/RSVD[5]AC9
SATA[1]RXP/RSVD[2]AD5SATA[1]TXN/RSVD[3]AF4
PIRQ[B]#L2
PIRQ[D]#L3
SATA[1]RXN/RSVD