activities for inner tracker
DESCRIPTION
Activities for Inner Tracker. • Introduction • Barrel Inner Tracker (BIT) • Sensor Test • Forward Inner Tracker (FIT) • Summary. H.J. Kim 1 , H. Park 1 , D.H. Kah 1 , H.J. Hyun 1 , Y.I. Kim 1 , D.H. Shim 1 E. Won 2 , J.H. Choi 2 , H.C. Ha 2 , J.H. Han 2 , S.K. Park 2 - PowerPoint PPT PresentationTRANSCRIPT
For Korean Silicon Tracker Group
Activities for Inner Tracker
H.J. Kim1, H. Park1, D.H. Kah1, H.J. Hyun1, Y.I. Kim1, D.H. Shim1
E. Won2, J.H. Choi2, H.C. Ha2, J.H. Han2, S.K. Park2
J. Lee3, B.G. Cheon4
1Kyungpook Nat’l Univ., Daegu, Korea2Korea Univ., Seoul, Korea
3Seoul Nat’l Univ., Seoul, Korea4Chonnam Nat’l Univ., Kwangju, Korea
• Introduction• Barrel Inner Tracker (BIT)• Sensor Test• Forward Inner Tracker (FIT) • Summary
• Introduction• Barrel Inner Tracker (BIT)• Sensor Test• Forward Inner Tracker (FIT) • Summary
For Korean Silicon Tracker Group
Vertex/Tracker in GLD
TPC
BIT
Barrel Inner Tracker (BIT) :• r = 90 mm (innermost), 300 mm (outermost)• half z = 185 mm (innermost), 620 mm (outermost) • 4 layers (561m silicon equivalent thickness) • coverage: |cos| <0.9 • spatial resolution: 10 m
(FIT and ET not shown)
For Korean Silicon Tracker Group
Momentum Resolution
• Without IT: 4.4 x 10-5 (GeV)-1 (high momentum limit)• With IT: 3.9 x 10-5 (GeV)-1
Geant4 with single at 900
σ/p
T2 (G
eV)-1
TPC only
TPC+VTX
TPC+IT+VTX
improve
For Korean Silicon Tracker Group
Number of Layers vs Resolution
2 layer 4 layer 5 layer
4 layer is probably enough
/p
T2 (
GeV
)-1
Geant4 with single at 900
For Korean Silicon Tracker Group
What else…?
4 layers
5 layers
• Varying -position resolution (m to 20m) -addition at outermost layer (at 37cm) -silicon thickness (561m to 300m)
and checked the momentum resolution, but did not find significant changes
So far, the current configuration seems to be good (caution: at the level of the study with single muons)
Outermost layer @ 37cmOutermost layer @ 37cm
σ/p
T2 (G
eV)-1
For Korean Silicon Tracker Group
BIT Configuration
90 mm
160 mm
230 mm
300 mm
Module Half z R sensor size
Layer 1 185Close 88
50x50Far 92
Layer 2 330Close 158
50x50Far 162
Layer 3 475Close 226 50x50
90x90Far 234
Layer 4 620Close 297
90x90far 303
(unit : mm)
BIT 1st layer
50x50
BIT 3rd layer
50x50
90x90
230 4
For Korean Silicon Tracker Group
Double-sided Silicon Strip Sensor
• 5 inch wafer technology • n-type substrate (high resistivity > 5 K) • DC type sensor • double metal structures on p-side • 11 masks in total
Double-sided strip position Sensor
P-side
DSSD
SSD
For Korean Silicon Tracker Group
N-side P-side
waferTOPSIL(5inch, high resistivity, (100), FZ, DSP)
strip width 9m
strip pitch 50(100) m
thickness 380 m readout pitch 50m
size 51 x 26 mm2 readout channel 512(512)
Prototype
For Korean Silicon Tracker Group
see next slideN-side
• bulk pad
• readout pad
• p-stop pad
(punch through)
• guard-ring
N-side
• bulk pad
• readout pad
• p-stop pad
(punch through)
• guard-ring
P-side
• bulk pad
• readout pad
• double-metal structure
(hourglass pattern)
• guard-ring
P-side
• bulk pad
• readout pad
• double-metal structure
(hourglass pattern)
• guard-ring
p-stop
readout paddouble metal structure
DSSD Prototype
For Korean Silicon Tracker Group
Probe Card for Strip Measurement
strip readout line
connector for signal readout
For Korean Silicon Tracker Group
Sensor Measurement
Guardring
Strips
Full depletion voltage
Good results of sensors (characteristics on P-side)
no failed strip p-strip leakage current : 8~20nA/strip @ 100V guardring current ~ 1A @ 100V guardring capacitance ~ 50pF @ 100V full depletion voltage ~ 95 V
For Korean Silicon Tracker Group
Sensor Signal Readout
hybrid board
control board(spartan3)
HV/level shift/LV generator
VA
Version 1.0
For Korean Silicon Tracker Group
Status of Hybrid Board
shift_out_b
out_p: can be interpreted as pedestal w/o sensor< 10 mV (peak to peak)
small spikes (due to clock?)
For Korean Silicon Tracker Group
S/N Measurement
S/N = 15.6
Sensor for a exp. of NASA
Pb Pb
reference sensor
sensor90Sr source
Dark box
For Korean Silicon Tracker Group
S/N = 25.0
Developed DSSDDeveloped DSSD
sigma=18.8±0.16
S/N Measurement
pedestal (HAMAMATSU SSD)
SSD from H companySSD from H company
signal & pedestal (DSSD)
sigma=14.4±0.2
For Korean Silicon Tracker Group
Forward IT Configuration
• Maximum active radius : 380• Minimum active radius : 24• Maximum Z (active) : 1015 • Minimum Z (active) : 155• Covering angle : 4.28 ~ 42.09
module z r min r max
V1.0 V2.0 V3.0 V3.1 V3.2 V1.0 V2.0 V3.0 V3.1 V3.2 V1.0 V2.0 V3.0 V3.1 V3.2
layer 1 200 145 145 155 30 25 24 24 140 70 70 76
layer 2 350 290 290 195 290 55 45 32 27 32 170 140 140 95 140
layer 3 500 435 435 340 435 80 70 37 32 37 250 210 210 165 210
layer 4 650 580 580 485 580 80 80 47 41 47 320 280 280 235 280
layer 5 900 725 725 630 725 80 100 57 51 57 320 360 360 305 380
layer 6 1150 870 870 730 870 80 120 66 58 66 320 380 380 355 380
layer 7 1400 1015 1015 830 1015 80 140 76 64 76 320 380 380 380 380
VTX
BIT
TPC
Forward IT• spatial resolution 10 m• 7 layers (thickness 561 m Silicon strip)
Version3.2
For Korean Silicon Tracker Group
Momentum Resolution
Without forward
4 layers only(2,4,6
removed)
7 layers
4 layer option seems slightly better at low pT
This plot is from a fast sim.(Kalman filter in but no Geant4)
single muon @ (cos=0.95)
Momentum resol. is better w/ FIT than w/o FIT.
σ/p
T2 (G
eV)-1
improve
For Korean Silicon Tracker Group
Configuration of BIT and FIT
TPC
VTX
BIT
Beam Pipe
90
160
230
300
400
155 290 435 580 725 870 1015
32
140
37
210
47
280
57
380
66
380
76
380
24
76
185
330
475
620
FIT
For Korean Silicon Tracker Group
Mechanical Structure
• Our design concept is that the ring support structure for FIT, thickness 2 mm, supports layers of BIT. And strip sensors hold BIT support frame in suspense.
Ring support structure for FIT
BIT support frame
For Korean Silicon Tracker Group
Material Budget
material X0 (cm) Density (g/cm^3)
Carbon Fiber 22.124 1.93
Silicon 9.37 2.33
Copper 1.40 8.94
Air 30391.82 1.20E -03
Al 8.90 8.90
Polycarbonate 34.59 34.59
Material budget [FIT]
0.0%
1.0%
2.0%
3.0%
4.0%
5.0%
6.0%
7.0%
8.0%
0.0 0.2 0.4 0.6 0.8 1.0
cos
X/Xo
Silicon( FIT )
BP+CF+PCB+Silicon
Beampipe
• To optimize the position of support structure, we have to find the structure in which radiation length is minimum.
• In a current version, the range of the radiation length is
Material Budget [ BIT ]
0.0%
1.0%
2.0%
3.0%
4.0%
5.0%
6.0%
7.0%
8.0%
0.0 0.2 0.4 0.6 0.8 1.0
Cos
X/Xo
Silicon( BIT )BP+CF+SiliconBeam Pipe
FIT only
BIT only
For Korean Silicon Tracker Group
Material Budget
• area in which FIT and BIT is overlapped has the maximum value of a radiation length.
For Korean Silicon Tracker Group
• DSSD Designed, Fabricated and Tested: - IV/CV shows good quality sensor - S/N shows that the sensors are in good shape - more tests are in progress - will fabricate AC-SSD on 6-inch(400 m) and 8-inch(500 m) wafers• Electronics to test sensors - built & reading out in progress (see next slide)• Simulation Study for detector configuration - 4 layers in Barrel as Inner Tracker seems reasonable - 7 layers in Forward as IT is being studied - optimization of mechanical structure is being studied - physics simulation is needed with current configuration
• DSSD Designed, Fabricated and Tested: - IV/CV shows good quality sensor - S/N shows that the sensors are in good shape - more tests are in progress - will fabricate AC-SSD on 6-inch(400 m) and 8-inch(500 m) wafers• Electronics to test sensors - built & reading out in progress (see next slide)• Simulation Study for detector configuration - 4 layers in Barrel as Inner Tracker seems reasonable - 7 layers in Forward as IT is being studied - optimization of mechanical structure is being studied - physics simulation is needed with current configuration
Summary
For Korean Silicon Tracker Group
New Power, Logic, Shift and Current Source Board
VA_out
INA134
LM337
EMCO1+40V
EMCO2-40V
MC7815
DS26LS32
DS26LS32
To X
ilinx (2
0p
in)
To Power (8pin)
To Hybrid (50pin)
LM317
LM337
LM317
LM317
LM317
LM317
LM360M LM360MLM360M LM360M
LM360M
cal
Trig
MC7805MC7905
+15V+1.5V/-2.0V +40V/-40V
Analog power
Board size: 8.5 8.5 cm2