address for correspondence

Periyaazhagar et al., International Journal of Advanced Engineering Technology E-ISSN 0976-3945

Int J Adv Engg Tech/Vol. VII/Issue II/April-June,2016/392-400

Research Paper COMPARISON OF ASYMMETRICAL TRINARY DC SOURCE

CASCADED MULTILEVEL INVERTER WITH CARRIER OVERLAPPING AND NON CARRIER OVER LAPPING PWM

TECHNIQUES G.Irusapparajan1, D.Periyaazhagar2

Address for Correspondence 1Professor, Department of Electrical and Electronics Engineering, Mailam Engineering College, India

2Research Scholar, Department of Electrical and Electronics Engineering, Bharath University, Chennai, India

ABSTRACT This paper represents the comparison of carrier over lapping and non-carrier over lapping PWM technique for the choice of trinary DC source 3ɸ cascaded multilevel inverters. In this paper, asymmetrical trinary DC source 3ɸ cascaded multilevel inverter topologies with a multi conversion cell consists of two dissimilar input DC voltage sources, it produce nine level output voltages at output point. Simulation results are performed by using a MATLAB/SIMULINK. It indicates that alternate phase opposition disposition PWM technique provides greater output voltage and minimum harmonic distortion for all PWM techniques. It is also observed that the carrier overlapping phase disposition PWM technique it provides relatively greater fundamental RMS output voltage for all PWM techniques. KEYWORDS — Trinary DC Source, Carrier Overlapping PWM, Non Carrier Overlapping PWM, Asymmetrical MLI, Trinary MLI.

1 INTRODUCTION Multilevel Inverter (MLI) is a Power Electronic converter it used to produce a preferred sinusoidal output voltage with a number of levels of DC input voltages. MLI usually provides output voltage with lesser value of total harmonic distortion, lesser value of voltage stress across the power semiconductor devices, less significant electromagnetic interference, high value of fundamental RMS voltage. The role of the MLI is to modify a DC input voltage to close a sinusoidal output voltage of preferred magnitude and frequency. The major advantages of an Asymmetrical MLI are the optimization of levels in less no number of power supply. However, this optimized multilevel structure wants a largest number of isolated and floating DC supply, which makes converters are difficult to put into action in electric vehicle, because the structure will require many self-governing battery packs illustrated [1]. Reduction in common mode voltage [2] at the output terminal of a MLI using three dimensional Space-Vector modulation is projected. The three dimensional Space-Vector modulation is a wonderful set of the established two-dimensional Space-Vector modulation, and thus, it inherits all the qualities of established two-dimensional. An effortless technology for the choice of switching states to constitute the reference vector projected. The computational cost of the projected technology is self-governing of voltage levels of the inverter. A multilevel space vector PWM control scheme is shown to be a very valuable tool for coupled inductor inverters as six self-governing PWM signals are necessary, and there is supplementary difficulty of meeting the presentation necessities for the coupled inductor while paired the winding common-mode DC current and generate a first-rate multilevel PWM output voltage [3]. Develop a modular 3ɸ MLI especially suitable for electrical drive applications are planned. Otherwise the cascaded Half-bridge inverter, these topologies are based on a power cell connected in cascade by

means of two inverter legs in series [4]. Particularly the five level active neutral point clamping, to create an improved number of levels (in this case nine level) and, thus, a high-quality output with a very narrow amount of extra switches while keeping the switching frequency at a levelheaded [5]. A new approach to analysis of carrier based discontinuous PWM scheme for MLI. The separation of the offset into the major components shows the use for analysis of PWM manage a characteristics of MLI [6]. A technology of a hybrid modulation scheme present combination of fundamental frequency modulation and multilevel sinusoidal-modulation scheme, and are planned for performance of the famous alternative phase opposition disposition control, phase shifted control, carrier based space vector modulation control, and single carrier sinusoidal modulation control. A three stage eighteen level hybrid inverter circuit design and its modern control schemes have been obtained [7]. 2 PROPOSED TRINARY MULTILEVEL INVERTER MLI have more effective and more useful explanation for increasing power and reducing the harmonic content of AC load. The proposed asymmetric cascaded Trinary MLI consists of three single phase units. Each single phase unit contains two full bridge. The first full bridge consists of a DC source 1VDC, while the second full bridge consists of a DC source 3VDC as shown in Figure1. Every inverter level can produce a three dissimilar voltage outputs, positive level, zero level, and negative level by combining of the four switches S1, S2, S3 and S4.Whenever switch S1 and S4 are turned ON, then the output voltage is positive VDC, whenever S2 and S3 are turned ON, then the output voltage is negative VDC, whenever anyone pair of switch S1 and S2or S3 and S4 are turned ON, then the output voltage is zero VDC. The Table 1 represents the switching pattern of proposed MLI. 1-Switched On, 0-Switched off.

Table 1 Output Voltage Level and Their Switching Sequence of Proposed MLI

Output Voltage Level Vout

Switching Sequence of Proposed MLI First Half Bridge (HB1) Sec1d Half Bridge (HB2)

S1 S2 S3 S4 S1 S2 S3 S4 4Vdc 1 0 0 1 1 0 0 1



3Vdc 0 1 0 1 1 0 0 1

2Vdc 0 1 1 0 1 0 0 1 1Vdc 1 0 0 1 0 1 0 1

0 0 1 0 1 0 1 0 1

-1Vdc 0 1 1 0 0 1 0 1 -2Vdc 1 0 0 1 0 1 1 0 -3Vdc 0 1 0 1 0 1 1 0

-4Vdc 0 1 1 0 0 1 1 0

The output voltage of first full bridge can be made equal to negative 1VDC, 0VDC, or positive 1VDC, while correspondingly then the output voltage of the second full bridge can be made equal to negative 3VDC, 0VDC, or positive 3VDC by opening and closing its switches properly. Then the final output voltage is given by

3ou t D C D CV V V ------- (1)

In the proposed inverter, m number of cascaded H bridge segment has unequal DC sources in order of the power of 3, a predictable output voltage levels

are,

3 , 1, 2,3........mmV m

(2)

The firing signal for a selected nine level inverter is generated with help of MATLAB-SIMULINK. The development of firing signals and it is qualified for a different value of modulation indices ma and for a variety pulse width modulation control structure. The simulation result is represented in this work are compared and analyzed for the judgment of the best technologies.

Figure 1 Proposed Trinary Multilevel Inverter

3 CARRIER OVERLAPPING PULSE WIDTH MODULATION TECHNIQUES This research paper represents three carriers overlapping pulse width modulation control schemes that employ the control freedom of vertical offsets among carriers. This method employing a three control schemes is given below: 3.1 Carrier overlapping phase disposition PWM control (COPD). 3.2 Carrier overlapping phase opposition disposition PWM control (COPOD). 3.3 Carrier overlapping alternate phase opposition disposition PWM control (COAPOD).

The amplitude of the modulation indices are Ma and the frequency ratio Mf are distinct as follows:

/ / 4a m f cM A M A ------ (3)

/f c mM f f ------------ (4)

3.1 Carrier Overlapping Phase Disposition PWM Control (COPD) The vertical offset of eight carriers is overlap with each other and also each in phase for generating a nine level output voltage. The COPD-PWM techniques are illustrated in Figure 2.

Figure 2 Carrier and reference wave arrangement of a COPD PWM control

3.2 Carrier Overlapping Phase Opposition Disposition PWM Control (COPOD) The carriers for a nine level Trinary DC source, multilevel inverter with carrier overlapping phase opposition disposition PWM techniques are

illustrated in Figure 3. In this topology, all the carriers are divided into two groups uniformly. These are opposite and 180 degrees out of phase width those below the zero values. 180 degrees out of phase with each other.



Figure 3 Carrier and reference wave arrangement of a COPOD PWM control

3.3 Carrier overlapping Alternate Phase Opposition Disposition Control (COAPOD) The carriers for a nine level Trinary DC source multilevel inverter with carrier overlapping alternate phase opposition disposition PWM techniques are

illustrated in Figure 4. In this topology, the carriers are one hundred and eighty degrees phase shifted from each other. It may be recognized as PWM with an amplitude overlapping and neighboring phases are interleaved carriers.

Figure 4 Carrier and reference wave arrangement of a COAPOD PWM control

4. Non Carrier Overlapping PWM Techniques A carrier based PWM technique which has been used for generating a firing pulse used to triggering proposed MLI using multiple carriers. Many techniques are available some of those techniques are discussed below: 4.1 Phase disposition PWM technique. 4.2 Phase opposition disposition PWM technique.

4.3 Alternate phase opposition disposition PWM technique. 4.1 Phase Disposition PWM Technique Phase disposition PWM technique (PD), eight carriers are in phase with each other and it has same amplitude and same frequency. The carrier wave arrangements of three-phase MLI with sinusoidal reference are shown in Figure 5.

Figure 5 Carrier and reference wave arrangement of an PDPWM control

4.2 Phase Opposition Disposition PWM Technique Phase opposition disposition PWM technique (POD), all carriers are in phase with above and below the modulating signals in zero values. These carriers are

180 degrees out of phase width those below the zero values. The carrier wave arrangements of three phase MLI with sinusoidal reference shown in Figure 6.

Figure 6 Carrier and reference wave arrangement of a POD PWM control



4.3 Alternate Phase Opposition Disposition PWM Technique In, alternate phase opposition disposition PWM technique (APOD), eight carriers is one hundred and

eighty degree alternation phase displaced from each other. The carrier wave arrangements of a three phase multilevel inverter with sinusoidal references are shown in Figure 7.

Figure 7 Carrier and reference wave arrangement of an APOD PWM control

4 SIMULATION RESULT The asymmetrical trinary DC source three phase cascaded MLI are modeled in MATLAB / SIMULINK using power systems block set shown in Figure 8. The Switching signals of asymmetrical trinary DC source 3ɸ cascade MLI using bipolar PWM technology simulated. The simulations are performed for a choice of ma varied from 0.8 to 1 and the resultant %THD is measured shown in Table

1. Table 5 shows fundamental Vrms of inverter output voltage for similar values of modulation indices. Figures 9-20 shows the simulation output voltage and FFT plot of an asymmetrical trinary DC source three phase cascaded multilevel inverter and their appropriate harmonic order of a spectrum with bipolar PWM technology but for only one sample of the modulation indices.

Figure 8 Simulink model of Trinary DC source 3 multilevel inverter

For modulation indices (ma=0.85) the harmonic energy level is governing in: Figure 10 represent the harmonic energy level in COIPD PWM techniques shows 40th order of harmonic. Figure 12 represent the harmonic energy level in COPOD PWM techniques shows 38th 40th order of harmonic. Figure 14 represent the harmonic energy level in COAPOD PWM techniques shows 29th, 31st, 39th order of harmonic. Figure 16 represent the harmonic energy level in PD PWM techniques shows 40th order of harmonic. Figure 18 represent the harmonic energy level in POD PWM techniques shows 35th 39th order of harmonic. Figure 20 represent the harmonic energy level in APOD PWM techniques shows 29th, 31st, 35th, 37th, 39th order of harmonic. Simulations are performed for various values of ma ranges from 0.8 to 1 and the results are obtained by using following parameter such as Vdc = 25V , 3Vdc =

75V, load resistance is 100Ω, carrier frequency fc is 2000Hz, carrier amplitude Ac is 2 and modulation frequency fm is 50Hz. Table 2 and Figure 21 represent the THD contrast of COIPD, COPOD, COAPOD, PD, POD and APOD pulse width modulation techniques no more than one method of non-overlapping pulse modulation techniques such as APOD (Alternate overlapping phase opposition disposition) it hold minimum quantity of harmonic distortion. Table 3 and Figure 22 represent the VRMS contrast of COIPD, COPOD, COAPOD, PD, POD and VAPOD pulse width modulation techniques no more than one method of carrier overlapping pulse modulation techniques such as COIPD (Carrier overlapping In Phase Disposition) it hold maximum quantity of fundamental RMS output voltage.



Figure 9 Output voltages generated by carrier overlapping phase disposition PWM control

Figure 10 Output voltages of carrier overlapping phase disposition PWM control

Figure 11 Output voltages generated by carrier overlapping phase opposition disposition PWM control with

sinusoidal reference

Figure 12 Output voltage of carrier overlapping phase opposition disposition PWM control



Figure 13 Output voltages generated by carrier overlapping alternate phase opposition disposition PWM control

Figure 14 Output voltage of carrier overlapping alternate phase opposition disposition PWM control

Figure 15 Output voltages generated by phase disposition PWM control

Figure 16 Output voltage of in phase disposition PWM control



Figure 17 Output voltages generated by phase opposition disposition PWM control

Figure 18 Output voltage of phase opposition disposition PWM control

Figure 19 Output voltages generated by Alternate phase opposition disposition PWM

Figure 20 Output voltage of Alternate phase opposition disposition PWM control



Table 2 %THD for Different Kind of Modulation Indices

Ma Sinusoidal Reference

Carrier Overlapping PWM NON Carrier Overlapping COIPD COPOD COAPOD PD POD APOD

1 20.67 20.02 22.02 13.75 13.46 13.26

0.95 22.02 21.41 23.67 15.59 15.63 15.13

0.9 23.48 22.88 25.36 16.78 16.79 16.66

0.85 24.89 24.08 27.18 16.99 16.99 16.81

0.8 26.62 25.76 29.52 17.83 16.94 17.41

Table 3 Fundamental RMS Voltage for Different Kind of Modulation Indices

ma Sinusoidal Reference

Carrier Overlapping PWM NON Carrier Overlapping COPD COPOD COAPOD PD POD APOD

1 75.62 75.56 74.4 70.71 70.89 70.73 0.95 73.26 73.31 71.78 67.16 67.29 67.17 0.9 70.75 70.73 69.24 63.65 63.6 63.64 0.85 68.09 68.04 66.12 60.09 59.89 60.09 0.8 65.21 65.19 63.15 56.59 56.54 56.55

0

5

10

15

20

25

30

35

1 0.95 0.9 0.85 0.8

%THD for different modulation Indices

Carrier Overlapping PWMCOIPD

Carrier Overlapping PWMCOPOD

Carrier Overlapping PWMCOAPOD

NON Carrier Overlapping PD

NON Carrier OverlappingPOD

NON Carrier OverlappingAPOD

Figure 21 % THD for Carrier Overlapping and Non carrier Overlapping Techniques %THD Vs Modulation Indices

0

10

20

30

40

50

60

70

80

1 0.95 0.9 0.85 0.8

Fundamental Vrms Voltage for Different Modulation Indices

Carrier Overlapping PWM COPD

Carrier Overlapping PWM COPOD

Carrier Overlapping PWM COAPOD

NON Carrier Overlapping PD

Figure 22 Fundamental VRMS for Carrier Overlapping and Non carrier Overlapping Techniques VRMS Vs Modulation

Indices

5 CONCLUSION In this paper the simulation results of asymmetrical trinary DC source three phase cascaded multilevel inverter with Resistive load with different Pulse

width modulation Techniques (COP and Non COP) are obtained with help of MATLAB/SIMULINK, Different performance parameter measures such as THD, Fundamental V RMS, was obtained and



tabulated. Comparison of carrier overlapping and non-carrier over lapping pulse width modulation technique showed that the Alternate phase opposition disposition techniques (APOD) provides the low harmonics distortion and carrier overlapping phase disposition techniques (COPD) provides larger value of Fundamental RMS voltage compared to all other pulse width modulation techniques. After that footstep in the asymmetrical trinary DC source three phase cascaded multilevel inverter testing is carry out with help of three phase induction motor drive using predictable speed and torque control. The testing process can be carried out with stepped and trapezoidal pulse width modulation technology and obtain the speed control operation of asymmetrical trinary DC source three phase cascaded multilevel inverter fed Induction Motor. REFERENCES

1. J. Dixon, J. Pereda, C. Castillo, and S. Bosch (2010) ‘Asymmetrical Multilevel Inverter for Traction Drives Using Only One DC Supply,’ IEEE Transactions on Vehicular Technology, vol. 59, no. 8, pp. 3736–3743.

2. M. M. Renge and H. M. Suryawanshi (2010) ‘Three-Dimensional Space-Vector Modulation to Reduce Common-Mode Voltage for Multilevel Inverter,’ IEEE Transactions on Industrial Electronics, vol. 57, no. 7, pp. 2324–2331.

3. M. K. Behzad Vafakhah, John Salmon (2010) ‘A New Space-Vector PWM with Optimal Switching Selection for Multilevel Coupled Inductor Inverters,’ IEEE Transactions on Industrial Electronics, vol. 57, no. 7, pp. 2354–2364.

4. G. Waltrich and I. Barbi (2010) ‘Three-Phase Cascaded Multilevel Inverter Using Power Cells With Two Inverter Legs in Series,’ IEEE Transactions On Industrial Electronics, vol. 57, no. 8, pp. 2605–2612.

5. T. Chaudhuri, A. Rufer, and P. K. Steimer (2010) ‘The Common Cross-Connected Stage for the 5L ANPC Medium Voltage Multilevel Inverter,’ IEEE Transactions on Industrial Electronics, vol. 57, no. 7, pp. 2279–2286.

6. N. Nguyen, B. Nguyen, and H. Lee (2011), ‘An Optimized Discontinuous PWM Method to Minimize Switching Loss for Multilevel Inverters,’ IEEE Transactions On Industrial Electronics, vol. 58, no. 9, pp. 3958–3966, 2011.

7. C. Govindaraju and K. Baskaran (2011) ‘Efficient Sequential Switching Hybrid-Modulation Techniques for Cascaded Multilevel Inverters,’ IEEE Transactions on Power Electronics, vol. 26, no. 6, pp.1639–1648.

address for correspondence

Documents