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ADS DDR Test Benches with Waveform Bridge to Instrument Certified DDR Test Compliance

Jian Yang R&D Engineer Nilesh Kamdar Applications Engineer

Sept 16, 2014

New Keysight EEsof EDA Simulation Tools for

Signal Integrity, Power Integrity, and EMI/EMC

Page

– Introduction to DDR4

– “DDR4 Simulation -> Compliance Test” Flow

– DDR4 Compliance Test Bench Demo

– Summary

Keysight EEsof EDA Simulation

Tools for Signal Integrity, Pow er

Integrity, and EMI/EMC

2

Agenda

Page Keysight EEsof EDA Simulation



3

Introduction: DDR4 memory ramping up in electronic systems

Page Keysight EEsof EDA Simulation



4

DDR4 Memory in the News

Page

DDR4 High Speed => Less Timing Margin




5

Page

Shrinking Eye due to Package, PCB and Connectors




6

Page

ADS 2014 “DDR4 Simulation=>Compliance Test” User Story




7

Copyright 2014 Agilent Technologies,

Inc. 7

1. As a DDR controller designer at an IC company, I need to swap out the

simulated testbench’s generic controller model with my controller I/O

model…

2. As a PCB/package/DIMM designer at an OEM or IC company, I need to

swap out parts of the simulated testbench’s generic channel cascade with

the post-layout EM-based model of my package (or PCB or DIMM)…

3. As a DRAM I/O designer at an IC company, I need to swap out the

simulated testbench’s generic DRAM model with my DRAM I/O model….

(for all three)…then I want to run a sign-off compliance test on the simulated

test bench waveforms before committing to fabrication. I want to run the exact

same tests on the simulated testbench that I will run on my ‘scope in the test

lab when get my prototypes back from fab.

Page

ADS 2014 “DDR4 Simulation=>Compliance Test” Flow




8


Inc. 8

Simulated test bench in ADS

Real test bench Infiniium

oscilloscope

ADS “Waveform

Bridge”: Script that

writes file format

that ‘scope

compliance app

understands

Page

ADS DDR4 Simulation Setup




9


Inc. 9

Simulation Setup for Data and Strobe Signals in WRITE Cycle

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Driver and Receiver IBIS models




10


Inc. 10

Page

Channel Model




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Inc. 11

– Use multilayer transmission

line models and S-

parameters to build the

channel model

– Can import a PCB layout to

build an EM model using

Momentum or FEM

– Can import S-parameters

from other EM tools or

VNA/TDR measurements

Page

Pattern Generator




12


Inc. 12

– Use PRBS sources to

generate random DQ pattern

and repetitive DQS pattern

– Use pulse sources as input

to IBIS Enable Pin to

generate DQ and DQS

bursts

Page

ADS Transient Simulation Controller and Netlist Include




13


Inc. 13

Page

Save ADS waveforms to .h5 files for analysis in Infiniium Offline




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Inc. 14

Page

DDR4 Compliance Test




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Inc. 15

– What are we testing?

• Clock Tests

• Electrical

• Timing

Page

DDR4 Electrical and Timing Tests




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Inc. 16

Page

Load ADS waveforms to perform DDR4 compliance tests




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Inc. 17

Page

Generate measurement results and HTML report




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Inc. 18

Page

DDR4 Compliance Test Bench demo




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Inc. 19

Page

Summary




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Inc. 20

• ADS simulates the physical channel effects of I/O drivers/receivers and

package/PCB/connectors between MCH and DDR4 memory

• Simulated waveforms are used to run DDR4 compliance test

• Compliance sign-off report is generated from the simulated waveforms before

committing to fabrication. Exact same tests can be run in the test lab when

hardware prototypes come back from fabrication

Page

Call to Action




21


Inc. 21

Download “DDR4 Compliance Test Bench” software:

http://www.keysight.com/main/software.jspx?cc=US&lc=eng&ckey=2504328&id=2504328

Watch “DDR4 Compliance Test Bench” video :

http://www.keysight.com/en/pd-2423419-pn-W2351EP/ddr4-compliance-test-bench

http://www.keysight.com/main/software.jspx?cc=US&lc=eng&ckey=2504328&id=2504328















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