altiumlive 2017: effective methods for advanced routing 1/effective... · breakouts –fine pitch...

AltiumLive 2017:

Charles PfeilSenior Product Manager

Effective Methods for Advanced Routing

Dave CousineauSr. Field Applications

Engineer

Charles Pfeil – Senior Product Manager

Over 50 years of experience in the PCB design and software industry. Designer and owner of service bureau. Worked for Racal-Redac, ASI, Cadence, Intergraph, VeriBest, Mentor Graphics, and now Altium.

Architect of products with automation that gives the designer control, quality results, fast performance. Holder of 11 patents.

Wrote a design book titled, "BGA Breakouts and Routing". Inducted into the PCB Design Hall of Fame by the UP Media Group.

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Techniques

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Differential Pair Routing

Routing Problems

Breakouts – Fine Pitch BGAs

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Agenda

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Rules

Quality

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Routing can be difficult and time consuming

• Dense board area and limited layers

• Before increasing layer count, consider alternatives

• River routing, via-in-pad, stacked µvias

• Reduce trace widths, use thin dielectrics

• High-speed concerns

• Manage all concerns based on edge rates and data rates

• Timing – Use realistic tolerances, tune gaps. Driver compensation?

• Crosstalk – Manage clearance to aggressor relative to reference plane

• Impedance – Realistic management of the appropriate concerns

Routing Problems

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• Over-constrained rules

• Can make design needlessly complex – unnecessary rules don’t improve the design

• Compromise in the right places – identify problems and review with engineering early

• Fabrication requirements

• Know your fabricator’s capabilities – clarify discrepancies at the beginning of the design

• Create templates based on fabricator and via technology used.

• Investigate if HDI can be lower cost – HDI Handbook, Happy Holden presentations

Additional routing difficulties

The art of PCB design is discovering and applying the suitable compromises that enable

the circuits to work as desired, while meeting the time and cost budgets.

Routing Problems

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Techniques

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Routing Problems


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Agenda

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Rules

Quality

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Improved routing software enables productivity

• Take advantage of automation

• Does it allow designer control?

• Does it produce manual quality?

• River routing

• Reduce vias, manage impedance

• Gloss & Retrace

• Better diff pair quality, even over manual route

• Pad entry, change width gap

Interactive routing tools continue to increase levels of automation.

Routing Techniques

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Improved routing software enables productivity

• Copy & paste

• Simplifies fanouts and makes them consistent

• Use a grid! Factor of pin-pitch, reset origin to pin

• Pin swap

• Can make routing much more direct, less layers

• Keyboard shortcuts

• Learn the shortcuts, use them

• Create a list of the ones you use the most

Automated interactive routing tools increase productivity with user control and quality.

Routing Techniques

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Techniques

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Routing Problems


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Agenda

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Rules

Quality

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Breakout of fine-pitch BGAs

Today, stacked µVias is by far the best solution for very dense HDI designs.


• Fanout & escape tracks for ≤.65mm pitch

• Difficult challenge

• Will get worse as pin-count increases

• Via-in-pad methods – Best approach

• Location of via can improve route density

• Reduce trace widths

• Thru-via vs µVia

• If pin-count high, need µVias or high layer count

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Push perimeter fanouts

Creating effective fanout patterns is puzzle solving that can increase route density.


• If perimeter pins need fanouts, push away

from BGA

• Can eliminate one escape layer for large BGAs

• Especially useful if there are power & ground

pins on the outer two rows

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Via in Pad – VIP – Pattern A

• µVia in the center of ball pad

• Via hole must be filled and smoothed

• Eliminates trapped air voids during soldering

• Route density may not be maximized

• B-C-D patterns may be better depending

on pitch

• VIP pattern for ≤.4mm pitch BGAs


Experiment with different patterns and find what is most effective.12

Offset VIP – Pattern B

• The µVia offset from center, still completely

inside the ball pad

• May not need to fill & smooth µVia

• Likelihood of trapped air voids is much smaller

than in the case of the A pattern.

• This Offset VIP is optimal for .5mm and .65mm

pitch BGAs


Patterns may be applied on the whole BGA or locally as needed.13

Partial VIP – Pattern C

• µVia hole intersects the edge of the ball pad

• Location determined by route density

• Maximize the number of traces that can be run

through the channel between µVias

• µVia hole may not need filling & smoothing

• Work with fabricator and assembler

• Find out if not filling the µVia is supported

• C pattern good for .65mm & .8mm pitch


Route as much as allowed on outer layers, and push outer fanouts away from BGA.14

Partial VIP – Pattern C

• Increase the potential number of tracks

running between the vias.

• Useful for critical signals, power and

ground, diff pairs


Partial VIP – Inner Layers

Vertical channels may be blocked depending upon via and track sizes.15

Near VIP – Pattern D

• µVia hole completely outside edge of ball pad

• Soldermask opening concern

• Make µVia hole completely outside the soldermask

opening for the ball pad

• Potential maximum density

• May enable the best alignment of the µVias in

columns and rows for the greatest route density

• D pattern good for .65mm and .8mm pitch


Experiment, but make sure you discuss solutions with fabricator.16

Near VIP – Pattern D

• Maximize the potential number of tracks

running between the vias.

• Can be 25% greater space than Partial VIP


NEAR VIP – Inner Layers

Take advantage of pins that don’t need fanouts and consider them in patterns.17

0.65 mm BGA - VIP


• 300 µm Ball Pad

• 100 µm Trace

• 180 µm µVia

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0.65 mm BGA - VIP



• 100/75 µm Trace

• 275 µm µVia

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0.5 mm BGA - VIP



• 100 µm Trace

• 200 µm µVia

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0.5 mm BGA

Offset VIP



• 75 µm Trace

• 200 µm µVia

• Better than VIP

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0.4 mm BGA –VIP



• 75 µm Trace

• 180 µm µVia

• .35 mm BGA

• Same approach as .4 mm

• But smaller feature sizes

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0.4 mm BGA

Offset VIP



• 75 µm Trace

• 180 µm µVia

• Worse than VIP

• Fewer total tracks

• VIP = 1 per channel

• Offset VIP = .75

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Techniques

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Routing Problems


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Agenda

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Rules

Quality

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Quality is about routing efficiently and meeting requirements

• Efficiency - Reduce meandering, vias, route segments

• Makes it easier to edit later

• Signal behavior requirements

• Symmetry looks nice, but avoid enabling crosstalk

• A design that works is the #1 priority

• Fabrication recommendation: “Space is King”

• Use automation that improves quality

• I certainly appreciate artistic work, but…

An artistic appearance is a result, not the cause, of quality design.

Route Quality

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Quality is about routing efficiently and meeting requirements

• Efficiency - Reduce meandering, vias, route segments

• Makes it easier to edit later

• Signal behavior requirements

• Symmetry looks nice, but avoid enabling crosstalk

• A design that works is the #1 priority

• Fabrication recommendation: “Space is King”

• Use automation that improves quality

• I certainly appreciate artistic work, but…

An artistic appearance is a result, not the cause, of quality design.

Route Quality

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Techniques

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Routing Problems


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Agenda

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Rules

Quality

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To ensure success, properly constrain the routing

• Use the rules for DRC and control

• Avoid wantonly ignoring rules

• Automation can make it easier

• Simplify the rule definitions

• Avoid over-constraining

Appropriately defining the rules makes routing and editing easier and faster.

Rules

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Over Constraining

• Conservative data sheets

• Skew budget (length tolerances) often in unnecessarily small

• Why? Desire to eliminate possibility of potential problems

• Finding the right balance of compromise

• Often not possible to over-constrain everything without sacrificing one or more of these: cost, time,

size, performance or reliability

• Design Software

• If the software enables you to easily address the over constrained rules, why not use it?

• Allows the margin (available skew) to be reserved for other effects

Rules

Over constraining a design may result in more layers and higher cost.29

Over Constraining

• The truth…

• Rick Hartley’s presentation “The Truth About Differential Pairs in High Speed PCBs” illustrates that

over constraining differential pairs may not be necessary

• Rick’s view on differential pair length tolerance based on circuit speed

Rules

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The other side of the coin

• If it isn’t broke, don’t fix it

• Organizations continue conservative design practices simply because they worked in the past

• Reluctance to analyze constraints to determine if they are really necessary

• Pushing the envelope

• Continually strive to make process more efficient and effective

• Most important question

• At what data rate can a particular diff pair concern become significant and how is it to be managed?

Rules

Analyze constraints and solutions to reduce time to market and fab yield

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Techniques

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Routing Problems


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Agenda

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Rules

Quality

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Addressing concerns

based on data rates

• Know the problems & solutions

• Manage the primary concerns

• Timing, impedance, crosstalk

• Avoid over-constraining

• Reasonable tolerances

• Auto compensation

• Allows for greater timing margins

• Pad entry

• Converge ASAP with equal length


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AggressorDiff Pair

H

≥3xH

To prevent crosstalk on diff pair

Reference plane

Rick Hartley’s “Truth About Diff Pairs”

• Diff pair may be shorter due to faster propagation

• Avoid “Creepy Lengths” when the target length

keeps growing if routed in positive tolerance

• In length matching, include via-used and pin-

package lengths

• Tuning compliments together results in no skew

difference, it is always balanced

Corner and pad entry skew adjustments34


Phase match start at driver, bump at mismatchKeep stitch vias equidistant to DP vias

Corner Pad Entry

• Fiberweave routing

• If loose weave makes one compliment is over glass and the other over resin

• Search: “Jeff Loyer fiber weave effect” – Best presentation on topic

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• Impedance discontinuities can cause reflections which may add noise to signal

• Cannot avoid all of these discontinuities, so try to minimize the number of them

• It is “simply” a matter modifying the routing to keep the same impedance, with reason

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Remove stubs with backdrilling Eliminate stubs with µVias37

Using arcs

• When does it matter?

• “When the data rate is >16Gb/s everything

matters”

Arcs are beautiful, but usually not necessary


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Pad entry

• Converge ASAP with equal length

• This will help to eliminate skew at the

start and end of the routing

• Pad entry gloss may work well

• Fabrication concerns

• Teardrops, etch traps, soldermask

• Balanced pad entry

Pad entry is a good example in which automation can make routing a lot easier


Very GoodUsually Within

Tolerance

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Routing tools and methods are improving:

• Tools continually enhanced for new circuit, component and fabrication technology

• New methods with effective automation can increase productivity and quality

• Using the available skew for each circuit will increase productivity

• Avoid over-constraining and making routing easier, yet still effective

Conclusion

Get the most out of the available automation for routing.

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Check Priorities for all rules

Ensure that “All-All” Width and Clearance rules exist

Set to lowest Priority

All used via sizes fall within Via Style Min and Max values

Actual Class names match those in Class-scoped rules

Class name = “power” vs. Rule = InNetClass(‘pwr’)

All (or appropriate) Routing Layers are enabled

Check applicability of more complex rule scopes using “Test Queries” button

Ensure that necessary rules are enabled!

For Interactive Routing, set Width and Via sources to “Rule Preferred”

DRC Checklist

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Thanks for your Attention!

Questions?

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