1 cs/coe0447 computer organization & assembly language chapter 2 part 1 in-class lab session...

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CS/COE0447

Computer Organization & Assembly Language

Chapter 2 Part 1In-Class Lab Session (Lab 2)

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• To get credit, attend class 1/13 and 1/20, and work with your partner to answer all the questions

• Don’t skim! Work through the examples, even if there is no question

• If a slide has questions to answer (or is labeled exercise), answer the question and then check your answers on the Answer Key. Before moving on, make sure you understand the answers. Ask if you have questions.

• For this lab, there is nothing to hand in.

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Topics

• MIPS operations and operands• MIPS registers• Instruction encoding• Understanding the technical documentation for

instructions (green card)

• Arithmetic operations• Logic operations• Memory transfer operations• Labels• Example MIPS program

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MIPS Operations/Operands

• “Operation” (instruction) – Produces a value from one or more input values

• “Operand” -Input or Output values for an operation

• MIPS operations– Arithmetic operations (integer/floating-point) (add, sub,…)– Logical operations (and, or,…)– Shift operations (shift a certain number of bits to the left or right)– Compare operations (do something if one operand is less than another,…)– Load/stores to transfer data from/to memory– Branch/jump operations– System control operations/coprocessor operations

• Question: Check on the green card. What is the mnemonic for a shift logical left instruction? ________

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MIPS Operations/Operands

• MIPS operands– General-purpose registers: Question: name 2 of these____________

– Fixed registers, e.g., HI/LO registers

– Memory location

– Immediate value – Question: we saw this instruction in lecture: addi $t3,$zero,4. – $t3 is the destination. – addi is the mnemonic for the instruction. – $zero is an operand, and 4 is an operand.

– What type of operand is $zero? (pick from the above list):_______ What type of operand is 4?__________ What do you think “i” stands for in “addi”?_________

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MIPS Arithmetic

• Arithmetic Type Instruction:

– <op> <rdestination> <rsource1> <rsource2>

• All arithmetic instructions have 3 operands– Operand order is fixed: destination first– 32 registers (page 2 of green card)– Question: What number is $t3?_____ What number is $s3?_____

• Examples– add $t0, $s0, $s2 # $t0 = $s0 + $s2– sub $s0, $t0, $t1 # $s0 = $t0 – $t1 – Question: In the sub instruction, which register is rd?_____ Which

register is rs?_______ Which register is rt?_____

rd rs rt

Operands

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General-Purpose Registers

• GPR: all can be used as operands in instructions

• Still, conventions and limitations exist to keep GPRs from being used arbitrarily

– r0, termed $zero, always has a value “0”– r31, termed $ra (return address), is reserved for subroutine call/return– Etc. (we’ll see other conventions/limitations later)– Register usage and related software conventions are summarized in “application

binary interface” (ABI), which is important when writing system software such as an assembler and a compiler

• Question: Check the green card: what is the calling convention for $t0-$t7?_________ Note that these conventions are part of the ABI mentioned above. What does ABI stand for?________________

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Instruction Encoding

• Instructions are encoded in binary numbers– Assembler translates assembly programs into binary numbers– Machine decodes binary numbers to figure out what the instruction is, and then

executes the instruction– MIPS has “fixed” 32-bit instruction encoding

• MIPS has several instruction formats– R-format: arithmetic instructions– I-format: transfer/branch/immediate format– J-format: jump instruction format– (FI/FR-format: floating-point instruction format)(later chapter)

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MIPS Instruction Formats

Name Fields Comments

6 bits 5 bits 5 bits 5 bits 5 bits 6 bits All MIPS instructions 32 bits

R-format op rs rt rd shamt funct Arithmetic/logic instruction format

I-format op rs rt address/immediate Transfer, branch, immediate format

J-format op target address Jump instruction format

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R-Format Instructions• Define “fields” of the following number of bits each: 6 + 5 +

5 + 5 + 5 + 6 = 32

6 5 5 5 65

opcode rs rt rd functshamt

• For simplicity, each field has a name:

• So, the opcode is 6 bits, rs, rt, rd, shamt are each 5 bits, and funct is 6 bits.

For shift instructions: “shift amount”.0 if the instruction is not a shift.

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Question: R-Format Example

• add $8,$9,$10

Translate the above instruction.Specifically: Look up “add” on green card. As you can see, “add” is R format. Look up the R format and the opcode/funct values for add. Then, fill in the tables and the underline below.

Binary number per field representation (use the right # of bits!):

Decimal number per field representation:

hex representation: _________________________ (group the bits by 4 from the *right*)

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M I P S Reference Data: CORE INSTRUCTION SET

NAME MNE-MON-IC

FOR-MAT

OPERATION (in Verilog)

OPCODE/ FUNCT (hex)

Add add R R[rd] = R[rs] + R[rt] (1)

0 / 20hex

Add Immediate

addi I R[rt] = R[rs] + SignExtImm (1)(2)

8hex

Branch On Equal

beq I if(R[rs]==R[rt]) PC=PC+4+ BranchAddr (4)

4hex

(1) May cause overflow exception(2) SignExtImm = { 16{immediate[15]}, immediate }(3) ZeroExtImm = { 16{1b’0}, immediate }(4) BranchAddr = { 14{immediate[15]}, immediate, 2’b0}

Later

NOW make sure you understand everything but the OPERATIONColumn.

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R-Format Instructions (REMINDER)

• Define “fields” of the following number of bits each: 6 + 5 + 5 + 5 + 5 + 6 = 32

6 5 5 5 65

opcode rs rt rd functshamt

• For simplicity, each field has a name:

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I-Format Instructions• Define “fields” of the following number of bits each: 6 + 5 +

5 + 16 = 32

6 5 5 16

opcode rs rt immediate

• For simplicity, each field has a name:

• So, the opcode is 6 bits, rs and rt are each 5 bits, and immediate is 16 bits

Let’s do an example using addi

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M I P S Reference Data: CORE INSTRUCTION SET

NAME MNE-MON-IC

FOR-MAT

OPERATION (in Verilog)

OPCODE/ FUNCT (hex)

Add add R R[rd] = R[rs] + R[rt] (1)

0 / 20hex

Add Immediate

addi I R[rt] = R[rs] + SignExtImm (1)(2)

8hex

Branch On Equal

beq I if(R[rs]==R[rt]) PC=PC+4+ BranchAddr (4)

4hex

(1) May cause overflow exception(2) SignExtImm = { 16{immediate[15]}, immediate }(3) ZeroExtImm = { 16{1b’0}, immediate }(4) BranchAddr = { 14{immediate[15]}, immediate, 2’b0}

Look at addi – note that its opcode is 8. We’ll look atthe operation column later.

Later

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Question: I-Format Example

• MIPS Instruction:addi $8,$9,7 $8 is rt; $9 is rs. This instruction adds 7 to the contents of $9 and stores it in $8.

Binary number per field representation:

Decimal number per field representation:

Hex representation:_________________________________

Translate the instruction above to fill in the following tables:

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M I P S Reference Data: CORE INSTRUCTION SET

NAME MNE-MON-IC

FOR-MAT

OPERATION (in Verilog)

OPCODE/ FUNCT (hex)

Add add R R[rd] = R[rs] + R[rt] (1)

0 / 20hex

Add Immediate

addi I R[rt] = R[rs] + SignExtImm (1)(2)

8hex

Branch On Equal

beq I if(R[rs]==R[rt]) PC=PC+4+ BranchAddr (4)

4hex

(1) May cause overflow exception(2) SignExtImm = { 16{immediate[15]}, immediate }(3) ZeroExtImm = { 16{1b’0}, immediate }(4) BranchAddr = { 14{immediate[15]}, immediate, 2’b0}

NOW

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Verilog – language used to describe functions of hardware

Example:(2) SignExtImm = { 16{immediate[15]}, immediate }

Rules:- {x,y,z} means xyz (the three concatenated together)- {3{a}} means “a” repeated 3 times: aaa- Immediate[15] means bit 15 of the immediate field of

the instruction

Question: What does the Verilog statement labeled (2) above mean? What specific binary value is SignExtImm for the command addi $8,$9,7?

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addi $8,$9,7

Executing the addi instruction

$8

$9 0x00000023Suppose

Immediate = 0x0007 (16 bits; 4 hex digits)

SignExtImm = 0x00000007 (32 bits; 8 hex digits)

0x00000023+0x00000007 0x0000002A

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addi $8,$9,7 RECAP

• We saw that the machine code is 0x21280007– See answer slide 5– This is the numerical version of the instruction, which the assembler

creates– ‘immediate’ refers to the right-most 4 hex digits (16 bits) of the machine

code the 0x0007 [see previous slide]

• On the green card, the OPERATION column tells us what happens when this instruction is executed– The immediate value 0x0007 is sign-extended to 0x00000007– Then 0x00000007 is added to the value stored in $9 and the result is

placed in $8

• We looked at the funny Verilog stuff so we can understand the technical documentation, e.g.,

(2) SignExtImm = {16{immediate[15]}, immediate}

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Exercise

Which instruction has same representation as 35ten?A. add $0, $0, $0

B. subu $s0,$s0,$s0

C. lw $0, 0($0)

D. addi $0, $0, 35

E.  subu $0, $0, $0

F. Trick question! Instructions are not numbers.

• Use Green Card to Answer.

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Logic Instructions

• Bit-wise logic operations• <op> <rdestination> <rsource1> <rsource2>

• Examples– and $t0, $s0, $s2 # $t0 = $s0 ^ $s2– or $s0, $t0, $t1 # $s0 = $t0 | $t1– nor $s0, $t0, $t1 # $s0 = ~($t0 | $t1)

Name Fields Comments

R-format op rs rt rd shamt funct Logic instruction format

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Bitwise and, or

A and B: 1 if both are 1; 0, otherwise

X or Y: 0 if both are 0; 1, otherwise

Let’s take bitwise AND of the following 8-bit binary #s:

10110001

11101101

10100001

1 because both bits above are 1.

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Bitwise and, or

A and B: 1 if both are 1; 0, otherwise

X or Y: 0 if both are 0; 1, otherwise

Now, let’s take bitwise OR of the following 8-bit binary #s:

10110001

11101101

11111101

0 because both bits above are 0.

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Logic Instructions: Example

addi $t0,$0,0x32 addi $t1,$0,0x777 and $t2,$t1,$t0

$t0

$t1

$t2

00000000000000000000000000110010

00000000000000000000011101110111

00000000000000000000000000110010

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Logic Instructions: Example

addi $t0,$0,0x32 addi $t1,$0,0x777 or $t2,$t1,$t0

$t0

$t1

$t2

00000000000000000000000000110010

00000000000000000000011101110111

00000000000000000000011101110111

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Exercise

• What values are placed into $t0, $t1, $t5 and $t4 by the following pieces of code?

addi $t0,$0,0xA23

addi $t1,$0,0x80001B42

and $t4,$t0,$t1

or $t5,$t0,$t1

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Memory Transfer Instructions

• To load/store a word from/to memory:– LOAD: move data from memory to register

• lw $t3, 4($t2) # $t3 M[$t2 + 4]– STORE: move data from register to memory

• sw $t4, 16($t1) # M[$t1 + 16] $t4

• Suppose $t2 = 0x10010000• Suppose Memory[0x10010004] = 0x55• lw $t3,4($t2) loads 0x55 into $t3:

1. Adds 4 to contents of $t2 to get 0x100100042. Gets the contents of memory location 0x1001004 and puts it into $t3

– sw $t3,8($t2) stores 0x55 into 0x100100081. Adds 8 to contents of $t2 to get 0x100100082. Puts contents of $t3 (0x55) into location 0x10010008

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Loading addresses into registers

• la $t2,0x10010000 loads 0x10010000 into $t2• li $t3,55 loads 55 decimal into $t3 (so, 0x37)

• [We’ll see later that these actually require 2 instructions each. But the assembler takes care of this for you; you can use la and li in your programs]

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Labels(note: # is for comments)

• The assembler makes it easy to give names to memory addresses. So, you don’t need to use actual numbers in your code.

• .data #In the memory segment, starting with 0x10010000• .word • Label1: 0x55

• Label2: 0x66

• Label3: 16

• 0x00000055 is stored at the 4 bytes starting with 0x10010000

• 0x00000066 is stored at the 4 bytes starting with 0x10010004

• 0x00000010 is stored at the 4 bytes starting with 0x10010008

• Label1 stands for 0x10010000

• Label2 stands for 0x10010004

• Label3 stands for 0x10010008

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Sample Program

• Now we can look at a sample program• If there is time in class, we will go through it• We’ll work with this and other code in recitation

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.data # sample0.asm .wordc: 3k: 5 .text la $t0,c # address of c la $t1,k # address of k lw $s0,0($t0) # load the contents of c lw $s1,0($t1) # load the contents of k slt $s3,$s0,$s1 # if $s0 < $s1 then $s3 = 1; else $s3 = 0 beq $s3,$0,notless #if $s3 == 0: go to notless; o/w just go to the next instruction sw $s0,0($t1) #store contents of c into k sw $s1,0($t0) #store the contents of k into cnotless: # the end of the code; we just stop here #So, what did we do? If c < k then we swapped their values. If not, we just left them alone.