boon 2016 dist min - ntu · globalfoundries singapore pte. ltd-ntu joint r&d: direct...

Post on 08-Apr-2018

220 Views

Category:

Documents

4 Downloads

Preview:

Click to see full reader

TRANSCRIPT

RFIC for Mobile Wireless Communication

RFIC for Vehicular Communication and Radar

Building IP for Current and Future RF IC

Assoc.ProfessorBoon ChirnChyeProgramme Director,RF&MM‐wave,VIRTUS,NTUAssoc.Editor,IEEETransactionofVLSI;EEENTUTeachingExcellentAward2012;CommendationAwardforTeachingExcellence2014.IEEEElectronDevicesLettersGoldenReviewer.

Web: http://www.ntu.edu.sg/home/eccboon

Interesting facts & figures

• Total student population – around 34,000

• More than 2/3 undergraduates, with about 1/3 graduate students

• Students from more than 70 countries study, research and play at NTU

• VIRTUS: NTU’s IC Design Centre of Excellence, jointly funded by Singapore Economic Development Board (EDB).

• Official Opening on 20th Oct 2010.

• NTU Ranked 13 in QS University World Rankings 2015

• 7th in Electrical and Electronic Engineering for 2015 QS World Ranking (36 in 2011).

2

ResearchLeadershipinRF/MMWICFunding Source/ Project Title Quantum ($)

Cash Only (Total including in-kind)

Role Grant Period

Delta-NTU Corp. Lab: A Wireless Heterogeneous Network Transceiver Chipset for Content-Driven Transmission of Learning Media (SLE-RP3) Research Area (SLE)

PI 1st July 2016 to 30th

June 2021

MOE Tier 1: Monolithic Terahertz Passive Components in Advanced CMOS Technology: From Fundamental Understandings to Integrated Circuit Applications

PI 1st November 2016 to 31st October 2018

GlobalFoundries Singapore Pte. Ltd-NTU Joint R&D: Direct Integration of GaN Power Devices on CMOS Circuits for Demonstrate Power Management Solutions,

PI 1st June 2016 to 31st

December 2018

SMART-POC: An Integrated Platform Approach Towards Non-Invasive Continuous Blood Glucose Monitoring Addressing Clinical Need for Early Diagnosis and Improved Compliance

PI 1st July 2016 to 30th

July 2017

Huawei Tech. Co. Ltd-NTU Joint R&D: 10GiFi research & development of ultra-wideband RF transceiver

PI 15th July 2014 to 14th July 2017

Tier 2: High Thermal Resolution Ultra-Low Power Integrated Imager: Fund. Issues in CMOS

PI July 2013 to June 2016

Project 17: Electronic Circuit Design, Communications under SMART-IRG5: Low Energy Electronic Systems (MIT-NTU)

PI 1st April 2014 to 30th

March 2016

ResearchLeadershipinRF/MMWIC

& Other Grants in RF IC. Total Grants:$9,887,723.22 In Cash

Project2:ElectronicCircuitDesign,CommunicationsunderSMART‐IRG5:LowEnergyElectronicSystems(MIT‐NTU)

PI 1st April2013to30th March2014

Project10:ElectronicCircuitDesign,CommunicationsunderSMART‐IRG5:LowEnergyElectronicSystems(MIT‐NTU)

PI 1stApril2012to30thMarch2013

SMA(MIT‐NTU)CMOSFront‐end PI 5thAugust2013to4thAugust2017

SMA(MIT‐NTU)HighSpeedCMOS PI 13thJanuary2014to12thAugust2018

ARC3/09:BatterylessFlexibleTransceiverforBiomedicalApplications PI May2009toJuly2012

RG73/07:Ultra‐lowPowerFullyIntegratedCMOS24GHzReceiver PI March2008toOctober2011.

AdvancedRFICPteLtd Co‐PI March2007toFebruary2012

NRF:AnUltraLow‐PowerRFTransceiverChiptowardsaNewParadigmofLifeQuality Co‐PI February2009toFebruary2010

UniversityofElectronicScienceandTechnology(UEST)ofChina‐NTUJointR&D,jointlyfundedbyUESTandNTU:System‐on‐chip:RealizationofSoftwareRadio

Co‐PI 3December2008to2December2009

AgencyforScience,TechnologyandResearch(A*STAR):AnUltraLow‐PowerRFICChipForWirelessandCommunication

Co‐PI March2006toFebruary2009

NTU-MIT LEES : GaN + CMOS

• D2D (Device‐to‐Device) communications using DSRC– to off‐load the base stations in cellular networks– to improve response time

6

Motivation

* DSRC (Dedicated Short-Range Communication

*

802.11p system prototyping

12V

DC Booster

Neg. BiasGen.

>20V

(‐)

(‐) ANTRFFront‐End

ANT

TransmitterReceiver

1.8V / 3.3V

DAC / ADC

11p Digital Baseband & MAC

FPGA board Discrete component CMOS circuit GaN circuit

5.9 GHz

OSC.

Power Electronic: High Efficiency Wideband GaN + CMOS PA

5 to 6 GHz Power Amplifier in MMIC

Psat >36dBm, Efficiency >70%

Suitable for IEEE802.11ax WiFi that will be ratify in 2019.

Using mature CREE GaNcommercial technology.

2.6-6.4GHz 256QAM 80MHz High Efficiency GaN PA• Highly Compact & Unconditionally stable

PA, with measured efficiency (eff.) • 2 times higher and 3.5 times wider

bandwidth vs. similar commercial PAs. • Tested and meet the 80MHz 256QAM

modulation WLAN 802.11ac.

Mao Mengda, Pilsoon ChoiSupervisor: A/P. Boon Chirn Chye

High Efficiency Wideband GaN + CMOS PA

Latest GaN + CMOS PA To maintain yield CMOS is used to improve stability. Excellent stability. Good Gmax. Better frequency accuracy through CMOS control. With LEES> lower loss and higher power , save cost with less SMD.

gateV

inZ outZ

Novel GaN Oscillator as Signal Source

Best Reported Fully Integrated GaN OSC Phase Noise 7.9GHz -135dBc/Hz@ 1MHz (MWCL)

It successfully demonstrated that the integrated FFO fabricated in GaN‐on‐SiC HEMT technology can achieve high power as previously reported, and feature ultra‐low phase noise, which makes GaN‐on‐SiC HEMTs attractive to both high power and low noise microwave source applications. 

2nd OSC Measured Lowest Voltage GaN OSC : 3.3VBest Phase Noise (FOM) reported.-139dBc/Hz@1MHz, 36mA.

Latest GaN + CMOS VCONo varactor in GaN. Precise frequency control. Wide tuning range. With LEES> wider range and better PN.

12

First Fully Integrated TRX for IEEE802.11p in GaN 0.25nm CREE

GaN PA @ 5.9GHz (1.28 mm2)

10%10%20%20%30%30%

20dBm(100m

W)

30dBm

(1W)

Drain efficiency

Pout

GaN Front-end @ 5.9GHz(2 mm2)

evolving

Advantage on system level power saving: 22% efficiency over one decade power change EVM better than 25dB with OFDM 64QAM. With LEES> CMOS control output power, lower

loss and higher power , save cost with less SMD.

13

LEES: High efficiency techniqueConventional Tx/Rx Switching Scheme

Proposed Tx/Rx Switching Scheme

10 , ⁄

, ,

,

35.4% @ 708mW(due to 1.5 dB SPDT

loss)

50% @ 1W

GaN RF front-end @ 5.9GHz• Fully integrated & energy

efficient RF– PA + LNA + ANT

SW– 2mm x 1.2mm

Rx mode: 22dBm OIP3Tx mode: 50% power efficiency @ 34dBm Psat

Chip-on-Board(No external matching)

Android application (on a smart phone) => USB-Ethernet interface => Baseband (in FPGA) => DAC => CMOS RF Tx =>

GaN power amplifier

Prototyping – System Integration

Android application communicating via prototype

9

Sonar app.

Turn Key : Android application communicating via prototype for IEEE802.11p

10

FPGA Sub-system

802.11p OFDM output @ DAC (Freq. domain vs. Time domain)

1) 802.11p Airblue baseband (originally designed for 802.11a)2) Android phone-to-PHY interface for packet Tx/Rx3) RF interface for Tx power control

w/o filter w/ filter

9

System Evaluation: RoadRunner

Deployment area in Cambridge

Average power consumption of RoadRunner V2V token exchanges(w/ & w/o adaptive power control)

– In-vehicle Android app forroad congestion control

– Vehicles need to get a tokento drive on specific road

– Tokens shared between phones

MMW/THz Research for Car Radar, Imaging and Ethernet (OE)

ThebestCMOSdual‐bandfrequencysynthesizerforautomotiveradarapplication

Best phase noise and lowest power consumption for among all automotive radar’s frequency synthesizer reported.

WorldFirst100GHzFractional‐NPLLinFullyIntegratedCMOS(HiSpeedBackhaul?)

Xiang Yi, Zhipeng Liang, Guangyin Feng, Fanyi MengSupervisor: Assoc. Prof. Boon Chirn Chye

Ref. Tech. (nm)

Operating Range (GHz)

P.N.@1MHz /10MHz (dBc/Hz)

FOM(1)@1MHz /10MHz (dBc/Hz)

FOMT(2)@1MHz /10MHz (dBc/Hz)

Output Phase

Power (mW)

[2] 65 CMOS

98~103.3 (5.2%)

-75(3) /-112.1

-164.49/ -181.59

-158.81 /-175.91 Differential 12~21

91.7~95.5 (4.1%)

-80(3) /-118.8

-162.79/ -181.59

-155.04 /-173.84

Eight Phases 48~85

[3] 65 CMOS

100~110 (9.5%)

-92.83 /-100(3)

-175.9 /-163.1

-175.5 /-162.7 Quadrature 54

This work

65 CMOS

93.24~105.02 (11.9%)

-93.80 /-112.67

-178.6 /-177.5

-180.2 /-179.0 Quadrature 30

Ref. Tech. (nm)

fref (MHz)

Operating Range (GHz)

P.N.@1MHz /10MHz (dBc/Hz)

Reference Spur (dBc)

Resolution (MHz)

Output Phase Architecture Power

(mW)

[4] 65 CMOS

371.5 ~377.0

95.1~96.5 (1.5%)

-76 /-93(3) -51.8 fREF Differential Integer-N 43.7

[5] 65 CMOS

185.7 ~211.9

96.8~108.5 (11.4%)

-88 /-105(3) -40 fREF Differential Integer-N +

Push-Push 14.1

[6] 65 CMOS

402.6 ~408.5

103.058~104.58 (1.5%)

-80.41 /-101.08 -63.8 fREF Differential Integer-N 63

This work

65 CMOS 100 93.4~104.8

(11.5%)

-86.07 -86.07(4) /-108.75 -103.53(4)

-44.69 0.000036fREF(4) Quadrature Frac-N +

Sub-Sampling

57

(1) FOM = P.N. – 20log(f0/Δf) + 10log(Power/1mW). (2) FOMT = FOM – 20log(% of Operating Range/10%). (3) Estimated from figures. (4) PLL is in fractional-N mode.

Ref. Tech. (nm)

Operating Range (GHz)

P.N.@1MHz /10MHz (dBc/Hz)

FOM(1)@1MHz /10MHz (dBc/Hz)

FOMT(2)@1MHz /10MHz (dBc/Hz)

Output Phase

Power (mW)

[2] 65 CMOS

98~103.3 (5.2%)

-75(3) /-112.1

-164.49/ -181.59

-158.81 /-175.91 Differential 12~21

91.7~95.5 (4.1%)

-80(3) /-118.8

-162.79/ -181.59

-155.04 /-173.84

Eight Phases 48~85

[3] 65 CMOS

100~110 (9.5%)

-92.83 /-100(3)

-175.9 /-163.1

-175.5 /-162.7 Quadrature 54

This work

65 CMOS

93.24~105.02 (11.9%)

-93.80 /-112.67

-178.6 /-177.5

-180.2 /-179.0 Quadrature 30

Ref. Tech. (nm)

fref (MHz)

Operating Range (GHz)

P.N.@1MHz /10MHz (dBc/Hz)

Reference Spur (dBc)

Resolution (MHz)

Output Phase Architecture Power

(mW)

[4] 65 CMOS

371.5 ~377.0

95.1~96.5 (1.5%)

-76 /-93(3) -51.8 fREF Differential Integer-N 43.7

[5] 65 CMOS

185.7 ~211.9

96.8~108.5 (11.4%)

-88 /-105(3) -40 fREF Differential Integer-N +

Push-Push 14.1

[6] 65 CMOS

402.6 ~408.5

103.058~104.58 (1.5%)

-80.41 /-101.08 -63.8 fREF Differential Integer-N 63

This work

65 CMOS 100 93.4~104.8

(11.5%)

-86.07 -86.07(4) /-108.75 -103.53(4)

-44.69 0.000036fREF(4) Quadrature Frac-N +

Sub-Sampling

57

(1) FOM = P.N. – 20log(f0/Δf) + 10log(Power/1mW). (2) FOMT = FOM – 20log(% of Operating Range/10%). (3) Estimated from figures. (4) PLL is in fractional-N mode.

Ultra-compact PLLOvercoming frequency resolution, fast settling, signal purity trade-off.

Widest Bandwidth Highest BWER 100GHz LNA

Ultra-compact LNA achieves the widest 3-dB bandwidth and the best FoM among wideband mmW LNAs in CMOS.

• Suitable for wireless USB4.0: >10Gbps Expected Release 2020.

• Internal interface transfer rates: PCIe/mPCIe>32Gbps (x16)

Widest Bandwidth Highest BWER 100GHz LNAGuangyin Feng, Fanyi Meng, Xiang YiSupervisor: Assoc. Prof. Boon Chirn Chye

Overcoming Gain Flatness, Wideband Gain Trade-off for MMW Application.

MMW High Gain Power Amplifier IEEE 802.15.3c Power Amplifier

This work demonstrates an ILPA with largest injection locking bandwidth. The fabricated PA has achieved a injection locking range from 50 GHz to 59 GHz. Maximum output power of 11.39 dBm has been obtained while the highest PAE is 16.1 %. Moreover, the chip size is 260 μm x 400 μm excluding pads.

1.3mW/Gb/s World Best Efficiency 36GbpsEthernet Wireline Communication (Car Ethernet?)

Yong Chen, Lingshan Kong, Haohong Yu, Peng WangSupervisor: Assoc. Prof. Boon Chirn Chye

Turn Key: World Fastest Consumer WiFi IEEE 802.11ax Integrated Circuit (IC) R&D

IEEE 802.11ax Testing Setup

World First and Fastest Consumer WLAN IEEE 802.11ax

IEEE 802.11ax DemonstrationSubjected to Most Rigorous Industrial Multiple Carriers

& Jammers Test

World First and Fastest Consumer WiFi IEEE 802.11ax

Virtus‐EEE‐NTU 29

Xiang Yi, Kaituo Yang, Zhipeng Liang, Bei Liu, Khanna Devrishi, Chenyang Li, GuangyinFeng, Dror Regev, Shimi Shilo, Fanyi Meng, Hang Liu, Junyi Sun, Gengen Hu

Supervisor: Assoc. Prof. Boon Chirn Chye

Subjected to Most Rigorous Industrial Multiple Carriers &

Jammers Test

Energy Harvesting Batteryless Flexible Transceiver for Biomedical Applications

Wi-Fi Energy Harvester

Measured Board with Fully Integrated Energy Aware ZigBeeChip

Sub-threshold Biasing for RF & mmW

How we do it. 31

Fund. analysis and RF circuit design:High GTUmax can be obtained with weak-inv. Low power from weak-inv. (high transconductance vs. current)No performance reduction.

Conventional Concept – Trade-off10 x energy reduction / op. freq.10x performance reduction

0102030405060708090

100

Energy/Frequency Performance

How others do it.

32

Methodologies:(>74 International Publications, >55 IC Chips):

Sub-threshold RF Design

Energy Aware RF System Level Design

Ultra-Low Power Series Quadrature VCO

Novel TSPC Frequency Synthesizer

Novel Large Signal MGTR Power Amplifier

Energy Harvesting & Storing

Specific Aim:Current transceivers power consumption is too high. Requires very large battery or energy harvesting & storing devices. Our Aim to Achieve the Ground Breaking Power consumption of RF Transceiver <10 mW

RF IC Ultra Low Power Methodologies

Compact Integrated Circuit Non-invasive Blood Glucose Detection (GF 65nm).

24hr blood glucose detection.

Android Apps instant report.Cloud connection for report and data transfer to hospital.

Currently in CMOS.

With GaN +CMOS for High Efficiency Fully Integrated More Accurate. With LEES> Wearable technology! Size Matters! One die and Less SMD.

TurnKey:Non‐invasiveBloodGlucoseDetection

Thankyouforyourtimeandefforttounderstandourwork.Web: http://www.ntu.edu.sg/home/eccboon

top related