brian humphrey aaron seitz brendan long shayan darayan ee 464k spring 2010 final presentation...

BRIA N HUM P HREYA A RON SEIT Z

BRENDA N LONGSHAYA N DA RAYA N

EE 464KSP RIN G 2010

Final PresentationElectrical Impedance

Tomography

Outline

Design Problem StatementDesign Problem SolutionTest and EvaluationTime and Cost ConsiderationsSafety and Ethical Aspects of Design

Introduction

Introduction

Electrical Impedance Tomography (EIT): A method of visualizing an object’s internal electrical properties by analyzing the surface responses to electrical stimuli.

Figure 1: (Left) EIT Phantom under test; (Right) Reconstructed Image

EIT –Possible applications

Medical Imaging Real-time (breathing/heartbeat monitoring) High precision (embolism detection, cancer detection)

Industrial Flow rate through a pipe Detecting obstructions in a pipe Detecting oil Non-destructive strain testing of materials

Design Problem Statement

Design Goals and Motivation

Goals Create a low cost, user friendly,

portable EIT System Capable of internal human

imaging Motivation

Current EIT systems are large, power hungry, and stationary, much like CT

System involves no expensive hardware

If system could be made portable and low cost, would open up safe internal imaging diagnosis for local clinics around the world

Our Approach

No replication of measurement hardware Switch signals with cheaper

analog muxes to reduce costUse high accuracy specific

function chips for waveform measurement More accuracy where needed,

lower power than using a high clock rate microcontroller

Software used to correct errors Take into account noise in system

and accurate model of system

Design Requirements

System Specifications Safe injected signal Maximum reconstruction latency

of 1 s Total component cost< $50 Low noise

Reconstruction Quality Minimum explicit feature size of

5mm Smaller detectable feature size Relative scale Reduce effect of noise and

artifacts

Theoretical Problem

An inverse matrix problem

Similar to Ohm’s law

Theoretical Problem

The finite element model

Figure 2: FEM element mesh

Design Problem Solution

Design Problem Solution

To construct a simple and affordable EIT measurement device that is based on a PC computer, commercial data acquisition board and software, and an external current generation and switching board

Figure 3: EIT measurement system

Design Problem Solution

Figure 4: Block diagram overview of our system

Design Problem Solution

Figure 5: Block diagram overview of our system

Design Problem Solution

Figure 6: Actual overview of our system

Design Problem Solution

Figure 7: Power supply hub

15V to -15V inverter

15V to 5V regulator

15V input

Design Problem Solution

Figure X: Signaling circuitry

1. Sinusoid generation

2. Amplitude adjustment

4. V to I

8. BPF Filter

7. INA

5. I to demux

6. V from mux

9. To gain detector

3. BPF Filter

Design Problem Solution

Figure 9: ICL4038 schematic

Design Problem Solution

Figure X: Signaling circuitry

1. Sinusoid generation

2. Amplitude adjustment

3. BPF Filter

4. V to I

8. BPF Filter

7. INA

5. I to demux

6. V from mux

9. To gain detector

Design Problem Solution

Figure 11: Fourth-order BPF filter

Design Problem Solution

Figure X: Signaling circuitry

1. Sinusoid generation

2. Amplitude adjustment

3. BPF Filter8. BPF Filter

7. INA

5. I to demux

6. V from mux

9. To gain detector

4. V to I

Design Problem Solution

Figure X: Howland current pump

VARIABLE LOAD

Design Problem Solution

Figure X: Analog switching elements

3. I input and V output

2. V and I control signals

1. Enable switches

4. I output and V input

to/from prototype

Design Problem Solution

Figure 13: (Left) Analog switch pin out; (Right) Analog switch layout

Design Problem Solution

Figure 14: Tank prototype

Design Problem Solution

Figure X: Signaling circuitry

1. Sinusoid generation

2. Amplitude adjustment

3. BPF Filter

4. V to I

8. BPF Filter

7. INA

5. I to demux

6. V from mux

9. To gain detector

Design Problem Solution

Figure 17: INA schematic

PASSIVE HPF

Design Problem Solution

Figure 18: Gain measurement circuitry

1. Sinusoid voltage input

2. Full-wave rectifier

3. LPF filter

4. Voltage regulator

5. To ADC

Design Problem Solution

Figure 19: Gain measurement schematic

Full-wave rectifier

LPF filter

COMPUTER SOFTWARE

Design Problem Solution

Embedded Software tasks

Coordinate switching signals to route hardware to electrodes. Interrogate the tank according to a known stimulation

pattern No unnecessary replication of hardware

Sample the voltages resulting from the injected current

Relay data back to PC for reconstruction

Design Problem Solution

Embedded Controller: ARM Cortex M-3Similar in capability to the MC9S12DP512

used in EE319kBenefits of Cortex M-3:

Better Development environment Faster processing On-board LCD and buttons Blue Used in current class (code reuse)

Figure 20: ARM microcontroller

Overview

Microcontroller InterfaceUser Interface

Use in debugging and for presentation

Backend C# Structure Separation of tasks

Matlab Computation Initialization Scripts EIDORS computation algorithm

MicrocontrollerInterface

Stream commands Used to set stimulation pattern Reduces communication latency

Calibration routine Take 5 data sets Throw out min and max Average remaining 3 for

calibration Compensates for noise in the

hardware and impedance of medium

GraphicalInterface

Debugging Interface

Raw data displayed

GraphicalInterface

Final Interface

2304 elements on gridConductivity legendNo raw data output

ReconstructionMethod

Initialize an instance of the EIDORS engine

Load in calibration data Can re-calibrate at any point

EIDORS Configuration Circular tank, 16 point electrodes,

2304 elements enclosed Adjacent stimulation pattern at 70 uA

Solved using method by Adler & Guardo, 1996 Takes into account noise variance of

measurements in the system Covariance of conductivity

distribution Fast reconstruction

ReconstructionMethod

Receive back matrix 64 x 64 matrix, mapped onto 512 x

512 bitmap 4096 total elements, but only 2304

nonzero as a filled circle in the middle

Values in matrix map to colors in a 256-color heatmap scale

Parse into an image Uses direct bitmap data access Scales the image up 64x by

mapping one matrix value to and 8x8 block

>100x faster than using .NET supported SetPixel method

Test and Evaluation

Test and Evaluation

Figure 21: Power supply hub

15V to -15V inverter

15V to 5V regulator

15V input

Test and Evaluation

Figure 22: Oscilloscope view of +15V supply

Test and Evaluation

Figure 23: Oscilloscope view of -15V supply

Test and Evaluation

Figure 24: Oscilloscope view of +5V supply

Test and Evaluation

Figure X: Signaling circuitry

1. Sinusoid generation

2. Amplitude adjustment

8. BPF Filter

7. INA

5. I to demux

6. V from mux

9. To gain detector

4. V to I

3. BPF Filter

Test and Evaluation

Figure 26: Oscilloscope view of ICL4038 sine wave

Test and Evaluation

Figure 27: Oscilloscope view of filtered wave

Test and Evaluation

Figure 28: Oscilloscope view of current output

RVI pkpkpkpk / kI pkpk 43/48.4

uAI pkpk 19.104

%19.4errorI

Test and Evaluation

Figure X: Signaling circuitry

1. Sinusoid generation

2. Amplitude adjustment

3. BPF Filter

4. V to I

8. BPF Filter

7. INA

5. I to demux

6. V from mux

9. To gain detector

Test and Evaluation

Figure 30: Analog switching elements

3. I input and V output

2. V and I control signals

1. Enable switches

4. I output and V input

to/from prototype

Test and Evaluation

Figure 31: Oscilloscope view without and with analog switching elements

VV pkpkloss 76.18.1

VV pkpkloss 04.0

Attenuation = 2.2%

Test and Evaluation

Figure 32: Tank prototype

Test and Evaluation

Figure 33: Comparison of electrode resistance values

Ravg = 0.4 Ω

Rmax = 0.6 ΩRmin = 0.2 Ω

Test and Evaluation

Video 1: Tank prototype voltage with insulator and conductor

Test and Evaluation

Video 2: Tank prototype current with insulator and conductor

Test and Evaluation

Figure 34: Gain measurement circuitry

1. Sinusoid voltage input

2. Full-wave rectifier

3. LPF filter

4. Voltage regulator

5. To ADC

Test and Evaluation

Figure 35: Oscilloscope view of full-wave rectifier and DC LPF

Test and Evaluation

1: sample the ADC 512 times. Transmit to PC.

2: transmit a known data set to PC. Verify correct reconstruction.

3: print out stimulation pattern order

4: Verify stimulation pattern control codes with logic analyzer.

5: measure time for full data set under continuous measurement

Figure 36: ARM microcontroller

Test and Evaluation

Figure 37: ARM microcontroller

A command line interpreter helped debug the embedded system.

Test and Evaluation

Qualitative evaluation of different EIDORS reconstruction methods

Continuous reconstruction with simulated data set for optimization of reconstruction method

Continuous reconstruction with microcontroller to test overall serial reconstruction speed

Failure testing to catch most common errors with plain explanation

Test and Evaluation

Figure 3: Video of software speed

ReconstructionProblem

Individual data sets are completely independent

Serial bottleneck in the data set collection by the microcontroller

Time required Data set collection ~ 100 ms Reconstruction ~ 66 ms Communication/Display ~ 34 ms

Total time required – 200 ms 5 Frames/sec

Time and Cost Considerations

Time and Cost Considerations

System shown operational by deadline Time lost for total system testing & optimization

Switching circuitry required extended evaluation Switching circuitry also required multiple part orders Waveform sampling required extended evaluation and

testing Some difficulties interfacing some modules

Estimated total delay 2 working weeks

Time and Cost Considerations

System slightly over cost expectations Points of overrun

Switching circuitry required multiple, large part orders Should have been ordered in smaller, testing quantities

Testing and optimization required better op amps Several chip types ordered for evaluation

Waveform sampling design modified 3 times Several chips ordered for evaluation

Estimated total cost overrun $ 105.44

Time and Cost Considerations

Table 1: Final system cost breakdown

Safety and Ethical Aspects of Design

Safety and Ethical Aspects of Design

Safety EIT is intended as a medical device

Our prototype was built to demonstrate principles of design Not used on a person, but proved safe operation

• Signal current = 100uA across varying load• Signal voltage < 10V Peak-to-Peak• Operation at fixed 15V DC voltage

Not fully implemented as medical imaging device. Images not precise enough to detect small blood clots

(smallest feature size is about Lag time too slow to watch heart beat.

Safety and Ethical Aspects of Design

Ethics EIT is intended as a medical device

Prototype clearly shows safe operation System provided with concrete operational specifications

Testing ensures system meets specified quality Optimization ensures system falls within acceptable

tolerances Specific information so user can make accurate conclusions

Only environmental concern is for batteries and electronics Rechargeable pack would be utilized Electrical/battery waste can be conveniently disposed of

Helps bring advanced medical imaging to more people Can be deployed far from major hospitals Safer than other technologies, such as X-rays

Recommendations

Recommendations

Proposed major hardware changes Use a DSP

Faster sampling and waveform generation Precise filtering Multi-frequency waveforms

Better ADC Faster and more precision

Increase electrode count to 64 electrodes and implement 3D EIT

Recommendations

What we would do differently? Plan for higher circuit voltage (30V Dual Supply) Use more electrodes from the beginning

Where would we go from here? Testing Apparatus: Smaller electrodes, More electrodes Switching: Faster ICs, PCB EMI concerns, TriState

protection Waveform Capture: Multiple ADCs or faster ADCs Waveform Gen/V-I: Better op amps

ReconstructionPipelining

GUI

GUISync

.

uCSync

.

Work Thread 1

WorkThread 2

Hardware

Data Set Request

Images

Start

Start

Matrix Matrix

Data Set Data Set

Data SetRequest

Start

Command Data Set

Example Pipeline forDual Core Processor

- Busy/Wait Thread

- Processing Thread

PipeliningResults

Reduces time to maximum time of any operation By speeding up dataset collection,

we could speed up frame rateReconstruction also speeds up

with clock rateRequires a multi-core processor

capable of matching the frame rate of the microcontroller ie. If the microcontroller supplies

frames at 4/sec, processor needs 1 core running a frame every 250 ms, a 2 core running a frame every 500 ms, etc.

Delocalized Computation

Small data sets and small responses

Can be sent off to a central server for processing and send back picture with little increase in time

Can send over MMS using capable cell phone

Cell phone collects dataset from microcontroller, sends off, gets back picture.

No computer cost for reconstruction

Conclusion

Conclusion

Our concept was for a portable EIT deviceOur problem solution:

Inexpensive, simple solution Small, portable device capable of powering by battery

Our design concept prototype completed on time Some budget overrun incurred during testing Prototype illustrated feasibility of design Prototype illustrated safety of design for human use

Identified several improvements for the design

Questions?