comp3221 lec37-vm-ii.1 saeid nooshabadi comp 3221 microprocessors and embedded systems lectures 37:...
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COMP3221 lec37-vm-II.1 Saeid Nooshabadi
COMP 3221
Microprocessors and Embedded Systems
Lectures 37: Virtual Memory - II
http://www.cse.unsw.edu.au/~cs3221October, 2003
Saeid Nooshabadi
saeid@unsw.edu.auSome of the slides are adopted from David Patterson (UCB)
COMP3221 lec37-vm-II.2 Saeid Nooshabadi
Overview
°Page Table
°Translation Lookaside Buffer (TLB)
COMP3221 lec37-vm-II.3 Saeid Nooshabadi
Review: Memory Hierarchy
Regs
L2 Cache
Memory
Disk
Tape
Instr. Operands
Blocks
Pages
Files
Upper Level
Lower Level
Faster
Larger
CacheBlocks
Cache{{Virtual
Memory
COMP3221 lec37-vm-II.4 Saeid Nooshabadi
Review: Address Mapping: Page Table
Virtual Address:page no. offset
Page TableBase Reg
Page Table located in physical memory
(actually, concatenation)
indexintopagetable
+
PhysicalMemoryAddress
Page Table
Val-id
AccessRights
PhysicalPageNumber
.
V A.R. P. P. A.
...
...
Reg #2 in CP #15 in ARM
COMP3221 lec37-vm-II.5 Saeid Nooshabadi
Paging/Virtual Memory for Multiple Pocesses
User B: Virtual Memory
Code
Static
Heap
Stack
0Code
Static
Heap
Stack
A PageTable
B PageTable
User A: Virtual Memory
00
Physical Memory
64 MB
COMP3221 lec37-vm-II.6 Saeid Nooshabadi
Analogy
° Book title like virtual address (ARM System On-Chip)
° Library of Congress call number like (QA76.5.F8643 2000) physical address
° Card (or online-page) catalogue like page table, indicating mapping from book title to call number
° On card (or online-page) info for book, indicating in local library vs. in another branch like valid bit indicating in main memory vs. on disk
° On card (or online-page), available for 2-hour in library use (vs. 2-week checkout) like access rights
COMP3221 lec37-vm-II.7 Saeid Nooshabadi
Address Map, Mathematically SpeakingV = {0, 1, . . . , n - 1} virtual page address space (n > m)M = {0, 1, . . . , m - 1} physical page address spaceMAP: V --> M U {} page address mapping functionMAP(a) = a' if data at virtual address a is present in physical address a' and a' = if data at virtual address a is not present in M
Processor
Name Space V
Addr TransMechanism
OS faulthandler
MainMemory
Disk
a
aa'
0
page fault
physical address
OS performsthis transfer
COMP3221 lec37-vm-II.8 Saeid Nooshabadi
Comparing the 2 Levels of Hierarchy
°Cache Version Virtual Memory vers.
°Block or Line Page
°Miss Page Fault
°Block Size: 32-64B Page Size: 4K-8KB
°Placement: Fully AssociativeDirect Mapped, N-way Set Associative
°Replacement: Least Recently UsedLRU or Random (LRU)
°Write Thru or Back Write Back
COMP3221 lec37-vm-II.9 Saeid Nooshabadi
Notes on Page Table°Solves Fragmentation problem: all chunks same size, so all holes can be used
°OS must reserve “Swap Space” on disk for each process
°To grow a process, ask Operating System• If unused pages, OS uses them first
• If not, OS swaps some old pages to disk
• (Least Recently Used to pick pages to swap)
°Each process has its own Page Table
°Will add details, but Page Table is essence of Virtual Memory
COMP3221 lec37-vm-II.10 Saeid Nooshabadi
Virtual Memory Problem #1
°Not enough physical memory!• Only, say, 64 MB of physical memory
• N processes, each 4GB of virtual memory!
• Could have 1K virtual pages/physical page!
°Spatial Locality to the rescue• Each page is 4 KB, lots of nearby references
• No matter how big program is, at any time only accessing a few pages
• “Working Set”: recently used pages
COMP3221 lec37-vm-II.11 Saeid Nooshabadi
Virtual Address and a Cache (#1/2)
Processor CacheTrans-lation
MainMemory
VA PAmiss
hit
data
• Cache operates on Virtual addresses. • ARM Strategy•The advantage: If in cache the translation is not required.•Disadvantage: Several copies of the the same physical memory location may be present in several cache blocks. (Synonyms problem). Gives rise to some complications!
COMP3221 lec37-vm-II.12 Saeid Nooshabadi
Virtual Address and a Cache (#2/2)
Processor Trans-lation
CacheMain
Memory
VA PA miss
hit
data
• Cache typically operates on physical addresses on most other systems. • Address Translation (Page Table access) is another memory access for each program memory access!•Accessing memory for Page Table to get Physical address (Slow Operation)•Need to fix this!
COMP3221 lec37-vm-II.13 Saeid Nooshabadi
Reading Material° Steve Furber: ARM System On-Chip; 2nd
Ed, Addison-Wesley, 2000, ISBN: 0-201-67519-6. Chapter 10.
COMP3221 lec37-vm-II.14 Saeid Nooshabadi
Virtual Memory Problem #2
°Map every address 1 extra memory accesses for every memory access
°Observation: since locality in pages of data, must be locality in virtual addresses of those pages
°Why not use a cache of virtual to physical address translations to make translation fast? (small is fast)
°For historical reasons, this cache is called a Translation Lookaside Buffer, or TLB
COMP3221 lec37-vm-II.15 Saeid Nooshabadi
Typical TLB Format
Virtual Physical Dirty Ref Valid AccessAddress Address Rights
• TLB just a cache on the page table mappings
• TLB access time comparable to cache (much less than main memory access time) • Ref: Used to help calculate LRU on replacement• Dirty: since use write back, need to know whether or not to write page to disk when replaced
COMP3221 lec37-vm-II.16 Saeid Nooshabadi
°PROJECTS IN DIGITAL HARDWARE DESIGN FOR 4th
Year
COMP3221 lec37-vm-II.17 Saeid Nooshabadi
Sec
ond
ary
Serial P
ort
Prim
ary
Serial P
ort
VA VB VC
Expan
sio
n
Co
nnect
or
1 Memory for
Virtex-E (U9, U10, U18, U19)
Flash ROM (U25)
Xilinx Virtex-E (U16)
Spartan-XL (U4)
Ethernet (U7)
System Memory SRAM Modules
(U11-U14, U21-U24)
Atmel CPU (U17)
JTAG
Boot
Power Ethernet
Expan
sio
n
Co
nnect
or
2
SB
SB
SA
SA
VS
VS
Pow
er
LCD Module
Power 1
Power 2
Pow
er
Ground Link
Pow
er
0 1 2 3
7 4 5 6
LEDs
Spartan VS Terminals
Spartan SA Terminals
Spartan SB Terminals
On/O
ff
S1 S2 S3
RESET
Switches Connector
S7 S8 S9 S10 S6 S5
LEDs Connector
LED
s
S4
Digital Systems Laboratory Hardware
° DSL Board is• A Board for 21st Century• The State-of-the-Art
Development Board
° DSL Board Contains:• Designed by the University of
Manchester with lots of collaboration from UNSW
• An ARM Microcontroller• With 2 MB of Flash and up to 4
MB of SRAM Memory• 2 Xilinx FPGAs for extended
interfacing and specialised co-processors
• Optional Ethernet chip• LCD Module• Lots of uncommitted Switches
and LEDs• Terminal connector to FPGAsTwo PCBs
COMP3221 lec37-vm-II.18 Saeid Nooshabadi
DSLMU Hardware Block Diagram
Two Printed circuit Boards
Microcontroller Bus
Peripheral Bus (Ports A and B)
MU Board Expansion Board
Flash ROM (U25)
Serial Ports System Memory SRAM Modules
(U11-U14, U21-U24)
Optional Ethernet
(U7) Power Supply
LEDs (D8-D15)
Boot Select Switch (U1)
LCD Module
Uncommitted Switches
Uncommitted LEDs SB SA VS VC VB VA
Optional Memory
(U9, U10, U18, U19)
Xilinx Virtex-E (U16)
Xilinx Spartan-XL
(U4)
Expansion Connector 2
Expansion Connector 1
Atmel CPU (U17)
COMP3221 lec37-vm-II.19 Saeid Nooshabadi
Projects with Digital Systems Lab Board
°Project 1: Design of a Vector Floating Point Co-Processor for ARM Core:
°Aim: The Aim of this project is to built Floating Point Vector Processor On the Vertex FPGA.
°Degree of Difficulty: Hard, and Challenging
°Ability: Number Representation, Digital System Design, DSP
COMP3221 lec37-vm-II.20 Saeid Nooshabadi
Projects with Digital Systems Board
° Project 2: Design of a Fixed Point DSP for ARM Core:
° Aim: The Aim of this project is to built DSP Optimised Processor (Single Cycle MAC Processor/ Distributed Arithmetic) On the Vertex FPGA.
° Degree of Difficulty: Hard, and Challenging
° Ability: Number Representation, Digital System Design, DSP
COMP3221 lec37-vm-II.21 Saeid Nooshabadi
Projects with Digital Systems Board
° Project 3: Development of a Simple Multi tasking Operating System
° Aim: The Aim of this project is Development of a Simple Multi tasking Operating System with Simple Virtual Memory Protection for on-board program monitoring and debugging.
° Degree of Difficulty: Moderate, and some Challenges
° Ability: Software Development, Basic Operating Systems
° Application: Our Undergraduate/Post Graduate Teaching
° Advantage: Make yourself Immortal!
COMP3221 lec37-vm-II.22 Saeid Nooshabadi
Projects with Digital Systems Board
° Project 4: Interfacing GNU debugging tool with on-board emulator (Komodo)
° Aim: The Aim of this project is to Interface GNU debugging tool with on-board emulator program to facilitate source-level debugging and monitoring.
° Degree of Difficulty: Moderate to Hard with some Challenges
° Ability: Software Development, Basic Operating Systems
° Application: Our Undergraduate/Post Graduate Teaching
° Advantage: Make yourself Immortal!
COMP3221 lec37-vm-II.23 Saeid Nooshabadi
Projects with Digital Systems Board
° Project 5: Porting of uCliux to DSL Board
° Aim: The Aim of this project is to port real-time Operating System uClinx to DSL Board.
° Degree of Difficulty: Hard, and Challenging
° Ability: Software Development, Basic Operating Systems
° Start: http://www.uclinux.org
COMP3221 lec37-vm-II.24 Saeid Nooshabadi
Projects with Digital Systems Board
° Project 6: Design of an embedded Internet enabled device for remote control and monitoring
° Aim: The aim of this project is to design an embedded interface device using programmbale microcontrollers and FPGAs, to wireless devices in one hand and modem/lan on the other hand. The unit collects the data through the wireless picodevices and in turn transfers the data via modem or lan to a remote server via TCP/IP stacks. It should also be possible to control the picodevices remotely. The challenge is to build the various software layers, on a realtime operating system like eCos to do the task.
° Degree of Difficulty: Hard, and Challenging
° Ability: Software Development, Basic Operating Systems, basic Hardware Interfacing
COMP3221 lec37-vm-II.25 Saeid Nooshabadi
Projects with Digital Systems Board
° Project 7: Design of an embedded Internet enabled device for remote control and monitoring
° Aim: The aim of this project is to design an embedded interface device using programmable microcontrollers and FPGAs, to control and monitor the viewing of cable TV channels.This embedded unit controls a TV tuner, in a real time fashion, based on the control information it receives remotely. The unit is connected to the internet via a cable modem. It can be controlled and monitored via a remote device (a PC). The challenge is to build the various software layers, on a realtime operating system like eCos to do the task.
° Degree of Difficulty: Hard, and Challenging
° Ability: Software Development, Basic Operating Systems, basic Hardware Interfacing
COMP3221 lec37-vm-II.26 Saeid Nooshabadi
Projects with Digital Systems Board
° Project 8: PS/2 and USB Controller For DSL Board
° Aim: The aim of this project is to design an PS/2 and USB Controller using the on-board FPGA chips.
° Degree of Difficulty: Hard, and Challenging
° Ability: Hardware Development, Basic Software development
COMP3221 lec37-vm-II.27 Saeid Nooshabadi
Projects with Digital Systems Board
° Project 9: Frame Grabber Device for CMOS Digital Camera
° Aim: The aim of this project is to build a high resolution web camera using a Kodak KAC-1310 CMOS image sensor. The pixel data would buffered in SRAM /SDRAM, compressed and uploaded through the Internet interface for display on a PC.
° Degree of Difficulty: Very Hard, and Challenging
° Ability: DSP, Hardware Development, Basic Software development
COMP3221 lec37-vm-II.28 Saeid Nooshabadi
Projects with Digital Systems Board
° Project 10: Audio Signal Processing
° Aim: The aim of this project is interface a codec to a DSP Audio Signal Processor/ Compressor built on the on-Board FPGAs
° Degree of Difficulty: Moderate to Hard, and Challenging
° Ability: DSP, Hardware Development, Basic Software development
COMP3221 lec37-vm-II.29 Saeid Nooshabadi
Things to Remember (#1/2)°Apply Principle of Locality Recursively
°Reduce Miss Penalty? add a (L2) cache
°Manage memory to disk? Treat as cache
• Included protection as bonus, now critical
• Use Page Table of mappings vs. tag/data in cache
°Virtual memory to Physical Memory Translation too slow?
• Add a cache of Virtual to Physical Address Translations, called a TLB
COMP3221 lec37-vm-II.30 Saeid Nooshabadi
Things to Remember (#2/2)°Virtual Memory allows protected sharing of memory between processes with less swapping to disk, less fragmentation than always swap or base/bound
°Spatial Locality means Working Set of Pages is all that must be in memory for process to run fairly well
COMP3221 lec37-vm-II.31 Saeid Nooshabadi
Things to Remember°Spatial Locality means Working Set of Pages is all that must be in memory for process to run fairly well
°Virtual memory to Physical Memory Translation too slow?
• Add a cache of Virtual to Physical Address Translations, called a TLB
• TLB to reduce performance cost of VM
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