eece 374: microprocessoreece 374: microprocessor

EECE 374: MicroprocessorEECE 374: Microprocessor Architecture and Applicationspp

Class Introduction• T.A.’s (Teaching Assistants)

– 홍승환, 홍윤기, 김영식(LG314), 원임희, 이기환), , ( ), , )• Grading Method

– Midterm exam: 25%, Final Exam: 30%, Labs: 25%, , , ,Homework: 10%, Class Participation: 10%

• Class Textbook– [Brey 2009]: The Intel Microprocessors

• Class Hour– 4:15pm - 5:30pm(Tuesday, Thursday)

• Home Page: http://analog.postech.ac.kr/g p g p

Lab Sessions• Hour

– 4:15pm-5:30pm(class 1), 7:00pm-8:15pm(class 2) Wednesday

• Labs– Programming Exercises & Processor Applicationsg g pp– All lab sections will be taught during regular class hours– Lab demos will be conducted at an agreed-upon time with theLab demos will be conducted at an agreed upon time with the

TA’s

• GradingGrading– Lab Quiz 30%, Lab Report 30% (no report credit if demo is

unsuccessful), Lab Demo 40%),

I d i i (Ch 1)

SyllabusIntroduction to microprocessors (Ch. 1)Number systems & data format (Ch. 1)Programming model & real mode addressing (Ch. 2)Addressing modes (Ch. 3)dd ess g odes (C . 3)Instruction set, CISC vs. RISC, Interrupt, I/O instruction, … (Ch. 4, 5, 6)Microprocessor chip (Ch. 9)Memory interface (Ch. 10)I/O i t f & PC i l/ ll l t (Ch 11 Ch 15)I/O interface & PC serial/parallel ports (Ch. 11, Ch. 15)Interrupts (Ch. 12)Introductin to AVR processorDMA (Ch. 13)( )CacheLabsWeek 1 : Lab preparationW k 2 U f bl lWeek 2 : Use of macro assembler, example programWeek 3 : Data movement, arithmetic instructions …)Week 4 : Addressing modes)Week 5 : Jumps, loop, flag, logic, …p , p, g, g ,Week 6 : PC interface with parallel portWeek 7 : MidtermWeek 8 : PC interface with serial portW k 9 10 AVR ( t t l) 2 kWeek 9-10 : AVR processor(motor control) - 2 weeksWeek 11-14 : Term project(AVR processor, motor, sensor) - 4 weeksWeek 15 : Final

Computer Program ExecutionComputer Program ExecutionLinkerLoaderLoaded in a

memory spacememory space

ExampleMOV AX, DaADD AX, DbMOV Dc, AX

– Interpreter : Real time executer line by line– Linker : Execution code generator from object codes and librariesg j– Disassembler : <-> Assembler– Crosscompiler : Compiler to generate different processor's object code

Block Diagram and Basic Operation

• Block Diagram

(Program Control Unit)

( i i )(Data Processing Unit)

Memory

programdata

Read/Write

012

programcode

IPMicroprocessor 01101001

0

Addr

Program Decode & ALU Op. Addr

define op., data type,...

Addr

DataData

CntrlCntrl

Cntrl

I/ORead/Write I/O

Basic Terminology

• Microprocessor– CPU on a chip

• Microcontroller– CPU+memory+I/O on a chip (= computer on a chip)

• SoC (system on a chip)( y p)– Combine several CPUs and other hardware (e.g.,

graphics controller, bus interface, etc.) on a chipg p ) p– Embed a CPU on a large memory chip

• Gets around the memory bus bottleneck problem

Intel x86 Microprocessor Family

• All are backwards-compatible starting with the 8086 CPU– Table 1-2: Progression of x86 microprocessorsTable 1 2: Progression of x86 microprocessors– Figure 1-7: Simplified memory map

Microprocessor Based Computer SystemMicroprocessor-Based Computer System

Memory Map of Intel PCMemory Map of Intel PC

TPA : transient program area

Bus SystemBus System

Buses used in computer system- Address bus

D t b

MWTC(memory write)MRDC(memory read)IOWC(IO i )- Data bus

- Control busIOWC(IO write)IORC(IO read)

Bus and Memory SizesBus and Memory Sizes

Physical Memory SystemPhysical Memory System

Pentium

Number Systems

• Binary Codes– Interpreting binary bits as an unsigned number

• radix r numbers (radix-10, radix-2, radix-16, etc.)1 i– qp-1 qp-2 ... q0 . q-1 q-2 ... q-n = Σi=-n

p-1 qi * ri

• need to practice fast conversions: decimal, hex, binarybinary

– Signed numbers• 1’s complement: negative -> invert every bit1 s complement: negative -> invert every bit• 2’s complement: negative -> invert every bit, add 1

to “lsb”

Examples– Examples• Assume 8-bit words (p = 8, n = 0).

1’s complement: 11001011 ( ? )– 1’s complement: 11001011 = ( ? )10

– 2’s complement: 11001011 = ( ? )10

– Let A = ( 56 )10 = ( ? ) in 2’s complement( )10 ( ) p– Let B = ( -128 )10 = ( ? ) in 2’s complement– perform A + B, A - B using two 2’s complement numbers

» Is there anything strange?

10000000 (-127) < 1's complement < 01111111(+127)0 : 00000000, 11111111

10000000 (-128) < 2's complement < 01111111(+127)0 : 000000000 : 00000000

۞ Signed Addition with Complement NumbersA, B : single digit radix-r numbers (positive)A - B = ?i) ' l f A Ai) r's complement of A = A

r's complement of - B = (r) - Bii) A - B = A + (r) - Bii) A B A + (r) B

if A-B ≥ 0 : answer = A - Bif A-B < 0 : Let A - B = -C (C is positive)

answer = (r) - C <= r's complement of C

E ) 100' l b– Ex) 100's complement number system1, 2, ..., 9 => 01, 02, ..., 09-1,-2, ..,-9 => 99, 98, ..., 91

7-3 = ? 3-7 = ?

Floating NumberFloating Number

Si l P i i

Sign Bit0( iti )

Single Precision

Bias : 01111111(7FH)0(positive)1(negative)

Double Precision

1. XXXXXX

Double Precision

Bias : 01111111111(3FFH)

Example of Single-Precision Real Numbers

– Other codes• BCD (binary coded decimal): 0011 1001 0101 = ( 395 )10

k 3 127(bi d t) t• excess-k: e.g., excess-3, excess-127(biased exponent), etc.BCD-to-Excess-3 ConversionBCD : 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001Excess-3 : 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100

3+8 =? with BCD and excess-3

Complements

• Gray code: e.g., 000, 001, 011, 010, 110, 111, 101, 100i ( i dd i )• parity (even parity, odd parity):101101010100 --> parity bit = ? with even parity010100010011 --> parity bit = ? with odd parity

Data Formats

• ASCII– 7-bit code used to represent letters and numbers

• Can be extended to 8 bits (8th bit used as parity bit)( p y )

– Shown in Table 1-8Newer character code: Unicode (16 bit)– Newer character code: Unicode (16-bit)

• Packed BCD, Unpacked BCD Tab. 1-10• Bit, Byte, Word, Double Word, Quad Word

Memory Addresses

• Hexadecimal notation typically usedE 12ABH 0 12 b 0 12AB– E.g., 12ABH or 0x12ab or 0x12AB

• Memory addresses are typically assigned such that 1 byte is stored at 1 address1 byte is stored at 1 address

• Multiple byte storageLittl di f t l b t i l dd– Little endian format: low byte in low address

– Big endian format: high byte in low addressI t t di “ ”• Important: reading “memory maps”– What is the size of each “area” of memory in Fig. 1-9?

Addendum: Lab Preparation

• Refer to class home page for lab assignments

• Lab PreparationLab Preparation– Obtain MASM from the class home page

d h d i d i i i– Read the documentation and practice writing simple programs with MASM

data segmentD1 db '1'

data ends

Content of data segment

code segmentassume cs:code, ds:data

mov ax, datamov ds, ax Referencing of data segment

mov dl, D1mov ah, 2int 21h

DOS function call to output the content of dlContents of code

tmov dl, 31hmov ah, 2int 21h

ASCII code of '1'segment

mov ah, 4chint 21h

d d

DOS function call to exit

code endsend

Addendum: Homework #1

• Due : same day of one week later, at the beginning of class

Chapter 1: 23 24 25 57 58 60 61 62 71 72– Chapter 1: 23, 24, 25, 57, 58, 60, 61, 62, 71,72, 76, 82P bl A1 W it d th t i (i– Problem A1: Write down the exact sizes (in bytes) of all memory “areas” shown in the

f Fi 1 8memory map of Figure 1-8