huawei optix rtn 950 radio transmission system idu hardware description
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OptiX RTN 950 Radio Transmission SystemV100R001C02
IDU Hardware Description
Issue 02
Date 2010-01-30
HUAWEI TECHNOLOGIES CO., LTD.
Copyright © Huawei Technologies Co., Ltd. 2010. All rights reserved.No part of this document may be reproduced or transmitted in any form or by any means without prior writtenconsent of Huawei Technologies Co., Ltd. Trademarks and Permissions
and other Huawei trademarks are trademarks of Huawei Technologies Co., Ltd.All other trademarks and trade names mentioned in this document are the property of their respective holders. NoticeThe purchased products, services and features are stipulated by the contract made between Huawei and thecustomer. All or part of the products, services and features described in this document may not be within thepurchase scope or the usage scope. Unless otherwise specified in the contract, all statements, information,and recommendations in this document are provided "AS IS" without warranties, guarantees or representationsof any kind, either express or implied.
The information in this document is subject to change without notice. Every effort has been made in thepreparation of this document to ensure accuracy of the contents, but all statements, information, andrecommendations in this document do not constitute the warranty of any kind, express or implied.
Huawei Technologies Co., Ltd.Address: Huawei Industrial Base
Bantian, LonggangShenzhen 518129People's Republic of China
Website: http://www.huawei.com
Email: support@huawei.com
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About This Document
Related VersionsThe following table lists the product versions related to this document.
Product Name Version
OptiX RTN 950 V100R001C02
iManager U2000 V100R001C00
Intended Audiencel Network planning engineer
l Hardware installation engineer
l Installation and commissioning engineer
l Field maintenance engineer
l Data configuration engineer
l System maintenance engineer
Before reading this document, you need to be familiar with the following:
l Basics of digital microwave communication
l Basics of the OptiX RTN 950
Symbol ConventionsThe symbols that may be found in this document are defined as follows.
Symbol Description
Indicates a hazard with a high level of risk,which if not avoided, will result in death orserious injury.
OptiX RTN 950 Radio Transmission SystemIDU Hardware Description About This Document
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Symbol Description
Indicates a hazard with a medium or low levelof risk, which if not avoided, could result inminor or moderate injury.
Indicates a potentially hazardous situation,which if not avoided, could result inequipment damage, data loss, performancedegradation, or unexpected results.
Indicates a tip that may help you solve aproblem or save time.
Provides additional information to emphasizeor supplement important points of the maintext.
GUI ConventionsThe GUI conventions that may be found in this document are defined as follows.
Convention Description
Boldface Buttons, menus, parameters, tabs, window, and dialog titlesare in boldface. For example, click OK.
> Multi-level menus are in boldface and separated by the ">"signs. For example, choose File > Create > Folder.
Update HistoryThis document is the second release of the V100R001C02 version.
Updates in Issue 02 (2010-01-30) Based on Product Version V100R001C02
The updated contents are as follows.
Update Location Description
2 Hardware Structure Deletes the section describing fibers andcables.
3.1.6 DIP Switches and CF Card Adds descriptions of the DIP switches and CFcard.
4 Cables Adds description of cables to the IDU.
GUI ConventionsOptiX RTN 950 Radio Transmission System
IDU Hardware Description
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Update Location Description
3 Boards Adds the priorities of slots for housing eachboard.
Updates in Issue 01 (2009-09-30) Based on Product Version V100R001C02This document is the first release of the V100R001C02 version.
OptiX RTN 950 Radio Transmission SystemIDU Hardware Description Update History
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Contents
About This Document...................................................................................................................iii
1 Introduction to the Product......................................................................................................1-11.1 Network Application.......................................................................................................................................1-21.2 Equipment Type..............................................................................................................................................1-2
2 Hardware Structure....................................................................................................................2-12.1 Chassis.............................................................................................................................................................2-22.2 Boards..............................................................................................................................................................2-2
3 Boards...........................................................................................................................................3-13.1 CXPR..............................................................................................................................................................3-3
3.1.1 Version Description................................................................................................................................3-33.1.2 Functions and Features...........................................................................................................................3-33.1.3 Working Principle and Signal Flow.......................................................................................................3-43.1.4 Front Panel.............................................................................................................................................3-63.1.5 Valid Slots............................................................................................................................................3-103.1.6 DIP Switches and CF Card...................................................................................................................3-103.1.7 Board Configuration Reference...........................................................................................................3-133.1.8 Specifications.......................................................................................................................................3-13
3.2 IFE2...............................................................................................................................................................3-133.2.1 Version Description..............................................................................................................................3-143.2.2 Functions and Features.........................................................................................................................3-143.2.3 Working Principle and Signal Flow.....................................................................................................3-153.2.4 Front Panel...........................................................................................................................................3-173.2.5 Valid Slots............................................................................................................................................3-183.2.6 Board Configuration Reference...........................................................................................................3-183.2.7 Specifications.......................................................................................................................................3-19
3.3 IFU2..............................................................................................................................................................3-203.3.1 Version Description..............................................................................................................................3-203.3.2 Functions and Features.........................................................................................................................3-203.3.3 Working Principle and Signal Flow.....................................................................................................3-223.3.4 Front Panel...........................................................................................................................................3-253.3.5 Valid Slots............................................................................................................................................3-273.3.6 Board Configuration Reference...........................................................................................................3-28
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3.3.7 Technical Specifications......................................................................................................................3-283.4 IFX2..............................................................................................................................................................3-29
3.4.1 Version Description..............................................................................................................................3-303.4.2 Functions and Features.........................................................................................................................3-303.4.3 Working Principle and Signal Flow.....................................................................................................3-313.4.4 Front Panel...........................................................................................................................................3-353.4.5 Valid Slots............................................................................................................................................3-383.4.6 Board Configuration Reference...........................................................................................................3-383.4.7 Technical Specifications......................................................................................................................3-38
3.5 CD1...............................................................................................................................................................3-393.5.1 Version Description..............................................................................................................................3-403.5.2 Functions and Features.........................................................................................................................3-403.5.3 Working Principle and Signal Flow.....................................................................................................3-423.5.4 Front Panel...........................................................................................................................................3-443.5.5 Valid Slots............................................................................................................................................3-453.5.6 Board Configuration Reference...........................................................................................................3-453.5.7 Specifications.......................................................................................................................................3-46
3.6 EM6T/EM6F.................................................................................................................................................3-473.6.1 Version Description..............................................................................................................................3-483.6.2 Functions and Features.........................................................................................................................3-483.6.3 Working Principle and Signal Flow.....................................................................................................3-493.6.4 Front Panel...........................................................................................................................................3-523.6.5 Valid Slots............................................................................................................................................3-563.6.6 Board Configuration Reference...........................................................................................................3-563.6.7 Technical Specifications......................................................................................................................3-56
3.7 EF8T..............................................................................................................................................................3-583.7.1 Version Description..............................................................................................................................3-593.7.2 Functions and Features.........................................................................................................................3-593.7.3 Working Principle and Signal Flow.....................................................................................................3-593.7.4 Front Panel...........................................................................................................................................3-613.7.5 Valid Slots............................................................................................................................................3-623.7.6 Board Configuration Reference...........................................................................................................3-623.7.7 Specifications.......................................................................................................................................3-62
3.8 EF8F..............................................................................................................................................................3-633.8.1 Version Description..............................................................................................................................3-633.8.2 Functions and Features.........................................................................................................................3-633.8.3 Working Principle and Signal Flow.....................................................................................................3-643.8.4 Front Panel...........................................................................................................................................3-653.8.5 Valid Slots............................................................................................................................................3-663.8.6 Board Configuration Reference...........................................................................................................3-663.8.7 Specifications.......................................................................................................................................3-67
3.9 EG2................................................................................................................................................................3-67
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IDU Hardware Description
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3.9.1 Version Description..............................................................................................................................3-683.9.2 Functions and Features.........................................................................................................................3-683.9.3 Working Principle and Signal Flow.....................................................................................................3-693.9.4 Front Panel...........................................................................................................................................3-703.9.5 Valid Slots............................................................................................................................................3-713.9.6 Board Configuration Reference...........................................................................................................3-713.9.7 Specifications.......................................................................................................................................3-71
3.10 ML1/ML1A.................................................................................................................................................3-733.10.1 Version Description............................................................................................................................3-733.10.2 Functions and Features.......................................................................................................................3-743.10.3 Working Principle and Signal Flow...................................................................................................3-753.10.4 Front Panel.........................................................................................................................................3-773.10.5 Valid Slots..........................................................................................................................................3-793.10.6 Board Configuration Reference.........................................................................................................3-793.10.7 Specifications.....................................................................................................................................3-79
3.11 PIU..............................................................................................................................................................3-803.11.1 Version Description............................................................................................................................3-813.11.2 Functions and Features.......................................................................................................................3-813.11.3 Working Principle and Signal Flow...................................................................................................3-813.11.4 Front Panel.........................................................................................................................................3-823.11.5 Valid Slots..........................................................................................................................................3-833.11.6 Specifications.....................................................................................................................................3-83
3.12 FAN.............................................................................................................................................................3-843.12.1 Version Description............................................................................................................................3-843.12.2 Functions and Features.......................................................................................................................3-843.12.3 Working Principle and Signal Flow...................................................................................................3-853.12.4 Front Panel.........................................................................................................................................3-863.12.5 Valid Slots..........................................................................................................................................3-873.12.6 Specifications.....................................................................................................................................3-87
3.13 AUXQ.........................................................................................................................................................3-873.13.1 Version Description............................................................................................................................3-883.13.2 Functions and Features.......................................................................................................................3-883.13.3 Working Principle and Signal Flow...................................................................................................3-893.13.4 Front Panel.........................................................................................................................................3-903.13.5 Valid Slots..........................................................................................................................................3-933.13.6 Board Configuration Reference.........................................................................................................3-943.13.7 Specifications.....................................................................................................................................3-94
4 Cables...........................................................................................................................................4-14.1 Power Cable.................................................................................................................................................... 4-34.2 IDU PGND Cable............................................................................................................................................4-34.3 Fiber Jumper....................................................................................................................................................4-44.4 IF Jumper.........................................................................................................................................................4-6
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4.5 XPIC Cable.....................................................................................................................................................4-74.6 E1 Cable..........................................................................................................................................................4-84.7 Network Cable...............................................................................................................................................4-124.8 Orderwire Cable............................................................................................................................................4-14
5 Power Consumption and Weight............................................................................................5-1
6 Indicators.....................................................................................................................................6-1
7 Label..............................................................................................................................................7-17.1 Safety Labels...................................................................................................................................................7-27.2 Optical Module Labels....................................................................................................................................7-4
A Glossary.....................................................................................................................................A-1
B Acronyms and Abbreviations.................................................................................................B-1
ContentsOptiX RTN 950 Radio Transmission System
IDU Hardware Description
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Figures
Figure 1-1 Packet microwave transmission solution provided by the OptiX RTN 950.......................................1-2Figure 1-2 IDU 950..............................................................................................................................................1-3Figure 2-1 Slot allocation of the IDU 950............................................................................................................2-2Figure 2-2 Board relations of the IDU 950.......................................................................................................... 2-4Figure 3-1 Block diagram for the working principle of the CXPR......................................................................3-5Figure 3-2 Front panel of the CXPR....................................................................................................................3-6Figure 3-3 Positions of the DIP switches and CF card ......................................................................................3-11Figure 3-4 Block diagram for the functions of the IFE2....................................................................................3-15Figure 3-5 Front panel of the IFE2.....................................................................................................................3-17Figure 3-6 Functional block diagram of the IFU2.............................................................................................3-22Figure 3-7 Front panel of the IFU2....................................................................................................................3-25Figure 3-8 Functional block diagram of the IFX2.............................................................................................3-32Figure 3-9 Front panel of the IFX2....................................................................................................................3-35Figure 3-10 Block diagram for the working principle of the CD1.....................................................................3-42Figure 3-11 Appearance of the front panel of the CD1......................................................................................3-44Figure 3-12 Functional block diagram...............................................................................................................3-50Figure 3-13 Front panel of the EM6T................................................................................................................3-52Figure 3-14 Front panel of the EM6F................................................................................................................3-52Figure 3-15 Front view of the RJ-45 connector.................................................................................................3-54Figure 3-16 Block diagram for the functions of the EF8T.................................................................................3-60Figure 3-17 Font panel of the EF8T...................................................................................................................3-61Figure 3-18 Block diagram for the functions of the EF8F.................................................................................3-64Figure 3-19 Font panel of the EF8F...................................................................................................................3-66Figure 3-20 Block diagram for the functions of the EG2...................................................................................3-69Figure 3-21 Font panel of the EG2.....................................................................................................................3-70Figure 3-22 Block diagram for the working principle of the ML1....................................................................3-76Figure 3-23 Front panel of the ML1...................................................................................................................3-77Figure 3-24 Front panel of the ML1A................................................................................................................3-77Figure 3-25 Block diagram for the working principle of the PIU......................................................................3-81Figure 3-26 Appearance of the front panel of the PIU.......................................................................................3-82Figure 3-27 Block diagram for the working principle of the FAN....................................................................3-85Figure 3-28 Appearance of the front panel of the FAN.....................................................................................3-86Figure 3-29 Block diagram for the functions of the AUXQ..............................................................................3-89
OptiX RTN 950 Radio Transmission SystemIDU Hardware Description Figures
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Figure 3-30 Front panel of the AUXQ...............................................................................................................3-91Figure 4-1 Power cable.........................................................................................................................................4-3Figure 4-2 Appearance of IDU PGND cable.......................................................................................................4-4Figure 4-3 LC/PC connector................................................................................................................................4-5Figure 4-4 SC/PC connector.................................................................................................................................4-5Figure 4-5 FC/PC connector.................................................................................................................................4-6Figure 4-6 IF jumper............................................................................................................................................4-7Figure 4-7 View of the XPIC cable......................................................................................................................4-8Figure 4-8 E1 cable..............................................................................................................................................4-9Figure 4-9 Network cable...................................................................................................................................4-13Figure 4-10 Orderwire cable..............................................................................................................................4-15Figure 7-1 Label position.....................................................................................................................................7-3
FiguresOptiX RTN 950 Radio Transmission System
IDU Hardware Description
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Tables
Table 1-1 Basic features of the IDU 950..............................................................................................................1-3Table 2-1 Boards supported by the IDU 950 and their valid slots.......................................................................2-2Table 3-1 Functions and Features of the CXPR...................................................................................................3-3Table 3-2 Types and usage of the interfaces on the CXPR..................................................................................3-7Table 3-3 Pins of the ETH/OAM interface..........................................................................................................3-8Table 3-4 Pins of the CLK1/TOD1 and CLK2/TOD2 interfaces.........................................................................3-8Table 3-5 Pins of the EXT interface...................................................................................................................3-10Table 3-6 Setting the DIP switches....................................................................................................................3-11Table 3-7 IFE2 interface description..................................................................................................................3-18Table 3-8 ODU power switch.............................................................................................................................3-18Table 3-9 IF performance...................................................................................................................................3-19Table 3-10 Baseband signals processing performance of the modem................................................................3-19Table 3-11 Signal processing flow in the receive direction of the IFU2............................................................3-23Table 3-12 Signal processing flow in the transmit direction of the IFU2..........................................................3-24Table 3-13 Description of the indicators on the IFU2........................................................................................3-26Table 3-14 Description of the Interfaces ...........................................................................................................3-27Table 3-15 IF performance.................................................................................................................................3-28Table 3-16 Baseband signal processing performance of the modem.................................................................3-28Table 3-17 Mechanical behavior........................................................................................................................3-29Table 3-18 Signal processing flow in the receive direction of the IFX2............................................................3-32Table 3-19 Signal processing flow in the transmit direction of the IFX2..........................................................3-34Table 3-20 Description of the indicators on the IFX2........................................................................................3-36Table 3-21 Description of the interfaces............................................................................................................3-37Table 3-22 IF performance.................................................................................................................................3-38Table 3-23 Baseband signal processing performance of the modem.................................................................3-39Table 3-24 Mechanical behavior........................................................................................................................3-39Table 3-25 Functions and features of the CD1...................................................................................................3-40Table 3-26 Interfaces on the CD1.......................................................................................................................3-45Table 3-27 Mapping relation between the service type and C2 byte.................................................................3-46Table 3-28 Mapping relation between the service type and V5 byte.................................................................3-46Table 3-29 Specifications of the interfaces on the CD1.....................................................................................3-46Table 3-30 Signal processing flow in the receive direction...............................................................................3-50Table 3-31 Signal processing flow in the transmit direction..............................................................................3-51
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Table 3-32 Description of the indicators on the EM6T/EM6F..........................................................................3-52Table 3-33 Description of the interfaces on the EM6T/EM6F...........................................................................3-54Table 3-34 Pin assignment of the RJ-45 connector in MDI mode.....................................................................3-54Table 3-35 Pin assignment of the RJ-45 connector in MDI-X mode.................................................................3-55Table 3-36 Description of the two indicators of the RJ-45 connector................................................................3-56Table 3-37 Performance of the GE optical interface .........................................................................................3-57Table 3-38 GE electric interface performance....................................................................................................3-57Table 3-39 FE electric interface performance....................................................................................................3-58Table 3-40 Mechanical behavior .......................................................................................................................3-58Table 3-41 Functions and features of the EF8T.................................................................................................3-59Table 3-42 Types and usage of interfaces on the EF8T..................................................................................... 3-62Table 3-43 Pins of the RJ-45 connector of the EF8T.........................................................................................3-62Table 3-44 Specifications of interfaces on the EF8T.........................................................................................3-63Table 3-45 Functions and features of the EF8F................................................................................................. 3-64Table 3-46 Interfaces of the EF8F......................................................................................................................3-66Table 3-47 Specifications of the interfaces on the EF8F....................................................................................3-67Table 3-48 Functions and Features of the EG2..................................................................................................3-68Table 3-49 Types and usage of optical interfaces on the EG2...........................................................................3-71Table 3-50 Specifications of the optical interfaces on the EG2......................................................................... 3-71Table 3-51 Allocation of central wavelengths of 1000BASE-CWDM interfaces and related optical module code.............................................................................................................................................................................3-72Table 3-52 Functions and features of the ML1.................................................................................................. 3-74Table 3-53 Type and usage of the interface on the front panel of the ML1.......................................................3-78Table 3-54 Pins of the Anea 96 interface...........................................................................................................3-78Table 3-55 Specifications of the interfaces on the ML1/ML1A.........................................................................3-80Table 3-56 Functions and features of the PIU....................................................................................................3-81Table 3-57 Types and usage of the interfaces on the PIU..................................................................................3-83Table 3-58 Technical specifications of the PIU................................................................................................. 3-84Table 3-59 Technical specifications of the FAN................................................................................................3-87Table 3-60 Functions and Features of the AUXQ..............................................................................................3-88Table 3-61 Types and usage of the interfaces on the AUXQ.............................................................................3-91Table 3-62 Pins of the PHONE interface........................................................................................................... 3-92Table 3-63 Pins of the F1 interface.................................................................................................................... 3-92Table 3-64 Pins of the ALMI interface.............................................................................................................. 3-93Table 3-65 Pins of the ALMO interface.............................................................................................................3-93Table 3-66 Technical specifications of the FE1 - FE4.......................................................................................3-94Table 4-1 Specifications of the power cable.........................................................................................................4-3Table 4-2 Technical specifications of the power cable and protection grounding cable......................................4-4Table 4-3 Types of fiber jumpers.........................................................................................................................4-4Table 4-4 Pin assignment of the 75-ohm E1 cable...............................................................................................4-9Table 4-5 Pin assignment of the 120-ohm E1 cable...........................................................................................4-11Table 4-6 Pin assignment of the MDI interface................................................................................................. 4-12Table 4-7 Pin assignment of the MDI-X interface.............................................................................................4-13
TablesOptiX RTN 950 Radio Transmission System
IDU Hardware Description
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Table 4-8 Pin assignment of the straight through cable.....................................................................................4-13Table 4-9 Pin assignment of the crossover cable...............................................................................................4-14Table 4-10 Pin assignment of the orderwire cable.............................................................................................4-15Table 5-1 Power consumption and weight...........................................................................................................5-1Table 7-1 Label description..................................................................................................................................7-2Table 7-2 Codes and types of optical modules.....................................................................................................7-4
OptiX RTN 950 Radio Transmission SystemIDU Hardware Description Tables
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1 Introduction to the Product
About This Chapter
This topic provides basic information on the OptiX RTN 950 and IDU 950 in terms of productapplication and equipment type.
1.1 Network ApplicationThe OptiX RTN 900 is a new generation split microwave transmission system developed byHuawei. It can provide a seamless Packet microwave transmission solution for a mobilecommunication network or private network.
1.2 Equipment TypeThe IDU 950 is the indoor unit of the OptiX RTN 950. The IDU 950 accesses services andperforms multiplexing, IF processing, system communication and control function, and otherfunctions. The IDU 950 works with the ODU to form the OptiX RTN 950 radio transmissionsystem.
OptiX RTN 950 Radio Transmission SystemIDU Hardware Description 1 Introduction to the Product
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1.1 Network ApplicationThe OptiX RTN 900 is a new generation split microwave transmission system developed byHuawei. It can provide a seamless Packet microwave transmission solution for a mobilecommunication network or private network.
The OptiX RTN 900 products are available in two types: OptiX RTN 910 and OptiX RTN 950.The IDU of the OptiX RTN 910 is 1U high and supports one or two IF boards. The IDU of theOptiX RTN 950 is 2U high and supports one to six IF boards. The users can choose an appropriatetype based on the actual requirements.
The OptiX RTN 950 provides several types of service interfaces and facilitates installation andflexible configuration. The solution can evolve based on the service changes that occur due toradio mobile network evolution. Thus, this solution can meet the transmission requirements ofnot only 2G and 3G networks, but also future LTE and 4G networks.
Figure 1-1 shows the Packet microwave transmission solution that is provided by the OptiXRTN 950 for the mobile communication network.
Figure 1-1 Packet microwave transmission solution provided by the OptiX RTN 950
Regional backhaulnetwork
OptiX RTN 910 BTSNodeB BSCRNC
FEE1
IMA E1
IMA E1FEE1
E1
IMA E1 E1FE
FE/GE
E1
GE
NOTE
l In the solutions, the local backhaul network is optional. The OptiX RTN 950 can be connected to the RNCor the BSC directly.
1.2 Equipment TypeThe IDU 950 is the indoor unit of the OptiX RTN 950. The IDU 950 accesses services andperforms multiplexing, IF processing, system communication and control function, and otherfunctions. The IDU 950 works with the ODU to form the OptiX RTN 950 radio transmissionsystem.
1 Introduction to the ProductOptiX RTN 950 Radio Transmission System
IDU Hardware Description
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Table 1-1 lists the basic features of the IDU 950. Figure 1-2 shows the appearance of the IDU950.
Table 1-1 Basic features of the IDU 950
Item IDU 950
Chassis height 2U
Pluggable board Supported
Microwave type Packet microwave
Microwavemodulation scheme
QPSK/16QAM/32QAM/64QAM/128QAM/256QAM
Adaptive modulation(AM)a function
Supported
Number of microwavedirections
1 to 6
RF configurationmode
1+0 non-protection configuration, N+0 non-protectionconfiguration (N≤5), and 1+1 protection configuration
Service type Transmits the accessed Ethernet services, TDM E1 services, or IMAE1 services in a uniform manner by using the MPLS/PWE3technology.
NOTE
a: The AM technology realizes the automatic adjustment of modulation schemes depending on the quality ofchannel. The AM function can use the following modulation schemes: QPSK, 16QAM, 32QAM, 64QAM,128QAM, and 256QAM.
Figure 1-2 IDU 950
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2 Hardware Structure
About This Chapter
The equipment hardware includes the chassis, boards, optical fibers, and cables.
2.1 ChassisThe IDU 950 is case-shaped for easy deployment.
2.2 BoardsBoards are the key hardware components of the equipment.
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2.1 ChassisThe IDU 950 is case-shaped for easy deployment.
The dimensions of the IDU 950 are 442 mm (width) x 220 mm (depth) x 2 U (height, 1 U =44.45 mm).
The IDU 950 can be installed in the following:
l ETSI cabinet (300 mm deep)
l ETSI cabinet (600 mm deep)
l 19 inch cabinet (450 mm deep)
l 19 inch cabinet (600 mm deep)
l Open rack
l Wall
l Desktop
Figure 2-1 shows the slot allocation of the IDU 950.
Figure 2-1 Slot allocation of the IDU 950
SLOT 3 (1 Gbit/s) SLOT 4 (1 Gbit/s)
SLOT 1 (2 Gbit/s) SLOT 2 (2 Gbit/s)
SLOT 5 (1 Gbit/s) SLOT 6 (1 Gbit/s)
SLOT 7 SLOT 8SLOT 10
SLOT 9
SLOT 11
2.2 BoardsBoards are the key hardware components of the equipment.
Board Description and Valid Slots
Table 2-1 shows the boards supported by the IDU 950 and their valid slots.
Table 2-1 Boards supported by the IDU 950 and their valid slots
Board Name Board Description Valid Slot
CXPR System control, switchingand timing board
Slot 7 and slot 8
AUXQ Auxiliary board, with 4xFEservice interfaces
Slots 1-6
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IDU Hardware Description
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Board Name Board Description Valid Slot
IFE2 Packet IF board, whichprovides the packet-basedmicrowave service.
Slots 1-6
IFU2 Universal IF board, whichprovides the hybridmicrowave service and thepacket-based microwaveservice.
Slots 1-6
IFX2 Universal IF board, whichprovides the hybridmicrowave service and thepacket-based microwaveservice, and supports theXPIC function of the hybridmicrowave.
Slots 1-6
EM6T 6-port RJ45 Ethernet/GigabitEthernet Interface Board
Slots 1-6
EM6F 4-port RJ45 + 2 Port SFP FastEthernet/Gigabit EthernetInterface Board
Slots 1-6
EF8T 8xFE service interface board(electric interface)
Slots 1-6
EF8F 8xFE service interface board(optical interface)
Slots 1-6
EG2 2xGE service interface board Slots 1-6
ML1 16xE1 service processingboard (75 ohms)
Slots 1-6
ML1A 16xE1 service processingboard (120 ohms)
Slots 1-6
CD1 1-channel STM-1 serviceprocessing board
Slots 1-6
PIU Power board Slot 9 and slot 10
FAN Fan board Slot 11
NOTE
l When housed in slot 1 or slot 2, the EG2 can process 2xGE signals. When housed in any other slot, thesecond port of the EG2 is not available.
l The second port of the CD1 can be used for only the LMSP protection.
l As the ML1 and ML1A have the same functions except for the match impedance, this documentdescribes only the ML1 instead of both.
l All the boards except the power board support hot plugging.
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Board RelationsThe IDU 950 uses different boards to achieve various functions.
Figure 2-2 shows board relations of the IDU 950.
NOTEThe service signals on each service board are connected to the service processing and forwarding moduleon the system control board.
Figure 2-2 Board relations of the IDU 950
Microwave side
E1
Service sideControl and
managementmodule
Serviceprocessing and
forwardingmodule
Clockmodule
Powermodule
PIU
Heatdissipation
module FAN
CXPR
EF8T8xFE IFE2/
IFU2/IFX2
Packetmicrowave
-48V/-60V
-48V/-60V
AUXQ4xFE
EF8F8xFE
1 2 543 876
1.Orderwire interface2.Alarm interface3.Transparent data interface4.NM interface5.NE serial interface6.Clock interface7.Time interface8.Concatenation interface
CD1C-STM-1
ML1/ML1A
EF6T
EM6F2xGE+4xFE
2xGE+4xFE
EG22xGE
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About This Chapter
Boards of the IDU 950 include system control, cross-connect and protocol processing board,interface boards, packet microwave IF board, power supply board, and fan board.
3.1 CXPRThis section describes the CXPR, which is the system control, cross-connect and protocolprocessing board, with regard to the version, functions, features, working principle, front panel,valid slots, and technical specifications.
3.2 IFE2This section describes the IFE2, which is a intermediate frequency (IF) board, with regard to theversion, functions, features, working principle, front panel, valid slots, and technicalspecifications. The IFE2 board supports the DC-I power distribution mode.
3.3 IFU2The IFU2 is a general IF board, which can support the Hybrid microwave transmission andPacket microwave transmission at the same time. The IFU2 board supports the DC-I powerdistribution mode.
3.4 IFX2The IFX2 is a general IF board, which can support the XPIC function of the Hybrid microwaveand Packet microwave. The IFX2 board supports the DC-I power distribution mode.
3.5 CD1This section describes the CD1, which is a 1 x channelized STM-1 service processing board, interms of the version, functions, features, working principle, front panel, valid slots, and technicalspecifications.
3.6 EM6T/EM6FThe EM6T/EM6F is an FE/GE interface board, which provides four FE electrical interfaces andtwo GE interfaces. The EM6T has similar functions to the EM6F. The only difference is asfollows: the GE interfaces on the EM6T always function as electrical interfaces whereas the GEinterfaces on the EM6F use the SFP modules and therefore can function as two optical orelectrical interfaces. The GE electrical interfaces on the EM6F and the EM6T are compatiblewith the FE electrical interfaces.
3.7 EF8T
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This section describes the EF8T, which is an interface board with eight FE electrical interfaces,with regard to the version, functions, features, working principle, front panel, valid slots, andtechnical specifications.
3.8 EF8FThis section describes the EF8F, which is an interface board with eight FE optical interfaces,with regard to the version, functions, features, working principle, front panel, valid slots, andtechnical specifications.
3.9 EG2This section describes the EG2, which is an interface board with two GE optical interfaces, withregard to the version, functions, features, working principle, front panel, valid slots, and technicalspecifications.
3.10 ML1/ML1AThis section describes the ML1/ML1A, which is a 16 x E1 electrical interface board, with regardto the version, functions, features, working principle, front panel, valid slots, and technicalspecifications.
3.11 PIUThis section describes the PIU, a power input unit, in terms of the version, functions, features,working principle, front panel, valid slots, and technical specifications.
3.12 FANThis section describes the FAN, a fan board, in terms of the version, functions, features, workingprinciple, front panel, valid slots, and technical specifications.
3.13 AUXQThis section describes the AUXQ, which is an auxiliary interface and 4 x FE electrical interfaceboard, with regard to the version, functions and features, working principle, front panel, validslots, and technical specifications.
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3.1 CXPRThis section describes the CXPR, which is the system control, cross-connect and protocolprocessing board, with regard to the version, functions, features, working principle, front panel,valid slots, and technical specifications.
3.1.1 Version DescriptionThe functional version of the CXPR is SL91.
3.1.2 Functions and FeaturesThe CXPR controls the system, grooms services, processes the clock, and provides auxiliaryinterfaces.
3.1.3 Working Principle and Signal FlowThe CXPR mainly consists of the service processing and grooming module, system controlmodule, clock processing module, auxiliary interface module, and power supply module.
3.1.4 Front PanelOn the front panel of the CXPR, there are indicators, buttons, and interfaces.
3.1.5 Valid SlotsThe CXPR can be housed in slot 7 or slot 8. The slot priority order is slot 7 > slot 8.
3.1.6 DIP Switches and CF CardThis board has a set of DIP switches and a pluggable CF card.
3.1.7 Board Configuration ReferenceYou can use the U2000 to set parameters for the CXPR.
3.1.8 SpecificationsThe technical specifications of the CXPR include board dimensions, and weight.
3.1.1 Version DescriptionThe functional version of the CXPR is SL91.
3.1.2 Functions and FeaturesThe CXPR controls the system, grooms services, processes the clock, and provides auxiliaryinterfaces.
Table 3-1 lists the functions and features of the CXPR.
Table 3-1 Functions and Features of the CXPR
Function and Feature Description
Basic funtion Cross-connect capacity 8 Gbit/s
Supports switching, control, and clock management.
Supports the board-level 1+1 backup function.
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Function and Feature Description
Auxiliary interface function Provides two clock/time input/output interfaces and providesthe synchronization time source and clock source for theequipment.
Provides one 10 Mbit/s/100 Mbit/s auto-sensing Ethernet NMinterface or NM serial interface for communication with theNMS.
Provides one 10 Mbit/s/100 Mbit/s auto-sensing extendedEthernet interface for communication.
Tact switches Provides two tact switches. When you rotate the ejector leversto remove the board, the two tact switches are triggered tostart the active/standby protection switching.
NOTEWhen you rotate only one ejector lever, the protection switching is not triggered. The protection switchingis triggered only when you rotate the two ejector levers.
3.1.3 Working Principle and Signal FlowThe CXPR mainly consists of the service processing and grooming module, system controlmodule, clock processing module, auxiliary interface module, and power supply module.
Figure 3-1 shows the block diagram for the working principle of the CXPR.
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Figure 3-1 Block diagram for the working principle of the CXPR
Auxiliary interface module
2-channel time/clock input/output interface
NM network interface/serial interface
Extended network interface
Clock processing
module
System control module
Service processing and grooming
module
NM communication
Service signals
Power supply module
-48 V/-60 V-48 V/-60 V
12 V3.3 V
Backplane
PIUPIUFAN
Interface Boards
Under-voltage/over-voltage detection bus
CPU control unit
Logic control unit
NM serial interface
Active/standby board
communication bus
Time/clock signals
Management bus
Management bus
Time/clock signals
Time/clock signals
The other CXPR
Service communication bus The other
CXPR
The other CXPR
NM pass-through
Interface boards
Interface boards
Time/clock signals
Clock Signal
Service Processing and Grooming Module
This module performs the following functions:
l Grooms services with 8 Gbit/s switching capacity.
l Supports automatic switching and manual switching of the active and standby boards.
System Control Module
This module mainly consists of the CPU control unit and logic control unit, which perform thefollowing functions:
l The CPU control unit works with the logic control unit to detects alarms and hardwarefaults, control boards, process overhead, and manage the equipment.
l The logic control unit provides interfaces through which the CPU control unit connects toother chips on the board. The logic control unit specifies the working states of chips,initializes chips, and operates the register. In addition, the logic control unit achieves logcontrol on active/standby switching, monitors the working state of the board, and detectsthe states of other boards.
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Clock Processing ModuleThis module performs the following functions:
l Provides working clock signals for the key chips on the CXPR.
l Supports the physical-layer clock synchronization, and provides system clock signals foreach boards.
l Processes the IEEE 1588V2 protocol to achieve clock/time synchronization.
Auxiliary Interface ModuleThis module performs the following functions:
l Provides one NM Ethernet interface or NM serial interface.
l Provides two clock/time input/output interfaces, which can be configured to differentworking modes.
l Provides one extended Ethernet interface.
Power Supply ModuleThis module performs the following functions:
l Accesses two -48 V DC/-60 V DC power supplies.
l Detects and reports overvoltage and undervoltage of two input power supplies.
l Supplies 12 V power for the FAN board.
l Supplies 3.3 V working power for the local board and the interface boards in a centralizedmanner.
3.1.4 Front PanelOn the front panel of the CXPR, there are indicators, buttons, and interfaces.
Appearance of the Front PanelFigure 3-2 shows the appearance of the front panel of the CXPR.
Figure 3-2 Front panel of the CXPR
IndicatorThe following indicators are present on the front panel of the CXPR:
l STAT indicator, red, orange or green, which indicates the board working status
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l PROG indicator, red or green, which indicates the running status of the program
l SYNC indicator, red or green, which indicates the synchronization status
l ACTX indicator, green, which indicates the switching status
l ACTC indicator, green, which indicates the status of the system control unit
For details on meanings of indicators, see 6 Indicators.
Button
The following buttons are present on the front panel of the CXPR:
l CF RCV button, which is used to restore the configuration data from the CF card. Whenyou press the CF RCV button for 5 seconds, the equipment automatically restores theconfiguration data from the CF card.
l RST button, which is used for warm reset on the board. When you press the RST buttonand then release it, the board is reset (warm).
l LAMP, which is used to test the indicators on the board. When you press the LAMP button,all the board indicators on the NE, except the Ethernet service interface indicators, shouldbe on.
Switch for the Ejector Lever
On the front panel, there are two switches for the two ejector levers on the front panel. To removea board, you need to push the two switches to the middle and then rotate the ejector levers.
Interface
Table 3-2 lists the types and usage of the interfaces on the CXPR.
Table 3-2 Types and usage of the interfaces on the CXPR
Interface onthe Front Panel
Interface Type Usage Pin
ETH OAM RJ-45 10M/100M auto-sensingEthernet NM interface orNM serial interface
For details, see Table3-3.
CLK1/TOD1 RJ-45 Phase/frequency input/output interface
For details, see Table3-4.
CLK2/TOD2 RJ-45 Phase/frequency input/output interface
For details, see Table3-4.
EXT RJ-45 10M/100M auto-sensingEthernet extended NMconcatenation interface
For details, see Table3-5.
Table 3-3 lists the pins of the ETH/OAM interface.
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Table 3-3 Pins of the ETH/OAM interface
Front View Pin Usage
8 7 6 5 4 3 2 1
1 Transmit positive of the NMinterface
2 Transmit negative of the NMinterface
3 Receive positive of the NM interface
4 Grounding end of the NM serialinterface
5 Receive end of the NM serialinterface
6 Receive negative of the NM interface
7 undefined
8 Transmit end of the NM serialinterface
Table 3-4 lists the pins of the CLK1/TOD1 and CLK2/TOD2 interfaces.
Table 3-4 Pins of the CLK1/TOD1 and CLK2/TOD2 interfaces
Front View Pin Working Mode
ExternalClock
ExternalTime Input(1PPS +TimeInformation)
ExternalTimeOutput(1PPS +TimeInformation)
ExternalTime Input(DCLS)
ExternalTime Output(DCLS)
8 7 6 5 4 3 2 1
1 Negativereceive endof externalclock
Unspecified Unspecified Unspecified Unspecified
2 Positivereceive endof externalclock
Unspecified Unspecified Unspecified Unspecified
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Front View Pin Working Mode
ExternalClock
ExternalTime Input(1PPS +TimeInformation)
ExternalTimeOutput(1PPS +TimeInformation)
ExternalTime Input(DCLS)
ExternalTime Output(DCLS)
3 Unspecified Negativeinput for the1pps signal(RS422level)
Negativeoutput for the1pps signal(RS422 level)
Negativeinput for theDCLS timesignal(RS422level)
Negativeoutput for theDCLS timesignal(RS422 level)
4 Negativetransmit endof externalclock
Groundingend
Groundingend
Groundingend
Groundingend
5 Positivetransmit endof externalclock
Groundingend
Groundingend
Groundingend
Groundingend
6 Unspecified Positiveinput for the1pps signal(RS422level)
Positiveoutput for the1pps signal(RS422 level)
Positiveinput for theDCLS timesignal(RS422level)
Positiveoutput for theDCLS timesignal(RS422 level)
7 Unspecified Negativeinput for timeinformation(RS422level)
Negativeoutput fortimeinformation(RS422 level)
Unspecified Unspecified
8 Unspecified Positiveinput for timeinformation()RS422level
Positiveoutput fortimeinformation(RS422 level)
Unspecified Unspecified
NOTE
The CLK1/TOD1 and CLK2/TOD2 interfaces can be configured so that they can work in one of thepreceding five working modes.
Table 3-5 lists the pins of the EXT interface.
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Table 3-5 Pins of the EXT interface
Front View Pin Usage
8 7 6 5 4 3 2 1
1 Transmit positive of the extendedEthernet interface
2 Transmit negative of the extendedEthernet interface
3 Receive positive of the extendedEthernet interface
4 -
5 -
6 Receive negative of the extendedEthernet interface
7 -
8 -
3.1.5 Valid SlotsThe CXPR can be housed in slot 7 or slot 8. The slot priority order is slot 7 > slot 8.
3.1.6 DIP Switches and CF CardThis board has a set of DIP switches and a pluggable CF card.
Different values of the DIP switches correspond to different functions of the DIP switches.
The CF card stores the following information:l All the data of the NE, including the NE ID, NE IP address, and service data
l NE software and all the board software programs
l All the FPGA files
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Figure 3-3 Positions of the DIP switches and CF card
ON DIP
1 2 3 4
2
1
1. DIP switches 2. CF card
Table 3-6 Setting the DIP switches
Setting of the DIP Switches a Function
4 3 2 1
0 0 0 0 Normaloperating statewhen thewatchdog isenabled.
0 0 0 1 Reserved.
0 0 1 0 Memory self-check state.
0 0 1 1 Commissioningstate.
0 1 0 0 Operating statewhen thewatchdog isdisabled and thefull memorycheck isperformed.
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Setting of the DIP Switches a Function
4 3 2 1
0 1 0 1 BIOS holdoverstate.
0 1 1 0 BIOS exhibitionstate.
0 1 1 1 Reserved (bydefault,operating statewhen thewatchdog isstarted).
1 0 0 0 Reserved (bydefault,operating statewhen thewatchdog isstarted).
1 0 0 1 To recover thedata of the CFcard.
1 0 1 0 To erase the datain the systemparameter area.
1 0 1 1 To erase thedatabases.
1 1 0 0 To erase the NEsoftware,including thepatches.
1 1 0 1 To erase thedatabases andNE software(including thepatches).
1 1 1 0 To format thefile system, thatis, to erase allthe data in thefile system.
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Setting of the DIP Switches a Function
4 3 2 1
1 1 1 1 To format thefile system sothat all the datais erased (filesystem +extended BIOS+ systemparameter area).
NOTEa: When a DIP switch is turned to the numeral side, it represents the binary digit 1. When a DIP switch isturned to the letter side, it represents the binary digit 0.
3.1.7 Board Configuration ReferenceYou can use the U2000 to set parameters for the CXPR.
You can use the U2000 to set the following parameter for the CXPR.
External clock/time interface
3.1.8 SpecificationsThe technical specifications of the CXPR include board dimensions, and weight.
Board dimensions (mm): 22.86 (H) x 225.75 (D) x 193.80 (W)
Weight (kg): 0.66
3.2 IFE2This section describes the IFE2, which is a intermediate frequency (IF) board, with regard to theversion, functions, features, working principle, front panel, valid slots, and technicalspecifications. The IFE2 board supports the DC-I power distribution mode.
3.2.1 Version DescriptionThe functional version of the IFE2 is TND1.
3.2.2 Functions and FeaturesThe IFE2 receives and transmits one IF signal, and provides the management channel to theODU and the -48 V DC power that the ODU requires.
3.2.3 Working Principle and Signal FlowThe IFE2 consists of the combiner interface module, IF processing module, MODEM module,SMODEM module, MUX/DEMUX module, control module, power module, and clock module.
3.2.4 Front PanelThere are indicators, an IF port, an ODU power switch, and labels on the front panel.
3.2.5 Valid Slots
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The IFE2 can be housed in any of slots 1 to 6 in the slot area. The slot priority order is slots 3and 5 > slots 4 and 6 > slots 1 and 2.
3.2.6 Board Configuration ReferenceYou can use the U2000 to set parameters for the IFE2.
3.2.7 SpecificationsThe technical specifications of the IFE2 include the IF performace, baseband signals processingperformance of the Modem, board dimensions, and weight.
3.2.1 Version DescriptionThe functional version of the IFE2 is TND1.
3.2.2 Functions and FeaturesThe IFE2 receives and transmits one IF signal, and provides the management channel to theODU and the -48 V DC power that the ODU requires.
The functions and features of the IFE2 are as follows:
l IF Processing– Supports the Adaptive Modulation function.
– Performs mapping and demapping between packet service signals and microwave framesignals.
– Codes and decodes microwave frame signals.
– Modulates and demodulates microwave frame signals.
– Modulates and demodulates ODU control signals.
– Combines and splits service signals, ODU control signals, and -48 V DC power supplies.
– Supports the automatic transmit power control (ATPC) function.
l Overhead Processing– Processes the overheads of the microwave frame.
– Supports the setting and querying of the Link ID.
l Protection Processing– Supports 1+1 HSB/FD/SD protection.
– Supports 1+1 FD/SD hitless switching.
l Maintenance Features– Supports inloop and outloop at the IF port.
NOTE
When the IF port works in Layer 3 mode, the loopback function is invalid because the IP protocolis used to process data packets.
– support the PRBS test for the IF ports.
– Supports the detecting of the board temperature.
– Supports cold resetting of the board.
– Supports the querying of the manufacturing information of the board.
– Supports the in-service upgrade of the FPGA.
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3.2.3 Working Principle and Signal FlowThe IFE2 consists of the combiner interface module, IF processing module, MODEM module,SMODEM module, MUX/DEMUX module, control module, power module, and clock module.
Figure 3-4 shows the block diagram for the functions of the IFE2.
Figure 3-4 Block diagram for the functions of the IFE2
Backplane
Service bus
Control bus
IF MUX/DEMUX module
MODEMmodule
IF processing
module
Combiner interface module
Control module
Clock module
CXP
SMODEM module
Power module
CXP
CXPControl bus
HSM signalParied board
ODU control signal
Service signal
NOTE
In the block diagram, the CXP on the backplane indicates the system control, cross-connect and protocolprocessing board. For OptiX RTN 950, the CXP indicates the CXPR board.
Combiner Interface ModuleDivides the ODU control signal and the microwave service signal from the IF signal in thereceive direction.
Combines the ODU control signal, microwave service signal, and -48 V power supplies, andsends them to the IF cable in the transmit direction.
IF Processing ModuleIn the receive direction,l Controls the level of the service signal through the automatic gain control (AGC) circuit.
l Filters the signal.
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l Performs A/D conversion.
In the transmit direction,l Performs D/A conversion.
l Performs analog modulation.
MODEM ModuleIn the receive direction,l Performs digital demodulation.
l Performs time domain adaptive equalization.
l Performs FEC decoding and generates the corresponding alarms.
In the transmit direction,l Performs FEC coding.
l Performs digital modulation.
MUX/DEMUX ModuleIn the receive direction,l Detects the microwave frame header and generates the corresponding alarms and
performance events.l Verifies the check code in the microwave frame and generates the corresponding alarms
and performance events.l Checks the Link ID and generates the corresponding alarms.
l Detects the changes in the ATPC message in the microwave frame and the changes in themicrowave RDI, and reports the changes to the CXPR through the control module.
l Extracts the overheads from the microwave frame and sends it to the logic processingmodule.
l Extracts the packet service signals from the microwave frame and sends the signals to theCXPR.
In the transmit direction,l Sets microwave frame overheads.
l Combines the packet service signals and microwave frame overheads to form microwaveframes.
NOTE
In 1+1 FD/SD, the MUX/DEMUX unit sends the service signal to the MUX/DEMUX unit of the pairedboard. The MUX/DEMUX unit of the main IF board selects a better signal for later processing.
SMODEM ModuleIn the receive direction,l Demodulates the ODU control signal.
l Transmits the ODU control signal to the CXPR.
In the transmit direction, modulates the ODU control signal that is transmitted from theCXPR.
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Control Module
Controls the reading and writing on the chip, resetting of the chip, and fault detection on thechip.
Clock Module
This unit performs the following functions:
l Provides the working clock for each unit on the board.
l Detects and restores the link clock.
l Supports the IEEE 1588V2 protocol.
Power Modulel Supports two inputs of -48 V DC/-60 V DC power.
l Converts the input -48 V DC/-60 V DC power into the DC voltages required by the modulesand provides a backup for 3.3 V power.
l Provides -48 V power for the ODU.
3.2.4 Front PanelThere are indicators, an IF port, an ODU power switch, and labels on the front panel.
Appearance of the Front Panel
Figure 3-5 shows the front panel of the IFE2.
Figure 3-5 Front panel of the IFE2
Indicators
The following indicators are present on the front panel of the IFE2.
l Board status indicator (STAT) - two colors (red and green)
l Service status indicator (SRV) - three colors (red, yellow, and green)
l Radio link status indicator (LINK) - one color (green)
l ODU status indicator (ODU) - three colors (red, yellow, and green)
l Remote end status indicator (RMT) - one color (yellow)
l Protection status indicator (ACT) - one color (green)
For details on meanings of indicators, see 6 Indicators.
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Interfaces
Table 3-7 IFE2 interface description
Interface Interface Type Usage
IF TNC IF port
ODU power switch
Table 3-8 ODU power switch
Switch Usage
ODU-PWRa ODU power switch
NOTE
a: The ODU-PWR switch is equipped with a lockup device. To move the switch, you need to first pull outthe switch lever partially. When the switch is set to "O", it indicates that the circuit is open. When the switchis set to "I", it indicates that the circuit is closed.
LabelsThere is a high temperature warning label, an operation warning label, and an operation guidancelabel on the front panel.
l The high temperature warning label suggests that the board surface temperature may exceed70°C when the ambient temperature is higher than 55°C. In this case, you need to wearprotective gloves before touching the board.
l The operation warning label suggests that the ODU-PWR switch must be turned off beforethe IF cable is removed.
l The operation guidance label suggests that you must pull the switch lever outwards slightlybefore setting the switch to the "I" or "O" position.
3.2.5 Valid SlotsThe IFE2 can be housed in any of slots 1 to 6 in the slot area. The slot priority order is slots 3and 5 > slots 4 and 6 > slots 1 and 2.
When being configured in 1+1 FD/SD protection mode, the IFE2 boards must be housed inpaired slots. The paired slots supported by the IDU 950 are as follows: (slot 1, slot 2), (slot 3,slot 5), and (slot 4, slot 6).
3.2.6 Board Configuration ReferenceYou can use the U2000 to set parameters for the IFE2.
You can use the U2000 to set the following parameter for the IFE2:
Microwave interface
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To configure the microwave interface, set the general attributes, IF attributes, Layer 2 attributes,Layer 3 attributes, and advanced attributes of the E1 interface. In details, set the IF parameters,link-layer parameters, network-layer parameters, link identifier, and loopback mode for themicrowave interface.
3.2.7 SpecificationsThe technical specifications of the IFE2 include the IF performace, baseband signals processingperformance of the Modem, board dimensions, and weight.
IF Performance
Table 3-9 IF performance
Item Performance
IF service signal Transmit frequencyof the IF board(MHz)
350
Receive frequency ofthe IF board (MHz)
140
ODU O&M signal Modulation scheme ASK
Transmit frequencyof the IF board(MHz)
5.5
Receive frequency ofthe IF board (MHz)
10
Impedance (ohm) 50
Baseband Signals Processing Performance of the Modem
Table 3-10 Baseband signals processing performance of the modem
Item Description
Encoding mode Low-density parity check code (LDPC) encoding.
Adaptivetimedomainequalizer forbaseband signals
supported.
Other Specifications
Other specifications of the IFE2 are as follows:
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l Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W)
l Weight (kg): 0.53
3.3 IFU2The IFU2 is a general IF board, which can support the Hybrid microwave transmission andPacket microwave transmission at the same time. The IFU2 board supports the DC-I powerdistribution mode.
NOTE
In this version, the IFU2 supports only the Packet microwave transmission.
3.3.1 Version DescriptionThe functional version of the IFU2 is SL91.
3.3.2 Functions and FeaturesThe IFU2 receives and transmits one Hybrid/Packet IF signal, provides the management channelto the ODU, and supplies the required -48 V power to the ODU.
3.3.3 Working Principle and Signal FlowThis topic considers the processing of one Hybrid microwave IF signal as an example to describethe working principle and signal flow of the IFU2.
3.3.4 Front PanelThere are indicators, an IF interface, labels and an ODU power switch on the front panel.
3.3.5 Valid SlotsThe IFU2 can be housed in any of slots 1 - 6 in the slot area. The slot priority order is slots 3and 5 > slots 4 and 6 > slots 1 and 2.
3.3.6 Board Configuration ReferenceYou can use the U2000 to set parameters for the IFU2.
3.3.7 Technical SpecificationsThis topic describes the board specifications, including IF performance, modem performance,board mechanical behavior and board power consumption.
3.3.1 Version DescriptionThe functional version of the IFU2 is SL91.
3.3.2 Functions and FeaturesThe IFU2 receives and transmits one Hybrid/Packet IF signal, provides the management channelto the ODU, and supplies the required -48 V power to the ODU.
IF Processingl Supports the Hybrid microwave frames, and supports the pure transmission of E1 or
Ethernet signals and the hybrid transmission of E1 and Ethernet signals.l Supports the Packet microwave frames and supports the packet service transmission.
l Supports the adaptive modulation (AM) technology.
l Maps service signals into microwave frame signals.
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l Codes and decodes microwave frame signals.
l Modulates and demodulates microwave frame signals.
l Modulates and demodulates ODU control signals.
l Combines and splits service signals, ODU control signals, and -48 V power supplies.
l Provides a maximum of 56 MHz signal bandwidth and supports the highest modulationmode of 256QAM.
Overhead Processingl Processes the overheads of the Hybrid/Packet microwave signals.
l Supports the setting and query of the link ID.
Protection Processingl Supports 1+1 HSB/FD/SD protection.
l Supports 1+1 FD/SD hitless switching.
NOTE
For details on the 1+1 HSB, 1+1 FD, 1+1 SD, see the OptiX RTN 950 Radio Transmission System FeatureDescription.
Alarms and Performance Eventsl Reports various alarms and performance events.
l Supports the alarm management functions such as setting the alarm reversion function andsetting the BER threshold.
l Supports the performance event management functions such as setting the performancethresholds and setting the automatic reporting of 15-minute/24-hour performance events.
NOTE
For details about the alarm management and performance event management functions, see the OptiX RTN950 Radio Transmission System Maintenance Guide.
Maintenance Featuresl Supports the inloop and outloop over IF interfaces.
l Supports the inloop and outloop at composite ports.
l Supports the MAC inloop at IFETH ports.
l Supports the PRBS BER test over IF interfaces.
l Supports the detection of the board temperature.
l Supports the monitoring of the power supply and the clock.
l Supports the detection of the board voltage.
l Supports the detection of the board clock.
l Supports the cold reset on the board.
l Supports the query of the board manufacturing information.
l Supports the in-service upgrade of the FPGA.
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NOTE
l For details on the loopback function, see the OptiX RTN 950 Radio Transmission System MaintenanceGuide.
l A warm reset causes the reset on the board software unit in the system control and communication unitbut does not affect the services. A cold reset causes the reset on the board software unit in the systemcontrol and communication unit, the initiation of the board (if the board has the FPGA, the FPGA isreloaded), and a service interruption.
3.3.3 Working Principle and Signal FlowThis topic considers the processing of one Hybrid microwave IF signal as an example to describethe working principle and signal flow of the IFU2.
NOTE
The working principle and signal flow of the Packet microwave IF signals are similar to the workingprinciple and signal flow of the Hybrid microwave IF signals. The only difference is with regard to theframe structure. In the case of the Packet microwave, the MUX/DEMUX unit only multiplexes/demultiplexes the packet services and does not transmit the TDM services to the cross-connect unit orreceive the TDM services from the cross-connect unit.
Functional Block Diagram
Figure 3-6 Functional block diagram of the IFU2
Backplane
Cross-connect unit
I F I F processing
unit
Logic processing unit
System control and communication unit
System control and communication unit
MU
X/D
EM
UX
unit
MODEM unit
Com
biner interface
unit
Power supply
unit
SMODEM unit
Clock unit
Logic control unit
ODU control signal
Paired board
Microwave frame signal
HSM switching signal
Service bus
Overhead bus
GE busPacket switching unit
Control bus
-48V2
-48 V power supplied to the ODU
+3.3 V power supplied to the other units on the board
System clock signalClock signal provided to the other units on the board
Ethernet processin
g unit
+3.3 V
-48 V1
+3.3 V power supplied to the monitoring circuit
System control and communication unit
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Signal Processing Flow in the Receive Direction
Table 3-11 Signal processing flow in the receive direction of the IFU2
Step FunctionalModule
Processing Flow
1 Combiner interfaceunit
Separates the ODU control signal and the microwaveservice signal from the IF signal.
2 SMODEM unit l Demodulates the ODU control signal.
l Transmits the ODU control unit to the system controland communication unit.
3 IF processing unit l Filters the signal.
l Performs the ADC sampling.
l Performs A/D conversion.
4 MODEM unit l Performs digital demodulation.
l Performs time domain adaptive equalization.
l Performs FEC decoding and generates thecorresponding alarms.
5 MUX/DEMUX unit l Detects the Hybrid microwave frame header andgenerates the corresponding alarms and performanceevents.
l Verifies the check code and generates thecorresponding alarms and performance events.
l Checks the link ID and generates the correspondingalarms.
l Detects the changes in the ATPC message and themicrowave RDI, and reports the changes to the systemcontrol and communication unit through the controlbus.
l Extracts the orderwire bytes, auxiliary channel bytesincluding the F1 and SERIAL bytes, DCC bytes, andSSM bytes to form a 2 Mbit/s overhead signal, andtransmits the 2 Mbit/s overhead signal to the logicprocessing unit.
l Maps the E1 signals in the Hybrid microwave servicesignals to the specific positions in the VC-4s and thentransmits the VC-4s to the logic processing unit.
l Transmits the Ethernet signals in the Hybridmicrowave service signals to the ethernet processingunit.
6 Ethernet processingunit
l Processes the GE signals received from the MUX/DEMUX unit.
l Sends the processed signals to the packet switchingunit.
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Step FunctionalModule
Processing Flow
7 Logic processingunit
l Processes the clock signal.
l Multiplexes the 2 Mbit/s overhead signals into an 8Mbit/s overhead signal and transmits the 8 Mbit/soverhead signal to the system control andcommunication unit. Each 2 Mbit/s overhead signaloccupies a 2 Mbit/s timeslot in the 8 Mbit/s overheadbandwidth.
l Transmits the VC-4 signal and pointer indicationsignal to the main and standby cross-connect units.
NOTE
In the 1+1 FD/SD mode, the MUX/DEMUX unit transmits the service signals by HSM bus to the MUX/DEMUXunit of the paired board. The MUX/DEMUX unit of the paired board selects the signal of higher quality forsubsequent processing.
Signal Processing Flow in the Transmit Direction
Table 3-12 Signal processing flow in the transmit direction of the IFU2
Step FunctionalModule
Processing Flow
1 Logic processingunit
l Processes the clock signal.
l Demultiplexes the 8 Mbit/s overhead signal into 2Mbit/s overhead signals.
l Receives the VC-4 signal and pointer indication signalfrom the cross-connect unit.
2 Ethernet processingunit
l Receives the GE signal from the packet switching unit.
l Processes the GE signals.
3 MUX/DEMUX unit l Demaps E1 signals from the VC-4 signal.
l Sets the Hybrid microwave frame overheads.
l Combines the E1 signals, Ethernet signals, andmicrowave frame overheads to form microwaveframes.
5 MODEM unit l Performs FEC coding.
l Performs digital modulation.
6 IF processing unit l Performs D/A conversion.
l Performs analog modulation.
l Filters the signal.
l Amplifies the signals.
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Step FunctionalModule
Processing Flow
7 SMODEM unit Modulates the ODU control signal that is transmittedfrom the system control and communication unit.
8 Combiner interfaceunit
Combines the ODU control signal, microwave servicesignal, and -48 V power supplies, and transmits thecombined signals to the IF cable.
Control Signal Processing Flow
The board is directly controlled by the CPU unit of the system control and communication unit.The CPU unit issues the configuration data and query commands to the other units of the boardthrough the control bus. The command responses, alarms, and performance events are alsoreported to the CPU unit through the control bus.
The logic control unit decodes the read/write address signals from the CPU unit of the systemcontrol and communication unit.
Power Supply Unitl This unit receives the -48 V power from the power supply bus in the backplane, performs
the start-delay, filtering, and DC-DC conversion, and then supplies the -48 V power to theODU.
l This unit receives the -48 V power from the power supply bus in the backplane, performsthe start-delay, filtering, and DC-DC conversion, and then supplies the +3.3 V power tothe other units on the IFU2.
Clock Unit
This unit receives the system clock from the control bus in the backplane and provides the clocksignal to the other units on the board.
3.3.4 Front PanelThere are indicators, an IF interface, labels and an ODU power switch on the front panel.
Front Panel Diagram
Figure 3-7 Front panel of the IFU2
IFU
2
PULL
IF I O
ODU-PWR
STA
TS
RV
LIN
KO
DU
RM
TA
CT
WARNING-48V OUTPUTTURN OFF POWERBEFOREDISCONNECTING IF CABLE
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Indicators
Table 3-13 Description of the indicators on the IFU2
Indicator State Meaning
STAT On (green) The board is workingnormally.
On (red) The board hardware is faulty.
Off l The board is not working.
l The board is not created.
l There is no power suppliedto the board.
SRV On (green) The services are normal.
On (red) Indicates that a critical ormajor alarm occurs in theservice.
On (yellow) A minor or remote alarmoccurs in the services.
Off The services are notconfigured.
LINK On (green) The space link is normal.
On (red) The space link is faulty.
ODU On (green) The ODU works normally.
On (red) l The ODU has critical ormajor alarms.
l No power is supplied.
On (yellow) The ODU has minor alarms.
On for 300 ms (yellow) andoff for 300 ms repeatedly
The antennas are not aligned.
RMT On (yellow) The equipment at theopposite end reports an RDI.
Off The equipment at theopposite end does not reportan RDI.
ACT On (green) l The board is in the activestate in the 1+1 protectionsystem.
l The board is alreadyactivated in theunprotected system.
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Indicator State Meaning
Off l The board is in the standbystate in the 1+1 protectionsystem.
l The board is not activatedin the unprotected system.
Interface and Switch
Table 3-14 Description of the Interfaces
Interface Description Connector Type CorrespondingCable
IF IF interface TNC IF jumperb
ODU-PWRa ODU power switch - -
NOTE
a: The ODU-PWR switch is equipped with a lockup device. To turn on or turn off the switch, you need tofirst pull the switch lever outwards slightly. When the switch is set to "O", it indicates that the circuit isopen. When the switch is set to "I", it indicates that the circuit is closed.
b: The 5D IF cable is directly connected to the IF board. Hence, when the 5D IF cable is used, the IF jumperis not required.
Labels
There is a high temperature warning label, an operation warning label, and an operation guidancelabel on the front panel.
The high temperature warning label indicates that the board surface temperature may exceed70°C when the ambient temperature is higher than 55°C. In this case, you need to wear protectivegloves before handling the board.
The operation warning label indicates that you must turn off the ODU-PWR switch beforeremoving the IF cable.
The operation guidance label indicates that you need to pull the switch outward slightly beforesetting the switch to the "I" or "O" position.
3.3.5 Valid SlotsThe IFU2 can be housed in any of slots 1 - 6 in the slot area. The slot priority order is slots 3and 5 > slots 4 and 6 > slots 1 and 2.
When being configured in 1+1 FD/SD protection mode, the IFU2 boards must be housed inpaired slots. The paired slots supported by the IDU 950 are as follows: (slot 1, slot 2), (slot 3,slot 5), and (slot 4, slot 6).
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3.3.6 Board Configuration ReferenceYou can use the U2000 to set parameters for the IFU2.
You can use the U2000 to set the following parameter for the IFU2:
Microwave interface
To configure the microwave interface, set the general attributes, IF attributes, Layer 2 attributes,Layer 3 attributes, and advanced attributes of the E1 interface. In details, set the IF parameters,link-layer parameters, network-layer parameters, link identifier, and loopback mode for themicrowave interface.
3.3.7 Technical SpecificationsThis topic describes the board specifications, including IF performance, modem performance,board mechanical behavior and board power consumption.
IF Performance
Table 3-15 IF performance
Item Performance
IF signal
Transmit frequency of the IFboard (MHz)
350
Receive frequency of the IFboard (MHz)
140
Impedance (ohm) 50
ODU O&M signal
Modulation mode ASK
Transmit frequency of the IFboard (MHz)
5.5
Receive frequency of the IFboard (MHz)
10
Baseband Signal Processing Performance of the Modem
Table 3-16 Baseband signal processing performance of the modem
Item Performance
Encoding mode The LDPC encoding is performed for the Hybrid microwave signals.
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Item Performance
Adaptive time-domain equalizer forbaseband signals
Supported
Mechanical Behavior
Table 3-17 Mechanical behavior
Item Performance
Dimensions 19.82 mm (height) x 196.70 mm (depth) x 193.80 mm (width)
Weight 0.79 kg
Power ConsumptionPower consumption: < 23 W
3.4 IFX2The IFX2 is a general IF board, which can support the XPIC function of the Hybrid microwaveand Packet microwave. The IFX2 board supports the DC-I power distribution mode.
NOTE
In this version, the IFX2 supports only the Packet microwave transmission.
3.4.1 Version DescriptionThe functional version of the IFX2 is SL91.
3.4.2 Functions and FeaturesThe IFX2 receives and transmits one Hybrid/Packet IF signal, provides the management channelto the ODU, and supplies the required -48 V power to the ODU. The IFX2 can cancel the cross-polarization interference in the IF signal.
3.4.3 Working Principle and Signal FlowThis topic considers the processing of one Hybrid microwave IF signal as an example to describethe working principle and signal flow of the IFX2.
3.4.4 Front PanelThere are indicators, an IF interface, XPIC signal ports, an ODU power switch, and labels onthe front panel.
3.4.5 Valid SlotsThe IFX2 can be housed in any of slots 1 - 6 in the slot area. The slot priority order is slots 3and 5 > slots 4 and 6 > slots 1 and 2.
3.4.6 Board Configuration ReferenceYou can set the microwave work mode, link ID, ATPC attribute, AM attribute, and XPICattribute for the IFX2 by using the NMS.
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3.4.7 Technical SpecificationsThis section describes the board performance, including IF performance, modem performance,board mechanical behavior, and power consumption.
3.4.1 Version DescriptionThe functional version of the IFX2 is SL91.
3.4.2 Functions and FeaturesThe IFX2 receives and transmits one Hybrid/Packet IF signal, provides the management channelto the ODU, and supplies the required -48 V power to the ODU. The IFX2 can cancel the cross-polarization interference in the IF signal.
IF Processingl Supports the XPIC function, provides the XPIC input and output interfaces, and supports
the manual configuration of the XPIC function.l Supports the Hybrid microwave frames and supports the pure transmission of E1 or
Ethernet signals and the hybrid transmission of E1 and Ethernet signals.l Supports the Packet microwave frames and supports the packet service transmission.
l Supports the adaptive modulation (AM) technology.
l Maps service signals into microwave frame signals.
l Codes and decodes microwave frame signals.
l Modulates and demodulates microwave frame signals.
l Modulates and demodulates ODU control signals.
l Combines and splits service signals, ODU control signals, and -48 V power supplies.
l Provides the maximum signal bandwidth of 56 MHz and supports the highest modulationmode of 256QAM.
Overhead Processingl Processes the overheads of the Hybrid/Packet microwave signals.
l Supports the setting and query of the link ID.
Protection Processingl Supports 1+1 HSB/FD/SD protection.
l Supports 1+1 FD/SD hitless switching.
NOTE
For details on the 1+1 HSB, 1+1 FD, and 1+1 SD, see the OptiX RTN 950 Radio Transmission SystemFeature Description.
Alarms and Performance Eventsl Reports various alarms and performance events.
l Supports the alarm management functions such as setting the alarm reversion function andsetting the BER threshold.
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l Supports the performance event management functions such as setting the performancethresholds and setting the automatic reporting of 15-minute/24-hour performance events.
NOTE
For details about the alarm management and performance event management functions, see the OptiX RTN950 Radio Transmission System Maintenance Guide.
Maintenance Featuresl Supports the inloop and outloop over IF interfaces.
l Supports the inloop and outloop at composite ports.
l Supports the MAC inloop at IFETH ports.
l Supports the PRBS BER test over IF interfaces.
l Supports the detection of the board temperature.
l Supports the detection of the board voltage.
l Supports the detection of the board clock.
l Supports the cold reset on the board.
l Supports the query of the board manufacturing information.
l Supports the in-service upgrade of the FPGA.
NOTE
l For details on the loopback function, see the OptiX RTN 950 Radio Transmission System MaintenanceGuide.
l A warm reset causes the reset on the board software unit in the system control and communication unitbut does not affect the services. A cold reset causes the reset on the board software unit in the systemcontrol and communication unit, the initiation of the board (if the board has the FPGA, the FPGA isreloaded), and a service interruption.
3.4.3 Working Principle and Signal FlowThis topic considers the processing of one Hybrid microwave IF signal as an example to describethe working principle and signal flow of the IFX2.
NOTE
The working principle and signal flow of the Packet microwave IF signals are similar to the workingprinciple and signal flow of the Hybrid microwave IF signals. The only difference is with regard to theframe structure. In the case of the Packet microwave, the MUX/DEMUX unit only multiplexes/demultiplexes the packet services and does not transmit the TDM services to the cross-connect unit orreceive the TDM services from the cross-connect unit.
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Functional Block Diagram
Figure 3-8 Functional block diagram of the IFX2Backplane
Cross -connect unit
I IF processing
unit
Logic processing unit System control and
communication unit
System control and communication unit
MU
X/DEM
UX
unitMODEM
unit
Com
biner interface
unit
Power supply
unit
Clock unit
Logic control unit
ODU control signal
Paired board
Microwave frame signal
HSM switching signal
Service busOverhead
bus
GE bus Packet switching unit
Control bus
- 48 V power supplied to the ODU
+3.3V power supplied to the other units on the board
System clock signalClock signal provided to the
other units on the board
Ethernet processing
unit
+3.3
V
- 48 V1
+3.3V power supplied to the monitoring circuit
XPIC signal
F
System control and communication unit
SMODEM unit
- 48 V2
Signal Processing Flow in the Receive Direction
Table 3-18 Signal processing flow in the receive direction of the IFX2
Step FunctionalModule
Processing Flow
1 Combiner interfaceunit
Separates the ODU control signal and the microwaveservice signal from the IF signal.
2 SMODEM unit l Demodulates the ODU control signal.
l Transmits the ODU control unit to the system controland communication unit.
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Step FunctionalModule
Processing Flow
3 IF processing unit l Performs the ADC sampling.
l Filters the signal and splits the signal to two channels.– Performs A/D conversion for one filtered signal and
transmits the converted signal to the MODEM unit.– Outputs the other filtered signal as the XPIC signal.
l Performs A/D conversion for the XPIC signal from thepaired IFX2 and transmits the converted signal to theMODEM unit.
4 MODEM unit l Performs digital demodulation by using the XPIC IFsignal from the paired IFX2 as a reference signal.
l Performs time domain adaptive equalization.
l Performs FEC decoding and generates thecorresponding alarms.
5 MUX/DEMUX unit l Detects the Hybrid microwave frame header andgenerates the corresponding alarms and performanceevents.
l Verifies the check code and generates thecorresponding alarms and performance events.
l Checks the link ID and generates the correspondingalarms.
l Detects the changes in the ATPC message and themicrowave RDI, and reports the changes to the systemcontrol and communication unit through the controlbus.
l Extracts the orderwire bytes, auxiliary channel bytesincluding the F1 and SERIAL bytes, DCC bytes, andSSM bytes to form a 2 Mbit/s overhead signal, andtransmits the 2 Mbit/s overhead signal to the logicprocessing unit.
l Maps the E1 signals in the Hybrid microwave servicesignals to the specific positions in the VC-4s and thentransmits the VC-4s to the logic processing unit.
l Transmits the Ethernet signals in the Hybridmicrowave service signals to the Ethernet processingunit.
6 Ethernet processingunit
l Processes the GE signals received from the MUX/DEMUX unit.
l Sends the processed signals to the packet switchingunit.
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Step FunctionalModule
Processing Flow
7 Logic processingunit
l Processes the clock signal.
l Multiplexes the 2 Mbit/s overhead signals into an 8Mbit/s overhead signal and transmits the 8 Mbit/soverhead signal to the system control andcommunication unit. Each 2 Mbit/s overhead signaloccupies a 2 Mbit/s timeslot in the 8 Mbit/s overheadbandwidth.
l Transmits the VC-4 signal and pointer indicationsignal to the cross-connect unit.
NOTE
In the 1+1 FD/SD mode, the MUX/DEMUX unit transmits the service signals by HSM bus to the MUX/DEMUXunit of the paired board. The MUX/DEMUX unit of the paired board selects the signal of higher quality forsubsequent processing.
Signal Processing Flow in the Transmit Direction
Table 3-19 Signal processing flow in the transmit direction of the IFX2
Step FunctionalModule
Processing Flow
1 Logic processingunit
l Processes the clock signal.
l Demultiplexes the 8 Mbit/s overhead signal into 2Mbit/s overhead signals.
l Receives the VC-4 signal and pointer indication signalfrom the cross-connect unit.
2 Ethernet processingunit
l Receives the GE signal from the packet switching unit.
l Processes the GE signals.
3 MUX/DEMUX unit l Demaps E1 signals from the VC-4 signal.
l Sets the Hybrid microwave frame overheads.
l Combines the E1 signals, Ethernet signals, andmicrowave frame overheads to form microwaveframes.
5 MODEM unit l Performs FEC coding.
l Performs digital modulation.
6 IF processing unit l Performs D/A conversion.
l Performs analog modulation.
l Filters the signal.
l Amplifies the signals.
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Step FunctionalModule
Processing Flow
7 SMODEM unit Modulates the ODU control signal that is transmittedfrom the system control and communication unit.
8 Combiner interfaceunit
Combines the ODU control signal, microwave servicesignal, and -48 V power supplies, and transmits thecombined signals to the IF cable.
Control Signal Processing Flow
The board is directly controlled by the CPU unit of the system control and communication unit.The CPU unit issues the configuration data and query commands to the other units of the boardthrough the control bus. The command responses, alarms, and performance events are alsoreported to the CPU unit through the control bus.
The logic control unit decodes the read/write address signals from the CPU unit of the systemcontrol and communication unit.
Power Supply Unitl This unit receives the -48 V power from the power supply bus in the backplane, performs
the start-delay, filtering, and DC-DC conversion, and then supplies the -48 V power to theODU.
l This unit receives the -48 V power from the power supply bus in the backplane, performsthe start-delay, filtering, and DC-DC conversion, and then supplies the +3.3 V power tothe other units on the IFX2.
Clock Unit
This unit receives the system clock from the control bus in the backplane and provides the clocksignal to the other units on the board.
3.4.4 Front PanelThere are indicators, an IF interface, XPIC signal ports, an ODU power switch, and labels onthe front panel.
Front Panel Diagram
Figure 3-9 Front panel of the IFX2
IFX
2
IF I O
ODU-PWR
STA
TSR
VLI
NK
OD
UR
MT
ACT
WARNING-48V OUTPUTTURN OFF POWER BEFOREDISCONNECTING IF CABLE
IFX
2
X-IN X-OUTPULL XPIC
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Indicators
Table 3-20 Description of the indicators on the IFX2
Indicator State Meaning
XPIC On (green) The XPIC input signal isnormal.
On (red) The XPIC input signal is lost.
Off The XPIC function isdisabled.
STAT On (green) The board is workingnormally.
On (red) The board hardware is faulty.
Off l The board is not working.
l The board is not created.
l There is no power suppliedto the board.
SRV On (green) The services are normal.
On (red) Indicates that a critical ormajor alarm occurs in theservice.
On (yellow) A minor or remote alarmoccurs in the services.
Off The services are notconfigured.
LINK On (green) The space link is normal.
On (red) The space link is faulty.
ODU On (green) The ODU works normally.
On (red) l The ODU has critical ormajor alarms.
l No power is supplied.
On (yellow) The ODU has minor alarms.
On for 300 ms (yellow) andoff for 300 ms repeatedly
The antennas are not aligned.
RMT On (yellow) The equipment at theopposite end reports an RDI.
Off The equipment at theopposite end does not reportan RDI.
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Indicator State Meaning
ACT On (green) l The board is in the activestate in the 1+1 protectionsystem.
l The board is alreadyactivated in theunprotected system.
Off l The board is in the standbystate in the 1+1 protectionsystem.
l The board is not activatedin the unprotected system.
Interfaces
Table 3-21 Description of the interfaces
Interface Description Connector Type CorrespondingCable
IF IF interface TNC IF jumperb
ODU-PWRa ODU power switch - -
X-IN XPIC signal inputinterface
SMA XPIC cable
X-OUT XPIC signal outputinterface
SMA
NOTE
a: The ODU-PWR switch is equipped with a lockup device. To turn on or turn off the switch, you need tofirst pull the switch lever outwards slightly. When the switch is set to "O", it indicates that the circuit isopen. When the switch is set to "I", it indicates that the circuit is closed.b: The 5D IF cable is directly connected to the IF board. Hence, when the 5D IF cable is used, the IF jumperis not required.
LabelsThere is a high temperature warning label, an operation warning label, and an operation guidancelabel on the front panel.
The high temperature warning label indicates that the board surface temperature may exceed70°C when the ambient temperature is higher than 55°C. In this case, you need to wear protectivegloves before handling the board.
The operation warning label indicates that you must turn off the ODU-PWR switch beforeremoving the IF cable.
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The operation guidance label indicates that you need to pull the switch outward slightly beforesetting the switch to the "I" or "O" position.
3.4.5 Valid SlotsThe IFX2 can be housed in any of slots 1 - 6 in the slot area. The slot priority order is slots 3and 5 > slots 4 and 6 > slots 1 and 2.
When being configured in 1+1 FD/SD protection mode, the IFX2 boards must be housed inpaired slots. The paired slots supported by the IDU 950 are as follows: (slot 1, slot 2), (slot 3,slot 5), and (slot 4, slot 6).
3.4.6 Board Configuration ReferenceYou can set the microwave work mode, link ID, ATPC attribute, AM attribute, and XPICattribute for the IFX2 by using the NMS.
You can use the U2000 to set the following parameter for the IFX2:
Microwave interface
To configure the microwave interface, set the general attributes, IF attributes, Layer 2 attributes,Layer 3 attributes, and advanced attributes of the E1 interface. In details, set the IF parameters,link-layer parameters, network-layer parameters, link identifier, loopback mode and XPICattributes for the microwave interface.
3.4.7 Technical SpecificationsThis section describes the board performance, including IF performance, modem performance,board mechanical behavior, and power consumption.
IF Performance
Table 3-22 IF performance
Item Performance
IF signal
Transmit frequency of the IFboard (MHz)
350
Receive frequency of the IFboard (MHz)
140
Impedance (ohm) 50
ODU O&M signal
Modulation mode ASK
Transmit frequency of the IFboard (MHz)
5.5
Receive frequency of the IFboard (MHz)
10
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Baseband Signal Processing Performance of the Modem
Table 3-23 Baseband signal processing performance of the modem
Item Performance
Encoding mode The LDPC encoding is performed for the Hybrid microwave signals.
Adaptive time-domain equalizer forbaseband signals
Supported
Mechanical Behavior
Table 3-24 Mechanical behavior
Item Performance
Dimensions 19.82 mm (height) x 196.70 mm (depth) x 193.80 mm (width)
Weight 0.796 kg
Power ConsumptionPower consumption: < 33 W
3.5 CD1This section describes the CD1, which is a 1 x channelized STM-1 service processing board, interms of the version, functions, features, working principle, front panel, valid slots, and technicalspecifications.
3.5.1 Version DescriptionThe functional version of the CD1 is TND1.
3.5.2 Functions and FeaturesThe CD1 accesses 1 x channelized STM-1 services. When used with the CXP, the CD1 processesthe service signals. The CD1 supports the IMA, CES, and ML-PPP protocols, and the servicetype can be flexibly configured.
3.5.3 Working Principle and Signal FlowThe CD1 consists of the SDH processing module, line processing module, data processingmodule, management module, clock module, and power supply module.
3.5.4 Front PanelOn the front panel of the CD1, there are indicators and interfaces.
3.5.5 Valid SlotsThe CD1 can be housed in any of the six slots, that is, slots 1 to 6. The slot priority order is slots4 and 6 > slots 1 and 2 > slots 3 and 5.
3.5.6 Board Configuration Reference
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You can use the U2000 to configure parameters for the CD1.
3.5.7 SpecificationsThe technical specifications of the CD1 cover the interface specifications, board dimensions,and weight.
3.5.1 Version DescriptionThe functional version of the CD1 is TND1.
3.5.2 Functions and FeaturesThe CD1 accesses 1 x channelized STM-1 services. When used with the CXP, the CD1 processesthe service signals. The CD1 supports the IMA, CES, and ML-PPP protocols, and the servicetype can be flexibly configured.
Table 3-25 lists functions and features of the CD1.
Table 3-25 Functions and features of the CD1
Function andFeature
Remarks
Basic function Service interfaces on thefront panel
Supports two channelized STM-1optical interfacesa.
Fractional E1 Supports the CES services and IMA services at 64 kibt/s level.
Interface function Automatic shutdownfunction of the laser at theport
Supported
Type of the loopback at theport
InloopOutloop
Automatic loopback releaseat the port
Supported
All the VC-12 timeslots of each CD1 interface support the DCNfunction. By default, the DCN function of only the first, seventeenth,thirty-third, and forty-ninth VC-12 timeslots of each optical interfacecan be enabled.Manually enables or disables the DCN function of the VC-12timeslots of the optical interface on the CD1.
ATM/IMA Number of supported ATME1 services
32
Number of supported IMAgroups
32
Maximum number ofVC-12 timeslots in eachIMA group
63
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Function andFeature
Remarks
Dynamically enables or disables the IMA group, restarts the IMAgroup protocol, and dynamically adds or deletes the IMA groupmembers.
Supported traffic type CBRUBRUBR+rt-VBRnrt-VBR
Encapsulates ATM VPC/VCC service to the PWE3 in the N-to-1 (N≤16) or 1-to-1 format.
Encapsulates the ATM cells to the PW in the concatenation and non-concatenation modes. The number of PW connections that support thecell concatenation is 64, and the maximum number of concatenatedcells is 31.
ATM OAM on the UNI side Supports the CC test
Supports the LB test.
CES Number of supported CESservicesb
63
Supported emulation mode CESoPSNSAToP
Supports the timeslot compression function. Provides the idle 64 kbit/s timeslot suppression function for the CES services in the CESoPSNmode to save the transmission bandwidth.
Supported clock mode Retiming mode
The jitter buffer time of the CES service can be set. The jitter buffertime ranges from 0.375 ms to 16 ms, and the step value is 0.125 ms.
The encapsulation buffer time of the CES service can be set. Theencapsulation buffer time ranges from 0.125 ms to 5 ms, and the stepvalue is 0.125 ms.
ML-PPP Number of supported ML-PPP groups
7
Maximum number of linkssupported by each ML-PPPgroup
16
Functions as the NNI interface, and functions as the UNI interface toaccess IP packets of the L3VPN services.
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Function andFeature
Remarks
LMSP protection Supports the 1+1 LMSP protection for two STM-1 ports on the sameboard and the inter-board 1:1 LMSP protection.
Extraction andinsertion of the S1byte
Supported
SSM protocol Supported
NOTEa: The second channelized STM-1 interface on the front panel cannot be used to carry services, and it canbe used for only the LMSP protection.
b: The CD1 board only supports the inter-board CES local services.
3.5.3 Working Principle and Signal FlowThe CD1 consists of the SDH processing module, line processing module, data processingmodule, management module, clock module, and power supply module.
Figure 3-10 shows the block diagram for working principle of the CD1.
Figure 3-10 Block diagram for the working principle of the CD1
SDH processing
module
Line processing
module
Data processing
module
Management module
Clock module
Power supply module
Backplane
Service signal
Service signal
Service signal
CXP
CXP
-48V/-60V
PIU
PIU
-48V/-60V
Management bus
Management busManagement busManagement bus
3.3V
1.2V
.
.
.
.
.
.
Channelized STM-1
Stand-by channelized
STM-1
Line clocksLine clocks
System clocksCXP
CXP
NOTE
In the block diagram, the CXP on the backplane indicates the system control, cross-connect and protocolprocessing board. For OptiX RTN 950, the CXP indicates the CXPR board.
Receive DirectionIn the receive direction, the SDH processing module accesses 1 x channelized STM-1 servicesthrough the interface on the front panel. This module decapsulates the VC-12 timeslots from the
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STM-1 signals, recovers the E1 signals, processes the overhead bytes, pointers, and alarmsignals, and sends the processed signals to the line processing module. Then, the line processingmodule rearranges the E1 frames, processes the rearranged signals according to the service type,and sends the signals to the data processing module for PWE3 encapsulation and PW scheduling.Finally, the signals are sent to the CXPR through the interface on the backplane.
Transmit DirectionIn the transmit direction, the data processing module receives the signals from the CXPR,identifies the signals, performs the PWE3 decapsulation, and then sends the signals to the lineprocessing module. The line processing module processes various signals, schedules queues,and sends the processed signals to the SDH processing module. The SDH processing modulemaps the E1 signals to the VC-12 timeslots, multiplexes the VC-12 timeslots to the STM-1signals, adds the overhead bytes and pointers, processes the alarm signals, and sends out theSTM-1 signals through the interface on the front panel.
SDH Processing ModuleThis module performs the following functions:
l In the receive direction, this module accesses 1 x channelized STM-1 signals, decapsulatesthe VC-12 timeslots from the STM-1 signals, obtains the E1 signals by demapping theVC-12 timeslots, and processes the overhead bytes, pointers, and alarm signals.
l In the transmit direction, this module receives the E1 signals from the line processingmodule, maps the signals to the VC-12 timeslots, multiplexes the VC-12 timeslots toSTM-1 signals, adds the overhead bytes and pointers, processes the alarm signals, and sendsout the 1 x channelized STM-1 signals through the interface on the backplane.
l When the service fails, this module realizes the LMSP protection. Thus, the service isswitched.
l This module extracts and recovers the line clocks.
Line Processing ModuleThis module performs the following functions:
l In the receive direction, this module receives the signals from the SDH processing module,rearranges the frames of the E1 signals, performs processing for various services such assetup and deletion of the IMA link, creation of the ML-PPP group, extraction of protocolpackets in the ML-PPP services, and suppression of timeslots of the CES services. Then,the processed signals are sent to the data processing module.
l In the transmit direction, this module receives the signals from the data processing module,processes various services, and sends the processed signals to the SDH processing module.
Data Processing ModuleThis module performs the following functions:
l In the receive direction, this module obtains the corresponding PW channel information ofeach E1 service, performs the PWE3 encapsulation and PW scheduling, and sends theprocessed signals to the CXPR through the interface on the backplane.
l In the transmit direction, this module receives the signals from the CXPR, identifiesdifferent service types, and performs the PWE3 decapsulation and service scheduling.
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l In the case of the ATM E1 or IMA services, this module performs the VP/VC switchingfor the ATM cells, and processes the concatenated cells during the PWE3 encapsulation ordecapsulation.
Management Module
When used with the CXPR, this module manages and controls each module on the CD1.
Clock Module
This module performs the following functions:
l Processes the line clocks.
l Accesses and processes the system clock from the CXPR, and provides the working clockto each module on the CD1.
l Supports the SSM protocol.
Power Supply Module
This module performs the following functions:
l Accesses two -48 V/-60 V DC power supplies.
l Supplies the working power for each module on the CD1.
3.5.4 Front PanelOn the front panel of the CD1, there are indicators and interfaces.
Appearance of the Front Panel
Figure 3-11 shows the appearance of the front panel of the CD1.
Figure 3-11 Appearance of the front panel of the CD1
Indicators
The following indicators are present on the front panel of the CD1:
l STAT indicator, red or green, which indicates the board status
l SRV indicator, red, yellow, or green, which indicates service status
l LOS1 and LOS2 indicators, red or green, which indicate the board status
For details on indications of indicators, see 6 Indicators.
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InterfacesTable 3-26 lists the amount, types, and usage of the interfaces on the CD1.
Table 3-26 Interfaces on the CD1
Interface on theFront Panel
Interface Type Usage
IN1 to IN2 LC Input optical interfaces for channelized STM-1signals
OUT1 to OUT2 LC Output optical interfaces for channelized STM-1signals
3.5.5 Valid SlotsThe CD1 can be housed in any of the six slots, that is, slots 1 to 6. The slot priority order is slots4 and 6 > slots 1 and 2 > slots 3 and 5.
3.5.6 Board Configuration ReferenceYou can use the U2000 to configure parameters for the CD1.
You can use the U2000 to configure the following parameters for the CD1.
l J0
l J1
l J2
l C2
l V5
l SDH interface
l Automatic laser shutdown
l Spare timeslot recovery value
The descriptions of the parameters are as follows:
l The J0 byte is continually transmitted to carry section access point identifiers, accordingto which the receive end verifies the constant connection to the intended transmit end.
l The J1 byte is the path tracing byte. The transmit end successively transmits the higherorder access point identifiers, according to which the receive end verifies the constantconnection to the intended transmit end. When detecting mismatch of the J1 bytes, thereceive end inserts the HP_TIM alarm in the corresponding path.
l The J2 byte is a VC-12 path tracing byte. The transmit end successively transmits the lowerorder access point identifiers based on the negotiation of the two ends. According to theseaccess point identifiers, the receive end verifies the constant connection to the intendedtransmit end in this path.
l The C2 byte is the signal label byte, which indicates the multiplexing structure of the VCframes and the payload property. The received C2 should be consistent with the transmitted
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C2. If the C2 bytes are mismatched, the local end inserts the HP_SLM alarm in thecorresponding VC-4 path.Table 3-27 lists the mapping relation between the service type and setting of the C2.
Table 3-27 Mapping relation between the service type and C2 byte
Input Service Type C2 Byte (in Hex)
TUG structure 02
ATM mapping 13
HDLC, PPP framed signal mapping 16
Unequipped 00
l As a path status and signal identification byte, the V5 byte detects the bit error and indicates
the remote fault and failure in the lower order path. Table 3-28 lists the mapping relationbetween the service type and V5 byte.
Table 3-28 Mapping relation between the service type and V5 byte
Input Service Type V5 Byte (in Hex)
Asynchronization 02
Unequipped or supervisory unequipped 00
l The attributes of an SDH interface cover the general attributes, Layer 2 attributes, Layer 3
attributes and advanced attributes. To configure an SDH interface, configure the physicalparameters, link layer parameters and network layer parameters.
l To configure the ALS is to set the parameters of the optical interface.
l To ensure the valid utilization of the path, the spare timeslots are eliminated when thesignals are encapsulated into the network. In this way, the TDM frame is partially stuffed.To recover the TDM frame at the service sink, the spare timeslots eliminated duringencapsulation are added again.
3.5.7 SpecificationsThe technical specifications of the CD1 cover the interface specifications, board dimensions,and weight.
Table 3-29 lists the specifications of interfaces on the CD1.
Table 3-29 Specifications of the interfaces on the CD1
Item Specification Requirement
Optical interfacetype
Bidirectional two-fiber
S-1.1(15 km)
L-1.1(40 km)
L-1.2(80 km)
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Item Specification Requirement
Fiber type Single-mode Single-mode Single-mode
Working wavelengthrange (nm)
1261 to 1360 1263 to 1360 1480 to 1580
Mean launchedoptical power (dBm)
-15 to -8 -5 to 0 -5 to 0
Receiver sensitivity(dBm)
-28 -34 -34
Minimum overheadpoint (dBm)
-8 -10 -10
Extinction ratio (dB) 8.2 10 10
Optical module code 3406027634060307
3406028134060308
3406028234060309
NOTEFor details of the optical module, see 7.2 Optical Module Labels.
Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W)
Board weight (kg): 0.52
3.6 EM6T/EM6FThe EM6T/EM6F is an FE/GE interface board, which provides four FE electrical interfaces andtwo GE interfaces. The EM6T has similar functions to the EM6F. The only difference is asfollows: the GE interfaces on the EM6T always function as electrical interfaces whereas the GEinterfaces on the EM6F use the SFP modules and therefore can function as two optical orelectrical interfaces. The GE electrical interfaces on the EM6F and the EM6T are compatiblewith the FE electrical interfaces.
3.6.1 Version DescriptionThe functional version of the EM6T/EM6F is SL91.
3.6.2 Functions and FeaturesThe EM6T/EM6F accesses, processes, and aggregates four FE signals and two GE signals. Inthis version, the backplane buses of the EM6T/EM6F provides the capacity of 1 Gbit/s.
3.6.3 Working Principle and Signal FlowThis topic considers the processing of one GE signal on the EM6T as an example to describethe working principle and signal flow of the EM6T/EM6F.
3.6.4 Front PanelThere are indicators, FE interfaces, and GE interfaces on the front panel of the EM6T/EM6F.The GE electrical interfaces on the front panel of the EM6T are compatible with the FEinterfaces. The GE interfaces on the front panel of the EM6F use pluggable SFP optical modules.
3.6.5 Valid Slots
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The EM6T/EM6F can be housed in any of slots 1 - 6 in the slot area. The slot priority order isslots 4 and 6 > slots 1 and 2 > slots 3 and 5.
3.6.6 Board Configuration ReferenceYou can use the U2000 to set parameters for the EM6T/EM6F.
3.6.7 Technical SpecificationsThis topic describes the board specifications, including the GE interface performance, FEinterface performance, board mechanical behavior and board power consumption.
3.6.1 Version DescriptionThe functional version of the EM6T/EM6F is SL91.
3.6.2 Functions and FeaturesThe EM6T/EM6F accesses, processes, and aggregates four FE signals and two GE signals. Inthis version, the backplane buses of the EM6T/EM6F provides the capacity of 1 Gbit/s.
Ethernet Service Signal Processingl The EM6T provides two GE electrical interfaces whereas the EM6F uses the SFP optical
modules to provide two GE optical or electrical interfaces. The GE electrical interfaces arecompatible with the FE electrical interfaces.
l Supports the setting and query of the working modes of the Ethernet interfaces. Thesupported working modes are as follows:
– The FE interfaces support 10M full duplex, 10M half duplex, 100M full duplex, 100Mhalf duplex, and auto-negotiation.
– The GE electrical interfaces support 10M full duplex, 10M half duplex, 100M fullduplex, 100M half duplex, 1000M full duplex, and auto-negotiation.
– The GE optical interfaces support 1000M full-duplex and auto-negotiation.
l Supports the addition, deletion, and switching of IEEE 802.1q/802.1p-compliant VLANtags, and forwards packets based on the VLAN tags.
l Supports the setting and query of the tag attributes of the Ethernet interfaces. The followingthree TAG attributes are available: tag aware, access, and hybrid.
l Accesses Ethernet II and IEEE 802.3 service frames with the maximum frame lengthranging from 1518 to 9600 bytes.
l Supports Jumbo frames with the maximum frame length of 9600 bytes.
l Supports the port-based flow control function that complies with IEEE 802.3x.
l Supports the link aggregation group (LAG) function.
NOTEFor details on LAG, see the OptiX RTN 950 Radio Transmission System Feature Description.
Clock Processingl Supports synchronous Ethernet.
l Supports receiving and transmitting SSM messages through Ethernet interfaces.
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Alarms and Performance Eventsl Reports various alarms and performance events.
l Supports the alarm management functions such as setting the alarm reversion function andsetting the alarm thresholds.
l Supports the performance event management functions such as setting the performancethresholds and setting the automatic reporting of 15-minute/24-hour performance events.
l Supports RMON performance events.
NOTE
For details on the alarm management and performance event management functions, see the OptiX RTN950 Radio Transmission System Maintenance Guide.
Maintenance Featuresl Supports the inloop at the PHY layer over Ethernet ports.
l Supports the inloop at the MAC layer over Ethernet ports.
l Supports the mirroring function over Ethernet interfaces.
l Supports the warm reset and cold reset on the board.
l Supports the detection of the board temperature.
l Supports the query of the board manufacturing information.
l Supports the query of the manufacturing information about the SFP module.
3.6.3 Working Principle and Signal FlowThis topic considers the processing of one GE signal on the EM6T as an example to describethe working principle and signal flow of the EM6T/EM6F.
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Functional Block Diagram
Figure 3-12 Functional block diagram
GE signal access unit
FE signal access unit
Ethernet processing
unit
Logic processing
unit
Logic control unit
Clock unit
Backplane
Control bus of the board
System control and communication unit
Packet switching unit
GE signal
FE signal
Ethernet signal
Ethernet signal
Control bus
+3.3 V+3.3 V backup power supplied to the board
System clockClock signal provided to the other units on the board
Control signal
Control signal
Power supply unit
-48 V1
-48 V2+3.3 V power supplied to the board
Signal Processing Flow in the Receive Direction
Table 3-30 Signal processing flow in the receive direction
Step Functional Unit Processing Flow
1 GE signal access unit l Provides access to GE signal.
l Performs reassembling, decoding, and serial/parallelconversion for the GE signals.
l Performs frame delimitation, preamble stripping, CRCcode processing, and Ethernet performance count forthe frame signals.
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Step Functional Unit Processing Flow
2 Ethernet processingunit
l Adds the tags identifying the ingress ports to theEthernet data frames.
l Processes the VLAN tags in the Ethernet data frames.
l Performs the QoS processing, such as trafficclassification and CAR traffic monitoring, for theEthernet data frames.
l Forwards the Ethernet data frames to the logicprocessing unit.
3 Logic processingunit
Transmits the Ethernet data frames to .
Signal Processing Flow in the Transmit Direction
Table 3-31 Signal processing flow in the transmit direction
Step Functional Unit Processing Flow
1 Logic processing unit l Selects the Ethernet data frames from the packetswitching unit.
l Transmits the Ethernet data frames to the Ethernetprocessing unit.
2 Ethernet processingunit
l Processes the VLAN tags in the Ethernet data frames.
l Performs the QoS processing, such as traffic shapingand queue scheduling, for the Ethernet data frames.
l Forwards the Ethernet data frames to thecorresponding egress ports based on the egress tagscontained in the Ethernet data frames.
3 GE signal access unit l Performs frame delimitation, preamble addition, CRCcode computing, and Ethernet performance count.
l Performs parallel/serial conversion and coding for theEthernet data frames, and sends out the generated FE/GE signals through the Ethernet interfaces.
Control Signal Processing FlowThe Ethernet processing unit controls the FE/GE signal access by using the control signal.
The logic control unit controls the Ethernet processing unit and logic processing unit throughthe control unit on the board.
The logic control unit communicates with through the system control bus. The configurationdata and query commands from the system control and communication unit are issued to thevarious units of the board through the logic control unit. The command response reported by
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each unit on the board, and the alarms and performance events are reported to the system controland communication unit through the logic control unit.
Power Supply Unit
This unit receives two -48 V power supplies from the backplane, converts the -48 V power intothe +3.3 V power, and then supplies the +3.3 V power to the other units on the board.
The power supply unit receives a +3.3 V power supply from the backplane, which functions asa +3.3 V power backup for the other units on the board.
Clock Unit
This unit receives the system clock from the control bus in the backplane and provides the clocksignal to the other units on the board.
3.6.4 Front PanelThere are indicators, FE interfaces, and GE interfaces on the front panel of the EM6T/EM6F.The GE electrical interfaces on the front panel of the EM6T are compatible with the FEinterfaces. The GE interfaces on the front panel of the EM6F use pluggable SFP optical modules.
Front Panel Diagram
Figure 3-13 Front panel of the EM6T
EM
6 TST
AT
SR
V
FE1 FE2 FE3 FE4GE2 EM
6 T
GE1PRO
G
Figure 3-14 Front panel of the EM6F
EM
6FST
AT
SR
V
GE2 EM
6F
GE1LIN
K1LI
NK2
CLASS1LASER
PRODUCT
FE1 FE2 FE3 FE4PR
OG
Indicators
Table 3-32 Description of the indicators on the EM6T/EM6F
Indicator State Meaning
STAT On (green) The board is working normally.
On (red) The board hardware is faulty.
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Indicator State Meaning
Off l The board is not working.
l The board is not created.
l There is no power supplied to the board.
SRV On (green) The system is working normally.
On (red) A critical or major alarm occurs in thesystem.
On (yellow) A minor alarm occurs in the system.
Off There is no power supplied to the system.
PROG On for 100 ms (green) and offfor 100 ms repeatedly
When the board is being powered on orbeing reset, the software is being loaded tothe flash memory.
On for 300 ms (green) and offfor 300 ms repeatedly
When the board is being powered on orbeing reset, the board software is in BIOSboot state.
On (green) The upper layer software is being initialized.
On for 100 ms (red) and off for100 ms repeatedly
When the board is being powered on orbeing reset, the BOOTROM self-checkfails.
On (red) When the board is being powered on orbeing reset, the memory self-check fails orloading the upper layer software fails.When the board is running, the logic file orupper layer software is lost.The pluggable storage card is faulty.
Off The software is running normally.
LINK1a On (green) The GE1 interface is connected correctlyand is not receiving or transmitting data.
Blinking (yellow) The GE1 interface is receiving ortransmitting data.
Off The GE1 interface is not connected or isconnected incorrectly.
LINK2a On (green) The GE2 interface is connected correctlyand is not receiving or transmitting data.
Flashing (green) The GE2 interface is receiving ortransmitting data.
Off The GE2 interface is not connected or isconnected incorrectly.
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NOTE
a: The LINK1 and LINK2 indicators are available only on the EM6F and indicate the states of thecorresponding GE optical interfaces.
Interfaces
Table 3-33 Description of the interfaces on the EM6T/EM6F
Interfac
e
Description Connector Type Corresponding Cable
FE1 FE interface
RJ-45 Network Cable
FE2
FE3
FE4
GE1 GE electricalinterface
GE2
GE1 GE opticalinterface (EM6F)
LC (SFP optical module) Fiber Jumper
GE2
The FE electrical interfaces and GE electrical interfaces support the MDI and MDI-X adaptationmodes. For the front view and pin assignment of the RJ-45 connector, see Figure 3-15 and referto Table 3-34 and Table 3-35.
Figure 3-15 Front view of the RJ-45 connector
8 7 6 5 4 3 2 1
Table 3-34 Pin assignment of the RJ-45 connector in MDI mode
Pin 10/100BASE-T(X) 1000BASE-T
Signal Function Signal Function
1 TX+ Transmitting data (+) BIDA+ Bidirectional data wire A(+)
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Pin 10/100BASE-T(X) 1000BASE-T
Signal Function Signal Function
2 TX- Transmitting data (-) BIDA- Bidirectional data wire A(-)
3 RX+ Receiving data (+) BIDB+ Bidirectional data wire B(+)
4 Reserved - BIDC+ Bidirectional data wire C(+)
5 Reserved - BIDC- Bidirectional data wire C(-)
6 RX- Receiving data (-) BIDB- Bidirectional data wire B(-)
7 Reserved - BIDD+ Bidirectional data wire D(+)
8 Reserved - BIDD- Bidirectional data wire D(-)
Table 3-35 Pin assignment of the RJ-45 connector in MDI-X mode
Pin 10/100BASE-T(X) 1000BASE-T
Signal Function Signal Function
1 RX+ Receiving data (+) BIDB+ Bidirectional data wire B(+)
2 RX- Receiving data (-) BIDB- Bidirectional data wire B(-)
3 TX+ Transmitting data (+) BIDA+ Bidirectional data wire A(+)
4 Reserved - BIDD+ Bidirectional data wire D(+)
5 Reserved - BIDD- Bidirectional data wire D(-)
6 TX- Transmitting data (-) BIDA- Bidirectional data wire A(-)
7 Reserved - BIDC+ Bidirectional data wire C(+)
8 Reserved - BIDC- Bidirectional data wire C(-)
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The RJ-45 connector has two indicators. For meaning of the indicators, see Table 3-36.
Table 3-36 Description of the two indicators of the RJ-45 connector
Indicator State Meaning
LINK (green) On The link is normal.
Off The link fails.
ACT (yellow) On or blinking The interface is transmitting orreceiving data.
Off The interface is not transmitting orreceiving data.
Label
There is a laser safety class label on the front panel of the EM6F.
The laser safety class label indicates that the laser safety class of the optical interface is CLASS1. That is, the maximum launched optical power of the optical interface is lower than 10 dBm(10 mW).
3.6.5 Valid SlotsThe EM6T/EM6F can be housed in any of slots 1 - 6 in the slot area. The slot priority order isslots 4 and 6 > slots 1 and 2 > slots 3 and 5.
3.6.6 Board Configuration ReferenceYou can use the U2000 to set parameters for the EM6T/EM6F.
You can use the U2000 to set the following parameter for the EM6T/EM6F:
Ethernet interface
The attributes of an Ethernet interface cover the general attributes, Layer 2 attributes, Layer 3attributes, advanced attributes and flow control. To configure an Ethernet interface, configurethe physical parameters, link layer parameters, network layer parameters and flow controlschemes.
3.6.7 Technical SpecificationsThis topic describes the board specifications, including the GE interface performance, FEinterface performance, board mechanical behavior and board power consumption.
Performance of Optical Interfaces
The optical interfaces on the EM6T/EM6F meet the requirements specified in IEEE 802.3. Thefollowing table lists the main specifications for the optical interfaces.
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Table 3-37 Performance of the GE optical interface
Item Performance
Nominal bit rate (kbit/s) 1000
Classification code 1000Base-SX 1000Base-LX
Fiber type Multiple-mode opticalfiber
Single-mode opticalfiber
Transmission distance (km) 0.5 10
Operating wavelength (nm) 770 to 860 1270 to 1355
Mean launched power (dBm) -9.5 to 0 -9 to -3
Receiver minimum sensitivity (dBm) -17 -19
Minimum overload (dBm) 0 -3
Minimum extinction ratio (dB) 9 9
NOTE
The OptiX RTN 950 uses SFP modules for providing GE optical interfaces. You can use different types of SFPmodules to provide GE optical interfaces with different classification codes and transmission distances.
Performance of GE Electrical Interfaces
The GE electrical interfaces on the EM6T/EM6F meet the requirements specified in IEEE 802.3.The following table lists the main specifications for the GE electrical interfaces.
Table 3-38 GE electric interface performance
Item Performance
Nominal bit rate (Mbit/s) 10 (10BASE-T)100 (100BASE-TX)1000 (1000BASE-T)
Code pattern Manchester encoding signal (10BASE-T)MLT-3 encoding signal (100BASE-TX)4D-PAM5 encoding signal (1000BASE-T)
Interface type RJ-45
Performance of FE Electrical Interfaces
The FE electrical interfaces on the EM6T/EM6F meet the requirements specified in IEEE 802.3.The following table lists the main specifications for the FE electrical interfaces.
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Table 3-39 FE electric interface performance
Item Performance
Nominal bit rate (Mbit/s) 10 (10BASE-T)100 (100BASE-TX)
Code pattern Manchester encoding signal (10BASE-T)MLT-3 encoding signal (100BASE-TX)
Interface type RJ-45
Mechanical Behavior
Table 3-40 Mechanical behavior
Item Performance
EM6T EM6F
Dimensions 19.82mm (height) x 196.70 mm (depth) x 193.80 mm (width)
Weight 0.370 kg 0.382 kg
Power ConsumptionPower consumption of EM6T: < 10.4 W
Power consumption of EM6F: < 11.3 W
3.7 EF8TThis section describes the EF8T, which is an interface board with eight FE electrical interfaces,with regard to the version, functions, features, working principle, front panel, valid slots, andtechnical specifications.
3.7.1 Version DescriptionThe functional version of the EF8T is TND1.
3.7.2 Functions and FeaturesThe EF8T mainly accesses 8 x FE electrical signals, and processes the services with theCXPR.
3.7.3 Working Principle and Signal FlowThe EF8T mainly consists of the access and convergence module, control driver module, clockmodule, and power supply module.
3.7.4 Front PanelOn the front panel of the EF8T, there are indicators and interfaces.
3.7.5 Valid Slots
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The EF8T can be housed in any of slots 1 - 6 in the slot area. The slot priority order is slots 4and 6 > slots 1 and 2 > slots 3 and 5.
3.7.6 Board Configuration ReferenceYou can use the U2000 to set parameters for the EF8T.
3.7.7 SpecificationsThe technical specifications of the EF8T include the interface specifications, board dimensions,and weight.
3.7.1 Version DescriptionThe functional version of the EF8T is TND1.
3.7.2 Functions and FeaturesThe EF8T mainly accesses 8 x FE electrical signals, and processes the services with theCXPR.
Table 3-41 lists the functions and features of the EF8T.
Table 3-41 Functions and features of the EF8T
Function and Feature Description
Basic function Supports eight FE electrical interfaces. Accesses 8 x FE electricalsignals, and processes the services with the CXPR.
Supports the inband DCN. By default, the DCN function isenabled at the first four ports. In addition, this function can bedisabled or enabled manually.
Supports the hot swappable function.
Detects the temperature and voltage of the board.
Interface function Type of the loopback at the port PHY-layer inloopMAC-layer outloop
Automatic loopback release at theport
Supported
LAG Intra-board LAG Supported
Inter-board LAG Supported
Clock Synchronous Ethernet Supported
SSM protocol Supported
IEEE 1588V2 protocol Supported
3.7.3 Working Principle and Signal FlowThe EF8T mainly consists of the access and convergence module, control driver module, clockmodule, and power supply module.
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Figure 3-16 shows the block diagram for the functions of the EF8T.
Figure 3-16 Block diagram for the functions of the EF8T
Access and convergence
module
8 x FE electrical signals Service bus
Control driver
module
Management bus
Service bus
Clock module
Power supply module
-48 V/-60 V
1.2 V
3.3 V
Clock signals
Backplane
Clock signals
PIUEach module on the board
Each module on the board-48 V/-60 V
PIU
Clock signals
CXP
CXP
CXP
NOTE
In the block diagram, the CXP on the backplane indicates the system control, cross-connect and protocolprocessing board. For OptiX RTN 950, the CXP indicates the CXPR board.
Access and Convergence ModuleThis module performs the following functions:
l Accesses 8 x FE electrical signals.
l Buffers FE signals to avoid packet loss.
l Provides flow control frames to control the number of packets.
l Processes the IEEE 1588V2 packets.
Control Driver ModuleThis module performs the following functions:
l Detects the system status through the management bus.– Detects any fault of the CXPR.
– Detects the active/standby status of the CXPR.
– Detects whether board is loosened from the slot.
– Detects the voltage and temperature.
l Realizes the hot swappable function of the board.
Clock ModuleThis module performs the following functions:
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l Provides the working clock for each module on the board.
l Supports the synchronous Ethernet and the SSM protocol.
l Supports the IEEE 1588V2 protocol.
Power Supply Module
This module performs the following functions:
l Accesses two -48 V DC or -60 V DC power supplies.
l Supplies 3.3 V and 1.2 V power for the EF8T.
3.7.4 Front PanelOn the front panel of the EF8T, there are indicators and interfaces.
Appearance of the Front Panel
Figure 3-17 shows the appearance of the front panel of the EF8T.
Figure 3-17 Font panel of the EF8T
Indicator
The following indicators are present on the front panel of the EF8T:
l STAT indicator, red, orange or green, which indicates the board working status
l SRV indicator, red, orange or green, which indicates service status
l LINK indicator, green, which indicates the connection status of the port
l ACT indicator, yellow, which indicates the data transceiving status of the port
NOTE
There are eight LINK indicators and eight ACT indicators. One LINK indicator and one ACT indicatorare present above each FE service interface.
For details on meanings of indicators, see 6 Indicators.
Interface
Table 3-42 lists the types and usage of the interfaces on the EF8T.
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Table 3-42 Types and usage of interfaces on the EF8T
Interface on theFront Panel
Interface Type Usage Pin
FE1 - FE8 RJ-45 Input/output interfaces forFE electrical signals
For details, see Table3-43.
Table 3-43 Pins of the RJ-45 connector of the EF8T
Front View Pin Usage
8 7 6 5 4 3 2 1
1 Transmit positive
2 Transmit negative
3 Receive positive
4 Undefined
5 Undefined
6 Receive negative
7 Undefined
8 Undefined
3.7.5 Valid SlotsThe EF8T can be housed in any of slots 1 - 6 in the slot area. The slot priority order is slots 4and 6 > slots 1 and 2 > slots 3 and 5.
3.7.6 Board Configuration ReferenceYou can use the U2000 to set parameters for the EF8T.
You can use the U2000 to set the following parameter for the EF8T:
Ethernet interface
The attributes of an Ethernet interface cover the general attributes, Layer 2 attributes, Layer 3attributes, advanced attributes and flow control. To configure an Ethernet interface, configurethe physical parameters, link layer parameters, network layer parameters and flow controlschemes.
3.7.7 SpecificationsThe technical specifications of the EF8T include the interface specifications, board dimensions,and weight.
Table 3-44 lists the specifications of the electrical interfaces of the EF8T.
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Table 3-44 Specifications of interfaces on the EF8T
Item Specification
FE electrical signal interface rate 100 Mbit/s
RJ-45 electrical interfacespecification
Complies with IEEE 802.3 and enterprise regulations.
Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W)
Weight (kg): 0.53
3.8 EF8FThis section describes the EF8F, which is an interface board with eight FE optical interfaces,with regard to the version, functions, features, working principle, front panel, valid slots, andtechnical specifications.
3.8.1 Version DescriptionThe functional version of the EF8F is TND1.
3.8.2 Functions and FeaturesThe EF8F mainly accesses and processes 8 x FE optical signals, and processes the services withthe CXPR.
3.8.3 Working Principle and Signal FlowThe EF8F mainly consists of the access and convergence module, control driver module, clockmodule, and power supply module.
3.8.4 Front PanelOn the front panel of the EF8F, there are indicators and interfaces.
3.8.5 Valid SlotsThe EF8F can be housed in any of slots 1 - 6 in the slot area. The slot priority order is slots 4and 6 > slots 1 and 2 > slots 3 and 5.
3.8.6 Board Configuration ReferenceYou can use the U2000 to set parameters for the EF8F.
3.8.7 SpecificationsThe technical specifications of the EF8F include the interface specifications, board dimensions,and weight.
3.8.1 Version DescriptionThe functional version of the EF8F is TND1.
3.8.2 Functions and FeaturesThe EF8F mainly accesses and processes 8 x FE optical signals, and processes the services withthe CXPR.
Table 3-45 lists the functions and features of the EF8F.
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Table 3-45 Functions and features of the EF8F
Function and Feature Description
Basic function Supports eight FE optical interfaces.Accesses 8 x FE opticalsignals, and processes the services with the CXPR.
Supports the inband DCN. By default, the DCN function isenabled at the first four ports. In addition, this function canbe disabled or enabled manually.
Supports the hot swappable function.
Detects the temperature and voltage of the board.
Interface function Type of the loopback at theport
PHY-layer inloopMAC-layer outloop
Automatic loopback releaseat the port
Supported
LAG Intra-board LAG Supported
Inter-board LAG Supported
Clock Synchronous Ethernet Supported
SSM protocol Supported
IEEE 1588V2 protocol Supported
3.8.3 Working Principle and Signal FlowThe EF8F mainly consists of the access and convergence module, control driver module, clockmodule, and power supply module.
Figure 3-18 shows the block diagram for the functions of the EF8F.
Figure 3-18 Block diagram for the functions of the EF8F
Access and convergence
module
8 x FE optical signals Service bus
Control driver
module
Management bus
Service bus
Clock module
Power supply module
-48 V/-60 V
1.2 V
3.3 V
Clock signals
Backplane
Clock signals
PIUEach module on the board
Each module on the board -48 V/-60 VPIU
Clock signals
CXP
CXP
CXP
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NOTE
In the block diagram, the CXP on the backplane indicates the system control, cross-connect and protocolprocessing board. For OptiX RTN 950, the CXP indicates the CXPR board.
Access and Convergence ModuleThis module performs the following functions:
l Accesses 8 x FE optical signals.
l Buffers FE signals to avoid packet loss.
l Provides flow control frames to control the number of packets.
l Processes the IEEE 1588V2 packets.
Control Driver ModuleThis module performs the following functions:
l Detects the system status through the management control bus.– Checks whether any fault occurs on the CXPR.
– Checks the active/standby state of the system control board.
– Checks whether the board properly inserted.
– Detects voltage and temperature of the board.
l Realizes the hot swappable function of the board.
Clock ModuleThis module performs the following functions:
l Provides the working clock for each module on the EF8F.
l Supports the synchronous Ethernet and the SSM protocol.
l Supports the IEEE 1588V2 protocol.
Power Supply ModuleThis module performs the following functions:
l Accesses two - 48 V DC or - 60 V DC power supplies.
l Supplies 3.3 V and 1.2 V power for the EF8F.
3.8.4 Front PanelOn the front panel of the EF8F, there are indicators and interfaces.
Appearance of the Front PanelFigure 3-19 shows the appearance of the front panel of the EF8F.
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Figure 3-19 Font panel of the EF8F
Indicators
The following indicators are present on the front panel of the EF8F:
l STAT indicator, red , orange or green, which indicates the board working status
l SRV indicator, red, orange or green, which indicates the service status
l LINK1 to LINK8 indicators, green, which indicate the connection status of the port
For details on meanings of indicators, see 6 Indicators.
Interfaces
Table 3-46 lists the types and usage of the interfaces on the EF8F.
Table 3-46 Interfaces of the EF8F
Interface on the Front Panel Interface Type Usage
IN1 - IN8 LC Input interface for FE opticalsignals
OUT1 - OUT8 LC Output interface for FE opticalsignals
3.8.5 Valid SlotsThe EF8F can be housed in any of slots 1 - 6 in the slot area. The slot priority order is slots 4and 6 > slots 1 and 2 > slots 3 and 5.
3.8.6 Board Configuration ReferenceYou can use the U2000 to set parameters for the EF8F.
You can use the U2000 to set the following parameter for the EF8F:
Ethernet interface
The attributes of an Ethernet interface cover the general attributes, Layer 2 attributes, Layer 3attributes, advanced attributes and flow control. To configure an Ethernet interface, configurethe physical parameters, link layer parameters, network layer parameters and flow controlschemes.
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3.8.7 SpecificationsThe technical specifications of the EF8F include the interface specifications, board dimensions,and weight.
Table 3-47 lists the specifications of the optical interfaces of the EF8F.
Table 3-47 Specifications of the interfaces on the EF8F
Item Specification
Optical interfacetype
Bidirectional two-fiber
100BASE-FX(15 km)
100BASE-FX(40 km)
100BASE-FX(80 km)
Fiber type Single-mode Single-mode Single-mode
Workingwavelength range(nm)
1261 to 1360 1263 to 1360 1480 to 1580
Mean launchedoptical power (dBm)
- 15 to - 8 - 5 to 0 -5 to 0
Receiver sensitivity(dBm)
-28 -34 -34
Min. overhead point(dBm)
-8 -10 -10
Extinction ratio (dB) 8.2 10 10
Optical module code 3406027634060307
3406028134060308
3406028234060309
NOTEFor details of the optical module, see 7.2 Optical Module Labels.
NOTE
For details of the optical module, see 7.2 Optical Module Labels.
Board dimensions (mm): 20.32 (H) x 225.75(D) x 193.80 (W)
Weight (kg): 0.55
3.9 EG2This section describes the EG2, which is an interface board with two GE optical interfaces, withregard to the version, functions, features, working principle, front panel, valid slots, and technicalspecifications.
3.9.1 Version DescriptionThe functional version of the EG2 is TND1.
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3.9.2 Functions and FeaturesThe EG2 mainly accesses 2 x GE optical signals, and processes the services with the CXPR.
3.9.3 Working Principle and Signal FlowThe EG2 mainly consists of the interface conversion module, control driving module, clockmodule, and power supply module.
3.9.4 Front PanelOn the front panel of the EG2, there are indicators and interfaces.
3.9.5 Valid SlotsThe EG2 can be housed in any of slots 1 to 6 in the slot area. The slot priority order is slots 4and 6 > slots 1 and 2 > slots 3 and 5.
3.9.6 Board Configuration ReferenceYou can use the U2000 to set parameters for the EG2.
3.9.7 SpecificationsThe technical specifications of the EG2 include the interface specifications, board dimensions,and weight.
3.9.1 Version DescriptionThe functional version of the EG2 is TND1.
3.9.2 Functions and FeaturesThe EG2 mainly accesses 2 x GE optical signals, and processes the services with the CXPR.
Table 3-48 lists the functions and features of the EG2.
Table 3-48 Functions and Features of the EG2
Function and Feature Description
Basic function Supports two GE optical or electrical interfaces. Accesses 2x GE signals, and processes the services with the CXPR.
Supports the inband DCN. By default, the DCN function isenabled at the two ports. In addition, this function can bedisabled or enabled manually.
Supports the hot swappable function.
Detects the temperature and voltage of the board.
Interface function Type of the loopback at theport
PHY-layer inloop andoutloopMAC-layer outloop
Automatic loopback releaseat the port
Supported
LAG Intra-board LAG Supported
Inter-board LAG Supported
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Function and Feature Description
Clock Synchronous Ethernet Supported by the GE opticalinterface
SSM protocol Supported
IEEE 1588V2 protocol Supported by the GE opticalinterface
3.9.3 Working Principle and Signal FlowThe EG2 mainly consists of the interface conversion module, control driving module, clockmodule, and power supply module.
Figure 3-20 shows the block diagram for the functions of the EG2.
Figure 3-20 Block diagram for the functions of the EG2
Interface conversion
module
2 x GE signals Service bus Control driver
module
Management bus
Service bus
Clock module
Power supply module
-48 V/-60 V
1.2 V
3.3 V
Clock signals
Backplane
Clock signals
PIUEach module on the board
Each module on the board
CXP
-48 V/-60 VPIU
Clock signals
CXP
CXP
NOTE
In the block diagram, the CXP on the backplane indicates the system control, cross-connect and protocolprocessing board. For OptiX RTN 950, the CXP indicates the CXPR board.
Interface Conversion Module
This module performs the following functions:
l Transparently transmits 2 x GE services in two directions.
l Supports ESFP optical interfaces and GE colored optical interfaces. Select a proper opticalinterface for single-mode or multi-mode transmission over a specified distance.
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Control Driving ModuleThis module performs the following functions:
l Detects the system status through the management bus.– Detects any fault of the CXPR.
– Detects the active/standby status of the CXPR.
– Detects whether board is loosened from the slot.
– Detects the voltage and temperature.
l Realizes the hot swappable function of the board.
Clock moduleThis module performs the following functions:
l Provides the working clock for each module on the EG2.
l Supports the synchronous Ethernet and the SSM protocol.
l Supports the IEEE 1588V2 protocol.
Power Supply ModuleThis module performs the following functions:
l Accesses two -48 V DC or -60 V DC power supplies.
l Supplies 3.3 V or 1.2 V power for each module on the EG2.
3.9.4 Front PanelOn the front panel of the EG2, there are indicators and interfaces.
Appearance of the Front PanelFigure 3-21 shows the appearance of the front panel of the EG2.
Figure 3-21 Font panel of the EG2
IndicatorsThe following indicators are present on the front panel of the EG2.
l STAT indicator, red, orange or green, which indicates the board status
l SRV indicator, red, orange or green, which indicates the service status
l LINK1 to LINK2 indicators, green, which indicate the connection status of the port
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l ACT1 to ACT2 indicators, yellow, which indicate the data transceiving status of the port
For details on meanings of indicators, see 6 Indicators.
Interfaces
Table 3-49 list the types and usage of the interfaces on the EG2.
Table 3-49 Types and usage of optical interfaces on the EG2
Interface on theFront Panel
Interface Type Usage
IN1 - IN2 LC Input interface for the GE optical signals
OUT1 - OUT2 LC Output interface for the GE optical signals
3.9.5 Valid SlotsThe EG2 can be housed in any of slots 1 to 6 in the slot area. The slot priority order is slots 4and 6 > slots 1 and 2 > slots 3 and 5.
NOTE
When housed in any of slot 3 to 6, the second port of the EG2 is not available.
3.9.6 Board Configuration ReferenceYou can use the U2000 to set parameters for the EG2.
You can use the U2000 to set the following parameter for the EG2:
Ethernet interface
The attributes of an Ethernet interface cover the general attributes, Layer 2 attributes, Layer 3attributes, advanced attributes and flow control. To configure an Ethernet interface, configurethe physical parameters, link layer parameters, network layer parameters and flow controlschemes.
3.9.7 SpecificationsThe technical specifications of the EG2 include the interface specifications, board dimensions,and weight.
Table 3-50 list the specifications of the interfaces on the EG2.
Table 3-50 Specifications of the optical interfaces on the EG2
Item Specification
Opticalinterface type
Bidirectional two-fiber
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Item Specification
1000BASE-SX(0.5 km)
1000BASE-LX(10 km)
1000BASE-VX(40 km)
1000BASE-ZX(80 km)
1000BASE-CWDM(80 km)
Fiber type Multi-mode Single-mode Single-mode Single-mode Single-mode
Workingwavelengthrange (nm)
770 to 860 1270 to 1360 1270 to 1360 1500 to 1580 For detailsonwavelengthallocation,see Table3-51.
Meanlaunchedoptical power(dBm)
-9.5 to 0 -11 to -3 - 5 to 0 -2 to 5 0 to 5
Receiversensitivity(dBm)
-17 -19 -22 -22 -28
Min. overheadpoint (dBm)
0 -3 -3 -3 -9
Extinctionratio (dB)
9 9 9 9 8.2
Opticalmodule code
34060286 3406047334060290
34060298 3406036034060324
For details,see Table3-51.
NOTEFor details of the optical module, see 7.2 Optical Module Labels.
NOTE
For details of the optical module, see 7.2 Optical Module Labels.
Table 3-51 Allocation of central wavelengths of 1000BASE-CWDM interfaces and relatedoptical module code
SN Opticalmodule code
Wavelength(nm)
SN Opticalmodule code
Wavelength (nm)
1 34060483 1464.5 to1477.5
5 34060478 1544.5 to 1557.5
2 34060481 1484.5 to1497.5
6 34060476 1564.5 to 1577.5
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SN Opticalmodule code
Wavelength(nm)
SN Opticalmodule code
Wavelength (nm)
3 34060479 1504.5 to1517.5
7 34060477 1584.5 to 1597.5
4 34060482 1524.5 to1537.5
8 34060480 1604.5 to 1617.5
Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W)
Weight (kg): 0.52
3.10 ML1/ML1AThis section describes the ML1/ML1A, which is a 16 x E1 electrical interface board, with regardto the version, functions, features, working principle, front panel, valid slots, and technicalspecifications.
NOTE
The ML1 and ML1A have the same functions and features except for the matched impedance (ML1: 75ohms E1; ML1A: 120 ohms E1). In this document, the ML1 represents the ML1 and ML1A, unlessotherwise specified.
3.10.1 Version DescriptionThe functional version of the ML1 is TND1.
3.10.2 Functions and FeaturesThe ML1 is a 75-ohm E1 board and the ML1A is a 120-ohm E1 board. The ML1 can access amaximum of 16 x E1 signals, supports flexible configuration of different services on each port,and is hot swappable.
3.10.3 Working Principle and Signal FlowThe ML1 mainly consists of the control module, line-side processing module, system-sideprocessing module, backplane interface module, clock module, and power supply module.
3.10.4 Front PanelOn the front panel of the ML1, there are indicators and interfaces.
3.10.5 Valid SlotsThe ML1 can be housed in any of slots 1 - 6. The slot priority order is slots 4 and 6 > slots 1 and2 > slots 3 and 5.
3.10.6 Board Configuration ReferenceYou can use the U2000 to set parameters for the ML1.
3.10.7 SpecificationsThe technical specifications of the ML1/ML1A include the interface specifications, dimensions,and weight.
3.10.1 Version DescriptionThe functional version of the ML1 is TND1.
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3.10.2 Functions and FeaturesThe ML1 is a 75-ohm E1 board and the ML1A is a 120-ohm E1 board. The ML1 can access amaximum of 16 x E1 signals, supports flexible configuration of different services on each port,and is hot swappable.
Table 3-52 lists functions and features of the ML1.
Table 3-52 Functions and features of the ML1
Function and Feature Remarks
Basic functions Accesses and processes 16xE1 signals and supports the IMA,CES, and ML-PPP protocols.
Supports the in-band DCN. By default, the DCN function isenabled at the first and the sixteenth E1 ports. In addition, thisfunction can be disabled or enabled manually.
Fractional E1 Supports the CES services and IMA services at 64 kbit/s level.
ATM/IMA Number of supported IMAgroups/supported ATM E1 services
8
Maximum number of E1linksin each IMA group
16
Dynamically enables or disables the IMA group, restarts theIMA group protocol, and dynamically adds or deletes theIMA group members.
Supported traffic types CBRUBRUBR+rt-VBRnrt-VBR
Encapsulates ATM VPC/VCC service to the PWE3 in the N-to-1 (N≤16) or 1-to-1 format.
Encapsulates the ATM cells to the PW in the concatenationand non-concatenation modes. The number of PWconnections that support the cell concatenation is 64, and themaximum number of concatenated cells is 31.
ATM OAM on the UNI side Supports the CC test.
Supports the LB test.
CES Number of supported CESservices
32
Supported emulation mode CESoPSNSAToP
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Function and Feature Remarks
Supports the timeslot compression function. Provides the idle64 kbit/s timeslot suppression function for the CES servicesin the CESoPSN mode to save the transmission bandwidth.
Supported clock modes Retiming mode
The jitter buffer time of the CES service can be set. The jitterbuffer time ranges from 0.375 ms to 16 ms, and the step valueis 0.125 ms.
The encapsulation buffer time of the CES service can be set.The encapsulation buffer time ranges from 0.125 ms to 5 ms,and the step value is 0.125 ms.
ML-PPP Number of supported ML-PPP groups
7
Maximum number of linkssupported by each ML-PPPgroup
16
Functions as the NNI interface.
3.10.3 Working Principle and Signal FlowThe ML1 mainly consists of the control module, line-side processing module, system-sideprocessing module, backplane interface module, clock module, and power supply module.
Figure 3-22shows the block diagram for the working principle of the ML1.
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Figure 3-22 Block diagram for the working principle of the ML1
Backplane
Backplane interface module
System-side processing module
Service bus
Serial management bus
-48 V/-60 V
-48 V/-60 V
1.2 V
1.26 V2.5 VTo each module
16 x E1 signals Line-side processing
module
3.3 V
Clock signals
Power supply module
Clock module
Control module
Clock signals
Management bus
3.3 V
CXP
CXP
CXPTo each module
Service bus
Service bus
Management bus
NOTE
In the block diagram, the CXP on the backplane indicates the system control, cross-connect and protocolprocessing board. For OptiX RTN 950, the CXP indicates the CXPR board.
In Transmit DirectionThe ML1 first distributes the signals in Ethernet packets from the backplane to different protocolprocessing chips according to the service types. The system-side processing module decapsulatesthe concatenated services and buffers the services in queues. Then, this module schedules theegress queues according to the service types, processes and converts the services, and finallysends the services to the line-side processing module. The line-side processing module performscoding, dejitter, pulse shaping, and line driving for the services, and finally sends the servicesto E1 interfaces.
In Receive DirectionThe line processing module performs impedance match, signal equalization, signal levelconversion, clock data recovery, dejitter, and decoding for the accessed E1 signals. Then, thesignals are sent into the system-side processing module, which frames the signals, encapsulatesthe IMA, CES, and ML-PPP services in PWE3, and schedules PWs. Finally, this module sendsthe signals in Ethernet packets to the backplane interface module.
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Line-Side Processing ModuleIn the receive channel, this module performs impedance match, signal equalization, electricallevel conversion, clock data recovery, dejitter, and decoding to signals. In the transmit channel,this module performs encoding, dejitter, pulse shaping, and line driving to signals.
System-Side Processing ModuleThis module frames 16 x E1 signals, runs the CES, IMA, and ML-PPP protocols, and performsPWE3 encapsulation.
Backplane Interface ModuleThe service bus receives or transmits service signals.
Control ModuleThis module controls the reading and writing on the chip, resets the chip, and detects faults inthe chip.When used with the CXPR, this module controls the board.
Clock ModuleThis module provides various clock signals for the board to operate normally, detects clocks,and selects the line recovery clock.
Power Supply ModuleThis module converts the -48 V DC/-60 V DC voltage to DC voltages required by each moduleon the board. In addition, this module supplies 3.3 V power to the ML1 through the backplane.
3.10.4 Front PanelOn the front panel of the ML1, there are indicators and interfaces.
Appearance of the Front PanelFigure 3-23 shows the appearance of the front panel of the ML1.
Figure 3-23 Front panel of the ML1
Figure 3-24 shows the appearance of the front panel of the ML1A.
Figure 3-24 Front panel of the ML1A
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Indicators
The following indicators are present on the front panel of the ML1:
l STAT indicator, red , orange or green, which indicates the board working status
l SRV indicator, red, orange, or green, which indicates the service status
Interfaces
There is one Anea 96 interface on the front panel of the ML1. Table 3-53 lists the type and usageof the interface.
Table 3-53 Type and usage of the interface on the front panel of the ML1
Interface on the FrontPanel
Interface Type Usage
1 - 16 Anea 96 Receives and transmits E1signals from channels 1 - 16.
Table 3-54 lists the pins of the Anea 96 interface.
Table 3-54 Pins of the Anea 96 interface
Front View Connector Pin Usage Connector Pin Usage
1 Rx1 25 Tx1
2 26
3 Rx2 27 Tx2
4 28
5 Rx3 29 Tx3
6 30
7 Rx4 31 Tx4
8 32
9 Rx5 33 Tx5
10 34
11 Rx6 35 Tx6
12 36
13 Rx7 37 Tx7
14 38
15 Rx8 39 Tx8
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Front View Connector Pin Usage Connector Pin Usage
16 40
17 Rx9 41 Tx9
18 42
19 Rx10 43 Tx10
20 44
21 Rx11 45 Tx11
22 46
23 Rx12 47 Tx12
24 48
49 Rx13 73 Tx13
50 74
51 Rx14 75 Tx14
52 76
53 Rx15 77 Tx15
54 78
55 Rx16 79 Tx16
56 80
3.10.5 Valid SlotsThe ML1 can be housed in any of slots 1 - 6. The slot priority order is slots 4 and 6 > slots 1 and2 > slots 3 and 5.
3.10.6 Board Configuration ReferenceYou can use the U2000 to set parameters for the ML1.
You can use the U2000 to set the following parameters for the ML1:
E1 interface
To configure the E1 interface, set the general attributes, Layer 3 attributes, and advancedattributes of the E1 interface. In details, set the physical parameters, network-layer parameters,signal frame format, clock mode, and loopback mode for the E1 interface.
3.10.7 SpecificationsThe technical specifications of the ML1/ML1A include the interface specifications, dimensions,and weight.
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Table 3-55 lists the specifications of the interfaces on the ML1/ML1A.
Table 3-55 Specifications of the interfaces on the ML1/ML1A
Item Specification Requirement
Nominal bit rate (kbit/s) 2048
Interface impedance 75 ohms (ML1)120 ohms (ML1A)
Interface code HDB3
Pulse waveform at the outputinterface
Complies with ITU-T G.703
Attenuation of the input interfaceat the point with a frequency of1024 kHz (dB)
0 to 6
Anti-interference capability of theinput interface
Complies with ITU-T G.703
Input jitter tolerance Complies with ITU-T G.823
Output jitter Complies with ITU-T G.823
Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W)
Weight (kg): 0.56
3.11 PIUThis section describes the PIU, a power input unit, in terms of the version, functions, features,working principle, front panel, valid slots, and technical specifications.
3.11.1 Version DescriptionThe functional version of the PIU is TND1.
3.11.2 Functions and FeaturesThe PIU, a power access board, supports the functions and features such as power access, powerprotection, lightning protection detection, and information reporting.
3.11.3 Working Principle and Signal FlowThe PIU mainly consists of the lighting protection and failure detection module, communicationunit module, slot ID module, and board in-position module.
3.11.4 Front PanelOn the front panel of the PIU, there are indicators, power supply interfaces, and a label.
3.11.5 Valid SlotsThe PIU can be housed in slot 9 or slot 10 in the chassis.
3.11.6 Specifications
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The technical specifications of the PIU cover the board dimensions, weight, power consumption,and input voltage.
3.11.1 Version DescriptionThe functional version of the PIU is TND1.
3.11.2 Functions and FeaturesThe PIU, a power access board, supports the functions and features such as power access, powerprotection, lightning protection detection, and information reporting.
Table 3-56 lists functions and features of the PIU.
Table 3-56 Functions and features of the PIU
Function and Feature Description
Power access Each of the two PIU accesses one -48 V DC (or -60 V DC) powersupply for the equipment.
Power protection The PIU protects the power supply against overcurrent and shortcircuit. In this way, the overcurrent is prevented from shockingboards and components on them.
Lightning protection The PIU protects the equipment against lightning and reports analarm if the protection fails.
Power backup Tow PIU can achieve 1+1 hot backup. One PIU is capable ofsupplying power for the entire chassis.
3.11.3 Working Principle and Signal FlowThe PIU mainly consists of the lighting protection and failure detection module, communicationunit module, slot ID module, and board in-position module.
Figure 3-25 shows the block diagram for the working principle of the PIU.
Figure 3-25 Block diagram for the working principle of the PIU
Communication unit module
Backplane
Inter-board communication bus
Slot ID module
Lightning protection and failure detection module
-48 V/-60 V
Board in-position signalsBoard in-position
module
Slot ID signals
CXP
CXP
CXP
Each boardLightning protection failure alarm
signals
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NOTE
In the block diagram, the CXP on the backplane indicates the system control, cross-connect and protocolprocessing board. For OptiX RTN 950, the CXP indicates the CXPR board.
Lighting Protection and Failure Detection Module
This module protects the equipment against lightning and detects the failure of the anti-lightningcircuit. If the lightning protection fails, the PIU reports the alarm signals to the CXPR.
Communication Unit Module
This module has the function of reporting the board manufacturing information, PCB versioninformation, and alarm signals about the lightning protection failure.
Slot ID Module
This module reports the slot ID information to the CXPR.
Board In-Position Module
This module reports the board in-position signals to the CXPR.
3.11.4 Front PanelOn the front panel of the PIU, there are indicators, power supply interfaces, and a label.
Appearance of the Front Panel
Figure 3-26 shows the appearance of the front panel of the PIU.
Figure 3-26 Appearance of the front panel of the PIU
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IndicatorsThe following indicator is present on the front panel of the PIU.
PWR, green, which indicates the power supply status. When PWR is on and green, it indicatesthat power is accessed.
For details on indications of indicators, see 6 Indicators.
InterfacesThe PIU accesses one power supply. Table 3-57 lists the types of the interfaces on the PIU andtheir respective usage.
Table 3-57 Types and usage of the interfaces on the PIU
Interfaceon theFrontPanel
Interface Type Usage
NEG(-) -48 V power inputinterface
Inputs -48 V power.
RTN(+) BGND power inputinterface
Inputs BGND power.
LabelOperation warning label: indicates the following precaution, which should be taken for removalor insertion of the PIU board.
CAUTIONMultiple power supplies are accessed for the equipment. When powering off the equipment,make sure that these power supplies are disabled. Before removing or inserting a PIU board,make sure that all the power inputs are disabled.Do not remove or insert the board with power on.
3.11.5 Valid SlotsThe PIU can be housed in slot 9 or slot 10 in the chassis.
3.11.6 SpecificationsThe technical specifications of the PIU cover the board dimensions, weight, power consumption,and input voltage.
Table 3-58 lists the technical specifications of the PIU.
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Table 3-58 Technical specifications of the PIU
Item Technical Specification
Board dimensions (mm) 41.4 (H) x 229.9 (D) x 21.0 (W)
Weight (kg) 0.12
Input voltage (V) -38.4 to -72.0
3.12 FANThis section describes the FAN, a fan board, in terms of the version, functions, features, workingprinciple, front panel, valid slots, and technical specifications.
3.12.1 Version DescriptionThe functional version of the FAN is TND1.
3.12.2 Functions and FeaturesThe FAN is used to adjust the fan rotating speed, detect and report status of fans.
3.12.3 Working Principle and Signal FlowThe FAN mainly consists of the combiner/start-delay module, filter module, communicationunit module, intelligent fan speed adjustment module, and board in-position module.
3.12.4 Front PanelOn the front panel of the FAN, there are indicators, anti-static wrist strap jack, handle, and labels.
3.12.5 Valid SlotsThe FAN can be housed in slot 11 in the chassis.
3.12.6 SpecificationsThe technical specifications of the FAN cover the board dimensions, weight, powerconsumption, and input voltage.
3.12.1 Version DescriptionThe functional version of the FAN is TND1.
3.12.2 Functions and FeaturesThe FAN is used to adjust the fan rotating speed, detect and report status of fans.
The functions and features of the FAN are as follows:
l Accesses two 12 V power supplies for driving six fans that each consumes 6 W power.
l Provides start-delay for the power supply of the fans, protects fans against overcurrent, andfilters the lower frequency.
l Intelligently adjusts the rotating speed of fans to ensure proper heat dissipation of thesystem.
l Reports information about the fan rotating speed, environment temperature, alarms, versionnumber, and board in-position information.
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l Provides alarm indicators.
3.12.3 Working Principle and Signal FlowThe FAN mainly consists of the combiner/start-delay module, filter module, communicationunit module, intelligent fan speed adjustment module, and board in-position module.
Figure 3-27 shows the block diagram for the working principle of the FAN.
Figure 3-27 Block diagram for the working principle of the FAN
Fans x 6
12 V power shut signals
12 V
Inter-board communication bus
Board in-positionmodule
PWM signals
Communication unitmodule
CXP
Fan rotating speed signals
Fan in-position signals
12 V
12 V
12 V
Filter module
CXP
CXP
CXP
CXP
Combiner/soft-start module
CombinerStart-delay
12 V
CXP
Intelligent fan speedadjustment module
PWM drivermodule
Fan speedreporting module
NOTE
In the block diagram, the CXP on the backplane indicates the system control, cross-connect and protocolprocessing board. For OptiX RTN 950, the CXP indicates the CXPR board.
Start-delay/Combiner ModuleThis module provides start delay to the combined two 12 V power supplies and protecting fansagainst overcurrent.
Filter ModuleThis module filters the LC low frequency to enhance the EMC feature of the system.
Communication Unit ModuleThis module reports the board manufacturing information, PCB version, and environmenttemperature information. In addition, this module provides 12 V power shut signals to the start-delay module.
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Intelligent Fan Speed Adjustment ModuleThis module reports information about the fan rotating speed to the CXPR and adjusts the fanrotating speed according to the six pulse-width modulation (PWM) signals received from theCXPR. The PWM signal of one fan is isolated from that of another.
Board In-Position ModuleThis module reports the board in-position signals to the CXPR.
3.12.4 Front PanelOn the front panel of the FAN, there are indicators, anti-static wrist strap jack, handle, and labels.
Appearance of the Front PanelFigure 3-28 shows the appearance of the front panel of the FAN.
Figure 3-28 Appearance of the front panel of the FAN
IndicatorsThe following indicators are present on the front panel of the FAN:
l FAN indicator, red or green, which indicates status of fans.
l CRIT indicator, red, which indicates critical alarms.
l MAJ indicator, orange, which indicates major alarms.
l MIN indicator, yellow, which indicates minor alarms.
The CRIT, MAJ, and MIN indicators on the front panel of the FAN indicate the current alarmseverity of the subrack.
For details on indications of indicators, see 6 Indicators.
Anti-Static Wrist Strap JackThe anti-static wrist strap should be connected to this jack for proper grounding of the humanbody.
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HandleThe handle is used for pushing the FAN into or pulling the FAN out of the chassis during boardreplacement.
LabelThe following labels are present on the front panel of the FAN:
l ESD protection label, which indicates that the equipment is static-sensitive.
l Fan warning label, which says that do not touch the fan leaves before the fan stops rotating.
3.12.5 Valid SlotsThe FAN can be housed in slot 11 in the chassis.
3.12.6 SpecificationsThe technical specifications of the FAN cover the board dimensions, weight, powerconsumption, and input voltage.
Table 3-59 lists the technical specifications of the FAN.
Table 3-59 Technical specifications of the FAN
Item Technical Specification
Board dimensions (mm) 86.2 (H) x 217.6 (D) x 28.5 (W)
Weight (kg) 0.302
Working voltage (V) 12 V DC power
3.13 AUXQThis section describes the AUXQ, which is an auxiliary interface and 4 x FE electrical interfaceboard, with regard to the version, functions and features, working principle, front panel, validslots, and technical specifications.
3.13.1 Version DescriptionThe functional version of the AUXQ is TND1.
3.13.2 Functions and FeaturesThe AUXQ processes services and clocks, and provides auxiliary interfaces.
3.13.3 Working Principle and Signal FlowThe AUXQ mainly consists of the service access module, auxiliary interface module, controldriver module, clock module, and power supply module.
3.13.4 Front PanelOn the front panel of the AUXQ, there are indicators and interfaces.
3.13.5 Valid Slots
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The AUXQ can be housed in any of slots 1 - 6 in the slot area.
3.13.6 Board Configuration ReferenceYou can use the U2000 to set parameters for the AUXQ.
3.13.7 SpecificationsThe technical specifications of the AUXQ include the interface specifications, board dimensions,and weight.
3.13.1 Version DescriptionThe functional version of the AUXQ is TND1.
3.13.2 Functions and FeaturesThe AUXQ processes services and clocks, and provides auxiliary interfaces.
Table 3-60 lists the functions and features of the AUXQ.
Table 3-60 Functions and Features of the AUXQ
Function and Feature Description
Basic function Supports four FE electrical interfaces, and accesses 4 x FEelectrical signals.
Supports the inband DCN. By default, the DCN function isenabled at the four ports. In addition, this function can be disabledor enabled manually.
Supports the hot swappable function.
Detects the temperature and voltage of the board.
Auxiliary interfacefunction
Provides one 64 kbit/s synchronous data port, which is compliantwith ITU-T G.703, is used to transparently transmit other NMdata.Provides one orderwire interface.Provides one alarm input interface and one alarm outputinterface. Supports four channels of alarm input, two channels ofalarm output, and two channels of alarm concatenation.
Interface function Type of the loopback at the port PHY-layer inloopMAC-layer outloop
Automatic loopback release at theport
Supported
LAG Intra-board LAG Supported
Inter-board LAG Supported
Clock Synchronous Ethernet Supported
SSM protocol Supported
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Function and Feature Description
IEEE 1588V2 protocol Supported
3.13.3 Working Principle and Signal FlowThe AUXQ mainly consists of the service access module, auxiliary interface module, controldriver module, clock module, and power supply module.
Figure 3-29 shows the block diagram for the functions of the AUXQ.
Figure 3-29 Block diagram for the functions of the AUXQ
Auxiliaryinterfacemodule
Serviceaccessmodule
Servicebus
Controldriver
module
Backplane
CXP
CXP
Clockmodule
Clock signalsCXP
Powersupplymdoule
-48V/-60V
1.2V
3.3VPIUTo each module
To each module-48V/-60V
PIU5VTo each module
Clock signals
Clock signals
4 x FE electrical signals
1-channel synchronous service signals
1-channel orderwire signals
2-channel alarm cascade signals and2-channel alarm output signals
4-channel alarm input signals
Transparent servicesignals
Orderwire signals
Alarm output signals
Alarm inputsignals
Management bus
Service bus
NOTE
In the block diagram, the CXP on the backplane indicates the system control, cross-connect and protocolprocessing board. For OptiX RTN 950, the CXP indicates the CXPR board.
Service Access and Processing ModuleThis module performs the following functions:
l Accesses 4 x FE electrical signals.
l Provides physical-layer interfaces, supports medium access control (MAC)communication.
l Buffers FE signals to avoid packet loss.
l Provides flow control frames to control the number of packets.
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l Processes the IEEE 1588V2 packets.
Auxiliary Interface Module
This module performs the following functions:
l Provides one 64 kbit/s G.703-compliant synchronous data interface .
l Provides one orderwire interface.
l Provides two channels of alarm concatenation and two channels of alarm output.
l Provides four channels of alarm input.
Control Driver Module
This module performs the following functions:
l Detects the system status through the management bus.
– Detects any fault of the CXPR.
– Detects the active/standby status of the CXPR.
– Detects whether board is loosened from the slot.
– Detects the voltage and temperature.
l Processes the alarm signals, orderwire signals, and transparent data signals.
l Realizes the hot swappable function of the board.
Clock Module
This module performs the following functions:
l Provides the working clock to the service access and processing module.
l Provides the working clock to the auxiliary interface module.
l Supports the synchronous Ethernet and the SSM protocol.
l Supports the IEEE 1588V2 protocol.
Power Supply Module
This module performs the following functions:
l Accesses two -48 V DC or -60 V DC power supplies.
l Supplies 1.2 V, 3.3 V, and 5 V power for each module on the board.
3.13.4 Front PanelOn the front panel of the AUXQ, there are indicators and interfaces.
Appearance of the Front Panel
Figure 3-30 shows the appearance of the front panel of the AUXQ.
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Figure 3-30 Front panel of the AUXQ
Indicators
The following indicators are present on the front panel of the AUXQ:l STAT indicator, red, orange, or green, which indicates the board status
l SRV indicator, red, orange or green, which indicates service status
l LINK indicator, green, which indicates the connection status of the port
l ACT indicator, yellow, which indicates the data transceiving status of the port
NOTE
There are eight LINK indicators and eight ACT indicators. One LINK indicator and one ACT indicatorare present above each interface. The four LINK indicators and four ACT indicators above the F1, PHONE,ALMI, and ALMO interfaces, however, are not used.
For details on meanings of indicators, see 6 Indicators.
Interfaces
Table 3-61 lists the types and usage of the interfaces on the AUXQ.
Table 3-61 Types and usage of the interfaces on the AUXQ
Interface onthe FrontPanel
InterfaceType
Usage Pin
FE1 - FE4 RJ-45 Input/output interface forFE electrical signals
-
PHONE RJ-45 Orderwire interface For details, see Table 3-62.
F1 RJ-45 64 kbit/s synchronousdata interface
For details, see Table 3-63.
ALMI RJ-45 Four-channel alarm inputinterface
For details, see Table 3-64.
ALMO RJ-45 Two-channel alarmoutput interface, two-channel alarmconcatenation interface
For details, see Table 3-65.
Table 3-62 lists the pins of the PHONE interface.
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Table 3-62 Pins of the PHONE interface
Front View Pin Usage
8 7 6 5 4 3 2 1
1 - 3 Undefined
4 RING
5 TIP
6 - 8 Undefined
Table 3-63 lists the pins of the F1 interface.
Table 3-63 Pins of the F1 interface
Front View Pin Usage
8 7 6 5 4 3 2 1
1 Undefined
2 Undefined
3 Undefined
4 Transmit positive of the 64 kbit/ssynchronous data interface
5 Transmit negative of the 64 kbit/ssynchronous data interface
6 Undefined
7 Receive positive of the 64 kbit/ssynchronous data interface
8 Receive negative of the 64 kbit/ssynchronous data interface
Table 3-64 lists the pins of the ALMI interface.
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Table 3-64 Pins of the ALMI interface
Front View Pin Usage
8 7 6 5 4 3 2 1
1 Alarm input signal 1
2 Ground for alarm input signal 1
3 Alarm input signal 2
4 Alarm input signal 3
5 Ground for alarm input signal 3
6 Ground for alarm input signal 2
7 Alarm input signal 4
8 Ground for alarm input signal 4
Table 3-65 lists the pins of the ALMO interface.
Table 3-65 Pins of the ALMO interface
Front View Pin Usage
8 7 6 5 4 3 2 1
1 Positive for alarm output signal 1
2 Negative for alarm output signal 1
3 Positive for alarm output signal 2
4 Positive for alarm concatenationsignal 1
5 Negative for alarm concatenationsignal 1
6 Negative for alarm output signal 2
7 Positive for alarm concatenationsignal 2
8 Negative for alarm concatenationsignal 2
3.13.5 Valid SlotsThe AUXQ can be housed in any of slots 1 - 6 in the slot area.
NOTE
On one NE, only one AUXQ board can be housed.
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3.13.6 Board Configuration ReferenceYou can use the U2000 to set parameters for the AUXQ.
You can use the U2000 to set the following parameter for the AUXQ:
Ethernet interface
The attributes of an Ethernet interface cover the general attributes, Layer 2 attributes, Layer 3attributes, advanced attributes and flow control. To configure an Ethernet interface, configurethe physical parameters, link layer parameters, network layer parameters and flow controlschemes.
3.13.7 SpecificationsThe technical specifications of the AUXQ include the interface specifications, board dimensions,and weight.
Technical SpecificationsTable 3-66 lists the technical specifications of the FE1 - FE4 on the AUXQ.
Table 3-66 Technical specifications of the FE1 - FE4
Item Specification
Electrical interface rate 100 Mbit/s
RJ-45 electrical interfacespecification
The specifications of the RJ-45 electrical interfacecomply with the following regulations:l IEEE 802.3 and enterprise regulations
Transmit jitter Less than 1.4 ns (peak-peak)
Other SpecificationsOther specifications of the AUXQ are as follows:
l Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W)
l Weight (kg): 0.55
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4 Cables
About This Chapter
This topic describes the purpose, appearance, and pin assignment information of various cablesof the IDU 950.
4.1 Power CableThe power cable connects the PIU board in the IDU to the power supply device (for example,the PDU on top of the cabinet), thus conducting the -48 V power to the IDU.
4.2 IDU PGND CableThe IDU PGND cable connects the left ground point of the IDU to the ground point of theexternal equipment (for example, the ground support of a cabinet) so that the IDU and theexternal equipment share the same ground.
4.3 Fiber JumperThe fiber jumper transmits optical signals. One end of the fiber jumper is terminated with anLC/PC connector and is connected to the STM-1 optical interface or FE/GE optical interface onthe OptiX RTN 950. The connector with which the other end of the fiber jumper is terminateddepends on the type of the optical interface on the equipment to be connected.
4.4 IF JumperThe IF jumper connects the IDU and IF cable. The IF jumper is used with the IF cable to transmitthe IF signal, O&M signal, and -48 V power between the ODU and the IDU.
4.5 XPIC CableThe XPIC cable is used to transmit the reference IF signal between the two IFX2 boards of theXPIC working group to realize the XPIC function.
4.6 E1 CableThe E1 cable to the external equipment is used when the IDU needs to receive E1 signals directlyfrom or transmit E1 signals directly to the external equipment. At one end of the E1 cable, theAnea96 connector is used to connect the E1 electrical interface on the board; the other end isconnected to the external equipment. Make the connector as required on site.
4.7 Network CableThe network cable connects two pieces of Ethernet equipment. Both ends of the network cableare terminated with RJ-45 connectors.
4.8 Orderwire Cable
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The orderwire cable connects the orderwire phone to the equipment. Both ends of the orderwirecable are terminated with RJ-11 connectors. One end of the orderwire cable is connected to thePHONE interface on the AUXQ. The other end of the orderwire cable is connected to theinterface of the orderwire phone.
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4.1 Power CableThe power cable connects the PIU board in the IDU to the power supply device (for example,the PDU on top of the cabinet), thus conducting the -48 V power to the IDU.
Cable Diagram
Figure 4-1 Power cable
Table 4-1 Specifications of the power cable
Model Cable Terminal
6 mm2 powercable andterminal
Power Cable, 450 V/750 V, H07Z-K-6mm2, Blue/Black,Low Smoke ZeroHalogen Cable
Common Terminal, Single Cord End Terminal,Conductor Cross Section 6 mm2, 30 A, InsertionDepth 12 mm, Blue
NOTE
In the case of the OptiX RTN 950, the power cable whose conductor line has a sectional area of 6 mm2 canextend for a maximum distance of 43 m.
4.2 IDU PGND CableThe IDU PGND cable connects the left ground point of the IDU to the ground point of theexternal equipment (for example, the ground support of a cabinet) so that the IDU and theexternal equipment share the same ground.
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Cable Diagram
Figure 4-2 Appearance of IDU PGND cable
Table 4-2 Technical specifications of the power cable and protection grounding cable
Item Wire Related Parameter Terminal Related Parameter
Protectiongroundingcable
Electronic/Electric wire, 450 V/750 V, H07Z, K, 2.5 mm2,yellow green, fire resistant cablewith low smoke and no halogen
General terminal, OT, 6 mm2, M6, tinplating, pre-insulated ring terminal,12-10AWG, yellow
Pin Assignment
None.
4.3 Fiber JumperThe fiber jumper transmits optical signals. One end of the fiber jumper is terminated with anLC/PC connector and is connected to the STM-1 optical interface or FE/GE optical interface onthe OptiX RTN 950. The connector with which the other end of the fiber jumper is terminateddepends on the type of the optical interface on the equipment to be connected.
Types of Fiber Jumpers
Table 4-3 Types of fiber jumpers
Connector 1 Connector 2 Cable
LC/PC FC/PC 2 mm single-mode fiber
2 mm multi-mode fiber
LC/PC SC/PC 2 mm single-mode fiber
2 mm multi-mode fiber
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Connector 1 Connector 2 Cable
LC/PC LC/PC 2 mm single-mode fiber
2 mm multi-mode fiber
NOTE
In the case of the OptiX RTN 950, multi-mode fibers are required to connect to the 1000Base-SX GE opticalinterfaces.
Fiber ConnectorsThe following figures show three common types of fiber connectors, namely, LC/PC connector,SC/PC connector, and FC/PC connector.
Figure 4-3 LC/PC connector
Figure 4-4 SC/PC connector
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Figure 4-5 FC/PC connector
4.4 IF JumperThe IF jumper connects the IDU and IF cable. The IF jumper is used with the IF cable to transmitthe IF signal, O&M signal, and -48 V power between the ODU and the IDU.
The IF jumper is a 2 m RG-223 cable. One end of the IF jumper is terminated with a type-Nconnector and is connected to the IF cable. The other end of the IF jumper is terminated with aTNC connector and is connected to the IF board.
NOTE
l The 5D IF cable is directly connected to the IF board. Thus, when the 5D IF cable is used, the IF jumperis not required.
l When the RG-8U or 1/2-inch IF cable is used, an IF jumper is required to connect the RG-8U or 1/2-inch IF cable to the IF board.
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Cable Diagram
Figure 4-6 IF jumper
1
2H.S.tube 2 PCSL = 3 cm
2000 mm
1. RF coaxial cable connector, TNC, male 2. RF coaxial cable connector, type-N, female
Pin AssignmentNone.
4.5 XPIC CableThe XPIC cable is used to transmit the reference IF signal between the two IFX2 boards of theXPIC working group to realize the XPIC function.
The XPIC cable is an RG316 cable with SMA connectors at both ends. One end of the XPICcable is connected to the X-IN port of one IFX2 board of an XPIC working group, and the otherend of the XPIC cable is connected to the X-OUT port of the other IFX2 board of the same XPICworking group.
When the XPIC function of an IFX2 board is disabled, use an XPIC cable to connect the X-INport and X-OUT port of the IFX2 board to loop back signals.
The XPIC cable is available in the following two types:
l XPIC cable using angle connectors: The XPIC cable using angle connectors is very long,and is used to connect the two IFX2 boards in the horizontal direction, for example, theIFX2 boards in slots 3 and 4.
l XPIC cable using straight connectors: The XPIC cable using straight connectors is veryshort, and is used to connect the two IFX2 boards in the vertical direction, for example, theIFX2 boards in slots 3 and 5. The XPIC cable using straight connectors is also used toconnect the X-IN port and X-OUT port of the same IFX2 board to loop back signals.
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Cable Diagram
Figure 4-7 View of the XPIC cable
L1
1 1
L2
2 2
1. Coaxial cable connector, SMA, angle, male 2. Coaxial cable connector, SMA, straight, male
Cable Connection TableNone.
4.6 E1 CableThe E1 cable to the external equipment is used when the IDU needs to receive E1 signals directlyfrom or transmit E1 signals directly to the external equipment. At one end of the E1 cable, theAnea96 connector is used to connect the E1 electrical interface on the board; the other end isconnected to the external equipment. Make the connector as required on site.
Each E1 cable to the external equipment can transmit a maximum of 16 E1 signals. The E1cables to the external equipment are categorized into two types, namely, 75-ohm coaxial cablesand 120-ohm twisted pair cables.
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Cable Diagram
Figure 4-8 E1 cable
Main label
1W
X1 A
View A
Pos .1
Pos.96Cable Connector, Anea, 96PIN,
Female Connector
1. Cable connector, Anea 96, female
NOTE
The appearance of the 120-ohm E1 cable is the same as the appearance of the 75-ohm E1 cable.
Pin Assignment
Table 4-4 Pin assignment of the 75-ohm E1 cable
Pin W1 Remarks
Pin W2 Remarks
Core SerialNo.
Core SerialNo.
1 Tip 1 R1 25 Tip 2 T1
2 Ring 26 Ring
3 Tip 3 R2 27 Tip 4 T2
4 Ring 28 Ring
5 Tip 5 R3 29 Tip 6 T3
6 Ring 30 Ring
7 Tip 7 R4 31 Tip 8 T4
8 Ring 32 Ring
9 Tip 9 R5 33 Tip 10 T5
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Pin W1 Remarks
Pin W2 Remarks
Core SerialNo.
Core SerialNo.
10 Ring 34 Ring
11 Tip 11 R6 35 Tip 12 T6
12 Ring 36 Ring
13 Tip 13 R7 37 Tip 14 T7
14 Ring 38 Ring
15 Tip 15 R8 39 Tip 16 T8
16 Ring 40 Ring
17 Ring 17 R9 41 Ring 18 T9
18 Tip 42 Tip
19 Ring 19 R10 43 Ring 20 T10
20 Tip 44 Tip
21 Ring 21 R11 45 Ring 22 T11
22 Tip 46 Tip
23 Ring 23 R12 47 Ring 24 T12
24 Tip 48 Tip
49 Ring 25 R13 73 Ring 26 T13
50 Tip 74 Tip
51 Ring 27 R14 75 Ring 28 T14
52 Tip 76 Tip
53 Ring 29 R15 77 Ring 30 T15
54 Tip 78 Tip
55 Ring 31 R16 79 Ring 32 T16
56 Tip 80 Tip
Shell Braid Shell Braid
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Table 4-5 Pin assignment of the 120-ohm E1 cable
Pin W1 Remarks
Pin W2 Remarks
Color oftheCore
Relation
Color oftheCore
Relation
1 White Twistedpair
R1 25 White Twistedpair
T1
2 Blue 26 Orange
3 White Twistedpair
R2 27 White Twistedpair
T2
4 Green 28 Brown
5 White Twistedpair
R3 29 Red Twistedpair
T3
6 Grey 30 Blue
7 Red Twistedpair
R4 31 Red Twistedpair
T4
8 Orange 32 Green
9 Red Twistedpair
R5 33 Red Twistedpair
T5
10 Brown 34 Grey
11 Black Twistedpair
R6 35 Black Twistedpair
T6
12 Blue 36 Orange
13 Black Twistedpair
R7 37 Black Twistedpair
T7
14 Green 38 Brown
15 Black Twistedpair
R8 39 Yellow Twistedpair
T8
16 Grey 40 Blue
17 White Twistedpair
R9 41 White Twistedpair
T9
18 Blue 42 Orange
19 White Twistedpair
R10 43 White Twistedpair
T10
20 Green 44 Brown
21 White Twistedpair
R11 45 Red Twistedpair
T11
22 Grey 46 Blue
23 Red Twistedpair
R12 47 Red Twistedpair
T12
24 Orange 48 Green
49 Red Twistedpair
R13 73 Red Twistedpair
T13
50 Brown 74 Grey
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Pin W1 Remarks
Pin W2 Remarks
Color oftheCore
Relation
Color oftheCore
Relation
51 Black Twistedpair
R14 75 Black Twistedpair
T14
52 Blue 76 Orange
53 Black Twistedpair
R15 77 Black Twistedpair
T15
54 Green 78 Brown
55 Black Twistedpair
R16 79 Yellow Twistedpair
T16
56 Grey 80 Blue
Shell Braid Shell Braid
4.7 Network CableThe network cable connects two pieces of Ethernet equipment. Both ends of the network cableare terminated with RJ-45 connectors.
Two types of interfaces use the RJ-45 connectors, which are the medium dependent interface(MDI) and MDI-X. The MDI interface is used by the terminal equipment (for example, thenetwork card). For the pin assignment information of the MDI interface, refer to Table 4-6. TheMDI-X interface is used by the network equipment. For the pin assignment information of theMDI-X interface, refer to Table 4-7.
Table 4-6 Pin assignment of the MDI interface
Pin 10/100BASE-T(X)
Signal Function
1 TX+ Transmitting data (+)
2 TX- Transmitting data (-)
3 RX+ Receiving data (+)
4 Reserved -
5 Reserved -
6 RX- Receiving data (-)
7 Reserved -
8 Reserved -
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Table 4-7 Pin assignment of the MDI-X interface
Pin 10/100BASE-T(X)
Signal Function
1 RX+ Receiving data (+)
2 RX- Receiving data (-)
3 TX+ Transmitting data (+)
4 Reserved -
5 Reserved -
6 TX- Transmitting data (-)
7 Reserved -
8 Reserved -
Straight through cables are used between MDI and MDI-X interfaces, and crossover cables areused between MDI interfaces or between MDI-X interfaces. The only difference between thestraight through cable and crossover cable is with regard to the pin assignment.
The NMS/COM interface, NE interface, and Ethernet service electrical interfaces of the OptiXRTN 950 support the MDI and MDI-X autosensing modes. Straight through cables and crossovercables can be used to connect the ETH/OAM interface, EXT interface, and Ethernet serviceelectrical interfaces to MDI or MDI-X interfaces.
Cable Diagram
Figure 4-9 Network cable
1
8
1
8
1Label 1 Label 2Main Label
1. Network port connector, RJ-45
Pin Assignment
Table 4-8 Pin assignment of the straight through cable
Connector X1 Connector X2 Color Relation
X1.1 X2.1 White/Orange Twisted pair
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Connector X1 Connector X2 Color Relation
X1.2 X2.2 Orange
X1.3 X2.3 White/Green Twisted pair
X1.6 X2.6 Green
X1.4 X2.4 Blue Twisted pair
X1.5 X2.5 White/Blue
X1.7 X2.7 White/Brown Twisted pair
X1.8 X2.8 Brown
Table 4-9 Pin assignment of the crossover cable
Connector X1 Connector X2 Color Relation
X1.6 X2.2 Orange Twisted pair
X1.3 X2.1 White/Orange
X1.1 X2.3 White/Green Twisted pair
X1.2 X2.6 Green
X1.4 X2.4 Blue Twisted pair
X1.5 X2.5 White/Blue
X1.7 X2.7 White/Brown Twisted pair
X1.8 X2.8 Brown
4.8 Orderwire CableThe orderwire cable connects the orderwire phone to the equipment. Both ends of the orderwirecable are terminated with RJ-11 connectors. One end of the orderwire cable is connected to thePHONE interface on the AUXQ. The other end of the orderwire cable is connected to theinterface of the orderwire phone.
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Cable Diagram
Figure 4-10 Orderwire cable
1
6
1
6
1 Main Label
X1 X2
1. Orderwire interface, RJ-11 connector
Pin Assignment
Table 4-10 Pin assignment of the orderwire cable
Connector X1 Connector X2 Function
X1.3 X2.3 Tip
X1.4 X2.4 Ring
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5 Power Consumption and Weight
This chapter lists the power consumption and weight of each board used for the IDU 950.
Table 5-1 lists the power consumption and weight of boards.
Table 5-1 Power consumption and weight
Board Weight (kg) Power Consumption (W)
CXPR 0.66 ≤34.0
IFE2 0.53 ≤24.2
IFU2 0.79 ≤23
IFX2 0.80 ≤33
EM6T 0.37 ≤10.4
EM6F 0.38 ≤11.3
CD1 0.52 ≤16.15
EF8T 0.53 ≤9.1
EF8F 0.55 ≤17.2
EG2 0.52 ≤6.0
ML1/ML1A 0.56 ≤13.1
PIU 0.12 ≤0.5
FAN 0.30 4.0 W (room temperature)29.6 W (high temperature)
AUXQ 0.55 ≤9.5
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6 Indicators
This section describes the names of various indicators and their indications.
Boards and Their Indicators
Board Indicator
CXPR STAT, PROG, SYNC, ACTX, ACTC
EF8T STAT, SRV, LINK, ACT
EF8F STAT, SRV, LINK1 - LINK8
EG2 STAT, SRV, LINK1, LINK2, ACT1, ACT2
ML1/ML1A STAT, SRV
CD1 STAT, SRV, LOS1, LOS2
IFE2 STAT, SRV, LINK, ODU, RMT, ACT
IFU2 STAT, SRV, LINK, ODU, RMT, ACT
IFX2 XPIC, STAT, SRV, LINK, ODU, RMT, ACT
EM6T STAT, SRV, PROG
EM6F STAT, SRV, PROG, LINK1, LINK2
AUXQ STAT, SRV, LINK, ACT
PIU PWR
FAN CRIT, MAJ, MIN, FAN
Description of the Board Status Indicator (STAT)
Status Indication
On (green) The board is working normally.
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Status Indication
On (red) The board hardware is faulty.
On (orange) It indicates the power-on aging state of the interface board.The logic is not loaded.
Off No power is input, the board is not created, or the board is notrunning.
Description of the Program Running Indicator (PROG)Status Indication
On (green) The board software is normally initialized or the board softwareis running normally.
On (red) The memory self-check fails.Loading of the board software fails.The board software is lost.The logic file is lost.Executing the initial NE configuration scripts stored in the CFcard fails.Restoring the NE configuration data from the CF card fails.
On for 10s (green)a Executing the initial NE configuration scripts stored in the CFcard is successful.Restoring the NE configuration data from the CF card issuccessful.
On for 100 ms and off for100 ms alternately (green)
Loading of the board software or logic software is in process.
On for 300 ms and off for300 ms alternately (green)
The board software is being initialized and is in the BIOS bootstatus.Execution of the initial NE configuration scripts stored in theCF card is in progress.Restoration of the NE configuration data from the CF card is inprogress.
On for 100 ms and off for100 ms alternatively (red)
The memory self-check fails or loading of the logic softwarefails.
Off No power supply is accessed.
NOTEa: The PROG indicator stays on and green for 10s and then automatically recovers the original status beforeexecution of the NE initial configuration scripts stored in the CF card or restoration of the NE configurationdata from the CF card.
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Description of the Synchronization Status Indicator (SYNC)Status Indication
On (green) The clock is working normally.
On (red) The clock source is lost or the clock source is switched.
Off Loading of the board software fails.
Description of the Service Status Indicator (SRV)Status Indication
On (green) Services are running normally and no service-related alarmoccurs.
On (red) A critical or major service-related alarm occurs.
On (Orange) A minor or remote service-related alarm occurs.
Off No service is configured or loading of the board software fails.
Description of the CXPR Switching Status Indicator (ACTX)Status Indication
On (green) The board is in the working switching state (1+1 protection).The switching plane is activated (noprotection).
Off The board is in the protection switching state(1+1 protection).The switching plane is activated (noprotection).
Description of the CXPR Control Status Indicator (ACTC)Status Indication
On (green) The board is in the working control state (1+1protection).The control plane is activated (no protection).
Off The board is in the protection control state (1+1 protection).The control plane is activated (no protection).
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Description of the Data Transceiving Status Indicator (ACT)Status Indication
On for 100 ms and off for100 ms alternately(yellow)
The data interface is transmitting or receiving data.
Off The data interface is not connected or connected incorrectly.
Description of the EF8F/EG2/EM6F Port Connection Status Indicator (LINK)Status Indication
On (green) The physical connection of the port is normal.
Off The physical connection of the port is faulty.
Description of the CD1 Port Status Indicator (LOS1/LOS2)Status Indication
On (green) The signal at the port is normal.
On (red) The signal at the port is lost.
Off The optical module is offline.
Description of the IFE2/IFU2/IFX2 Port Connection Status Indicator (LINK)Status Indication
On (green) The radio link of the port is normal.
Off (red) The radio link of the port is faulty.
Description of the IFX2 XPIC Port Connection Status Indicator (XPIC)Status Indication
On (green) The XPIC input signal is normal.
On (red) The XPIC input signal is lost.
Off The XPIC function is disabled.
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ODU Status Indicator (ODU)
Status Indication
On (green) The ODU works normally.
On (red) The ODU has critical or major alarms, or hasno power access.
On (orange) The ODU has minor alarms.
On for 300 ms and off for 300 ms alternately(yellow)
The antennas are not aligned.
Remote Status Indicator (RMT)
Status Indication
On (orange) The radio defect alarm indication is receivedfrom the remote end.
Off The remote end receives services normally.
Description of the IFE2/IFU2/IFX2 Protection Status Indicator (ACT)
Status Indication
On (green) The board is in the active state (1+1 protection).The board is activated (no protection).
Off The board is in the standby state (1+1 protection).The board is not activated (no protection).
Description of the Critical Alarm Indicator (CRIT)
Status Indication
On (red) Critical alarm(s) occurs on any board inside the chassis.
Off No critical alarm occurs on any board inside the chassis.
Description of the Major Alarm Indicator (MAJ)
Status Indication
On (orange) Major alarm(s) occurs on any board inside the chassis.
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Status Indication
Off No major alarm occurs on any board inside the chassis.
Description of the Minor Alarm Indicator (MIN)Status Indication
On (yellow) Minor alarm(s) occurs on any board inside the chassis.
Off No minor alarm occurs on any board inside the chassis.
Description of the Power Supply Status Indicator (PWR)Status Indication
On (green) Power is accessed.
Off No power is accessed or the power supply poles are inverselyconnected.
Description of the Fan Status Indicator (FAN)Status Indication
On (green) The fans are working normally.
On (red) The fans are working abnormally.
Off The fans are not powered on or no fan is installed.
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7 Label
About This Chapter
The equipment has safety labels and optical module labels.
7.1 Safety LabelsThe equipment has various safety labels. This section describes the suggestions and locationsof these safety labels.
7.2 Optical Module LabelsOptical module labels, attached onto optical modules, are used to distinguish different types ofoptical modules.
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7.1 Safety LabelsThe equipment has various safety labels. This section describes the suggestions and locationsof these safety labels.
Label DescriptionThere are labels on the chassis and boards. See Table 7-1.
Table 7-1 Label description
Figure Type Description
ESD protection label The label suggests theelectrostatic-sensitiveequipment.
Chassis grounding label The label suggestions thegrounding position.
Fan warning label The label suggests that do nottouch the fan leaves when thefan is rotating.
!
Operation warning label The label indicates theprecaution that should betaken for operations on thePIU board. For details, seeLabel
High temperaturewarning label
If the ambient temperatureexceeds 55℃, thetemperature at the board panelsurface may exceed 70℃. Inthis case, wear gloves to touchthe board.
WARNING-48V OUTPUT
TURN OFF POWER BEFOREDISCONNECTING IF CABLE
! Operation warning label Power off the ODU beforeremoving the IF cable.
RoHS label The equipment is in line withthe RoHS-relatedenvironment-friendlyrequirements.
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Figure Type Description
合格证/QUALIFICATION CARD
华为技术有限公司 中国制作MADE IN CHINAHUAWEI TECHNOLOGIES CO.,LTD.
HUAWEI
Qualification label The equipment is qualified.
This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and(2) this device must accept any interference received, including interference that may cause undesired operation.
OptiX RTN 950POWER RATING: -48--60V;14.3A
华为技术有限公司 中国制造
电源额定值
HUAWEI TECHNOLGIES CO.,LTD. MADE IN CHINA
N 14036
Class 1 Laser Product Product nameplate label The label suggests theproduct name andcertification.
NOTE
The current on the nameplate of the equipment indicates the maximum current when the equipment hasthe microwave feature.
Label PositionFigure 7-1 shows positions of labels on the chassis.
Figure 7-1 Label position
合格证/QUALIFICATION CARD
华为技术有限公司 中国制作MADE IN CHINAHUAW EI TECHNOLOGIES CO.,LTD.
HUAWEI
WARNING-48V OUTPUT
TURN OFF POWER BEFOREDISCONNECTING IF CABLE
!
!
OptiX RTN 950
华为技术有限公司 中国制造
HUAWEI TECHNOLGIES CO MADE IN CHINA
14036
This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and(2) this device must accept any interference received, including interference that may cause undesired operation.
POWER RATING: -48--60V;14.3A电源额定值
.,LTD.
N
Class 1 Laser Product
OptiX RTN 950 Radio Transmission SystemIDU Hardware Description 7 Label
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7.2 Optical Module LabelsOptical module labels, attached onto optical modules, are used to distinguish different types ofoptical modules.
As shown in Table 7-2, different types of optical modules have different codes.
Table 7-2 Codes and types of optical modules
OpticalModule Code
OpticalInterfaceType
Optical Module BasicInformation
MappingBoard
34060286 1000BASE-SX(0.5 km)
Optical Transceiver, eSFP, 850 nm,2.125 Gbit/s (Multi rate), LC, Multi-mode, 0.5 km
EG2
34060473 1000BASE-LX(10 km)
Optical transceiver, eSFP, 1310 nm,1.25 Gbit/s, LC, Single-mode, 10 km
34060290 1000BASE-LX(10 km)
Optical Transceiver, eSFP, 1310 nm,1.25 Gbit/s, LC ( - 40 to 85), Single-mode, 10 km
34060298 1000BASE-VX(40 km)
Optical Transceiver, eSFP, 1310 nm,1.25 Gbit/s, LC, Single-mode, 40 km
34060360 1000BASE-ZX(80 km)
Optical Transceiver, eSFP, 1550 nm,1.25 Gbit/s, LC, Single-mode, 80 km
34060324 1000BASE-ZX(80 km)
Optical Transceiver, eSFP, 1550 nm,1.25 Gbit/s, LC (-40 to 85), Single-mode, 80 km
34060483 1000BASE-CWDM(80 km)
Optical transceiver, eSFP, 1471 nm,100 Mbit/s to 2.67 Gbit/s, LC, Single-mode, 80 km
EG2
34060481 1000BASE-CWDM(80 km)
Optical transceiver, eSFP, 1491 nm,100 Mbit/s to 2.67 Gbit/s, LC, Single-mode, 80 km
34060479 1000BASE-CWDM(80 km)
Optical transceiver, eSFP, 1511 nm,100 Mbit/s to 2.67 Gbit/s, LC, Single-mode, 80 km
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OpticalModule Code
OpticalInterfaceType
Optical Module BasicInformation
MappingBoard
34060482 1000BASE-CWDM(80 km)
Optical transceiver, eSFP, 1531 nm,100 Mbit/s to 2.67 Gbit/s, LC, Single-mode, 80 km
34060478 1000BASE-CWDM(80 km)
Optical transceiver, eSFP, 1551 nm,100 Mbit/s to 2.67 Gbit/s, LC, Single-mode, 80 km
34060476 1000BASE-CWDM(80 km)
Optical transceiver, eSFP, 1571 nm,100 Mbit/s to 2.67 Gbit/s, LC, Single-mode, 80 km
34060477 1000BASE-CWDM(80 km)
Optical transceiver, eSFP, 1591 nm,100 Mbit/s to 2.67 Gbit/s, LC, Single-mode, 80 km
34060480 1000BASE-CWDM(80 km)
Optical transceiver, eSFP, 1611 nm,100 Mbit/s to 2.67 Gbit/s, LC, Single-mode, 80 km
34060276 100BASE-FX/S-1.1(15 km)
Optical Transceiver, eSFP, 1310 nm,STM1, LC, Single-mode, 15 km
EF8FCD1
34060307 100BASE-FX/S-1.1(15 km)
Optical Transceiver, eSFP, 1310 nm,STM1, LC, Single-mode, 15 km
34060281 100BASE-FX/L-1.1(40 km)
Optical Transceiver, eSFP, 1310 nm,STM1, LC, Single-mode, 40 km
34060308 100BASE-FX/L-1.1(40 km)
Optical Transceiver, eSFP, 1310 nm,STM1 LC, Single-mode, 40 km
34060282 100BASE-FX/L-1.2(80 km)
Optical Transceiver, eSFP, 1550 nm,STM1, LC, Single-mode, 80 km
34060309 100BASE-FX/L-1.2(80 km)
Optical Transceiver, eSFP, 1550 nm,STM1, LC, Single-mode, 80 km
OptiX RTN 950 Radio Transmission SystemIDU Hardware Description 7 Label
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A Glossary
A
ATM The asynchronous transfer mode (ATM) is designed to transfercell in which multiple service types (such as voice, video, ordata) are conveyed in fixed-length (53-byte) cells. Fixed-lengthcells allow cell processing to occur in hardware, therebyreducing transit delays.
Air interface link A link used to transmit radio frequencies between mobilephones and base stations.
B
BTS Base transceiver station. It terminates the radio interface. Itallows transmission of traffic and signaling across the airinterface. The BTS includes the baseband processing, radioequipment, and the antenna.
BSC Base station controller. A BSC is used to control the radiosignals of the receiving and transmitting base stations.
C
CES Circuit emulation service. A technology adapts the traditionalnarrowband services, that is, TDM services, to the wideband.
CoS Class of Service. A queuing discipline. An algorithm comparesfields of packets or CoS tags to classify packets and to assign toqueues of differing priority. CoS can not ensure networkperformance or guarantee priority in delivering packets.
Concatenation A process that combines multiple virtual containers. Thecombined capacities can be used as a single capacity. Theconcatenation also keeps the integrity of bit sequence.
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Control plane The control plane performs the call control and connectioncontrol functions. Through signaling, the control plane sets upand releases connections, and may restore a connection in caseof a failure. The control plane also performs other functions insupport of call and connection control, such as routinginformation dissemination.
E
E-Line Ethernet line. An point-to-point private service type that isprovided for the user Ethernet in different domains.
F
FEC Forwarding equivalence class. A term used in multiprotocollabel switching (MPLS) to describe a group of packets whichare forwarded in the same manner (e.g., over the same path, withthe same forwarding treatment). FEC can be classified byaddress, service type, priority and QOS of packets, and may bebound to a MPLS label.
FEC Forward Error Correction. FEC is a technology of error controlfor data transmission, whereby the sender adds redundant datato its messages, which allows the receiver to detect and correcterrors (within some bound).
Flow classification In the case of flow classification, all the services from Layer 2to Layer 7 of the OSI model are searched out and the servicetypes are classified.
Frame Refers to a cyclic set of consecutive timeslots in which therelative position of each time slot can be identified In thetransmission network. Refers to the packet data unit of the datalink layer in the OSI model. It consists of frame header, userdata and frame tail. The frame header and frame tail are usedfor synchronization and error control.
Forwarding plane The forwarding plane is also referred to as data plane, whichforwards packets under the management of the control plane.
I
IS-IS IS-IS inter-domain rerouting information switching protocol.The IS-IS protocol is a dynamic routing protocol designed byISO for connectionless network protocol (CLNP).
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IMA Inverse multiplexing over ATM. A physical layer technologyin which a high-speed stream of ATM cells is broken up andtransmitted across multiple T1/E1 links, then is reconstructedback into the original ATM cell order at the destination. IMA isfirst standardized (v1.0) by the ATM Forum in 1997, andrecently updated (v1.1) in 1999.
L
L2VPN Layer 2 virtual private network. A virtual private networkrealized in the packet switched (IP/MPLS) network by Layer 2switching technologies.
LSR label switch router. LSR is to forward packets in an MPLSnetwork by looking only at the fixed-length label.
LSP Label switch path. An ingress and egress switched path builtthrough a series of LSRs to forward the packets of a particularFEC using a label swapping forwarding mechanism.
link A "topological component" that provides transport capacitybetween two endpoints in different subnetworks via a fixed (thatis, inflexible routing) relationship.
M
MPLS OAM The MPLS OAM provides continuity check for a single LSP,and provides a set of fault detection tools and fault correctmechanisms for MPLS networks.
N
node In a network, a point where one or more functional unitsinterconnect transmission lines.
P
PWE3 pseudo wire emulation edge to edge. A mechanism thatemulates the essential attributes of service (such as a E1 leasedline or Frame Relay) over a PSN.
Package loading A method used to upgrade, load, and manage NE-level softwarein a centralized manner.
packet A logical grouping of information including header and(usually) user data.
PW Pseudo wire. A mechanism that bears the simulated servicesbetween PEs on the PSN.
OptiX RTN 950 Radio Transmission SystemIDU Hardware Description A Glossary
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Q
QoS Quality of Service. A set of service requirements to be met bythe network while transporting a connection or flow; thecollective effect of service performance which determine thedegree of satisfaction of a user of the service. (E.360.1)
R
Route Path through an network.
S
Switch To filter, forward frames based on label or the destinationaddress of each frame. This behavior operates at the data linklayer of the OSI model.
T
Tunnel A information transmission channel that is set up between twoentities in the application of VPN. A tunnel provides sufficientsecurity to prevent intrusion to the VPN internal information.
Traffic engineering A technique that can creates data forwarding paths for nodesbased on the available resources on the network and reservebandwidths for key traffic.
V
VC A unidirectional logical connection between two nodes.
VPWS virtual private wire service. A Virtual Private Wire Service(VPWS) is a point-to-point circuit (link) connecting twoCustomer Edge devices. The link is established as a logical linkthrough a packet switched network.
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B Acronyms and Abbreviations
A
ATM Asynchronous Transfer Mode
AF Assured Forwarding
AM Adaptive and Modulation
ATPC Automatic Transmit Power Control
APS Automatic Protection Switching
ARP Address Resolution Protocol
B
BSC Base Station Controller
BTS Base Transceiver Station
C
CES Circuit Emulation Service
CE Customer Edge
CoS Class of Service
CC Continuity Check
CIR Committed Information Rate
D
DCN Data Communication Network
OptiX RTN 950 Radio Transmission SystemIDU Hardware Description B Acronyms and Abbreviations
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DSCP Differentiated Services Code Point
DS Differentiated Services
E
EMC Electromagnetic Compatibility
EPL Ethernet Private Line
EVPL Ethernet Virtual Private Line
ETS European Telecommunication Standards
ETSI European Telecommunications StandardsInstitute
E-Line Ethernet-Line
F
FEC Forwarding Equivalence Class
FEC Forward Error Correction
FD Frequency Diversity
G
GPS Global Positioning System
H
HSB Hot Standby
HSDPA High Speed Downlink Packet Access
I
IP Internet Protocol
IEC International Electrotechnical Commission
IEEE Institute of Electrical and ElectronicsEngineers
IMA Inverse Multiplexing for ATM
ITU-T International Telecommunication Union -Telecommunication Standardization Sector
B Acronyms and AbbreviationsOptiX RTN 950 Radio Transmission System
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L
LACP Link Aggregation Control Protocol
LSP Label Switched Path
LSR Label Switched Router
L2VPN Layer2 Virtual Private Network
M
MPLS Multiprotocol Label Switching
MP Merge Point
MAC Medium Access Control
N
NNI Network to Network Interface
NSF Not Stop Forwarding
O
OAM Operation, Administration and Maintenance
P
PE Provider Edge
PW Pseudo Wire
PWE3 Pseudo Wire Emulation Edge-to-Edge
PSN Packet Switched Network
PDU Protocol Data Unit
PRC Primary Reference Clock
PHP Penultimate Hop Popping
PHB Per-Hop Behavior
PPVPN Provider Provisioned VPN
PIR Peak Information Rate
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Q
QoS Quality of Service
QPSK Quadrature Phase Shift Keying
R
RNC Radio Network Controller
S
SD Space Diversity
SDH Synchronous Digital Hierarchy
T
TDM Time Division Multiplex
TTL Time to Live
U
UNI User Network Interface
V
VC Virtual Channel
VCC Virtual Channel Connection
VLAN Virtual Local Area Network
VP Virtual Path
VPN Virtual Private Network
VPC Virtual Path Connection
VPWS Virtual Private Wire Service
VPI Virtual Path Identifier
VCI Virtual Channel Identifier
W
WRED Weighted Random Early Detection
B Acronyms and AbbreviationsOptiX RTN 950 Radio Transmission System
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