kalyan bhattacharyya supervisors: drs. j. mukherjee and m. shojaei ee, iit, bombay
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Microwave Traveling Wave Amplifiers
and Distributed Oscillators ICs in
Industry Standard Silicon CMOS
Kalyan Bhattacharyya
Supervisors: Drs. J. Mukherjee and M. Shojaei
EE, IIT, Bombay
E-mail: kalyan@ee.iitb.ac.in
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Contents
Introduction
Coplanar Waveguide (CPW)
Traveling Wave Amplifier (TWA)
TWA Based Distributed Oscillator (DO)
Conclusion
3
Why CMOS?
Low Cost
50 GHz cut-off frequency for 0.18µm technology
Maturity of process technology
Higher thermal conductivity
Mechanical stability of substrate
Ease of high level integration
4
Introduction Traveling Wave Amplifier (TWA) is for constant gain over a
broad frequency range (applic. in high speed networks)
Designs use the parasitic capacitances of the active devices that typically limit the high-frequency performance
coplanar waveguides (CPW) as on-chip inductors
A Distributed Oscillator operates in the forward gain mode of a TWA, our designs use only n-FETs, CPWs and a loop we called ‘folded CPW’
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Amplifier with Spiral Inductors
Replace large area inductors with coplanar waveguides
Reduce and use parasitic capacitances in amplifier
6
CMOS on silicon presents some
challenges for RF design:
Lossy substrate and low impedance transmission lines
Low electron mobility in Si
High gate resistance
Low output impedance at the drain
Low transconductance in Si FETs
Design Challenges
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Distribution of Gain Producing Cells Formation of Gate and Drain Artificial Transmission Lines
RF signal travels down the gate line Each n-FET transfers signal to drain line through its transconductance Signals add in drain line in forward propagating direction
Basic TWA with CPW as InductorsZline, LD
Zo
Zin
Zo
CPW
CPW
CPWCPW
CPWCPW
LD /2
LG /2 LG /2
LD /2LD
LG
IN
OUT
Zline, LG
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Coplanar Waveguide
L=0.5 mm
TlineTOX
Silicon substrate
W S
9
Layout of Coplanar Waveguide
Measured Loss = 0.32dB at 10GHz
Kalyan Bhattacharyya et al, IEEE Microwave and Wireless Components Letters, Jan, 2004
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Gain Cells of the ICs and One Element of Artificial Transmission Line
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Bandwidth of TWA in 0.18micron CMOS
L-H Lu et al; IEEE Microwave and Wireless Components Letters, Nov, 2005
1
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TWA Based Oscillator Design: OSC-1 Feedback connection from TWA output to input [1][2]
The length of feedback connection is critical
Measured Oscillation Frequency: 12 GHz Output Level: 5.77 dBm, n-FET width: 60 micron Phase Noise: -115.16 dBc/Hz @ 1 MHz offset
Kalyan Bhattacharyya et al; IEEE RAWCON 2004 and WAMICON 2005
L LL LL LL LD
LG LG
DD D
LGLGCc
Zbias
D1
LG1 LG2
D2D3 D
LGLG3
biasZ
ZbiasZbias
V_OUT
L LL LL LL LD
LG LG
DD D
LGLGCc
Zbias
D1
LG1 LG2
D2D3 D
LGLG3
biasZ
ZbiasZbias
V_OUT
D
LG LG
DD D
LGLGCc
ZbiasZbias
D1
LG1 LG2
D2D3 D
LGLG3
biasZbiasZ
ZbiasZbias
V_OUT
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TWA-based Distributed OSC-1 Layout
Size: 1.5x0.642 sq. mm (including the measuring pads)
OUT
Drain Transmission Line
Gate Transmission Line
n-FETn-FET
Fee
db
ack
Drain Transmission Line
Gate Transmission Line
n-FETn-FET
Fee
db
ack
OUT
ZbiasOUT
Drain Transmission Line
Gate Transmission Line
n-FETn-FET
Fee
db
ack
Drain Transmission Line
Gate Transmission Line
n-FETn-FET
-nFE
T
Fee
db
ack
OUT
Zbias
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Coplanar test structure ‘folded CPW’
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4 8 12 16 20-2.0
-1.6
-1.2
-0.8
-0.4
Measured loss before pad deembedding
S2
1 (d
B)
Frequency (GHz)
Measured Loss of ‘folded CPW’
Loss: 1.259 dB at 10 GHz before pad deembedding
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9.5 10.5 11.5 12.5-32
-28
-24
-20
Re
flect
ion
s S 1
1(d
B)
an
d S
22(
dB
)
Frequency (GHz)
S11(dB) before pad deembedding
S22(dB) before pad deembedding
Measured Reflections of ‘folded CPW’
S11 = -24.6 dB and S22 = -24 dB at 12GHz
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Measured power spectrum of Osc-1
Fundamental is at 12.00GHz, +5.77dBm
Second harmonic at 23.92GHz, -34 dBm
Bias: 1.8V / 60mA
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Measured phase noise of Osc-1
PN = -115.16dBc/Hz at 1 MHz offset from the 12GHz carrier Figure of Merit [9] = -176.41dBc/Hz
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OperatingFrequency
(GHz)
Power level (dBm)
Bias Voltage,
V
Technology and Reference
16.8 -3.5 1.3 0.18µm CMOS, [1]
12.0 -15.37 2.5 0.35µm BiCMOS, [5]
10 -4.5 2.5 0.35µm BiCMOS, [5]
12 +5.77 1.8 0.18µm CMOS, This work
Comparison of Power Level of Si DO
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VCO-Like Simulation for OSC-1 with Cc
Coupling capacitor allows the independent control of the
dc voltage in the gate and drain lines VCO operation by tuning the parasitic gate and drain capacitances
(‘inherent varactors’ [5]) of the n-FETs
Single n-FET gain cell with n-FET width of 30 micron
VDS= 1.8V, VGS= 1.2V, Freq = 17.921GHz, Power = 5.1dBm
VDS (V) VGS (V) Frequency
Change (MHz)
Power Change (dBm)
2.0V 1.2V 60 MHz +1 dBm
1.8V 1.0 60 MHz -1.3 dBm
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Cascode Cells DO: OSC-2
Simulated Oscillation Frequency: 12.67 GHz,
with 4-stages of cascode gain cells
Kalyan Bhattacharyya et al, IEEE RAWCON’04 and WAMICON’05
A New circuit
for DO Design
Higher Output
Level expected for
OSC-2 than OSC-1,
when both 5 –stages
Zbias
Cc
CS
LD
LG LG
LD
LD
LD
LGLG
+_+_
LD1
LG1 LG2
LD2
LD3
LD
LGLG3
_+
Zbias
Cc
V_OUTZbias
CG
Zbias
Cc
CS
LD
LG LG
LD
LD
LD
LGLG
+_+_
LD1
LG1 LG2
LD2
LD3
LD
LGLG3
_+
Zbias
Cc
V_OUTZbias
CG
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Static Frequency Changing by Varying LChanged Values of Inductive CPWs from:LD1=LG1= LD2= LG2=L/2, LD3= LG3=L
OSC-2 Freq: 12.67 (GHz)
OSC-1 Freq: 17.921 (GHz)
LD1=3L/2 12.05 17.71
LD1=L 12.35 17.76
LG1=3L/2 11.0 15.87
LG1=L 11.75 16.83
LD1=LG1=3L/2 10.55 15.74
LD1 =LG1=L 11.75 16.70
LD2=3L/2 11.0 15.87
LD2=L 11.75 16.83
LG2=3L/2 12.63 17.88
LG2=L 12.42 17.54
LD2=LG2=3L/2 11.0 15.63
LD2=LG2=L 11.75 16.75
LD3=3L/2 12.50 17.69
LD3=2L 12.13 17.51
LG3=3L/2 12.45 16.91
LG3=2L 12.07 16.63
LD3=LG3=3L/2 12.11 17.0
LD3=LG3=2L 11.72 16.28
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Conclusions Coplanar Waveguides and folded CPW used for
Distributed Oscillators in industry-standard CMOS
OSC-1, high Power Level of +5.77dBm at 12 GHz for Silicon DO
Phase noise of –115.16dBc/Hz at 1 MHz
A new distributed oscillator is proposed (RAWCON 2004) where each gain cell uses an n-FET cascode
Frequency variation of DOs by non-uniform transmission lines changing one or two L values
VCO-Like simulation using MOS VARACTORs at IIT, Bombay
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REFERENCES[1] B. Kleveland, “CMOS interconnects beyond 10 GHz,” PhD thesis, Stanford University, August 2000.
[2] Behzad Razavi, “Design of Integrated Circuits for Optical communications,” McGraw Hill, New York, 2003.
[3] Kalyan Bhattacharyya and Ted Szymanski, “Performance of a 12GHz Monolithic Microwave Distributed Oscillator in 1.2V 0.18µm CMOS with a New Simple Design Technique for Frequency Changing,” IEEE Wireless and Microwave Technology Conference, WAMICON’2005, Clearwater, Florida, USA, April 7 and 8, 2005, pp 174-177.
[4] H. Wu and A. Hajimiri, “Silicon-Based Voltage-Controlled Oscillators,” IEEE Journal of Solid-State Circuits, vol. 36, No. 3, pp. 493-502, March 2001.
[5] Kalyan Bhattacharyya’s MASc Thesis, Department of Electrical and Computer Engineering, McMaster University, Hamilton, Ontario, Canada, June 2004.
[6] Yuhua Cheng, M. Jamal Deen and C-H. Chen, “MOSFET Modeling for RF IC Design,” IEEE Transaction on Electron Devices, vol. 52, No. 7, July 2005.
[7] Kalyan Bhattacharyya and M. Jamal Deen, “Microwave CMOS traveling wave amplifiers – performance and temperature effects,” IEEE Microwave and Wireless Components Letters, vol. 14, No. 1, pp. 16-18, January 2004.
[8] Kalyan Bhattacharyya and Ted Szymanski, “1.2V CMOS 1-10GHz Traveling Wave Amplifiers Using Coplanar Waveguides as On-Chip Inductors,” IEEE Radio and Wireless Conference (RAWCON), Atlanta, Georgia, USA, pp. 219-222, September 19-22, 2004.
[9] T. Y. Kim, A. Adams, N. Weste, “High performance SOI and bulk CMOS 5GHz VCOs,” IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, pp. 93 – 96, 8-10 June 2003.
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Thank You
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