lab n0.2 handout dld(1)

Digital Logic Design Lab No.2 Determine Experimentally the Truth Table for Logic Gates

Department of Electronic Engineering, Faculty of Engineering & Technology, IIUI Page 7

Lab No. 2 Determine Experimentally the Truth Table for Logic Gates

Objectives: Determine experimentally the truth tables for the NAND, NOR, and inverter gates.

Use NAND and NOR gates to formulate other basic logic gates

Requirements: 7400 quad 2-input NAND gate

7402 quad 2-input NOR gate

Two 1.0 kΩ resistor

Logic Probe

DMM

Summary of Theory: Logic deals with only two normal conditions: logic “1” or logic “0.” These conditions are like the

yes or no answers to a question. Either a switch is closed (1) or it isn’t (0); either an event has

occurred (1) or it hasn’t (0); and so on. In Boolean logic, 1 and 0 represent conditions. In

positive logic, 1 is represented by the term HIGH and 0 is represented by the term LOW. In

positive logic, the more positive voltage is 1 and the less positive voltage is 0. Thus, for

positive TTL logic, a voltage of +2.4 V = 1 and a voltage of +0.4 V = 0.

In some systems, this definition is reversed. With negative logic, the more positive voltage

is 0 and the less positive voltage is 1. Thus, for negative TTL logic, a voltage of +0.4 V = 1 and a

voltage of +2.4 V = 0.

Negative logic is sometimes used for emphasizing an active logic level. For all of the basic

gates, there is a traditional symbol that is used for positive logic and an alternate symbol for

negative logic. For example, an AND gate can be shown in negative logic with an OR symbol and

“inverting bubbles” on the input and output, as illustrated with the three symbols in Figure 2-1

(a).This logic can be read as “If A or B is LOW, the output is LOW.” The exact same gate can be

drawn as in Figure 2-1 (b), where it is now shown as a traditional active-HIGH gate and read as “If

both A and B are HIGH, the output is HIGH.”

Figure 2-1 Two distinctive shape symbols for an AND gate. The two symbols represent the same gate.

Digital Logic Design Lab No.2 Determine Experimentally the Truth Table for Logic Gates

Department of Electronic Engineering, Faculty of Engineering & Technology, IIUI Page 8

Procedure:

In this experiment, you will test the truth tables for NAND and NOR gates as well as those for

several combinations of these gates. Keep in mind that if any two truth tables are identical,

then the logic circuits that they represent are equivalent.

1. Find the connection diagram for the 7400 quad 2-input NAND gate and the 7402 quad 2-

input NOR gate in the manufacturer’s specification sheet. Note that there are four gates on

each of these ICs. Apply Vcc and ground to the appropriate pins. Then test one of the

NAND gates by connecting all possible combinations of inputs, as listed in Table 2-1 of the

report. Apply a logic 1 through a series 1.0 kΩ resistor and a logic 0 by connecting

directly to ground. Show the logic output (1 or 0) as well as the measured output voltage

in Table 2-1. Use the DMM to measure the output voltage.

2. Repeat Step 1 for one of the NOR gates; tabulate your results in Table 2-2 of the report.

3. Connect the circuits of Figures 2-2 and 2-3. Connect the input to a 0 and a 1, measure

each output voltage, and complete truth Tables 2-3 and 2-4 for the circuits.

4. Construct the circuit shown in Figure 2-4 and complete truth Table 2-5. This circuit

may appear at first to have no application, but in fact can be used as a buffer. Because of

amplification within the IC, a buffer provides more drive current.

5. Construct the circuit shown in Figure 2-5 and complete truth Table 2-6. Notice that the

truth table for this circuit is the same as the truth table for one of the single gates. (What

does this imply about the circuit?)

6. Repeat Step 5 for the circuits show Figures 2-6 and 2-7.Complete truth Tables 2-7and 2-8.

Figure2-2 Figure 2-3

Figure 2-4 Figure2-5

Figure 2-6 Figure 2-7

Digital Logic Design Lab No.2 Determine Experimentally the Truth Table for Logic Gates

Department of Electronic Engineering, Faculty of Engineering & Technology, IIUI Page 9

Report for Experiment 2

Objectives: Determine experimentally the truth tables for the NAND, NOR, and inverter gates.

Use NAND and NOR gates to formulate other basic logic gates

Data and Observations:

Table 2 -1 Truth Table for NAND Gate Table 2 -2 Truth Table for NOR Gate

Table 2 -3 Truth Table for Figure2-2 Table 2-4 Truth Table for Figure 2-3

Digital Logic Design Lab No.2 Determine Experimentally the Truth Table for Logic Gates

Department of Electronic Engineering, Faculty of Engineering & Technology, IIUI Page 10

Table 2-5 Truth Table for Figure 2-4 Table 2-6 Truth Table for Figure 2-5

Table 2-7 Truth Table for Figure 2-6 Table 2-8 Truth Table for Figure 2-7

Digital Logic Design Lab No.2 Determine Experimentally the Truth Table for Logic Gates

Department of Electronic Engineering, Faculty of Engineering & Technology, IIUI Page 11

Evaluation and Review Questions

1. Look over the truth tables in your report.

a. What circuits did you find that are equivalent to inverters?

b. What circuit is equivalent to a 2-input AND gate?

c. What circuit is equivalent to a 2-input OR gate?

2. Suppose you did not needed a 2-input NOR gate for a circuit, but all you have available

is a 7400 (quad 2-input NAND gate). Neither shows how you could obtain the required

NOR function using the NAND gate. (Remember that equivalent truth tables imply

equivalent functions.)

3. A control signal that is used in a computer system is labeled DT/R for data

transmit/receive. What action is implied when this signal is HIGH? LOW?