learning to design counters

1

Learning to DesignLearning to DesignCountersCounters

Today:

• First Hour: Designing a Counter– Section 7.2 of Katz’s Textbook

– In-class Activity #1

• Second Hour: More on Counters• Section 7.3 of Katz’s Textbook

– In-class Activity #2

2

Recap: Flip FlopsRecap: Flip Flops

S R Q Q+ J K Q Q+ D Q Q+ T Q Q+

0 0 0 0 0 0 0 0 0 0

0 0 1 0 0 1 0 1 0 1

0 1 0 0 1 0 1 0 1 0

0 1 1 0 1 1 1 1 1 1

1 0 0 1 0 0

1 0 1 1 0 1

1 1 0 1 1 0

1 1 1 1 1 1

Given the current state, and its inputs. What is its next state? Given the current state, and its inputs. What is its next state?

00

11

00

00

11

11

XX

XX

00

11

00

00

11

11

11

00

00

00

11

11

00

11

11

00

X = that input is illegalX = that input is illegal

3

Excitation TablesExcitation Tables

RESET or TOGGLERESET or TOGGLE

Suppose we want to change from state Q = 1 to state Q+ = 0Suppose we want to change from state Q = 1 to state Q+ = 0

11 00

TOGGLETOGGLE RESETRESET

What should be the input (excitation) for aT flip-flop or a D flip-flopto make this change?

What should be the input (excitation) for aT flip-flop or a D flip-flopto make this change?

J-K flip-flop

Why is JK = X1? Because either JK = 01 or JK = 11 will change Why is JK = X1? Because either JK = 01 or JK = 11 will change state 1 to state 0. Similar reasoning yields the other entries. state 1 to state 0. Similar reasoning yields the other entries.

Why is JK = X1? Because either JK = 01 or JK = 11 will change Why is JK = X1? Because either JK = 01 or JK = 11 will change state 1 to state 0. Similar reasoning yields the other entries. state 1 to state 0. Similar reasoning yields the other entries.

Q Q+ R S J K T D0 00 11 01 1

XX 11

4

Synchronous Finite-State MachinesSynchronous Finite-State Machines

• Described by State Diagrams, much the same way that combinational logic circuits are described by Boolean Algebra.

Current State

New State

Current Input(s)

Change of state happens only on the clocking event

5

Each circle corresponds

to a state

Each circle corresponds

to a state

Example:Example: 3-bit Binary Up-Counter3-bit Binary Up-Counter

The label inside each circle

describes the state

The label inside each circle

describes the state Arrows

represent state

transitions

Arrows represent

state transitions

No labels on arrows, since the counter has no inputsNo labels on arrows, since the counter has no inputs

000 001 010

110 101 100

111 011

000 001 010010

110 101 100

111 011

6

CurrentCurrent NextNextStateState StateState

C B A C+ B+ A+

0 0 00 0 10 1 00 1 11 0 01 0 11 1 0 1 1 1

State Transition TableState Transition Table

000 001 010

110 101 100

111 011

State Diagram State Transition Table

The Table is equivalent to the DiagramThe Table is equivalent to the Diagram

0 0 10 1 00 1 11 0 01 0 11 1 01 1 10 0 0

The “+” superscripts indicate new

values.

7

Picking a Flip-FlopPicking a Flip-Flop

CurrentCurrent NextNextStateState StateState

C B A C+ B+ A+

0 0 0 0 0 10 0 1 0 1 00 1 0 0 1 10 1 1 1 0 01 0 0 1 0 11 0 1 1 1 01 1 0 1 1 11 1 1 0 0 0

State Transition Table

Neat Fact: we could have picked any other type or more than one typeNeat Fact: we could have picked any other type or more than one type

Let's use T F/FsT F/Fs

Let's use T F/FsT F/Fs

How many do we need?How many

do we need?

3

8

Flip-Flop Input TableFlip-Flop Input Table

CurrentCurrent NextNext Flip-FlopFlip-FlopStateState StateState InputsInputs

C B A C+ B+ A+ TC TB TA0 0 0 0 0 10 0 1 0 1 00 1 0 0 1 10 1 1 1 0 01 0 0 1 0 11 0 1 1 1 01 1 0 1 1 11 1 1 0 0 0

State Transition Table F/F Input Table

Q Q+ T0 0 00 1 11 0 11 1 0

Excitation Table0 0 10 1 10 0 11 1 1

What T F/F inputs are needed to make them change to the next state?What T F/F inputs are needed to make them change to the next state?

0 0 10 1 10 0 11 1 1

9

From Table to K-mapsFrom Table to K-maps

CurrentCurrent Flip-FlopFlip-FlopStateState InputsInputs

C B A TC TB TA0 0 0 0 0 10 0 1 0 1 10 1 0 0 0 10 1 1 1 1 11 0 0 0 0 11 0 1 0 1 11 1 0 0 0 11 1 1 1 1 1

Re-drawn Table

TA = 1

TB = A

TC = A•B

CBA 00 01 11 10

0

1

1 1 1 1

1 1 1 1

TA

CBA 00 01 11 10

0

1

0 0 0 0

1 1 1 1

TB

CBA 00 01 11 10

0

1

0 0 0 0

0 1 1 0

TC

10Count

\Reset

Q C

Q B

Q A

100

Build the Circuit!Build the Circuit!

Timing DiagramTiming Diagram

T

CLK

\Reset

Q

Q

S

R

QAT

CLK

Q

Q

S

R

QBT

CLK

Q

Q

S

R

QC

Count

+5VTA = 1TB = A

TC = A B

11

Complex CountersComplex Counters

1. Draw a State Transition Diagram

The generalized design process has four stepsThe generalized design process has four stepsThe generalized design process has four stepsThe generalized design process has four steps

2. Derive the State Transition Table

3. Choose a Flip-Flop to Implement the Design

4. Derive the Flip-Flop Input Functions

Note: this list skips step 3 on page 341 of the Katz.Note: this list skips step 3 on page 341 of the Katz.

12

Complex CountersComplex Counters

1. Derive the State Transition Diagram

1. Derive the State Transition Diagram

Design a counter with the sequence 000, 010, 011, 101, 110, and wrap Design a counter with the sequence 000, 010, 011, 101, 110, and wrap Design a counter with the sequence 000, 010, 011, 101, 110, and wrap Design a counter with the sequence 000, 010, 011, 101, 110, and wrap

000 010

101

110 011

State Diagram

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2. State Transition Table2. State Transition Table

000 010

101

110 011

CurrentCurrent NextNextStateState StateState

C B A C+ B+ A+

0 0 00 0 10 1 00 1 11 0 01 0 11 1 01 1 1

State Diagram State Transition Table

Tabulate the Next State for each State in the DiagramTabulate the Next State for each State in the Diagram

Note the use of Don't Care conditions

0 1 0X X X0 1 11 0 1X X X1 1 00 0 0X X X

14

3. Choose F/Fs3. Choose F/FsSuppose we choose T Flip-Flops to implement the designSuppose we choose T Flip-Flops to implement the design

Q Q+ T0 0 00 1 11 0 11 1 0

Excitation Table

15

4. Derive the F/F Inputs4. Derive the F/F Inputs

Q Q+ T0 0 00 1 11 0 11 1 0

Excitation Table

CurrentCurrent NextNext Flip-FlopFlip-FlopStateState StateState InputsInputs

C B A C+ B+ A+ TC TB TA0 0 0 0 1 00 0 1 X X X0 1 0 0 1 10 1 1 1 0 11 0 0 X X X1 0 1 1 1 01 1 0 0 0 01 1 1 X X X

State Transition Table F/F Input Table

0 1 0X X X0 0 11 1 0X X X0 1 11 1 0X X X

16

0 0 1 X

X 1 X 0TC

CBA 00 01 11 10

0

1

SimplifySimplify

CurrentCurrent Flip-FlopFlip-FlopStateState InputsInputs

C B A TC TB TA0 0 0 0 1 00 0 1 X X X0 1 0 0 0 10 1 1 1 1 01 0 0 X X X1 0 1 0 1 11 1 0 1 1 01 1 1 X X X

Re-drawn Table

0 1 0 X

X 0 X 1

CBA 00 01 11 10

0

1

TA

1 0 1 X

X 1 X 1

CBA 00 01 11 10

0

1

TB

TA = A·B·C + B·C

TB = A + B + C

TC = A·C + A·C = A C

17

Build The Circuit!Build The Circuit!

TCT

CLK

Q

Q

S

RCount

T

CLK

Q

Q

S

R

TBC

\C

B A

\B \A

TAT

CLK

Q

Q

S

R

\Reset

C

B

TA

\A

\C

\B

TA = A·B·C + B·C

C

\B TB ATB = A + B + C

TCA

C

TC = A C

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Do Activity #1 NowDo Activity #1 Now

Q Q+ T0 0 00 1 11 0 11 1 0

Excitation Table

For T F/F

TCT

CLK

Q

Q

S

RCount

T

CLK

Q

Q

S

R

TBC

\C

B A

\B \A

TAT

CLK

Q

Q

S

R

\Reset

C

\B TB A

TCA

C

C

B

TA

\A

\C

\B

Note: This is a just a cleaner way to sketch the circuitWorks properly in LogicWorksWhen we work with hardware,

we have to explicitly wire these connections

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When a counter “wakes up”…When a counter “wakes up”…

State DiagramState Diagram

001

100

000

010

011

101

110

111In the counter example from the previous lecture, states 001001, 100100, & 111111 were skipped

It is possible that the random power-up state may be one of these

Can we be sure the counter will sequence properly?

The counter may be in any possible stateThis may include skipped statesskipped states

Random power-up statesRandom power-up states

20

Don't-Care AssignmentsDon't-Care Assignments

The Xs for the Toggle Inputs were set by the K-maps to minimize the T Flip-Flop Input Functions

Flip-Flop Input Functions

Flip-Flop Input Functions

PresentState

ToggleInputs

C B A TC TB TA0 0 0 0 1 00 0 1 11 00 110 1 0 0 0 10 1 1 1 1 01 0 0 00 11 111 0 1 0 1 11 1 0 1 1 01 1 1 11 11 00

K-map minimizationK-map minimization

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State DiagramState Diagram

001

100

000

010

011

101

110

111 When these K-map assignments are made for the Xs, it results in

001 001 100, 100 100, 100 111, and 111, and 111 111 001 001

Skipped State BehaviorSkipped State Behavior

Therefore, the counter might not sequence properly

Sequences from K-map minimizationSequences from K-map minimization

22

Self-Starting CounterSelf-Starting Counter

A self-starting counter is one that transitions to a valid state even if it started off in any other state.

Many possible choices & tradeoffs

001

100

000

010

011

101

110

111

23

Counter Reset SolutionCounter Reset SolutionUse a separate Reset switch

Power-ON Reset Circuit: Reset signal is 1 briefly while circuit is powered up. This signal is used to reset all flip-flops.

+5

High threshold

Reset Time

t

5e-t/RC

PWR

+5V

C

R

To FF Resets

24

Using other Flip-FlopsUsing other Flip-Flops

Just use the correct Excitation Table in setting up the flip-flop input function table.

The input functions must be appropriate for the flip-flop type (no bad input patterns).

25

Example #1:J-K F/FExample #1:J-K F/F

Fill in flip-flop input functions based on J-K excitation tableFill in flip-flop input functions based on J-K excitation table

Flip-Flop Input FunctionsFlip-Flop Input Functions

PresentState

NextState

C B A C+ B+ A+ JC KC JB KB JA KA

Flip-FlopInputs

3-bit Counter: 0 2 3 5 6 0 … 3-bit Counter: 0 2 3 5 6 0 …

0 0 0 0 1 00 0 1 X X X0 1 0 0 1 10 1 1 1 0 11 0 0 X X X1 0 1 1 1 01 1 0 0 0 0 1 1 1 X X X

0 X 1 X 0 XX X X X X X0 X X 0 1 X1 X X 1 X 0X X X X X XX 0 1 X X 1X 1 X 1 0 XX X X X X X

Q Q+ J K0 0 0 X0 1 1 X1 0 X 11 1 X 0

Q+ = J Q' + K' Q

J-K Excitation TableJ-K Excitation Table

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Input Function K-MapsInput Function K-Maps

CBA C+ B+ A+ JC KC JB KB JA KA0 0 0 0 1 0 0 X 1 X 0 X0 0 1 X X X X X X X X X0 1 0 0 1 1 0 X X 0 1 X0 1 1 1 0 1 1 X X 1 X 01 0 0 X X X X X X X X X1 0 1 1 1 0 X 0 1 X X 11 1 0 0 0 0 X 1 X 1 0 X1 1 1 X X X X X X X X X

Flip-Flop Input FunctionsFlip-Flop Input Functions

PresentState

NextState

Flip-Flop InputInputs

CB00 01 11 10A

0

1

JC

0 0 X X

X 1 X X

CB00 01 11 10A

0

1

KC

X X 1 X

X X X 0

CB00 01 11 10A

0

1

JB

1 X X X

X X X 1

CB00 01 11 10A

0

1

JA

0 1 0 X

X X X X

CB00 01 11 10A

0

1

KB

X 0 1 X

X 1 X X

CB00 01 11 10A

0

1

KA

X X X X

X 0 X 1

= A = A’

= 1 = A + C

= B C' = C

27

J-K Flip-Flop CounterJ-K Flip-Flop Counter

Resulting Logic Level Implementation: 2 Gates, 10 Input Literals + Flip-Flop ConnectionsResulting Logic Level Implementation: 2 Gates, 10 Input Literals + Flip-Flop Connections

CLK CLK CLK J

K

Q

Q

A

\ A

C

\ C KB

J

K

Q

Q

B

\ B

+5V

J

K

Q

Q

JA

C

A

\ A

B \ C

Count

A C KB JA

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Example #2: D F/FExample #2: D F/F

Simplest Design ProcedureSimplest Design Procedure

D F/F inputs are identical to the nextstate outputs in the state transition table

Simplest Design ProcedureSimplest Design Procedure

D F/F inputs are identical to the nextstate outputs in the state transition table

CBA C+ B+ A+ DC DB DA0 0 0 0 1 0 0 1 00 0 1 X X X X X X0 1 0 0 1 1 0 1 10 1 1 1 0 1 1 0 11 0 0 X X X X X X1 0 1 1 1 0 1 1 01 1 0 0 0 0 0 0 01 1 1 X X X X X X

C+ B+ A+ columns are identical to DC DB DA columns

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D Flip-Flop CounterD Flip-Flop Counter

Resulting Logic Level Implementation: 3 Gates, 8 Input Literals + Flip-Flop connectionsResulting Logic Level Implementation: 3 Gates, 8 Input Literals + Flip-Flop connections

CLK CLK

D Q

Q

A

\ A

D Q

Q

DA DB B

\ B CLK

D Q

Q

A C

\ C Count

\ C \ A

\ B

B \ C DA DB

30

ComparisonComparison

• T F/Fs well suited for straightforward binary counters

– But yielded worst gate and literal count for this example!

• J-K F/Fs yielded lowest gate count

– Tend to yield best choice for packaged logic where gate count is key

• D F/Fs yield simplest design procedure

– Best literal count

– D storage devices very transistor efficient in VLSI

» Best choice where area/literal count is the key

31

Do Activity #2 NowDo Activity #2 NowDue: End of Class Today. NO EXTENSION TODAY

RETAIN THE LAST PAGE(S) (#3 onwards)!!

For Next Class:• Bring Randy Katz Textbook, & TTL Data Book

• Required Reading:– Sec 7.4, 7.6 of Katz

• This reading is necessary for getting points in the Studio Activity!